Change the kernel dev_t, representing a pointer to a specinfo structure,
[dragonfly.git] / sys / dev / serial / stl / stallion.c
... / ...
CommitLineData
1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (c) 1995-1996 Greg Ungerer (gerg@stallion.oz.au).
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by Greg Ungerer.
20 * 4. Neither the name of the author nor the names of any co-contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * $FreeBSD: src/sys/i386/isa/stallion.c,v 1.39.2.2 2001/08/30 12:29:57 murray Exp $
37 * $DragonFly: src/sys/dev/serial/stl/stallion.c,v 1.21 2006/09/10 01:26:37 dillon Exp $
38 */
39
40/*****************************************************************************/
41
42#define TTYDEFCHARS 1
43
44#include "use_pci.h"
45#include "opt_compat.h"
46
47#include <sys/param.h>
48#include <sys/systm.h>
49#include <sys/kernel.h>
50#include <sys/malloc.h>
51#include <sys/tty.h>
52#include <sys/proc.h>
53#include <sys/conf.h>
54#include <sys/fcntl.h>
55#include <sys/thread2.h>
56#include <bus/isa/i386/isa_device.h>
57#include <i386/isa/ic/scd1400.h>
58#include <i386/isa/ic/sc26198.h>
59#include <machine/comstats.h>
60
61#if NPCI > 0
62#include <bus/pci/pcivar.h>
63#include <bus/pci/pcireg.h>
64#endif
65
66#undef STLDEBUG
67
68/*****************************************************************************/
69
70/*
71 * Define the version level of the kernel - so we can compile in the
72 * appropriate bits of code. By default this will compile for a 2.1
73 * level kernel.
74 */
75#define VFREEBSD 220
76
77#if VFREEBSD >= 220
78#define STATIC static
79#else
80#define STATIC
81#endif
82
83/*****************************************************************************/
84
85/*
86 * Define different board types. At the moment I have only declared
87 * those boards that this driver supports. But I will use the standard
88 * "assigned" board numbers. In the future this driver will support
89 * some of the other Stallion boards. Currently supported boards are
90 * abbreviated as EIO = EasyIO and ECH = EasyConnection 8/32.
91 */
92#define BRD_EASYIO 20
93#define BRD_ECH 21
94#define BRD_ECHMC 22
95#define BRD_ECHPCI 26
96#define BRD_ECH64PCI 27
97#define BRD_EASYIOPCI 28
98
99/*
100 * When using the BSD "config" stuff there is no easy way to specifiy
101 * a secondary IO address region. So it is hard wired here. Also the
102 * shared interrupt information is hard wired here...
103 */
104static unsigned int stl_ioshared = 0x280;
105static unsigned int stl_irqshared = 0;
106
107/*****************************************************************************/
108
109/*
110 * Define important driver limitations.
111 */
112#define STL_MAXBRDS 8
113#define STL_MAXPANELS 4
114#define STL_MAXBANKS 8
115#define STL_PORTSPERPANEL 16
116#define STL_PORTSPERBRD 64
117
118/*
119 * Define the important minor number break down bits. These have been
120 * chosen to be "compatible" with the standard sio driver minor numbers.
121 * Extra high bits are used to distinguish between boards.
122 */
123#define STL_CALLOUTDEV 0x80
124#define STL_CTRLLOCK 0x40
125#define STL_CTRLINIT 0x20
126#define STL_CTRLDEV (STL_CTRLLOCK | STL_CTRLINIT)
127
128#define STL_MEMDEV 0x07000000
129
130#define STL_DEFSPEED TTYDEF_SPEED
131#define STL_DEFCFLAG (CS8 | CREAD | HUPCL)
132
133/*
134 * I haven't really decided (or measured) what buffer sizes give
135 * a good balance between performance and memory usage. These seem
136 * to work pretty well...
137 */
138#define STL_RXBUFSIZE 2048
139#define STL_TXBUFSIZE 2048
140
141#define STL_TXBUFLOW (STL_TXBUFSIZE / 4)
142#define STL_RXBUFHIGH (3 * STL_RXBUFSIZE / 4)
143
144/*****************************************************************************/
145
146/*
147 * Define our local driver identity first. Set up stuff to deal with
148 * all the local structures required by a serial tty driver.
149 */
150static const char stl_drvname[] = "stl";
151static const char stl_longdrvname[] = "Stallion Multiport Serial Driver";
152static const char stl_drvversion[] = "2.0.0";
153static int stl_brdprobed[STL_MAXBRDS];
154
155static int stl_nrbrds = 0;
156static int stl_doingtimeout = 0;
157static struct callout stl_poll_ch;
158
159static const char __file__[] = /*__FILE__*/ "stallion.c";
160
161/*
162 * Define global stats structures. Not used often, and can be
163 * re-used for each stats call.
164 */
165static combrd_t stl_brdstats;
166static comstats_t stl_comstats;
167
168/*****************************************************************************/
169
170/*
171 * Define a set of structures to hold all the board/panel/port info
172 * for our ports. These will be dynamically allocated as required.
173 */
174
175/*
176 * Define a ring queue structure for each port. This will hold the
177 * TX data waiting to be output. Characters are fed into this buffer
178 * from the line discipline (or even direct from user space!) and
179 * then fed into the UARTs during interrupts. Will use a clasic ring
180 * queue here for this. The good thing about this type of ring queue
181 * is that the head and tail pointers can be updated without interrupt
182 * protection - since "write" code only needs to change the head, and
183 * interrupt code only needs to change the tail.
184 */
185typedef struct {
186 char *buf;
187 char *endbuf;
188 char *head;
189 char *tail;
190} stlrq_t;
191
192/*
193 * Port, panel and board structures to hold status info about each.
194 * The board structure contains pointers to structures for each panel
195 * connected to it, and in turn each panel structure contains pointers
196 * for each port structure for each port on that panel. Note that
197 * the port structure also contains the board and panel number that it
198 * is associated with, this makes it (fairly) easy to get back to the
199 * board/panel info for a port. Also note that the tty struct is at
200 * the top of the structure, this is important, since the code uses
201 * this fact to get the port struct pointer from the tty struct
202 * pointer!
203 */
204typedef struct stlport {
205 struct tty tty;
206 int portnr;
207 int panelnr;
208 int brdnr;
209 int ioaddr;
210 int uartaddr;
211 int pagenr;
212 int callout;
213 int brklen;
214 int dtrwait;
215 int dotimestamp;
216 int waitopens;
217 int hotchar;
218 void *uartp;
219 unsigned int state;
220 unsigned int hwid;
221 unsigned int sigs;
222 unsigned int rxignoremsk;
223 unsigned int rxmarkmsk;
224 unsigned int crenable;
225 unsigned int imr;
226 unsigned long clk;
227 struct termios initintios;
228 struct termios initouttios;
229 struct termios lockintios;
230 struct termios lockouttios;
231 struct timeval timestamp;
232 comstats_t stats;
233 stlrq_t tx;
234 stlrq_t rx;
235 stlrq_t rxstatus;
236 struct callout dtr_ch;
237} stlport_t;
238
239typedef struct stlpanel {
240 int panelnr;
241 int brdnr;
242 int pagenr;
243 int nrports;
244 int iobase;
245 unsigned int hwid;
246 unsigned int ackmask;
247 void (*isr)(struct stlpanel *panelp, unsigned int iobase);
248 void *uartp;
249 stlport_t *ports[STL_PORTSPERPANEL];
250} stlpanel_t;
251
252typedef struct stlbrd {
253 int brdnr;
254 int brdtype;
255 int unitid;
256 int state;
257 int nrpanels;
258 int nrports;
259 int nrbnks;
260 int irq;
261 int irqtype;
262 unsigned int ioaddr1;
263 unsigned int ioaddr2;
264 unsigned int iostatus;
265 unsigned int ioctrl;
266 unsigned int ioctrlval;
267 unsigned int hwid;
268 unsigned long clk;
269 void (*isr)(struct stlbrd *brdp);
270 unsigned int bnkpageaddr[STL_MAXBANKS];
271 unsigned int bnkstataddr[STL_MAXBANKS];
272 stlpanel_t *bnk2panel[STL_MAXBANKS];
273 stlpanel_t *panels[STL_MAXPANELS];
274 stlport_t *ports[STL_PORTSPERBRD];
275} stlbrd_t;
276
277static stlbrd_t *stl_brds[STL_MAXBRDS];
278
279/*
280 * Per board state flags. Used with the state field of the board struct.
281 * Not really much here yet!
282 */
283#define BRD_FOUND 0x1
284
285/*
286 * Define the port structure state flags. These set of flags are
287 * modified at interrupt time - so setting and reseting them needs
288 * to be atomic.
289 */
290#define ASY_TXLOW 0x1
291#define ASY_RXDATA 0x2
292#define ASY_DCDCHANGE 0x4
293#define ASY_DTRWAIT 0x8
294#define ASY_RTSFLOW 0x10
295#define ASY_RTSFLOWMODE 0x20
296#define ASY_CTSFLOWMODE 0x40
297#define ASY_TXFLOWED 0x80
298#define ASY_TXBUSY 0x100
299#define ASY_TXEMPTY 0x200
300
301#define ASY_ACTIVE (ASY_TXLOW | ASY_RXDATA | ASY_DCDCHANGE)
302
303/*
304 * Define an array of board names as printable strings. Handy for
305 * referencing boards when printing trace and stuff.
306 */
307static char *stl_brdnames[] = {
308 (char *) NULL,
309 (char *) NULL,
310 (char *) NULL,
311 (char *) NULL,
312 (char *) NULL,
313 (char *) NULL,
314 (char *) NULL,
315 (char *) NULL,
316 (char *) NULL,
317 (char *) NULL,
318 (char *) NULL,
319 (char *) NULL,
320 (char *) NULL,
321 (char *) NULL,
322 (char *) NULL,
323 (char *) NULL,
324 (char *) NULL,
325 (char *) NULL,
326 (char *) NULL,
327 (char *) NULL,
328 "EasyIO",
329 "EC8/32-AT",
330 "EC8/32-MC",
331 (char *) NULL,
332 (char *) NULL,
333 (char *) NULL,
334 "EC8/32-PCI",
335 "EC8/64-PCI",
336 "EasyIO-PCI",
337};
338
339/*****************************************************************************/
340
341/*
342 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
343 * to the directly accessable io ports of these boards (not the cd1400
344 * uarts - they are in scd1400.h).
345 */
346#define EIO_8PORTRS 0x04
347#define EIO_4PORTRS 0x05
348#define EIO_8PORTDI 0x00
349#define EIO_8PORTM 0x06
350#define EIO_MK3 0x03
351#define EIO_IDBITMASK 0x07
352
353#define EIO_BRDMASK 0xf0
354#define ID_BRD4 0x10
355#define ID_BRD8 0x20
356#define ID_BRD16 0x30
357
358#define EIO_INTRPEND 0x08
359#define EIO_INTEDGE 0x00
360#define EIO_INTLEVEL 0x08
361
362#define ECH_ID 0xa0
363#define ECH_IDBITMASK 0xe0
364#define ECH_BRDENABLE 0x08
365#define ECH_BRDDISABLE 0x00
366#define ECH_INTENABLE 0x01
367#define ECH_INTDISABLE 0x00
368#define ECH_INTLEVEL 0x02
369#define ECH_INTEDGE 0x00
370#define ECH_INTRPEND 0x01
371#define ECH_BRDRESET 0x01
372
373#define ECHMC_INTENABLE 0x01
374#define ECHMC_BRDRESET 0x02
375
376#define ECH_PNLSTATUS 2
377#define ECH_PNL16PORT 0x20
378#define ECH_PNLIDMASK 0x07
379#define ECH_PNLXPID 0x40
380#define ECH_PNLINTRPEND 0x80
381#define ECH_ADDR2MASK 0x1e0
382
383#define EIO_CLK 25000000
384#define EIO_CLK8M 20000000
385#define ECH_CLK EIO_CLK
386
387/*
388 * Define the PCI vendor and device ID for Stallion PCI boards.
389 */
390#define STL_PCINSVENDID 0x100b
391#define STL_PCINSDEVID 0xd001
392
393#define STL_PCIVENDID 0x124d
394#define STL_PCI32DEVID 0x0000
395#define STL_PCI64DEVID 0x0002
396#define STL_PCIEIODEVID 0x0003
397
398#define STL_PCIBADCLASS 0x0101
399
400typedef struct stlpcibrd {
401 unsigned short vendid;
402 unsigned short devid;
403 int brdtype;
404} stlpcibrd_t;
405
406static stlpcibrd_t stl_pcibrds[] = {
407 { STL_PCIVENDID, STL_PCI64DEVID, BRD_ECH64PCI },
408 { STL_PCIVENDID, STL_PCIEIODEVID, BRD_EASYIOPCI },
409 { STL_PCIVENDID, STL_PCI32DEVID, BRD_ECHPCI },
410 { STL_PCINSVENDID, STL_PCINSDEVID, BRD_ECHPCI },
411};
412
413static int stl_nrpcibrds = sizeof(stl_pcibrds) / sizeof(stlpcibrd_t);
414
415/*****************************************************************************/
416
417/*
418 * Define the vector mapping bits for the programmable interrupt board
419 * hardware. These bits encode the interrupt for the board to use - it
420 * is software selectable (except the EIO-8M).
421 */
422static unsigned char stl_vecmap[] = {
423 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
424 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
425};
426
427/*
428 * Set up enable and disable macros for the ECH boards. They require
429 * the secondary io address space to be activated and deactivated.
430 * This way all ECH boards can share their secondary io region.
431 * If this is an ECH-PCI board then also need to set the page pointer
432 * to point to the correct page.
433 */
434#define BRDENABLE(brdnr,pagenr) \
435 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
436 outb(stl_brds[(brdnr)]->ioctrl, \
437 (stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE));\
438 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
439 outb(stl_brds[(brdnr)]->ioctrl, (pagenr));
440
441#define BRDDISABLE(brdnr) \
442 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
443 outb(stl_brds[(brdnr)]->ioctrl, \
444 (stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE));
445
446/*
447 * Define some spare buffer space for un-wanted received characters.
448 */
449static char stl_unwanted[SC26198_RXFIFOSIZE];
450
451/*****************************************************************************/
452
453/*
454 * Define macros to extract a brd and port number from a minor number.
455 * This uses the extended minor number range in the upper 2 bytes of
456 * the device number. This gives us plenty of minor numbers to play
457 * with...
458 */
459#define MKDEV2BRD(m) ((minor(m) & 0x00700000) >> 20)
460#define MKDEV2PORT(m) ((minor(m) & 0x1f) | ((minor(m) & 0x00010000) >> 11))
461
462/*
463 * Define some handy local macros...
464 */
465#ifndef MIN
466#define MIN(a,b) (((a) <= (b)) ? (a) : (b))
467#endif
468
469/*****************************************************************************/
470
471/*
472 * Declare all those functions in this driver! First up is the set of
473 * externally visible functions.
474 */
475
476static int stlprobe(struct isa_device *idp);
477static int stlattach(struct isa_device *idp);
478
479STATIC d_open_t stlopen;
480STATIC d_close_t stlclose;
481STATIC d_ioctl_t stlioctl;
482
483/*
484 * Internal function prototypes.
485 */
486static stlport_t *stl_dev2port(cdev_t dev);
487static int stl_findfreeunit(void);
488static int stl_rawopen(stlport_t *portp);
489static int stl_rawclose(stlport_t *portp);
490static void stl_flush(stlport_t *portp, int flag);
491static int stl_param(struct tty *tp, struct termios *tiosp);
492static void stl_start(struct tty *tp);
493static void stl_stop(struct tty *tp, int);
494static void stl_ttyoptim(stlport_t *portp, struct termios *tiosp);
495static void stl_dotimeout(void);
496static void stl_poll(void *arg);
497static void stl_rxprocess(stlport_t *portp);
498static void stl_flowcontrol(stlport_t *portp, int hw, int sw);
499static void stl_dtrwakeup(void *arg);
500static int stl_brdinit(stlbrd_t *brdp);
501static int stl_initeio(stlbrd_t *brdp);
502static int stl_initech(stlbrd_t *brdp);
503static int stl_initports(stlbrd_t *brdp, stlpanel_t *panelp);
504static void stl_eiointr(stlbrd_t *brdp);
505static void stl_echatintr(stlbrd_t *brdp);
506static void stl_echmcaintr(stlbrd_t *brdp);
507static void stl_echpciintr(stlbrd_t *brdp);
508static void stl_echpci64intr(stlbrd_t *brdp);
509static int stl_memioctl(cdev_t dev, unsigned long cmd, caddr_t data,
510 int flag);
511static int stl_getbrdstats(caddr_t data);
512static int stl_getportstats(stlport_t *portp, caddr_t data);
513static int stl_clrportstats(stlport_t *portp, caddr_t data);
514static stlport_t *stl_getport(int brdnr, int panelnr, int portnr);
515static void stlintr(void *);
516
517#if NPCI > 0
518static const char *stlpciprobe(pcici_t tag, pcidi_t type);
519static void stlpciattach(pcici_t tag, int unit);
520static void stlpciintr(void * arg);
521#endif
522
523/*
524 * CD1400 uart specific handling functions.
525 */
526static void stl_cd1400setreg(stlport_t *portp, int regnr, int value);
527static int stl_cd1400getreg(stlport_t *portp, int regnr);
528static int stl_cd1400updatereg(stlport_t *portp, int regnr, int value);
529static int stl_cd1400panelinit(stlbrd_t *brdp, stlpanel_t *panelp);
530static void stl_cd1400portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
531static int stl_cd1400setport(stlport_t *portp, struct termios *tiosp);
532static int stl_cd1400getsignals(stlport_t *portp);
533static void stl_cd1400setsignals(stlport_t *portp, int dtr, int rts);
534static void stl_cd1400ccrwait(stlport_t *portp);
535static void stl_cd1400enablerxtx(stlport_t *portp, int rx, int tx);
536static void stl_cd1400startrxtx(stlport_t *portp, int rx, int tx);
537static void stl_cd1400disableintrs(stlport_t *portp);
538static void stl_cd1400sendbreak(stlport_t *portp, long len);
539static void stl_cd1400sendflow(stlport_t *portp, int hw, int sw);
540static int stl_cd1400datastate(stlport_t *portp);
541static void stl_cd1400flush(stlport_t *portp, int flag);
542static __inline void stl_cd1400txisr(stlpanel_t *panelp, int ioaddr);
543static void stl_cd1400rxisr(stlpanel_t *panelp, int ioaddr);
544static void stl_cd1400mdmisr(stlpanel_t *panelp, int ioaddr);
545static void stl_cd1400eiointr(stlpanel_t *panelp, unsigned int iobase);
546static void stl_cd1400echintr(stlpanel_t *panelp, unsigned int iobase);
547
548/*
549 * SC26198 uart specific handling functions.
550 */
551static void stl_sc26198setreg(stlport_t *portp, int regnr, int value);
552static int stl_sc26198getreg(stlport_t *portp, int regnr);
553static int stl_sc26198updatereg(stlport_t *portp, int regnr, int value);
554static int stl_sc26198getglobreg(stlport_t *portp, int regnr);
555static int stl_sc26198panelinit(stlbrd_t *brdp, stlpanel_t *panelp);
556static void stl_sc26198portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
557static int stl_sc26198setport(stlport_t *portp, struct termios *tiosp);
558static int stl_sc26198getsignals(stlport_t *portp);
559static void stl_sc26198setsignals(stlport_t *portp, int dtr, int rts);
560static void stl_sc26198enablerxtx(stlport_t *portp, int rx, int tx);
561static void stl_sc26198startrxtx(stlport_t *portp, int rx, int tx);
562static void stl_sc26198disableintrs(stlport_t *portp);
563static void stl_sc26198sendbreak(stlport_t *portp, long len);
564static void stl_sc26198sendflow(stlport_t *portp, int hw, int sw);
565static int stl_sc26198datastate(stlport_t *portp);
566static void stl_sc26198flush(stlport_t *portp, int flag);
567static void stl_sc26198txunflow(stlport_t *portp);
568static void stl_sc26198wait(stlport_t *portp);
569static void stl_sc26198intr(stlpanel_t *panelp, unsigned int iobase);
570static void stl_sc26198txisr(stlport_t *port);
571static void stl_sc26198rxisr(stlport_t *port, unsigned int iack);
572static void stl_sc26198rxgoodchars(stlport_t *portp);
573static void stl_sc26198rxbadchars(stlport_t *portp);
574static void stl_sc26198otherisr(stlport_t *port, unsigned int iack);
575
576/*****************************************************************************/
577
578/*
579 * Generic UART support structure.
580 */
581typedef struct uart {
582 int (*panelinit)(stlbrd_t *brdp, stlpanel_t *panelp);
583 void (*portinit)(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
584 int (*setport)(stlport_t *portp, struct termios *tiosp);
585 int (*getsignals)(stlport_t *portp);
586 void (*setsignals)(stlport_t *portp, int dtr, int rts);
587 void (*enablerxtx)(stlport_t *portp, int rx, int tx);
588 void (*startrxtx)(stlport_t *portp, int rx, int tx);
589 void (*disableintrs)(stlport_t *portp);
590 void (*sendbreak)(stlport_t *portp, long len);
591 void (*sendflow)(stlport_t *portp, int hw, int sw);
592 void (*flush)(stlport_t *portp, int flag);
593 int (*datastate)(stlport_t *portp);
594 void (*intr)(stlpanel_t *panelp, unsigned int iobase);
595} uart_t;
596
597/*
598 * Define some macros to make calling these functions nice and clean.
599 */
600#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
601#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
602#define stl_setport (* ((uart_t *) portp->uartp)->setport)
603#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
604#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
605#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
606#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
607#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
608#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
609#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
610#define stl_uartflush (* ((uart_t *) portp->uartp)->flush)
611#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
612
613/*****************************************************************************/
614
615/*
616 * CD1400 UART specific data initialization.
617 */
618static uart_t stl_cd1400uart = {
619 stl_cd1400panelinit,
620 stl_cd1400portinit,
621 stl_cd1400setport,
622 stl_cd1400getsignals,
623 stl_cd1400setsignals,
624 stl_cd1400enablerxtx,
625 stl_cd1400startrxtx,
626 stl_cd1400disableintrs,
627 stl_cd1400sendbreak,
628 stl_cd1400sendflow,
629 stl_cd1400flush,
630 stl_cd1400datastate,
631 stl_cd1400eiointr
632};
633
634/*
635 * Define the offsets within the register bank of a cd1400 based panel.
636 * These io address offsets are common to the EasyIO board as well.
637 */
638#define EREG_ADDR 0
639#define EREG_DATA 4
640#define EREG_RXACK 5
641#define EREG_TXACK 6
642#define EREG_MDACK 7
643
644#define EREG_BANKSIZE 8
645
646#define CD1400_CLK 25000000
647#define CD1400_CLK8M 20000000
648
649/*
650 * Define the cd1400 baud rate clocks. These are used when calculating
651 * what clock and divisor to use for the required baud rate. Also
652 * define the maximum baud rate allowed, and the default base baud.
653 */
654static int stl_cd1400clkdivs[] = {
655 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
656};
657
658/*
659 * Define the maximum baud rate of the cd1400 devices.
660 */
661#define CD1400_MAXBAUD 230400
662
663/*****************************************************************************/
664
665/*
666 * SC26198 UART specific data initization.
667 */
668static uart_t stl_sc26198uart = {
669 stl_sc26198panelinit,
670 stl_sc26198portinit,
671 stl_sc26198setport,
672 stl_sc26198getsignals,
673 stl_sc26198setsignals,
674 stl_sc26198enablerxtx,
675 stl_sc26198startrxtx,
676 stl_sc26198disableintrs,
677 stl_sc26198sendbreak,
678 stl_sc26198sendflow,
679 stl_sc26198flush,
680 stl_sc26198datastate,
681 stl_sc26198intr
682};
683
684/*
685 * Define the offsets within the register bank of a sc26198 based panel.
686 */
687#define XP_DATA 0
688#define XP_ADDR 1
689#define XP_MODID 2
690#define XP_STATUS 2
691#define XP_IACK 3
692
693#define XP_BANKSIZE 4
694
695/*
696 * Define the sc26198 baud rate table. Offsets within the table
697 * represent the actual baud rate selector of sc26198 registers.
698 */
699static unsigned int sc26198_baudtable[] = {
700 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
701 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
702 230400, 460800
703};
704
705#define SC26198_NRBAUDS (sizeof(sc26198_baudtable) / sizeof(unsigned int))
706
707/*
708 * Define the maximum baud rate of the sc26198 devices.
709 */
710#define SC26198_MAXBAUD 460800
711
712/*****************************************************************************/
713
714/*
715 * Declare the driver isa structure.
716 */
717struct isa_driver stldriver = {
718 stlprobe, stlattach, "stl"
719};
720
721/*****************************************************************************/
722
723#if NPCI > 0
724
725/*
726 * Declare the driver pci structure.
727 */
728static unsigned long stl_count;
729
730static struct pci_device stlpcidriver = {
731 "stl",
732 stlpciprobe,
733 stlpciattach,
734 &stl_count,
735 NULL,
736};
737
738COMPAT_PCI_DRIVER (stlpci, stlpcidriver);
739
740#endif
741
742/*****************************************************************************/
743
744#if VFREEBSD >= 220
745
746/*
747 * FreeBSD-2.2+ kernel linkage.
748 */
749
750#define CDEV_MAJOR 72
751static struct dev_ops stl_ops = {
752 { "stl", CDEV_MAJOR, D_TTY | D_KQFILTER },
753 .d_open = stlopen,
754 .d_close = stlclose,
755 .d_read = ttyread,
756 .d_write = ttywrite,
757 .d_ioctl = stlioctl,
758 .d_poll = ttypoll,
759 .d_kqfilter = ttykqfilter
760};
761
762static void stl_drvinit(void *unused)
763{
764}
765
766SYSINIT(sidev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,stl_drvinit,NULL)
767
768#endif
769
770/*****************************************************************************/
771
772/*
773 * Probe for some type of EasyIO or EasyConnection 8/32 board at
774 * the supplied address. All we do is check if we can find the
775 * board ID for the board... (Note, PCI boards not checked here,
776 * they are done in the stlpciprobe() routine).
777 */
778
779static int stlprobe(struct isa_device *idp)
780{
781 unsigned int status;
782
783#if STLDEBUG
784 printf("stlprobe(idp=%x): unit=%d iobase=%x\n", (int) idp,
785 idp->id_unit, idp->id_iobase);
786#endif
787
788 if (idp->id_unit > STL_MAXBRDS)
789 return(0);
790
791 status = inb(idp->id_iobase + 1);
792 if ((status & ECH_IDBITMASK) == ECH_ID) {
793 stl_brdprobed[idp->id_unit] = BRD_ECH;
794 return(1);
795 }
796
797 status = inb(idp->id_iobase + 2);
798 switch (status & EIO_IDBITMASK) {
799 case EIO_8PORTRS:
800 case EIO_8PORTM:
801 case EIO_8PORTDI:
802 case EIO_4PORTRS:
803 case EIO_MK3:
804 stl_brdprobed[idp->id_unit] = BRD_EASYIO;
805 return(1);
806 default:
807 break;
808 }
809
810 return(0);
811}
812
813/*****************************************************************************/
814
815/*
816 * Find an available internal board number (unit number). The problem
817 * is that the same unit numbers can be assigned to different boards
818 * detected during the ISA and PCI initialization phases.
819 */
820
821static int stl_findfreeunit()
822{
823 int i;
824
825 for (i = 0; (i < STL_MAXBRDS); i++)
826 if (stl_brds[i] == (stlbrd_t *) NULL)
827 break;
828 return((i >= STL_MAXBRDS) ? -1 : i);
829}
830
831/*****************************************************************************/
832
833/*
834 * Allocate resources for and initialize the specified board.
835 */
836
837static int stlattach(struct isa_device *idp)
838{
839 stlbrd_t *brdp;
840 int boardnr, portnr, minor_dev;
841
842#if STLDEBUG
843 printf("stlattach(idp=%p): unit=%d iobase=%x\n", (void *) idp,
844 idp->id_unit, idp->id_iobase);
845#endif
846
847/* idp->id_intr = (inthand2_t *)stlintr; */
848
849 brdp = kmalloc(sizeof(stlbrd_t), M_TTYS, M_WAITOK | M_ZERO);
850
851 if ((brdp->brdnr = stl_findfreeunit()) < 0) {
852 printf("STALLION: too many boards found, max=%d\n",
853 STL_MAXBRDS);
854 return(0);
855 }
856 if (brdp->brdnr >= stl_nrbrds)
857 stl_nrbrds = brdp->brdnr + 1;
858
859 brdp->unitid = idp->id_unit;
860 brdp->brdtype = stl_brdprobed[idp->id_unit];
861 brdp->ioaddr1 = idp->id_iobase;
862 brdp->ioaddr2 = stl_ioshared;
863 brdp->irq = ffs(idp->id_irq) - 1;
864 brdp->irqtype = stl_irqshared;
865 stl_brdinit(brdp);
866
867 /* register devices for DEVFS */
868 boardnr = brdp->brdnr;
869 dev_ops_add(&stl_ops, 31, boardnr);
870 make_dev(&stl_ops, boardnr + 0x1000000, UID_ROOT, GID_WHEEL,
871 0600, "staliomem%d", boardnr);
872
873 for (portnr = 0, minor_dev = boardnr * 0x100000;
874 portnr < 32; portnr++, minor_dev++) {
875 /* hw ports */
876 make_dev(&stl_ops, minor_dev,
877 UID_ROOT, GID_WHEEL, 0600,
878 "ttyE%d", portnr + (boardnr * 64));
879 make_dev(&stl_ops, minor_dev + 32,
880 UID_ROOT, GID_WHEEL, 0600,
881 "ttyiE%d", portnr + (boardnr * 64));
882 make_dev(&stl_ops, minor_dev + 64,
883 UID_ROOT, GID_WHEEL, 0600,
884 "ttylE%d", portnr + (boardnr * 64));
885 make_dev(&stl_ops, minor_dev + 128,
886 UID_ROOT, GID_WHEEL, 0600,
887 "cue%d", portnr + (boardnr * 64));
888 make_dev(&stl_ops, minor_dev + 160,
889 UID_ROOT, GID_WHEEL, 0600,
890 "cuie%d", portnr + (boardnr * 64));
891 make_dev(&stl_ops, minor_dev + 192,
892 UID_ROOT, GID_WHEEL, 0600,
893 "cule%d", portnr + (boardnr * 64));
894
895 /* sw ports */
896 make_dev(&stl_ops, minor_dev + 0x10000,
897 UID_ROOT, GID_WHEEL, 0600,
898 "ttyE%d", portnr + (boardnr * 64) + 32);
899 make_dev(&stl_ops, minor_dev + 32 + 0x10000,
900 UID_ROOT, GID_WHEEL, 0600,
901 "ttyiE%d", portnr + (boardnr * 64) + 32);
902 make_dev(&stl_ops, minor_dev + 64 + 0x10000,
903 UID_ROOT, GID_WHEEL, 0600,
904 "ttylE%d", portnr + (boardnr * 64) + 32);
905 make_dev(&stl_ops, minor_dev + 128 + 0x10000,
906 UID_ROOT, GID_WHEEL, 0600,
907 "cue%d", portnr + (boardnr * 64) + 32);
908 make_dev(&stl_ops, minor_dev + 160 + 0x10000,
909 UID_ROOT, GID_WHEEL, 0600,
910 "cuie%d", portnr + (boardnr * 64) + 32);
911 make_dev(&stl_ops, minor_dev + 192 + 0x10000,
912 UID_ROOT, GID_WHEEL, 0600,
913 "cule%d", portnr + (boardnr * 64) + 32);
914 }
915 boardnr = brdp->brdnr;
916 make_dev(&stl_ops, boardnr + 0x1000000, UID_ROOT, GID_WHEEL,
917 0600, "staliomem%d", boardnr);
918
919 for (portnr = 0, minor_dev = boardnr * 0x100000;
920 portnr < 32; portnr++, minor_dev++) {
921 /* hw ports */
922 make_dev(&stl_ops, minor_dev,
923 UID_ROOT, GID_WHEEL, 0600,
924 "ttyE%d", portnr + (boardnr * 64));
925 make_dev(&stl_ops, minor_dev + 32,
926 UID_ROOT, GID_WHEEL, 0600,
927 "ttyiE%d", portnr + (boardnr * 64));
928 make_dev(&stl_ops, minor_dev + 64,
929 UID_ROOT, GID_WHEEL, 0600,
930 "ttylE%d", portnr + (boardnr * 64));
931 make_dev(&stl_ops, minor_dev + 128,
932 UID_ROOT, GID_WHEEL, 0600,
933 "cue%d", portnr + (boardnr * 64));
934 make_dev(&stl_ops, minor_dev + 160,
935 UID_ROOT, GID_WHEEL, 0600,
936 "cuie%d", portnr + (boardnr * 64));
937 make_dev(&stl_ops, minor_dev + 192,
938 UID_ROOT, GID_WHEEL, 0600,
939 "cule%d", portnr + (boardnr * 64));
940
941 /* sw ports */
942 make_dev(&stl_ops, minor_dev + 0x10000,
943 UID_ROOT, GID_WHEEL, 0600,
944 "ttyE%d", portnr + (boardnr * 64) + 32);
945 make_dev(&stl_ops, minor_dev + 32 + 0x10000,
946 UID_ROOT, GID_WHEEL, 0600,
947 "ttyiE%d", portnr + (boardnr * 64) + 32);
948 make_dev(&stl_ops, minor_dev + 64 + 0x10000,
949 UID_ROOT, GID_WHEEL, 0600,
950 "ttylE%d", portnr + (boardnr * 64) + 32);
951 make_dev(&stl_ops, minor_dev + 128 + 0x10000,
952 UID_ROOT, GID_WHEEL, 0600,
953 "cue%d", portnr + (boardnr * 64) + 32);
954 make_dev(&stl_ops, minor_dev + 160 + 0x10000,
955 UID_ROOT, GID_WHEEL, 0600,
956 "cuie%d", portnr + (boardnr * 64) + 32);
957 make_dev(&stl_ops, minor_dev + 192 + 0x10000,
958 UID_ROOT, GID_WHEEL, 0600,
959 "cule%d", portnr + (boardnr * 64) + 32);
960 }
961
962 return(1);
963}
964
965/*****************************************************************************/
966
967#if NPCI > 0
968
969/*
970 * Probe specifically for the PCI boards. We need to be a little
971 * carefull here, since it looks sort like a Nat Semi IDE chip...
972 */
973
974static const char *stlpciprobe(pcici_t tag, pcidi_t type)
975{
976 unsigned long class;
977 int i, brdtype;
978
979#if STLDEBUG
980 printf("stlpciprobe(tag=%x,type=%x)\n", (int) &tag, (int) type);
981#endif
982
983 brdtype = 0;
984 for (i = 0; (i < stl_nrpcibrds); i++) {
985 if (((type & 0xffff) == stl_pcibrds[i].vendid) &&
986 (((type >> 16) & 0xffff) == stl_pcibrds[i].devid)) {
987 brdtype = stl_pcibrds[i].brdtype;
988 break;
989 }
990 }
991
992 if (brdtype == 0)
993 return((char *) NULL);
994
995 class = pci_conf_read(tag, PCI_CLASS_REG);
996 if ((class & PCI_CLASS_MASK) == PCI_CLASS_MASS_STORAGE)
997 return((char *) NULL);
998
999 return(stl_brdnames[brdtype]);
1000}
1001
1002/*****************************************************************************/
1003
1004/*
1005 * Allocate resources for and initialize the specified PCI board.
1006 */
1007
1008void stlpciattach(pcici_t tag, int unit)
1009{
1010 stlbrd_t *brdp;
1011 unsigned int bar[4];
1012 unsigned int id;
1013 int i;
1014 int boardnr, portnr, minor_dev;
1015
1016#if STLDEBUG
1017 printf("stlpciattach(tag=%x,unit=%x)\n", (int) &tag, unit);
1018#endif
1019
1020 brdp = kmalloc(sizeof(stlbrd_t), M_TTYS, M_WAITOK | M_ZERO);
1021
1022 if ((unit < 0) || (unit > STL_MAXBRDS)) {
1023 printf("STALLION: bad PCI board unit number=%d\n", unit);
1024 return;
1025 }
1026
1027/*
1028 * Allocate us a new driver unique unit number.
1029 */
1030 if ((brdp->brdnr = stl_findfreeunit()) < 0) {
1031 printf("STALLION: too many boards found, max=%d\n",
1032 STL_MAXBRDS);
1033 return;
1034 }
1035 if (brdp->brdnr >= stl_nrbrds)
1036 stl_nrbrds = brdp->brdnr + 1;
1037
1038/*
1039 * Determine what type of PCI board this is...
1040 */
1041 id = (unsigned int) pci_conf_read(tag, 0x0);
1042 for (i = 0; (i < stl_nrpcibrds); i++) {
1043 if (((id & 0xffff) == stl_pcibrds[i].vendid) &&
1044 (((id >> 16) & 0xffff) == stl_pcibrds[i].devid)) {
1045 brdp->brdtype = stl_pcibrds[i].brdtype;
1046 break;
1047 }
1048 }
1049
1050 if (i >= stl_nrpcibrds) {
1051 printf("STALLION: probed PCI board unknown type=%x\n", id);
1052 return;
1053 }
1054
1055 for (i = 0; (i < 4); i++)
1056 bar[i] = (unsigned int) pci_conf_read(tag, 0x10 + (i * 4)) &
1057 0xfffc;
1058
1059 switch (brdp->brdtype) {
1060 case BRD_ECH64PCI:
1061 brdp->ioaddr1 = bar[1];
1062 brdp->ioaddr2 = bar[2];
1063 break;
1064 case BRD_EASYIOPCI:
1065 brdp->ioaddr1 = bar[2];
1066 brdp->ioaddr2 = bar[1];
1067 break;
1068 case BRD_ECHPCI:
1069 brdp->ioaddr1 = bar[1];
1070 brdp->ioaddr2 = bar[0];
1071 break;
1072 default:
1073 printf("STALLION: unknown PCI board type=%d\n", brdp->brdtype);
1074 return;
1075 break;
1076 }
1077
1078 brdp->unitid = brdp->brdnr; /* PCI units auto-assigned */
1079 brdp->irq = ((int) pci_conf_read(tag, 0x3c)) & 0xff;
1080 brdp->irqtype = 0;
1081 if (pci_map_int(tag, stlpciintr, (void *) NULL) == 0) {
1082 printf("STALLION: failed to map interrupt irq=%d for unit=%d\n",
1083 brdp->irq, brdp->brdnr);
1084 return;
1085 }
1086
1087 stl_brdinit(brdp);
1088
1089 /* register devices for DEVFS */
1090 boardnr = brdp->brdnr;
1091 make_dev(&stl_ops, boardnr + 0x1000000, UID_ROOT, GID_WHEEL,
1092 0600, "staliomem%d", boardnr);
1093
1094 for (portnr = 0, minor_dev = boardnr * 0x100000;
1095 portnr < 32; portnr++, minor_dev++) {
1096 /* hw ports */
1097 make_dev(&stl_ops, minor_dev,
1098 UID_ROOT, GID_WHEEL, 0600,
1099 "ttyE%d", portnr + (boardnr * 64));
1100 make_dev(&stl_ops, minor_dev + 32,
1101 UID_ROOT, GID_WHEEL, 0600,
1102 "ttyiE%d", portnr + (boardnr * 64));
1103 make_dev(&stl_ops, minor_dev + 64,
1104 UID_ROOT, GID_WHEEL, 0600,
1105 "ttylE%d", portnr + (boardnr * 64));
1106 make_dev(&stl_ops, minor_dev + 128,
1107 UID_ROOT, GID_WHEEL, 0600,
1108 "cue%d", portnr + (boardnr * 64));
1109 make_dev(&stl_ops, minor_dev + 160,
1110 UID_ROOT, GID_WHEEL, 0600,
1111 "cuie%d", portnr + (boardnr * 64));
1112 make_dev(&stl_ops, minor_dev + 192,
1113 UID_ROOT, GID_WHEEL, 0600,
1114 "cule%d", portnr + (boardnr * 64));
1115
1116 /* sw ports */
1117 make_dev(&stl_ops, minor_dev + 0x10000,
1118 UID_ROOT, GID_WHEEL, 0600,
1119 "ttyE%d", portnr + (boardnr * 64) + 32);
1120 make_dev(&stl_ops, minor_dev + 32 + 0x10000,
1121 UID_ROOT, GID_WHEEL, 0600,
1122 "ttyiE%d", portnr + (boardnr * 64) + 32);
1123 make_dev(&stl_ops, minor_dev + 64 + 0x10000,
1124 UID_ROOT, GID_WHEEL, 0600,
1125 "ttylE%d", portnr + (boardnr * 64) + 32);
1126 make_dev(&stl_ops, minor_dev + 128 + 0x10000,
1127 UID_ROOT, GID_WHEEL, 0600,
1128 "cue%d", portnr + (boardnr * 64) + 32);
1129 make_dev(&stl_ops, minor_dev + 160 + 0x10000,
1130 UID_ROOT, GID_WHEEL, 0600,
1131 "cuie%d", portnr + (boardnr * 64) + 32);
1132 make_dev(&stl_ops, minor_dev + 192 + 0x10000,
1133 UID_ROOT, GID_WHEEL, 0600,
1134 "cule%d", portnr + (boardnr * 64) + 32);
1135 }
1136}
1137
1138#endif
1139
1140/*****************************************************************************/
1141
1142STATIC int stlopen(struct dev_open_args *ap)
1143{
1144 cdev_t dev = ap->a_head.a_dev;
1145 struct tty *tp;
1146 stlport_t *portp;
1147 int error, callout;
1148
1149#if STLDEBUG
1150 printf("stlopen(dev=%x,flag=%x,mode=%x,p=%x)\n", (int) dev, flag,
1151 mode, (int) p);
1152#endif
1153
1154/*
1155 * Firstly check if the supplied device number is a valid device.
1156 */
1157 if (minor(dev) & STL_MEMDEV)
1158 return(0);
1159
1160 portp = stl_dev2port(dev);
1161 if (portp == (stlport_t *) NULL)
1162 return(ENXIO);
1163 if (minor(dev) & STL_CTRLDEV)
1164 return(0);
1165 tp = &portp->tty;
1166 dev->si_tty = tp;
1167 callout = minor(dev) & STL_CALLOUTDEV;
1168 error = 0;
1169
1170 crit_enter();
1171
1172stlopen_restart:
1173/*
1174 * Wait here for the DTR drop timeout period to expire.
1175 */
1176 while (portp->state & ASY_DTRWAIT) {
1177 error = tsleep(&portp->dtrwait, PCATCH, "stldtr", 0);
1178 if (error)
1179 goto stlopen_end;
1180 }
1181
1182/*
1183 * We have a valid device, so now we check if it is already open.
1184 * If not then initialize the port hardware and set up the tty
1185 * struct as required.
1186 */
1187 if ((tp->t_state & TS_ISOPEN) == 0) {
1188 tp->t_oproc = stl_start;
1189 tp->t_stop = stl_stop;
1190 tp->t_param = stl_param;
1191 tp->t_dev = dev;
1192 tp->t_termios = callout ? portp->initouttios :
1193 portp->initintios;
1194 stl_rawopen(portp);
1195 ttsetwater(tp);
1196 if ((portp->sigs & TIOCM_CD) || callout)
1197 (*linesw[tp->t_line].l_modem)(tp, 1);
1198 } else {
1199 if (callout) {
1200 if (portp->callout == 0) {
1201 error = EBUSY;
1202 goto stlopen_end;
1203 }
1204 } else {
1205 if (portp->callout != 0) {
1206 if (ap->a_oflags & O_NONBLOCK) {
1207 error = EBUSY;
1208 goto stlopen_end;
1209 }
1210 error = tsleep(&portp->callout,
1211 PCATCH, "stlcall", 0);
1212 if (error)
1213 goto stlopen_end;
1214 goto stlopen_restart;
1215 }
1216 }
1217 if ((tp->t_state & TS_XCLUDE) && suser_cred(ap->a_cred, 0)) {
1218 error = EBUSY;
1219 goto stlopen_end;
1220 }
1221 }
1222
1223/*
1224 * If this port is not the callout device and we do not have carrier
1225 * then we need to sleep, waiting for it to be asserted.
1226 */
1227 if (((tp->t_state & TS_CARR_ON) == 0) && !callout &&
1228 ((tp->t_cflag & CLOCAL) == 0) &&
1229 ((ap->a_oflags & O_NONBLOCK) == 0)) {
1230 portp->waitopens++;
1231 error = tsleep(TSA_CARR_ON(tp), PCATCH, "stldcd", 0);
1232 portp->waitopens--;
1233 if (error)
1234 goto stlopen_end;
1235 goto stlopen_restart;
1236 }
1237
1238/*
1239 * Open the line discipline.
1240 */
1241 error = (*linesw[tp->t_line].l_open)(dev, tp);
1242 stl_ttyoptim(portp, &tp->t_termios);
1243 if ((tp->t_state & TS_ISOPEN) && callout)
1244 portp->callout = 1;
1245
1246/*
1247 * If for any reason we get to here and the port is not actually
1248 * open then close of the physical hardware - no point leaving it
1249 * active when the open failed...
1250 */
1251stlopen_end:
1252 crit_exit();
1253 if (((tp->t_state & TS_ISOPEN) == 0) && (portp->waitopens == 0))
1254 stl_rawclose(portp);
1255
1256 return(error);
1257}
1258
1259/*****************************************************************************/
1260
1261STATIC int stlclose(struct dev_close_args *ap)
1262{
1263 cdev_t dev = ap->a_head.a_dev;
1264 struct tty *tp;
1265 stlport_t *portp;
1266
1267#if STLDEBUG
1268 printf("stlclose(dev=%s,flag=%x,mode=%x,p=%p)\n", devtoname(dev),
1269 flag, mode, (void *) p);
1270#endif
1271
1272 if (minor(dev) & STL_MEMDEV)
1273 return(0);
1274 if (minor(dev) & STL_CTRLDEV)
1275 return(0);
1276
1277 portp = stl_dev2port(dev);
1278 if (portp == (stlport_t *) NULL)
1279 return(ENXIO);
1280 tp = &portp->tty;
1281
1282 crit_enter();
1283 (*linesw[tp->t_line].l_close)(tp, ap->a_fflag);
1284 stl_ttyoptim(portp, &tp->t_termios);
1285 stl_rawclose(portp);
1286 ttyclose(tp);
1287 crit_exit();
1288 return(0);
1289}
1290
1291/*****************************************************************************/
1292
1293#if VFREEBSD >= 220
1294
1295STATIC void stl_stop(struct tty *tp, int rw)
1296{
1297#if STLDEBUG
1298 printf("stl_stop(tp=%x,rw=%x)\n", (int) tp, rw);
1299#endif
1300
1301 stl_flush((stlport_t *) tp, rw);
1302}
1303
1304#else
1305
1306STATIC int stlstop(struct tty *tp, int rw)
1307{
1308#if STLDEBUG
1309 printf("stlstop(tp=%x,rw=%x)\n", (int) tp, rw);
1310#endif
1311
1312 stl_flush((stlport_t *) tp, rw);
1313 return(0);
1314}
1315
1316#endif
1317
1318/*****************************************************************************/
1319
1320STATIC int stlioctl(struct dev_ioctl_args *ap)
1321{
1322 cdev_t dev = ap->a_head.a_dev;
1323 u_long cmd = ap->a_cmd;
1324 caddr_t data = ap->a_data;
1325 struct termios *newtios, *localtios;
1326 struct tty *tp;
1327 stlport_t *portp;
1328 int error, i;
1329
1330#if STLDEBUG
1331 printf("stlioctl(dev=%s,cmd=%lx,data=%p,flag=%x)\n",
1332 devtoname(dev), cmd, (void *) data, ap->a_fflag);
1333#endif
1334
1335 if (minor(dev) & STL_MEMDEV)
1336 return(stl_memioctl(dev, cmd, data, ap->a_fflag));
1337
1338 portp = stl_dev2port(dev);
1339 if (portp == (stlport_t *) NULL)
1340 return(ENODEV);
1341 tp = &portp->tty;
1342 error = 0;
1343
1344/*
1345 * First up handle ioctls on the control devices.
1346 */
1347 if (minor(dev) & STL_CTRLDEV) {
1348 if ((minor(dev) & STL_CTRLDEV) == STL_CTRLINIT)
1349 localtios = (minor(dev) & STL_CALLOUTDEV) ?
1350 &portp->initouttios : &portp->initintios;
1351 else if ((minor(dev) & STL_CTRLDEV) == STL_CTRLLOCK)
1352 localtios = (minor(dev) & STL_CALLOUTDEV) ?
1353 &portp->lockouttios : &portp->lockintios;
1354 else
1355 return(ENODEV);
1356
1357 switch (cmd) {
1358 case TIOCSETA:
1359 if ((error = suser_cred(ap->a_cred, 0)) == 0)
1360 *localtios = *((struct termios *) data);
1361 break;
1362 case TIOCGETA:
1363 *((struct termios *) data) = *localtios;
1364 break;
1365 case TIOCGETD:
1366 *((int *) data) = TTYDISC;
1367 break;
1368 case TIOCGWINSZ:
1369 bzero(data, sizeof(struct winsize));
1370 break;
1371 default:
1372 error = ENOTTY;
1373 break;
1374 }
1375 return(error);
1376 }
1377
1378/*
1379 * Deal with 4.3 compatibility issues if we have too...
1380 */
1381#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1382 if (1) {
1383 struct termios tios;
1384 unsigned long oldcmd;
1385
1386 tios = tp->t_termios;
1387 oldcmd = cmd;
1388 if ((error = ttsetcompat(tp, &cmd, data, &tios)))
1389 return(error);
1390 if (cmd != oldcmd)
1391 data = (caddr_t) &tios;
1392 }
1393#endif
1394
1395/*
1396 * Carry out some pre-cmd processing work first...
1397 * Hmmm, not so sure we want this, disable for now...
1398 */
1399 if ((cmd == TIOCSETA) || (cmd == TIOCSETAW) || (cmd == TIOCSETAF)) {
1400 newtios = (struct termios *) data;
1401 localtios = (minor(dev) & STL_CALLOUTDEV) ?
1402 &portp->lockouttios : &portp->lockintios;
1403
1404 newtios->c_iflag = (tp->t_iflag & localtios->c_iflag) |
1405 (newtios->c_iflag & ~localtios->c_iflag);
1406 newtios->c_oflag = (tp->t_oflag & localtios->c_oflag) |
1407 (newtios->c_oflag & ~localtios->c_oflag);
1408 newtios->c_cflag = (tp->t_cflag & localtios->c_cflag) |
1409 (newtios->c_cflag & ~localtios->c_cflag);
1410 newtios->c_lflag = (tp->t_lflag & localtios->c_lflag) |
1411 (newtios->c_lflag & ~localtios->c_lflag);
1412 for (i = 0; (i < NCCS); i++) {
1413 if (localtios->c_cc[i] != 0)
1414 newtios->c_cc[i] = tp->t_cc[i];
1415 }
1416 if (localtios->c_ispeed != 0)
1417 newtios->c_ispeed = tp->t_ispeed;
1418 if (localtios->c_ospeed != 0)
1419 newtios->c_ospeed = tp->t_ospeed;
1420 }
1421
1422/*
1423 * Call the line discipline and the common command processing to
1424 * process this command (if they can).
1425 */
1426 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data,
1427 ap->a_fflag, ap->a_cred);
1428 if (error != ENOIOCTL)
1429 return(error);
1430
1431 crit_enter();
1432 error = ttioctl(tp, cmd, data, ap->a_fflag);
1433 stl_ttyoptim(portp, &tp->t_termios);
1434 if (error != ENOIOCTL) {
1435 crit_exit();
1436 return(error);
1437 }
1438
1439 error = 0;
1440
1441/*
1442 * Process local commands here. These are all commands that only we
1443 * can take care of (they all rely on actually doing something special
1444 * to the actual hardware).
1445 */
1446 switch (cmd) {
1447 case TIOCSBRK:
1448 stl_sendbreak(portp, -1);
1449 break;
1450 case TIOCCBRK:
1451 stl_sendbreak(portp, -2);
1452 break;
1453 case TIOCSDTR:
1454 stl_setsignals(portp, 1, -1);
1455 break;
1456 case TIOCCDTR:
1457 stl_setsignals(portp, 0, -1);
1458 break;
1459 case TIOCMSET:
1460 i = *((int *) data);
1461 stl_setsignals(portp, ((i & TIOCM_DTR) ? 1 : 0),
1462 ((i & TIOCM_RTS) ? 1 : 0));
1463 break;
1464 case TIOCMBIS:
1465 i = *((int *) data);
1466 stl_setsignals(portp, ((i & TIOCM_DTR) ? 1 : -1),
1467 ((i & TIOCM_RTS) ? 1 : -1));
1468 break;
1469 case TIOCMBIC:
1470 i = *((int *) data);
1471 stl_setsignals(portp, ((i & TIOCM_DTR) ? 0 : -1),
1472 ((i & TIOCM_RTS) ? 0 : -1));
1473 break;
1474 case TIOCMGET:
1475 *((int *) data) = (stl_getsignals(portp) | TIOCM_LE);
1476 break;
1477 case TIOCMSDTRWAIT:
1478 if ((error = suser_cred(ap->a_cred, 0)) == 0)
1479 portp->dtrwait = *((int *) data) * hz / 100;
1480 break;
1481 case TIOCMGDTRWAIT:
1482 *((int *) data) = portp->dtrwait * 100 / hz;
1483 break;
1484 case TIOCTIMESTAMP:
1485 portp->dotimestamp = 1;
1486 *((struct timeval *) data) = portp->timestamp;
1487 break;
1488 default:
1489 error = ENOTTY;
1490 break;
1491 }
1492 crit_exit();
1493
1494 return(error);
1495}
1496/*****************************************************************************/
1497
1498/*
1499 * Convert the specified minor device number into a port struct
1500 * pointer. Return NULL if the device number is not a valid port.
1501 */
1502
1503STATIC stlport_t *stl_dev2port(cdev_t dev)
1504{
1505 stlbrd_t *brdp;
1506
1507 brdp = stl_brds[MKDEV2BRD(dev)];
1508 if (brdp == (stlbrd_t *) NULL)
1509 return((stlport_t *) NULL);
1510 return(brdp->ports[MKDEV2PORT(dev)]);
1511}
1512
1513/*****************************************************************************/
1514
1515/*
1516 * Initialize the port hardware. This involves enabling the transmitter
1517 * and receiver, setting the port configuration, and setting the initial
1518 * signal state.
1519 */
1520
1521static int stl_rawopen(stlport_t *portp)
1522{
1523#if STLDEBUG
1524 printf("stl_rawopen(portp=%p): brdnr=%d panelnr=%d portnr=%d\n",
1525 (void *) portp, portp->brdnr, portp->panelnr, portp->portnr);
1526#endif
1527
1528 stl_setport(portp, &portp->tty.t_termios);
1529 portp->sigs = stl_getsignals(portp);
1530 stl_setsignals(portp, 1, 1);
1531 stl_enablerxtx(portp, 1, 1);
1532 stl_startrxtx(portp, 1, 0);
1533 return(0);
1534}
1535
1536/*****************************************************************************/
1537
1538/*
1539 * Shutdown the hardware of a port. Disable its transmitter and
1540 * receiver, and maybe drop signals if appropriate.
1541 */
1542
1543static int stl_rawclose(stlport_t *portp)
1544{
1545 struct tty *tp;
1546
1547#if STLDEBUG
1548 printf("stl_rawclose(portp=%p): brdnr=%d panelnr=%d portnr=%d\n",
1549 (void *) portp, portp->brdnr, portp->panelnr, portp->portnr);
1550#endif
1551
1552 tp = &portp->tty;
1553 stl_disableintrs(portp);
1554 stl_enablerxtx(portp, 0, 0);
1555 stl_flush(portp, (FWRITE | FREAD));
1556 if (tp->t_cflag & HUPCL) {
1557 stl_setsignals(portp, 0, 0);
1558 if (portp->dtrwait != 0) {
1559 portp->state |= ASY_DTRWAIT;
1560 callout_reset(&portp->dtr_ch, portp->dtrwait,
1561 stl_dtrwakeup, portp);
1562 }
1563 }
1564 portp->callout = 0;
1565 portp->brklen = 0;
1566 portp->state &= ~(ASY_ACTIVE | ASY_RTSFLOW);
1567 wakeup(&portp->callout);
1568 wakeup(TSA_CARR_ON(tp));
1569 return(0);
1570}
1571
1572/*****************************************************************************/
1573
1574/*
1575 * Clear the DTR waiting flag, and wake up any sleepers waiting for
1576 * DTR wait period to finish.
1577 */
1578
1579static void stl_dtrwakeup(void *arg)
1580{
1581 stlport_t *portp;
1582
1583 portp = (stlport_t *) arg;
1584 portp->state &= ~ASY_DTRWAIT;
1585 wakeup(&portp->dtrwait);
1586}
1587
1588/*****************************************************************************/
1589
1590/*
1591 * Start (or continue) the transfer of TX data on this port. If the
1592 * port is not currently busy then load up the interrupt ring queue
1593 * buffer and kick of the transmitter. If the port is running low on
1594 * TX data then refill the ring queue. This routine is also used to
1595 * activate input flow control!
1596 */
1597
1598static void stl_start(struct tty *tp)
1599{
1600 stlport_t *portp;
1601 unsigned int len, stlen;
1602 char *head, *tail;
1603 int count;
1604
1605 portp = (stlport_t *) tp;
1606
1607#if STLDEBUG
1608 printf("stl_start(tp=%x): brdnr=%d portnr=%d\n", (int) tp,
1609 portp->brdnr, portp->portnr);
1610#endif
1611
1612 crit_enter();
1613
1614/*
1615 * Check if the ports input has been blocked, and take appropriate action.
1616 * Not very often do we really need to do anything, so make it quick.
1617 */
1618 if (tp->t_state & TS_TBLOCK) {
1619 if ((portp->state & ASY_RTSFLOWMODE) &&
1620 ((portp->state & ASY_RTSFLOW) == 0))
1621 stl_flowcontrol(portp, 0, -1);
1622 } else {
1623 if (portp->state & ASY_RTSFLOW)
1624 stl_flowcontrol(portp, 1, -1);
1625 }
1626
1627#if VFREEBSD == 205
1628/*
1629 * Check if the output cooked clist buffers are near empty, wake up
1630 * the line discipline to fill it up.
1631 */
1632 if (tp->t_outq.c_cc <= tp->t_lowat) {
1633 if (tp->t_state & TS_ASLEEP) {
1634 tp->t_state &= ~TS_ASLEEP;
1635 wakeup(&tp->t_outq);
1636 }
1637 selwakeup(&tp->t_wsel);
1638 }
1639#endif
1640
1641 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
1642 crit_exit();
1643 return;
1644 }
1645
1646/*
1647 * Copy data from the clists into the interrupt ring queue. This will
1648 * require at most 2 copys... What we do is calculate how many chars
1649 * can fit into the ring queue, and how many can fit in 1 copy. If after
1650 * the first copy there is still more room then do the second copy.
1651 * The beauty of this type of ring queue is that we do not need to
1652 * spl protect our-selves, since we only ever update the head pointer,
1653 * and the interrupt routine only ever updates the tail pointer.
1654 */
1655 if (tp->t_outq.c_cc != 0) {
1656 head = portp->tx.head;
1657 tail = portp->tx.tail;
1658 if (head >= tail) {
1659 len = STL_TXBUFSIZE - (head - tail) - 1;
1660 stlen = portp->tx.endbuf - head;
1661 } else {
1662 len = tail - head - 1;
1663 stlen = len;
1664 }
1665
1666 if (len > 0) {
1667 stlen = MIN(len, stlen);
1668 count = q_to_b(&tp->t_outq, head, stlen);
1669 len -= count;
1670 head += count;
1671 if (head >= portp->tx.endbuf) {
1672 head = portp->tx.buf;
1673 if (len > 0) {
1674 stlen = q_to_b(&tp->t_outq, head, len);
1675 head += stlen;
1676 count += stlen;
1677 }
1678 }
1679 portp->tx.head = head;
1680 if (count > 0)
1681 stl_startrxtx(portp, -1, 1);
1682 }
1683
1684/*
1685 * If we sent something, make sure we are called again.
1686 */
1687 tp->t_state |= TS_BUSY;
1688 }
1689
1690#if VFREEBSD != 205
1691/*
1692 * Do any writer wakeups.
1693 */
1694 ttwwakeup(tp);
1695#endif
1696
1697 crit_exit();
1698}
1699
1700/*****************************************************************************/
1701
1702static void stl_flush(stlport_t *portp, int flag)
1703{
1704 char *head, *tail;
1705 int len;
1706
1707#if STLDEBUG
1708 printf("stl_flush(portp=%x,flag=%x)\n", (int) portp, flag);
1709#endif
1710
1711 if (portp == (stlport_t *) NULL)
1712 return;
1713
1714 crit_enter();
1715
1716 if (flag & FWRITE) {
1717 stl_uartflush(portp, FWRITE);
1718 portp->tx.tail = portp->tx.head;
1719 }
1720
1721/*
1722 * The only thing to watch out for when flushing the read side is
1723 * the RX status buffer. The interrupt code relys on the status
1724 * bytes as being zeroed all the time (it does not bother setting
1725 * a good char status to 0, it expects that it already will be).
1726 * We also need to un-flow the RX channel if flow control was
1727 * active.
1728 */
1729 if (flag & FREAD) {
1730 head = portp->rx.head;
1731 tail = portp->rx.tail;
1732 if (head != tail) {
1733 if (head >= tail) {
1734 len = head - tail;
1735 } else {
1736 len = portp->rx.endbuf - tail;
1737 bzero(portp->rxstatus.buf,
1738 (head - portp->rx.buf));
1739 }
1740 bzero((tail + STL_RXBUFSIZE), len);
1741 portp->rx.tail = head;
1742 }
1743
1744 if ((portp->state & ASY_RTSFLOW) &&
1745 ((portp->tty.t_state & TS_TBLOCK) == 0))
1746 stl_flowcontrol(portp, 1, -1);
1747 }
1748
1749 crit_exit();
1750}
1751
1752/*****************************************************************************/
1753
1754/*
1755 * Interrupt handler for host based boards. Interrupts for all boards
1756 * are vectored through here.
1757 */
1758
1759void stlintr(void *arg)
1760{
1761 stlbrd_t *brdp;
1762 int i;
1763
1764#if STLDEBUG
1765 printf("stlintr(unit=%d)\n", (int)arg);
1766#endif
1767
1768 for (i = 0; (i < stl_nrbrds); i++) {
1769 if ((brdp = stl_brds[i]) == (stlbrd_t *) NULL)
1770 continue;
1771 if (brdp->state == 0)
1772 continue;
1773 (* brdp->isr)(brdp);
1774 }
1775}
1776
1777/*****************************************************************************/
1778
1779#if NPCI > 0
1780
1781static void stlpciintr(void *arg)
1782{
1783 stlintr((void *)0);
1784}
1785
1786#endif
1787
1788/*****************************************************************************/
1789
1790/*
1791 * Interrupt service routine for EasyIO boards.
1792 */
1793
1794static void stl_eiointr(stlbrd_t *brdp)
1795{
1796 stlpanel_t *panelp;
1797 int iobase;
1798
1799#if STLDEBUG
1800 printf("stl_eiointr(brdp=%p)\n", brdp);
1801#endif
1802
1803 panelp = (stlpanel_t *) brdp->panels[0];
1804 iobase = panelp->iobase;
1805 while (inb(brdp->iostatus) & EIO_INTRPEND)
1806 (* panelp->isr)(panelp, iobase);
1807}
1808
1809/*
1810 * Interrupt service routine for ECH-AT board types.
1811 */
1812
1813static void stl_echatintr(stlbrd_t *brdp)
1814{
1815 stlpanel_t *panelp;
1816 unsigned int ioaddr;
1817 int bnknr;
1818
1819 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDENABLE));
1820
1821 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1822 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1823 ioaddr = brdp->bnkstataddr[bnknr];
1824 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1825 panelp = brdp->bnk2panel[bnknr];
1826 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1827 }
1828 }
1829 }
1830
1831 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDDISABLE));
1832}
1833
1834/*****************************************************************************/
1835
1836/*
1837 * Interrupt service routine for ECH-MCA board types.
1838 */
1839
1840static void stl_echmcaintr(stlbrd_t *brdp)
1841{
1842 stlpanel_t *panelp;
1843 unsigned int ioaddr;
1844 int bnknr;
1845
1846 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1847 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1848 ioaddr = brdp->bnkstataddr[bnknr];
1849 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1850 panelp = brdp->bnk2panel[bnknr];
1851 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1852 }
1853 }
1854 }
1855}
1856
1857/*****************************************************************************/
1858
1859/*
1860 * Interrupt service routine for ECH-PCI board types.
1861 */
1862
1863static void stl_echpciintr(stlbrd_t *brdp)
1864{
1865 stlpanel_t *panelp;
1866 unsigned int ioaddr;
1867 int bnknr, recheck;
1868
1869#if STLDEBUG
1870 printf("stl_echpciintr(brdp=%x)\n", (int) brdp);
1871#endif
1872
1873 for (;;) {
1874 recheck = 0;
1875 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1876 outb(brdp->ioctrl, brdp->bnkpageaddr[bnknr]);
1877 ioaddr = brdp->bnkstataddr[bnknr];
1878 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1879 panelp = brdp->bnk2panel[bnknr];
1880 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1881 recheck++;
1882 }
1883 }
1884 if (! recheck)
1885 break;
1886 }
1887}
1888
1889/*****************************************************************************/
1890
1891/*
1892 * Interrupt service routine for EC8/64-PCI board types.
1893 */
1894
1895static void stl_echpci64intr(stlbrd_t *brdp)
1896{
1897 stlpanel_t *panelp;
1898 unsigned int ioaddr;
1899 int bnknr;
1900
1901#if STLDEBUG
1902 printf("stl_echpci64intr(brdp=%p)\n", brdp);
1903#endif
1904
1905 while (inb(brdp->ioctrl) & 0x1) {
1906 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1907 ioaddr = brdp->bnkstataddr[bnknr];
1908#if STLDEBUG
1909 printf(" --> ioaddr=%x status=%x(%x)\n", ioaddr, inb(ioaddr) & ECH_PNLINTRPEND, inb(ioaddr));
1910#endif
1911 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1912 panelp = brdp->bnk2panel[bnknr];
1913 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1914 }
1915 }
1916 }
1917}
1918
1919/*****************************************************************************/
1920
1921/*
1922 * If we haven't scheduled a timeout then do it, some port needs high
1923 * level processing.
1924 */
1925
1926static void stl_dotimeout()
1927{
1928#if STLDEBUG
1929 printf("stl_dotimeout()\n");
1930#endif
1931 if (stl_doingtimeout == 0) {
1932 if ((stl_poll_ch.c_flags & CALLOUT_DID_INIT) == 0)
1933 callout_init(&stl_poll_ch);
1934 callout_reset(&stl_poll_ch, 1, stl_poll, NULL);
1935 stl_doingtimeout++;
1936 }
1937}
1938
1939/*****************************************************************************/
1940
1941/*
1942 * Service "software" level processing. Too slow or painfull to be done
1943 * at real hardware interrupt time. This way we might also be able to
1944 * do some service on other waiting ports as well...
1945 */
1946
1947static void stl_poll(void *arg)
1948{
1949 stlbrd_t *brdp;
1950 stlport_t *portp;
1951 struct tty *tp;
1952 int brdnr, portnr, rearm;
1953
1954#if STLDEBUG
1955 printf("stl_poll()\n");
1956#endif
1957
1958 stl_doingtimeout = 0;
1959 rearm = 0;
1960
1961 crit_enter();
1962 for (brdnr = 0; (brdnr < stl_nrbrds); brdnr++) {
1963 if ((brdp = stl_brds[brdnr]) == (stlbrd_t *) NULL)
1964 continue;
1965 for (portnr = 0; (portnr < brdp->nrports); portnr++) {
1966 if ((portp = brdp->ports[portnr]) == (stlport_t *) NULL)
1967 continue;
1968 if ((portp->state & ASY_ACTIVE) == 0)
1969 continue;
1970 tp = &portp->tty;
1971
1972 if (portp->state & ASY_RXDATA)
1973 stl_rxprocess(portp);
1974 if (portp->state & ASY_DCDCHANGE) {
1975 portp->state &= ~ASY_DCDCHANGE;
1976 portp->sigs = stl_getsignals(portp);
1977 (*linesw[tp->t_line].l_modem)(tp,
1978 (portp->sigs & TIOCM_CD));
1979 }
1980 if (portp->state & ASY_TXEMPTY) {
1981 if (stl_datastate(portp) == 0) {
1982 portp->state &= ~ASY_TXEMPTY;
1983 tp->t_state &= ~TS_BUSY;
1984 (*linesw[tp->t_line].l_start)(tp);
1985 }
1986 }
1987 if (portp->state & ASY_TXLOW) {
1988 portp->state &= ~ASY_TXLOW;
1989 (*linesw[tp->t_line].l_start)(tp);
1990 }
1991
1992 if (portp->state & ASY_ACTIVE)
1993 rearm++;
1994 }
1995 }
1996 crit_exit();
1997
1998 if (rearm)
1999 stl_dotimeout();
2000}
2001
2002/*****************************************************************************/
2003
2004/*
2005 * Process the RX data that has been buffered up in the RX ring queue.
2006 */
2007
2008static void stl_rxprocess(stlport_t *portp)
2009{
2010 struct tty *tp;
2011 unsigned int len, stlen, lostlen;
2012 char *head, *tail;
2013 char status;
2014 int ch;
2015
2016#if STLDEBUG
2017 printf("stl_rxprocess(portp=%x): brdnr=%d portnr=%d\n", (int) portp,
2018 portp->brdnr, portp->portnr);
2019#endif
2020
2021 tp = &portp->tty;
2022 portp->state &= ~ASY_RXDATA;
2023
2024 if ((tp->t_state & TS_ISOPEN) == 0) {
2025 stl_flush(portp, FREAD);
2026 return;
2027 }
2028
2029/*
2030 * Calculate the amount of data in the RX ring queue. Also calculate
2031 * the largest single copy size...
2032 */
2033 head = portp->rx.head;
2034 tail = portp->rx.tail;
2035 if (head >= tail) {
2036 len = head - tail;
2037 stlen = len;
2038 } else {
2039 len = STL_RXBUFSIZE - (tail - head);
2040 stlen = portp->rx.endbuf - tail;
2041 }
2042
2043 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
2044 if (len > 0) {
2045 if (((tp->t_rawq.c_cc + len) >= TTYHOG) &&
2046 ((portp->state & ASY_RTSFLOWMODE) ||
2047 (tp->t_iflag & IXOFF)) &&
2048 ((tp->t_state & TS_TBLOCK) == 0)) {
2049 ch = TTYHOG - tp->t_rawq.c_cc - 1;
2050 len = (ch > 0) ? ch : 0;
2051 stlen = MIN(stlen, len);
2052 ttyblock(tp);
2053 }
2054 lostlen = b_to_q(tail, stlen, &tp->t_rawq);
2055 tail += stlen;
2056 len -= stlen;
2057 if (tail >= portp->rx.endbuf) {
2058 tail = portp->rx.buf;
2059 lostlen += b_to_q(tail, len, &tp->t_rawq);
2060 tail += len;
2061 }
2062 portp->stats.rxlost += lostlen;
2063 ttwakeup(tp);
2064 portp->rx.tail = tail;
2065 }
2066 } else {
2067 while (portp->rx.tail != head) {
2068 ch = (unsigned char) *(portp->rx.tail);
2069 status = *(portp->rx.tail + STL_RXBUFSIZE);
2070 if (status) {
2071 *(portp->rx.tail + STL_RXBUFSIZE) = 0;
2072 if (status & ST_BREAK)
2073 ch |= TTY_BI;
2074 if (status & ST_FRAMING)
2075 ch |= TTY_FE;
2076 if (status & ST_PARITY)
2077 ch |= TTY_PE;
2078 if (status & ST_OVERRUN)
2079 ch |= TTY_OE;
2080 }
2081 (*linesw[tp->t_line].l_rint)(ch, tp);
2082 if (portp->rx.tail == head)
2083 break;
2084
2085 if (++(portp->rx.tail) >= portp->rx.endbuf)
2086 portp->rx.tail = portp->rx.buf;
2087 }
2088 }
2089
2090 if (head != portp->rx.tail)
2091 portp->state |= ASY_RXDATA;
2092
2093/*
2094 * If we were flow controled then maybe the buffer is low enough that
2095 * we can re-activate it.
2096 */
2097 if ((portp->state & ASY_RTSFLOW) && ((tp->t_state & TS_TBLOCK) == 0))
2098 stl_flowcontrol(portp, 1, -1);
2099}
2100
2101/*****************************************************************************/
2102
2103static int stl_param(struct tty *tp, struct termios *tiosp)
2104{
2105 stlport_t *portp;
2106
2107 portp = (stlport_t *) tp;
2108 if (portp == (stlport_t *) NULL)
2109 return(ENODEV);
2110
2111 return(stl_setport(portp, tiosp));
2112}
2113
2114/*****************************************************************************/
2115
2116/*
2117 * Action the flow control as required. The hw and sw args inform the
2118 * routine what flow control methods it should try.
2119 */
2120
2121static void stl_flowcontrol(stlport_t *portp, int hw, int sw)
2122{
2123 unsigned char *head, *tail;
2124 int len, hwflow;
2125
2126#if STLDEBUG
2127 printf("stl_flowcontrol(portp=%x,hw=%d,sw=%d)\n", (int) portp, hw, sw);
2128#endif
2129
2130 hwflow = -1;
2131
2132 if (portp->state & ASY_RTSFLOWMODE) {
2133 if (hw == 0) {
2134 if ((portp->state & ASY_RTSFLOW) == 0)
2135 hwflow = 0;
2136 } else if (hw > 0) {
2137 if (portp->state & ASY_RTSFLOW) {
2138 head = portp->rx.head;
2139 tail = portp->rx.tail;
2140 len = (head >= tail) ? (head - tail) :
2141 (STL_RXBUFSIZE - (tail - head));
2142 if (len < STL_RXBUFHIGH)
2143 hwflow = 1;
2144 }
2145 }
2146 }
2147
2148/*
2149 * We have worked out what to do, if anything. So now apply it to the
2150 * UART port.
2151 */
2152 stl_sendflow(portp, hwflow, sw);
2153}
2154
2155/*****************************************************************************/
2156
2157/*
2158 * Enable l_rint processing bypass mode if tty modes allow it.
2159 */
2160
2161static void stl_ttyoptim(stlport_t *portp, struct termios *tiosp)
2162{
2163 struct tty *tp;
2164
2165 tp = &portp->tty;
2166 if (((tiosp->c_iflag &
2167 (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP)) == 0) &&
2168 (((tiosp->c_iflag & BRKINT) == 0) || (tiosp->c_iflag & IGNBRK)) &&
2169 (((tiosp->c_iflag & PARMRK) == 0) ||
2170 ((tiosp->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))) &&
2171 ((tiosp->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) ==0) &&
2172 (linesw[tp->t_line].l_rint == ttyinput))
2173 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2174 else
2175 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2176 portp->hotchar = linesw[tp->t_line].l_hotchar;
2177}
2178
2179/*****************************************************************************/
2180
2181/*
2182 * Try and find and initialize all the ports on a panel. We don't care
2183 * what sort of board these ports are on - since the port io registers
2184 * are almost identical when dealing with ports.
2185 */
2186
2187static int stl_initports(stlbrd_t *brdp, stlpanel_t *panelp)
2188{
2189 stlport_t *portp;
2190 unsigned int chipmask;
2191 int i, j;
2192
2193#if STLDEBUG
2194 printf("stl_initports(panelp=%x)\n", (int) panelp);
2195#endif
2196
2197 chipmask = stl_panelinit(brdp, panelp);
2198
2199/*
2200 * All UART's are initialized if found. Now go through and setup
2201 * each ports data structures. Also initialize each individual
2202 * UART port.
2203 */
2204 for (i = 0; (i < panelp->nrports); i++) {
2205 portp = kmalloc(sizeof(stlport_t), M_TTYS, M_WAITOK | M_ZERO);
2206
2207 portp->portnr = i;
2208 portp->brdnr = panelp->brdnr;
2209 portp->panelnr = panelp->panelnr;
2210 portp->uartp = panelp->uartp;
2211 portp->clk = brdp->clk;
2212 panelp->ports[i] = portp;
2213
2214 j = STL_TXBUFSIZE + (2 * STL_RXBUFSIZE);
2215 portp->tx.buf = kmalloc(j, M_TTYS, M_WAITOK);
2216 portp->tx.endbuf = portp->tx.buf + STL_TXBUFSIZE;
2217 portp->tx.head = portp->tx.buf;
2218 portp->tx.tail = portp->tx.buf;
2219 portp->rx.buf = portp->tx.buf + STL_TXBUFSIZE;
2220 portp->rx.endbuf = portp->rx.buf + STL_RXBUFSIZE;
2221 portp->rx.head = portp->rx.buf;
2222 portp->rx.tail = portp->rx.buf;
2223 portp->rxstatus.buf = portp->rx.buf + STL_RXBUFSIZE;
2224 portp->rxstatus.endbuf = portp->rxstatus.buf + STL_RXBUFSIZE;
2225 portp->rxstatus.head = portp->rxstatus.buf;
2226 portp->rxstatus.tail = portp->rxstatus.buf;
2227 bzero(portp->rxstatus.head, STL_RXBUFSIZE);
2228
2229 portp->initintios.c_ispeed = STL_DEFSPEED;
2230 portp->initintios.c_ospeed = STL_DEFSPEED;
2231 portp->initintios.c_cflag = STL_DEFCFLAG;
2232 portp->initintios.c_iflag = 0;
2233 portp->initintios.c_oflag = 0;
2234 portp->initintios.c_lflag = 0;
2235 bcopy(&ttydefchars[0], &portp->initintios.c_cc[0],
2236 sizeof(portp->initintios.c_cc));
2237 portp->initouttios = portp->initintios;
2238 portp->dtrwait = 3 * hz;
2239 callout_init(&portp->dtr_ch);
2240
2241 stl_portinit(brdp, panelp, portp);
2242 }
2243
2244 return(0);
2245}
2246
2247/*****************************************************************************/
2248
2249/*
2250 * Try to find and initialize an EasyIO board.
2251 */
2252
2253static int stl_initeio(stlbrd_t *brdp)
2254{
2255 stlpanel_t *panelp;
2256 unsigned int status;
2257
2258#if STLDEBUG
2259 printf("stl_initeio(brdp=%x)\n", (int) brdp);
2260#endif
2261
2262 brdp->ioctrl = brdp->ioaddr1 + 1;
2263 brdp->iostatus = brdp->ioaddr1 + 2;
2264 brdp->clk = EIO_CLK;
2265 brdp->isr = stl_eiointr;
2266
2267 status = inb(brdp->iostatus);
2268 switch (status & EIO_IDBITMASK) {
2269 case EIO_8PORTM:
2270 brdp->clk = EIO_CLK8M;
2271 /* fall thru */
2272 case EIO_8PORTRS:
2273 case EIO_8PORTDI:
2274 brdp->nrports = 8;
2275 break;
2276 case EIO_4PORTRS:
2277 brdp->nrports = 4;
2278 break;
2279 case EIO_MK3:
2280 switch (status & EIO_BRDMASK) {
2281 case ID_BRD4:
2282 brdp->nrports = 4;
2283 break;
2284 case ID_BRD8:
2285 brdp->nrports = 8;
2286 break;
2287 case ID_BRD16:
2288 brdp->nrports = 16;
2289 break;
2290 default:
2291 return(ENODEV);
2292 }
2293 brdp->ioctrl++;
2294 break;
2295 default:
2296 return(ENODEV);
2297 }
2298
2299 if (brdp->brdtype == BRD_EASYIOPCI) {
2300 outb((brdp->ioaddr2 + 0x4c), 0x41);
2301 } else {
2302/*
2303 * Check that the supplied IRQ is good and then use it to setup the
2304 * programmable interrupt bits on EIO board. Also set the edge/level
2305 * triggered interrupt bit.
2306 */
2307 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2308 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2309 printf("STALLION: invalid irq=%d for brd=%d\n",
2310 brdp->irq, brdp->brdnr);
2311 return(EINVAL);
2312 }
2313 outb(brdp->ioctrl, (stl_vecmap[brdp->irq] |
2314 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)));
2315 }
2316
2317 panelp = kmalloc(sizeof(stlpanel_t), M_TTYS, M_WAITOK | M_ZERO);
2318 panelp->brdnr = brdp->brdnr;
2319 panelp->panelnr = 0;
2320 panelp->nrports = brdp->nrports;
2321 panelp->iobase = brdp->ioaddr1;
2322 panelp->hwid = status;
2323 if ((status & EIO_IDBITMASK) == EIO_MK3) {
2324 panelp->uartp = (void *) &stl_sc26198uart;
2325 panelp->isr = stl_sc26198intr;
2326 } else {
2327 panelp->uartp = (void *) &stl_cd1400uart;
2328 panelp->isr = stl_cd1400eiointr;
2329 }
2330 brdp->panels[0] = panelp;
2331 brdp->nrpanels = 1;
2332 brdp->hwid = status;
2333 brdp->state |= BRD_FOUND;
2334 return(0);
2335}
2336
2337/*****************************************************************************/
2338
2339/*
2340 * Try to find an ECH board and initialize it. This code is capable of
2341 * dealing with all types of ECH board.
2342 */
2343
2344static int stl_initech(stlbrd_t *brdp)
2345{
2346 stlpanel_t *panelp;
2347 unsigned int status, nxtid;
2348 int panelnr, ioaddr, banknr, i;
2349
2350#if STLDEBUG
2351 printf("stl_initech(brdp=%x)\n", (int) brdp);
2352#endif
2353
2354/*
2355 * Set up the initial board register contents for boards. This varys a
2356 * bit between the different board types. So we need to handle each
2357 * separately. Also do a check that the supplied IRQ is good.
2358 */
2359 switch (brdp->brdtype) {
2360
2361 case BRD_ECH:
2362 brdp->isr = stl_echatintr;
2363 brdp->ioctrl = brdp->ioaddr1 + 1;
2364 brdp->iostatus = brdp->ioaddr1 + 1;
2365 status = inb(brdp->iostatus);
2366 if ((status & ECH_IDBITMASK) != ECH_ID)
2367 return(ENODEV);
2368 brdp->hwid = status;
2369
2370 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2371 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2372 printf("STALLION: invalid irq=%d for brd=%d\n",
2373 brdp->irq, brdp->brdnr);
2374 return(EINVAL);
2375 }
2376 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
2377 status |= (stl_vecmap[brdp->irq] << 1);
2378 outb(brdp->ioaddr1, (status | ECH_BRDRESET));
2379 brdp->ioctrlval = ECH_INTENABLE |
2380 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
2381 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDENABLE));
2382 outb(brdp->ioaddr1, status);
2383 break;
2384
2385 case BRD_ECHMC:
2386 brdp->isr = stl_echmcaintr;
2387 brdp->ioctrl = brdp->ioaddr1 + 0x20;
2388 brdp->iostatus = brdp->ioctrl;
2389 status = inb(brdp->iostatus);
2390 if ((status & ECH_IDBITMASK) != ECH_ID)
2391 return(ENODEV);
2392 brdp->hwid = status;
2393
2394 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2395 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2396 printf("STALLION: invalid irq=%d for brd=%d\n",
2397 brdp->irq, brdp->brdnr);
2398 return(EINVAL);
2399 }
2400 outb(brdp->ioctrl, ECHMC_BRDRESET);
2401 outb(brdp->ioctrl, ECHMC_INTENABLE);
2402 break;
2403
2404 case BRD_ECHPCI:
2405 brdp->isr = stl_echpciintr;
2406 brdp->ioctrl = brdp->ioaddr1 + 2;
2407 break;
2408
2409 case BRD_ECH64PCI:
2410 brdp->isr = stl_echpci64intr;
2411 brdp->ioctrl = brdp->ioaddr2 + 0x40;
2412 outb((brdp->ioaddr1 + 0x4c), 0x43);
2413 break;
2414
2415 default:
2416 printf("STALLION: unknown board type=%d\n", brdp->brdtype);
2417 break;
2418 }
2419
2420 brdp->clk = ECH_CLK;
2421
2422/*
2423 * Scan through the secondary io address space looking for panels.
2424 * As we find'em allocate and initialize panel structures for each.
2425 */
2426 ioaddr = brdp->ioaddr2;
2427 panelnr = 0;
2428 nxtid = 0;
2429 banknr = 0;
2430
2431 for (i = 0; (i < STL_MAXPANELS); i++) {
2432 if (brdp->brdtype == BRD_ECHPCI) {
2433 outb(brdp->ioctrl, nxtid);
2434 ioaddr = brdp->ioaddr2;
2435 }
2436 status = inb(ioaddr + ECH_PNLSTATUS);
2437 if ((status & ECH_PNLIDMASK) != nxtid)
2438 break;
2439 panelp = kmalloc(sizeof(stlpanel_t), M_TTYS, M_WAITOK | M_ZERO);
2440 panelp->brdnr = brdp->brdnr;
2441 panelp->panelnr = panelnr;
2442 panelp->iobase = ioaddr;
2443 panelp->pagenr = nxtid;
2444 panelp->hwid = status;
2445 brdp->bnk2panel[banknr] = panelp;
2446 brdp->bnkpageaddr[banknr] = nxtid;
2447 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
2448
2449 if (status & ECH_PNLXPID) {
2450 panelp->uartp = (void *) &stl_sc26198uart;
2451 panelp->isr = stl_sc26198intr;
2452 if (status & ECH_PNL16PORT) {
2453 panelp->nrports = 16;
2454 brdp->bnk2panel[banknr] = panelp;
2455 brdp->bnkpageaddr[banknr] = nxtid;
2456 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
2457 ECH_PNLSTATUS;
2458 } else {
2459 panelp->nrports = 8;
2460 }
2461 } else {
2462 panelp->uartp = (void *) &stl_cd1400uart;
2463 panelp->isr = stl_cd1400echintr;
2464 if (status & ECH_PNL16PORT) {
2465 panelp->nrports = 16;
2466 panelp->ackmask = 0x80;
2467 if (brdp->brdtype != BRD_ECHPCI)
2468 ioaddr += EREG_BANKSIZE;
2469 brdp->bnk2panel[banknr] = panelp;
2470 brdp->bnkpageaddr[banknr] = ++nxtid;
2471 brdp->bnkstataddr[banknr++] = ioaddr +
2472 ECH_PNLSTATUS;
2473 } else {
2474 panelp->nrports = 8;
2475 panelp->ackmask = 0xc0;
2476 }
2477 }
2478
2479 nxtid++;
2480 ioaddr += EREG_BANKSIZE;
2481 brdp->nrports += panelp->nrports;
2482 brdp->panels[panelnr++] = panelp;
2483 if ((brdp->brdtype == BRD_ECH) || (brdp->brdtype == BRD_ECHMC)){
2484 if (ioaddr >= (brdp->ioaddr2 + 0x20)) {
2485 printf("STALLION: too many ports attached "
2486 "to board %d, remove last module\n",
2487 brdp->brdnr);
2488 break;
2489 }
2490 }
2491 }
2492
2493 brdp->nrpanels = panelnr;
2494 brdp->nrbnks = banknr;
2495 if (brdp->brdtype == BRD_ECH)
2496 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDDISABLE));
2497
2498 brdp->state |= BRD_FOUND;
2499 return(0);
2500}
2501
2502/*****************************************************************************/
2503
2504/*
2505 * Initialize and configure the specified board. This firstly probes
2506 * for the board, if it is found then the board is initialized and
2507 * then all its ports are initialized as well.
2508 */
2509
2510static int stl_brdinit(stlbrd_t *brdp)
2511{
2512 stlpanel_t *panelp;
2513 int i, j, k;
2514
2515#if STLDEBUG
2516 printf("stl_brdinit(brdp=%x): unit=%d type=%d io1=%x io2=%x irq=%d\n",
2517 (int) brdp, brdp->brdnr, brdp->brdtype, brdp->ioaddr1,
2518 brdp->ioaddr2, brdp->irq);
2519#endif
2520
2521 switch (brdp->brdtype) {
2522 case BRD_EASYIO:
2523 case BRD_EASYIOPCI:
2524 stl_initeio(brdp);
2525 break;
2526 case BRD_ECH:
2527 case BRD_ECHMC:
2528 case BRD_ECHPCI:
2529 case BRD_ECH64PCI:
2530 stl_initech(brdp);
2531 break;
2532 default:
2533 printf("STALLION: unit=%d is unknown board type=%d\n",
2534 brdp->brdnr, brdp->brdtype);
2535 return(ENODEV);
2536 }
2537
2538 stl_brds[brdp->brdnr] = brdp;
2539 if ((brdp->state & BRD_FOUND) == 0) {
2540#if 0
2541 printf("STALLION: %s board not found, unit=%d io=%x irq=%d\n",
2542 stl_brdnames[brdp->brdtype], brdp->brdnr,
2543 brdp->ioaddr1, brdp->irq);
2544#endif
2545 return(ENODEV);
2546 }
2547
2548 for (i = 0, k = 0; (i < STL_MAXPANELS); i++) {
2549 panelp = brdp->panels[i];
2550 if (panelp != (stlpanel_t *) NULL) {
2551 stl_initports(brdp, panelp);
2552 for (j = 0; (j < panelp->nrports); j++)
2553 brdp->ports[k++] = panelp->ports[j];
2554 }
2555 }
2556
2557 printf("stl%d: %s (driver version %s) unit=%d nrpanels=%d nrports=%d\n",
2558 brdp->unitid, stl_brdnames[brdp->brdtype], stl_drvversion,
2559 brdp->brdnr, brdp->nrpanels, brdp->nrports);
2560 return(0);
2561}
2562
2563/*****************************************************************************/
2564
2565/*
2566 * Return the board stats structure to user app.
2567 */
2568
2569static int stl_getbrdstats(caddr_t data)
2570{
2571 stlbrd_t *brdp;
2572 stlpanel_t *panelp;
2573 int i;
2574
2575 stl_brdstats = *((combrd_t *) data);
2576 if (stl_brdstats.brd >= STL_MAXBRDS)
2577 return(-ENODEV);
2578 brdp = stl_brds[stl_brdstats.brd];
2579 if (brdp == (stlbrd_t *) NULL)
2580 return(-ENODEV);
2581
2582 bzero(&stl_brdstats, sizeof(combrd_t));
2583 stl_brdstats.brd = brdp->brdnr;
2584 stl_brdstats.type = brdp->brdtype;
2585 stl_brdstats.hwid = brdp->hwid;
2586 stl_brdstats.state = brdp->state;
2587 stl_brdstats.ioaddr = brdp->ioaddr1;
2588 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2589 stl_brdstats.irq = brdp->irq;
2590 stl_brdstats.nrpanels = brdp->nrpanels;
2591 stl_brdstats.nrports = brdp->nrports;
2592 for (i = 0; (i < brdp->nrpanels); i++) {
2593 panelp = brdp->panels[i];
2594 stl_brdstats.panels[i].panel = i;
2595 stl_brdstats.panels[i].hwid = panelp->hwid;
2596 stl_brdstats.panels[i].nrports = panelp->nrports;
2597 }
2598
2599 *((combrd_t *) data) = stl_brdstats;
2600 return(0);
2601}
2602
2603/*****************************************************************************/
2604
2605/*
2606 * Resolve the referenced port number into a port struct pointer.
2607 */
2608
2609static stlport_t *stl_getport(int brdnr, int panelnr, int portnr)
2610{
2611 stlbrd_t *brdp;
2612 stlpanel_t *panelp;
2613
2614 if ((brdnr < 0) || (brdnr >= STL_MAXBRDS))
2615 return((stlport_t *) NULL);
2616 brdp = stl_brds[brdnr];
2617 if (brdp == (stlbrd_t *) NULL)
2618 return((stlport_t *) NULL);
2619 if ((panelnr < 0) || (panelnr >= brdp->nrpanels))
2620 return((stlport_t *) NULL);
2621 panelp = brdp->panels[panelnr];
2622 if (panelp == (stlpanel_t *) NULL)
2623 return((stlport_t *) NULL);
2624 if ((portnr < 0) || (portnr >= panelp->nrports))
2625 return((stlport_t *) NULL);
2626 return(panelp->ports[portnr]);
2627}
2628
2629/*****************************************************************************/
2630
2631/*
2632 * Return the port stats structure to user app. A NULL port struct
2633 * pointer passed in means that we need to find out from the app
2634 * what port to get stats for (used through board control device).
2635 */
2636
2637static int stl_getportstats(stlport_t *portp, caddr_t data)
2638{
2639 unsigned char *head, *tail;
2640
2641 if (portp == (stlport_t *) NULL) {
2642 stl_comstats = *((comstats_t *) data);
2643 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2644 stl_comstats.port);
2645 if (portp == (stlport_t *) NULL)
2646 return(-ENODEV);
2647 }
2648
2649 portp->stats.state = portp->state;
2650 /*portp->stats.flags = portp->flags;*/
2651 portp->stats.hwid = portp->hwid;
2652 portp->stats.ttystate = portp->tty.t_state;
2653 portp->stats.cflags = portp->tty.t_cflag;
2654 portp->stats.iflags = portp->tty.t_iflag;
2655 portp->stats.oflags = portp->tty.t_oflag;
2656 portp->stats.lflags = portp->tty.t_lflag;
2657
2658 head = portp->tx.head;
2659 tail = portp->tx.tail;
2660 portp->stats.txbuffered = ((head >= tail) ? (head - tail) :
2661 (STL_TXBUFSIZE - (tail - head)));
2662
2663 head = portp->rx.head;
2664 tail = portp->rx.tail;
2665 portp->stats.rxbuffered = (head >= tail) ? (head - tail) :
2666 (STL_RXBUFSIZE - (tail - head));
2667
2668 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2669
2670 *((comstats_t *) data) = portp->stats;
2671 return(0);
2672}
2673
2674/*****************************************************************************/
2675
2676/*
2677 * Clear the port stats structure. We also return it zeroed out...
2678 */
2679
2680static int stl_clrportstats(stlport_t *portp, caddr_t data)
2681{
2682 if (portp == (stlport_t *) NULL) {
2683 stl_comstats = *((comstats_t *) data);
2684 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2685 stl_comstats.port);
2686 if (portp == (stlport_t *) NULL)
2687 return(ENODEV);
2688 }
2689
2690 bzero(&portp->stats, sizeof(comstats_t));
2691 portp->stats.brd = portp->brdnr;
2692 portp->stats.panel = portp->panelnr;
2693 portp->stats.port = portp->portnr;
2694 *((comstats_t *) data) = stl_comstats;
2695 return(0);
2696}
2697
2698/*****************************************************************************/
2699
2700/*
2701 * The "staliomem" device is used for stats collection in this driver.
2702 */
2703
2704static int stl_memioctl(cdev_t dev, unsigned long cmd, caddr_t data, int flag)
2705{
2706 int rc;
2707
2708#if STLDEBUG
2709 printf("stl_memioctl(dev=%s,cmd=%lx,data=%p,flag=%x)\n",
2710 devtoname(dev), cmd, (void *) data, flag);
2711#endif
2712
2713 rc = 0;
2714
2715 switch (cmd) {
2716 case COM_GETPORTSTATS:
2717 rc = stl_getportstats((stlport_t *) NULL, data);
2718 break;
2719 case COM_CLRPORTSTATS:
2720 rc = stl_clrportstats((stlport_t *) NULL, data);
2721 break;
2722 case COM_GETBRDSTATS:
2723 rc = stl_getbrdstats(data);
2724 break;
2725 default:
2726 rc = ENOTTY;
2727 break;
2728 }
2729
2730 return(rc);
2731}
2732
2733/*****************************************************************************/
2734
2735/*****************************************************************************/
2736/* CD1400 UART CODE */
2737/*****************************************************************************/
2738
2739/*
2740 * These functions get/set/update the registers of the cd1400 UARTs.
2741 * Access to the cd1400 registers is via an address/data io port pair.
2742 */
2743
2744static int stl_cd1400getreg(stlport_t *portp, int regnr)
2745{
2746 outb(portp->ioaddr, (regnr + portp->uartaddr));
2747 return(inb(portp->ioaddr + EREG_DATA));
2748}
2749
2750/*****************************************************************************/
2751
2752static void stl_cd1400setreg(stlport_t *portp, int regnr, int value)
2753{
2754 outb(portp->ioaddr, (regnr + portp->uartaddr));
2755 outb((portp->ioaddr + EREG_DATA), value);
2756}
2757
2758/*****************************************************************************/
2759
2760static int stl_cd1400updatereg(stlport_t *portp, int regnr, int value)
2761{
2762 outb(portp->ioaddr, (regnr + portp->uartaddr));
2763 if (inb(portp->ioaddr + EREG_DATA) != value) {
2764 outb((portp->ioaddr + EREG_DATA), value);
2765 return(1);
2766 }
2767 return(0);
2768}
2769
2770/*****************************************************************************/
2771
2772static void stl_cd1400flush(stlport_t *portp, int flag)
2773{
2774
2775#if STLDEBUG
2776 printf("stl_cd1400flush(portp=%x,flag=%x)\n", (int) portp, flag);
2777#endif
2778
2779 if (portp == (stlport_t *) NULL)
2780 return;
2781
2782 crit_enter();
2783
2784 if (flag & FWRITE) {
2785 BRDENABLE(portp->brdnr, portp->pagenr);
2786 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2787 stl_cd1400ccrwait(portp);
2788 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
2789 stl_cd1400ccrwait(portp);
2790 BRDDISABLE(portp->brdnr);
2791 }
2792
2793 if (flag & FREAD) {
2794 /* Hmmm */
2795 }
2796
2797 crit_exit();
2798}
2799
2800/*****************************************************************************/
2801
2802static void stl_cd1400ccrwait(stlport_t *portp)
2803{
2804 int i;
2805
2806 for (i = 0; (i < CCR_MAXWAIT); i++) {
2807 if (stl_cd1400getreg(portp, CCR) == 0)
2808 return;
2809 }
2810
2811 printf("stl%d: cd1400 device not responding, panel=%d port=%d\n",
2812 portp->brdnr, portp->panelnr, portp->portnr);
2813}
2814
2815/*****************************************************************************/
2816
2817/*
2818 * Transmit interrupt handler. This has gotta be fast! Handling TX
2819 * chars is pretty simple, stuff as many as possible from the TX buffer
2820 * into the cd1400 FIFO. Must also handle TX breaks here, since they
2821 * are embedded as commands in the data stream. Oh no, had to use a goto!
2822 */
2823
2824static __inline void stl_cd1400txisr(stlpanel_t *panelp, int ioaddr)
2825{
2826 struct tty *tp;
2827 stlport_t *portp;
2828 unsigned char ioack, srer;
2829 char *head, *tail;
2830 int len, stlen;
2831
2832#if STLDEBUG
2833 printf("stl_cd1400txisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
2834#endif
2835
2836 ioack = inb(ioaddr + EREG_TXACK);
2837 if (((ioack & panelp->ackmask) != 0) ||
2838 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
2839 printf("STALLION: bad TX interrupt ack value=%x\n",
2840 ioack);
2841 return;
2842 }
2843 portp = panelp->ports[(ioack >> 3)];
2844 tp = &portp->tty;
2845
2846/*
2847 * Unfortunately we need to handle breaks in the data stream, since
2848 * this is the only way to generate them on the cd1400. Do it now if
2849 * a break is to be sent. Some special cases here: brklen is -1 then
2850 * start sending an un-timed break, if brklen is -2 then stop sending
2851 * an un-timed break, if brklen is -3 then we have just sent an
2852 * un-timed break and do not want any data to go out, if brklen is -4
2853 * then a break has just completed so clean up the port settings.
2854 */
2855 if (portp->brklen != 0) {
2856 if (portp->brklen >= -1) {
2857 outb(ioaddr, (TDR + portp->uartaddr));
2858 outb((ioaddr + EREG_DATA), ETC_CMD);
2859 outb((ioaddr + EREG_DATA), ETC_STARTBREAK);
2860 if (portp->brklen > 0) {
2861 outb((ioaddr + EREG_DATA), ETC_CMD);
2862 outb((ioaddr + EREG_DATA), ETC_DELAY);
2863 outb((ioaddr + EREG_DATA), portp->brklen);
2864 outb((ioaddr + EREG_DATA), ETC_CMD);
2865 outb((ioaddr + EREG_DATA), ETC_STOPBREAK);
2866 portp->brklen = -4;
2867 } else {
2868 portp->brklen = -3;
2869 }
2870 } else if (portp->brklen == -2) {
2871 outb(ioaddr, (TDR + portp->uartaddr));
2872 outb((ioaddr + EREG_DATA), ETC_CMD);
2873 outb((ioaddr + EREG_DATA), ETC_STOPBREAK);
2874 portp->brklen = -4;
2875 } else if (portp->brklen == -3) {
2876 outb(ioaddr, (SRER + portp->uartaddr));
2877 srer = inb(ioaddr + EREG_DATA);
2878 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
2879 outb((ioaddr + EREG_DATA), srer);
2880 } else {
2881 outb(ioaddr, (COR2 + portp->uartaddr));
2882 outb((ioaddr + EREG_DATA),
2883 (inb(ioaddr + EREG_DATA) & ~COR2_ETC));
2884 portp->brklen = 0;
2885 }
2886 goto stl_txalldone;
2887 }
2888
2889 head = portp->tx.head;
2890 tail = portp->tx.tail;
2891 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
2892 if ((len == 0) || ((len < STL_TXBUFLOW) &&
2893 ((portp->state & ASY_TXLOW) == 0))) {
2894 portp->state |= ASY_TXLOW;
2895 stl_dotimeout();
2896 }
2897
2898 if (len == 0) {
2899 outb(ioaddr, (SRER + portp->uartaddr));
2900 srer = inb(ioaddr + EREG_DATA);
2901 if (srer & SRER_TXDATA) {
2902 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
2903 } else {
2904 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
2905 portp->state |= ASY_TXEMPTY;
2906 portp->state &= ~ASY_TXBUSY;
2907 }
2908 outb((ioaddr + EREG_DATA), srer);
2909 } else {
2910 len = MIN(len, CD1400_TXFIFOSIZE);
2911 portp->stats.txtotal += len;
2912 stlen = MIN(len, (portp->tx.endbuf - tail));
2913 outb(ioaddr, (TDR + portp->uartaddr));
2914 outsb((ioaddr + EREG_DATA), tail, stlen);
2915 len -= stlen;
2916 tail += stlen;
2917 if (tail >= portp->tx.endbuf)
2918 tail = portp->tx.buf;
2919 if (len > 0) {
2920 outsb((ioaddr + EREG_DATA), tail, len);
2921 tail += len;
2922 }
2923 portp->tx.tail = tail;
2924 }
2925
2926stl_txalldone:
2927 outb(ioaddr, (EOSRR + portp->uartaddr));
2928 outb((ioaddr + EREG_DATA), 0);
2929}
2930
2931/*****************************************************************************/
2932
2933/*
2934 * Receive character interrupt handler. Determine if we have good chars
2935 * or bad chars and then process appropriately.
2936 */
2937
2938static __inline void stl_cd1400rxisr(stlpanel_t *panelp, int ioaddr)
2939{
2940 stlport_t *portp;
2941 struct tty *tp;
2942 unsigned int ioack, len, buflen, stlen;
2943 unsigned char status;
2944 char ch;
2945 char *head, *tail;
2946
2947#if STLDEBUG
2948 printf("stl_cd1400rxisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
2949#endif
2950
2951 ioack = inb(ioaddr + EREG_RXACK);
2952 if ((ioack & panelp->ackmask) != 0) {
2953 printf("STALLION: bad RX interrupt ack value=%x\n", ioack);
2954 return;
2955 }
2956 portp = panelp->ports[(ioack >> 3)];
2957 tp = &portp->tty;
2958
2959/*
2960 * First up, calculate how much room there is in the RX ring queue.
2961 * We also want to keep track of the longest possible copy length,
2962 * this has to allow for the wrapping of the ring queue.
2963 */
2964 head = portp->rx.head;
2965 tail = portp->rx.tail;
2966 if (head >= tail) {
2967 buflen = STL_RXBUFSIZE - (head - tail) - 1;
2968 stlen = portp->rx.endbuf - head;
2969 } else {
2970 buflen = tail - head - 1;
2971 stlen = buflen;
2972 }
2973
2974/*
2975 * Check if the input buffer is near full. If so then we should take
2976 * some flow control action... It is very easy to do hardware and
2977 * software flow control from here since we have the port selected on
2978 * the UART.
2979 */
2980 if (buflen <= (STL_RXBUFSIZE - STL_RXBUFHIGH)) {
2981 if (((portp->state & ASY_RTSFLOW) == 0) &&
2982 (portp->state & ASY_RTSFLOWMODE)) {
2983 portp->state |= ASY_RTSFLOW;
2984 stl_cd1400setreg(portp, MCOR1,
2985 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
2986 stl_cd1400setreg(portp, MSVR2, 0);
2987 portp->stats.rxrtsoff++;
2988 }
2989 }
2990
2991/*
2992 * OK we are set, process good data... If the RX ring queue is full
2993 * just chuck the chars - don't leave them in the UART.
2994 */
2995 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
2996 outb(ioaddr, (RDCR + portp->uartaddr));
2997 len = inb(ioaddr + EREG_DATA);
2998 if (buflen == 0) {
2999 outb(ioaddr, (RDSR + portp->uartaddr));
3000 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3001 portp->stats.rxlost += len;
3002 portp->stats.rxtotal += len;
3003 } else {
3004 len = MIN(len, buflen);
3005 portp->stats.rxtotal += len;
3006 stlen = MIN(len, stlen);
3007 if (len > 0) {
3008 outb(ioaddr, (RDSR + portp->uartaddr));
3009 insb((ioaddr + EREG_DATA), head, stlen);
3010 head += stlen;
3011 if (head >= portp->rx.endbuf) {
3012 head = portp->rx.buf;
3013 len -= stlen;
3014 insb((ioaddr + EREG_DATA), head, len);
3015 head += len;
3016 }
3017 }
3018 }
3019 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3020 outb(ioaddr, (RDSR + portp->uartaddr));
3021 status = inb(ioaddr + EREG_DATA);
3022 ch = inb(ioaddr + EREG_DATA);
3023 if (status & ST_BREAK)
3024 portp->stats.rxbreaks++;
3025 if (status & ST_FRAMING)
3026 portp->stats.rxframing++;
3027 if (status & ST_PARITY)
3028 portp->stats.rxparity++;
3029 if (status & ST_OVERRUN)
3030 portp->stats.rxoverrun++;
3031 if (status & ST_SCHARMASK) {
3032 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3033 portp->stats.txxon++;
3034 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3035 portp->stats.txxoff++;
3036 goto stl_rxalldone;
3037 }
3038 if ((portp->rxignoremsk & status) == 0) {
3039 if ((tp->t_state & TS_CAN_BYPASS_L_RINT) &&
3040 ((status & ST_FRAMING) ||
3041 ((status & ST_PARITY) && (tp->t_iflag & INPCK))))
3042 ch = 0;
3043 if ((portp->rxmarkmsk & status) == 0)
3044 status = 0;
3045 *(head + STL_RXBUFSIZE) = status;
3046 *head++ = ch;
3047 if (head >= portp->rx.endbuf)
3048 head = portp->rx.buf;
3049 }
3050 } else {
3051 printf("STALLION: bad RX interrupt ack value=%x\n", ioack);
3052 return;
3053 }
3054
3055 portp->rx.head = head;
3056 portp->state |= ASY_RXDATA;
3057 stl_dotimeout();
3058
3059stl_rxalldone:
3060 outb(ioaddr, (EOSRR + portp->uartaddr));
3061 outb((ioaddr + EREG_DATA), 0);
3062}
3063
3064/*****************************************************************************/
3065
3066/*
3067 * Modem interrupt handler. The is called when the modem signal line
3068 * (DCD) has changed state.
3069 */
3070
3071static __inline void stl_cd1400mdmisr(stlpanel_t *panelp, int ioaddr)
3072{
3073 stlport_t *portp;
3074 unsigned int ioack;
3075 unsigned char misr;
3076
3077#if STLDEBUG
3078 printf("stl_cd1400mdmisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
3079#endif
3080
3081 ioack = inb(ioaddr + EREG_MDACK);
3082 if (((ioack & panelp->ackmask) != 0) ||
3083 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3084 printf("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3085 return;
3086 }
3087 portp = panelp->ports[(ioack >> 3)];
3088
3089 outb(ioaddr, (MISR + portp->uartaddr));
3090 misr = inb(ioaddr + EREG_DATA);
3091 if (misr & MISR_DCD) {
3092 portp->state |= ASY_DCDCHANGE;
3093 portp->stats.modem++;
3094 stl_dotimeout();
3095 }
3096
3097 outb(ioaddr, (EOSRR + portp->uartaddr));
3098 outb((ioaddr + EREG_DATA), 0);
3099}
3100
3101/*****************************************************************************/
3102
3103/*
3104 * Interrupt service routine for cd1400 EasyIO boards.
3105 */
3106
3107static void stl_cd1400eiointr(stlpanel_t *panelp, unsigned int iobase)
3108{
3109 unsigned char svrtype;
3110
3111#if STLDEBUG
3112 printf("stl_cd1400eiointr(panelp=%x,iobase=%x)\n", (int) panelp,
3113 iobase);
3114#endif
3115
3116 outb(iobase, SVRR);
3117 svrtype = inb(iobase + EREG_DATA);
3118 if (panelp->nrports > 4) {
3119 outb(iobase, (SVRR + 0x80));
3120 svrtype |= inb(iobase + EREG_DATA);
3121 }
3122#if STLDEBUG
3123printf("stl_cd1400eiointr(panelp=%x,iobase=%x): svrr=%x\n", (int) panelp, iobase, svrtype);
3124#endif
3125
3126 if (svrtype & SVRR_RX)
3127 stl_cd1400rxisr(panelp, iobase);
3128 else if (svrtype & SVRR_TX)
3129 stl_cd1400txisr(panelp, iobase);
3130 else if (svrtype & SVRR_MDM)
3131 stl_cd1400mdmisr(panelp, iobase);
3132}
3133
3134/*****************************************************************************/
3135
3136/*
3137 * Interrupt service routine for cd1400 panels.
3138 */
3139
3140static void stl_cd1400echintr(stlpanel_t *panelp, unsigned int iobase)
3141{
3142 unsigned char svrtype;
3143
3144#if STLDEBUG
3145 printf("stl_cd1400echintr(panelp=%x,iobase=%x)\n", (int) panelp,
3146 iobase);
3147#endif
3148
3149 outb(iobase, SVRR);
3150 svrtype = inb(iobase + EREG_DATA);
3151 outb(iobase, (SVRR + 0x80));
3152 svrtype |= inb(iobase + EREG_DATA);
3153 if (svrtype & SVRR_RX)
3154 stl_cd1400rxisr(panelp, iobase);
3155 else if (svrtype & SVRR_TX)
3156 stl_cd1400txisr(panelp, iobase);
3157 else if (svrtype & SVRR_MDM)
3158 stl_cd1400mdmisr(panelp, iobase);
3159}
3160
3161/*****************************************************************************/
3162
3163/*
3164 * Set up the cd1400 registers for a port based on the termios port
3165 * settings.
3166 */
3167
3168static int stl_cd1400setport(stlport_t *portp, struct termios *tiosp)
3169{
3170 unsigned int clkdiv;
3171 unsigned char cor1, cor2, cor3;
3172 unsigned char cor4, cor5, ccr;
3173 unsigned char srer, sreron, sreroff;
3174 unsigned char mcor1, mcor2, rtpr;
3175 unsigned char clk, div;
3176
3177#if STLDEBUG
3178 printf("stl_cd1400setport(portp=%x,tiosp=%x): brdnr=%d portnr=%d\n",
3179 (int) portp, (int) tiosp, portp->brdnr, portp->portnr);
3180#endif
3181
3182 cor1 = 0;
3183 cor2 = 0;
3184 cor3 = 0;
3185 cor4 = 0;
3186 cor5 = 0;
3187 ccr = 0;
3188 rtpr = 0;
3189 clk = 0;
3190 div = 0;
3191 mcor1 = 0;
3192 mcor2 = 0;
3193 sreron = 0;
3194 sreroff = 0;
3195
3196/*
3197 * Set up the RX char ignore mask with those RX error types we
3198 * can ignore. We could have used some special modes of the cd1400
3199 * UART to help, but it is better this way because we can keep stats
3200 * on the number of each type of RX exception event.
3201 */
3202 portp->rxignoremsk = 0;
3203 if (tiosp->c_iflag & IGNPAR)
3204 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
3205 if (tiosp->c_iflag & IGNBRK)
3206 portp->rxignoremsk |= ST_BREAK;
3207
3208 portp->rxmarkmsk = ST_OVERRUN;
3209 if (tiosp->c_iflag & (INPCK | PARMRK))
3210 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
3211 if (tiosp->c_iflag & BRKINT)
3212 portp->rxmarkmsk |= ST_BREAK;
3213
3214/*
3215 * Go through the char size, parity and stop bits and set all the
3216 * option registers appropriately.
3217 */
3218 switch (tiosp->c_cflag & CSIZE) {
3219 case CS5:
3220 cor1 |= COR1_CHL5;
3221 break;
3222 case CS6:
3223 cor1 |= COR1_CHL6;
3224 break;
3225 case CS7:
3226 cor1 |= COR1_CHL7;
3227 break;
3228 default:
3229 cor1 |= COR1_CHL8;
3230 break;
3231 }
3232
3233 if (tiosp->c_cflag & CSTOPB)
3234 cor1 |= COR1_STOP2;
3235 else
3236 cor1 |= COR1_STOP1;
3237
3238 if (tiosp->c_cflag & PARENB) {
3239 if (tiosp->c_cflag & PARODD)
3240 cor1 |= (COR1_PARENB | COR1_PARODD);
3241 else
3242 cor1 |= (COR1_PARENB | COR1_PAREVEN);
3243 } else {
3244 cor1 |= COR1_PARNONE;
3245 }
3246
3247/*
3248 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
3249 * space for hardware flow control and the like. This should be set to
3250 * VMIN. Also here we will set the RX data timeout to 10ms - this should
3251 * really be based on VTIME...
3252 */
3253 cor3 |= FIFO_RXTHRESHOLD;
3254 rtpr = 2;
3255
3256/*
3257 * Calculate the baud rate timers. For now we will just assume that
3258 * the input and output baud are the same. Could have used a baud
3259 * table here, but this way we can generate virtually any baud rate
3260 * we like!
3261 */
3262 if (tiosp->c_ispeed == 0)
3263 tiosp->c_ispeed = tiosp->c_ospeed;
3264 if ((tiosp->c_ospeed < 0) || (tiosp->c_ospeed > CD1400_MAXBAUD))
3265 return(EINVAL);
3266
3267 if (tiosp->c_ospeed > 0) {
3268 for (clk = 0; (clk < CD1400_NUMCLKS); clk++) {
3269 clkdiv = ((portp->clk / stl_cd1400clkdivs[clk]) /
3270 tiosp->c_ospeed);
3271 if (clkdiv < 0x100)
3272 break;
3273 }
3274 div = (unsigned char) clkdiv;
3275 }
3276
3277/*
3278 * Check what form of modem signaling is required and set it up.
3279 */
3280 if ((tiosp->c_cflag & CLOCAL) == 0) {
3281 mcor1 |= MCOR1_DCD;
3282 mcor2 |= MCOR2_DCD;
3283 sreron |= SRER_MODEM;
3284 }
3285
3286/*
3287 * Setup cd1400 enhanced modes if we can. In particular we want to
3288 * handle as much of the flow control as possbile automatically. As
3289 * well as saving a few CPU cycles it will also greatly improve flow
3290 * control reliablilty.
3291 */
3292 if (tiosp->c_iflag & IXON) {
3293 cor2 |= COR2_TXIBE;
3294 cor3 |= COR3_SCD12;
3295 if (tiosp->c_iflag & IXANY)
3296 cor2 |= COR2_IXM;
3297 }
3298
3299 if (tiosp->c_cflag & CCTS_OFLOW)
3300 cor2 |= COR2_CTSAE;
3301 if (tiosp->c_cflag & CRTS_IFLOW)
3302 mcor1 |= FIFO_RTSTHRESHOLD;
3303
3304/*
3305 * All cd1400 register values calculated so go through and set them
3306 * all up.
3307 */
3308#if STLDEBUG
3309 printf("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", portp->portnr,
3310 portp->panelnr, portp->brdnr);
3311 printf(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n", cor1, cor2,
3312 cor3, cor4, cor5);
3313 printf(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
3314 mcor1, mcor2, rtpr, sreron, sreroff);
3315 printf(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
3316 printf(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
3317 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP], tiosp->c_cc[VSTART],
3318 tiosp->c_cc[VSTOP]);
3319#endif
3320
3321 crit_enter();
3322 BRDENABLE(portp->brdnr, portp->pagenr);
3323 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3324 srer = stl_cd1400getreg(portp, SRER);
3325 stl_cd1400setreg(portp, SRER, 0);
3326 ccr += stl_cd1400updatereg(portp, COR1, cor1);
3327 ccr += stl_cd1400updatereg(portp, COR2, cor2);
3328 ccr += stl_cd1400updatereg(portp, COR3, cor3);
3329 if (ccr) {
3330 stl_cd1400ccrwait(portp);
3331 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
3332 }
3333 stl_cd1400setreg(portp, COR4, cor4);
3334 stl_cd1400setreg(portp, COR5, cor5);
3335 stl_cd1400setreg(portp, MCOR1, mcor1);
3336 stl_cd1400setreg(portp, MCOR2, mcor2);
3337 if (tiosp->c_ospeed == 0) {
3338 stl_cd1400setreg(portp, MSVR1, 0);
3339 } else {
3340 stl_cd1400setreg(portp, MSVR1, MSVR1_DTR);
3341 stl_cd1400setreg(portp, TCOR, clk);
3342 stl_cd1400setreg(portp, TBPR, div);
3343 stl_cd1400setreg(portp, RCOR, clk);
3344 stl_cd1400setreg(portp, RBPR, div);
3345 }
3346 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
3347 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
3348 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
3349 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
3350 stl_cd1400setreg(portp, RTPR, rtpr);
3351 mcor1 = stl_cd1400getreg(portp, MSVR1);
3352 if (mcor1 & MSVR1_DCD)
3353 portp->sigs |= TIOCM_CD;
3354 else
3355 portp->sigs &= ~TIOCM_CD;
3356 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
3357 BRDDISABLE(portp->brdnr);
3358 portp->state &= ~(ASY_RTSFLOWMODE | ASY_CTSFLOWMODE);
3359 portp->state |= ((tiosp->c_cflag & CRTS_IFLOW) ? ASY_RTSFLOWMODE : 0);
3360 portp->state |= ((tiosp->c_cflag & CCTS_OFLOW) ? ASY_CTSFLOWMODE : 0);
3361 stl_ttyoptim(portp, tiosp);
3362 crit_exit();
3363
3364 return(0);
3365}
3366
3367/*****************************************************************************/
3368
3369/*
3370 * Action the flow control as required. The hw and sw args inform the
3371 * routine what flow control methods it should try.
3372 */
3373
3374static void stl_cd1400sendflow(stlport_t *portp, int hw, int sw)
3375{
3376
3377#if STLDEBUG
3378 printf("stl_cd1400sendflow(portp=%x,hw=%d,sw=%d)\n",
3379 (int) portp, hw, sw);
3380#endif
3381
3382 crit_enter();
3383 BRDENABLE(portp->brdnr, portp->pagenr);
3384 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3385
3386 if (sw >= 0) {
3387 stl_cd1400ccrwait(portp);
3388 if (sw) {
3389 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3390 portp->stats.rxxoff++;
3391 } else {
3392 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3393 portp->stats.rxxon++;
3394 }
3395 stl_cd1400ccrwait(portp);
3396 }
3397
3398 if (hw == 0) {
3399 portp->state |= ASY_RTSFLOW;
3400 stl_cd1400setreg(portp, MCOR1,
3401 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3402 stl_cd1400setreg(portp, MSVR2, 0);
3403 portp->stats.rxrtsoff++;
3404 } else if (hw > 0) {
3405 portp->state &= ~ASY_RTSFLOW;
3406 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3407 stl_cd1400setreg(portp, MCOR1,
3408 (stl_cd1400getreg(portp, MCOR1) | FIFO_RTSTHRESHOLD));
3409 portp->stats.rxrtson++;
3410 }
3411
3412 BRDDISABLE(portp->brdnr);
3413 crit_exit();
3414}
3415
3416/*****************************************************************************/
3417
3418/*
3419 * Return the current state of data flow on this port. This is only
3420 * really interresting when determining if data has fully completed
3421 * transmission or not... This is easy for the cd1400, it accurately
3422 * maintains the busy port flag.
3423 */
3424
3425static int stl_cd1400datastate(stlport_t *portp)
3426{
3427#if STLDEBUG
3428 printf("stl_cd1400datastate(portp=%x)\n", (int) portp);
3429#endif
3430
3431 if (portp == (stlport_t *) NULL)
3432 return(0);
3433
3434 return((portp->state & ASY_TXBUSY) ? 1 : 0);
3435}
3436
3437/*****************************************************************************/
3438
3439/*
3440 * Set the state of the DTR and RTS signals. Got to do some extra
3441 * work here to deal hardware flow control.
3442 */
3443
3444static void stl_cd1400setsignals(stlport_t *portp, int dtr, int rts)
3445{
3446 unsigned char msvr1, msvr2;
3447
3448#if STLDEBUG
3449 printf("stl_cd1400setsignals(portp=%x,dtr=%d,rts=%d)\n", (int) portp,
3450 dtr, rts);
3451#endif
3452
3453 msvr1 = 0;
3454 msvr2 = 0;
3455 if (dtr > 0)
3456 msvr1 = MSVR1_DTR;
3457 if (rts > 0)
3458 msvr2 = MSVR2_RTS;
3459
3460 crit_enter();
3461 BRDENABLE(portp->brdnr, portp->pagenr);
3462 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3463 if (rts >= 0) {
3464 if (portp->tty.t_cflag & CRTS_IFLOW) {
3465 if (rts == 0) {
3466 stl_cd1400setreg(portp, MCOR1,
3467 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3468 portp->stats.rxrtsoff++;
3469 } else {
3470 stl_cd1400setreg(portp, MCOR1,
3471 (stl_cd1400getreg(portp, MCOR1) |
3472 FIFO_RTSTHRESHOLD));
3473 portp->stats.rxrtson++;
3474 }
3475 }
3476 stl_cd1400setreg(portp, MSVR2, msvr2);
3477 }
3478 if (dtr >= 0)
3479 stl_cd1400setreg(portp, MSVR1, msvr1);
3480 BRDDISABLE(portp->brdnr);
3481 crit_exit();
3482}
3483
3484/*****************************************************************************/
3485
3486/*
3487 * Get the state of the signals.
3488 */
3489
3490static int stl_cd1400getsignals(stlport_t *portp)
3491{
3492 unsigned char msvr1, msvr2;
3493 int sigs;
3494
3495#if STLDEBUG
3496 printf("stl_cd1400getsignals(portp=%x)\n", (int) portp);
3497#endif
3498
3499 crit_enter();
3500 BRDENABLE(portp->brdnr, portp->pagenr);
3501 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3502 msvr1 = stl_cd1400getreg(portp, MSVR1);
3503 msvr2 = stl_cd1400getreg(portp, MSVR2);
3504 BRDDISABLE(portp->brdnr);
3505 crit_exit();
3506
3507 sigs = 0;
3508 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
3509 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
3510 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
3511 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
3512#if 0
3513 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
3514 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
3515#else
3516 sigs |= TIOCM_DSR;
3517#endif
3518 return(sigs);
3519}
3520
3521/*****************************************************************************/
3522
3523/*
3524 * Enable or disable the Transmitter and/or Receiver.
3525 */
3526
3527static void stl_cd1400enablerxtx(stlport_t *portp, int rx, int tx)
3528{
3529 unsigned char ccr;
3530
3531#if STLDEBUG
3532 printf("stl_cd1400enablerxtx(portp=%x,rx=%d,tx=%d)\n",
3533 (int) portp, rx, tx);
3534#endif
3535
3536 ccr = 0;
3537 if (tx == 0)
3538 ccr |= CCR_TXDISABLE;
3539 else if (tx > 0)
3540 ccr |= CCR_TXENABLE;
3541 if (rx == 0)
3542 ccr |= CCR_RXDISABLE;
3543 else if (rx > 0)
3544 ccr |= CCR_RXENABLE;
3545
3546 crit_enter();
3547 BRDENABLE(portp->brdnr, portp->pagenr);
3548 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3549 stl_cd1400ccrwait(portp);
3550 stl_cd1400setreg(portp, CCR, ccr);
3551 stl_cd1400ccrwait(portp);
3552 BRDDISABLE(portp->brdnr);
3553 crit_exit();
3554}
3555
3556/*****************************************************************************/
3557
3558/*
3559 * Start or stop the Transmitter and/or Receiver.
3560 */
3561
3562static void stl_cd1400startrxtx(stlport_t *portp, int rx, int tx)
3563{
3564 unsigned char sreron, sreroff;
3565
3566#if STLDEBUG
3567 printf("stl_cd1400startrxtx(portp=%x,rx=%d,tx=%d)\n",
3568 (int) portp, rx, tx);
3569#endif
3570
3571 sreron = 0;
3572 sreroff = 0;
3573 if (tx == 0)
3574 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
3575 else if (tx == 1)
3576 sreron |= SRER_TXDATA;
3577 else if (tx >= 2)
3578 sreron |= SRER_TXEMPTY;
3579 if (rx == 0)
3580 sreroff |= SRER_RXDATA;
3581 else if (rx > 0)
3582 sreron |= SRER_RXDATA;
3583
3584 crit_enter();
3585 BRDENABLE(portp->brdnr, portp->pagenr);
3586 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3587 stl_cd1400setreg(portp, SRER,
3588 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3589 BRDDISABLE(portp->brdnr);
3590 if (tx > 0) {
3591 portp->state |= ASY_TXBUSY;
3592 portp->tty.t_state |= TS_BUSY;
3593 }
3594 crit_exit();
3595}
3596
3597/*****************************************************************************/
3598
3599/*
3600 * Disable all interrupts from this port.
3601 */
3602
3603static void stl_cd1400disableintrs(stlport_t *portp)
3604{
3605
3606#if STLDEBUG
3607 printf("stl_cd1400disableintrs(portp=%x)\n", (int) portp);
3608#endif
3609
3610 crit_enter();
3611 BRDENABLE(portp->brdnr, portp->pagenr);
3612 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3613 stl_cd1400setreg(portp, SRER, 0);
3614 BRDDISABLE(portp->brdnr);
3615 crit_exit();
3616}
3617
3618/*****************************************************************************/
3619
3620static void stl_cd1400sendbreak(stlport_t *portp, long len)
3621{
3622
3623#if STLDEBUG
3624 printf("stl_cd1400sendbreak(portp=%x,len=%d)\n", (int) portp,
3625 (int) len);
3626#endif
3627
3628 crit_enter();
3629 BRDENABLE(portp->brdnr, portp->pagenr);
3630 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3631 stl_cd1400setreg(portp, COR2,
3632 (stl_cd1400getreg(portp, COR2) | COR2_ETC));
3633 stl_cd1400setreg(portp, SRER,
3634 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3635 SRER_TXEMPTY));
3636 BRDDISABLE(portp->brdnr);
3637 if (len > 0) {
3638 len = len / 5;
3639 portp->brklen = (len > 255) ? 255 : len;
3640 } else {
3641 portp->brklen = len;
3642 }
3643 crit_exit();
3644 portp->stats.txbreaks++;
3645}
3646
3647/*****************************************************************************/
3648
3649/*
3650 * Try and find and initialize all the ports on a panel. We don't care
3651 * what sort of board these ports are on - since the port io registers
3652 * are almost identical when dealing with ports.
3653 */
3654
3655static void stl_cd1400portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp)
3656{
3657#if STLDEBUG
3658 printf("stl_cd1400portinit(brdp=%x,panelp=%x,portp=%x)\n",
3659 (int) brdp, (int) panelp, (int) portp);
3660#endif
3661
3662 if ((brdp == (stlbrd_t *) NULL) || (panelp == (stlpanel_t *) NULL) ||
3663 (portp == (stlport_t *) NULL))
3664 return;
3665
3666 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
3667 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
3668 portp->uartaddr = (portp->portnr & 0x04) << 5;
3669 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
3670
3671 BRDENABLE(portp->brdnr, portp->pagenr);
3672 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3673 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
3674 portp->hwid = stl_cd1400getreg(portp, GFRCR);
3675 BRDDISABLE(portp->brdnr);
3676}
3677
3678/*****************************************************************************/
3679
3680/*
3681 * Inbitialize the UARTs in a panel. We don't care what sort of board
3682 * these ports are on - since the port io registers are almost
3683 * identical when dealing with ports.
3684 */
3685
3686static int stl_cd1400panelinit(stlbrd_t *brdp, stlpanel_t *panelp)
3687{
3688 unsigned int gfrcr;
3689 int chipmask, i, j;
3690 int nrchips, uartaddr, ioaddr;
3691
3692#if STLDEBUG
3693 printf("stl_cd1400panelinit(brdp=%x,panelp=%x)\n", (int) brdp,
3694 (int) panelp);
3695#endif
3696
3697 BRDENABLE(panelp->brdnr, panelp->pagenr);
3698
3699/*
3700 * Check that each chip is present and started up OK.
3701 */
3702 chipmask = 0;
3703 nrchips = panelp->nrports / CD1400_PORTS;
3704 for (i = 0; (i < nrchips); i++) {
3705 if (brdp->brdtype == BRD_ECHPCI) {
3706 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
3707 ioaddr = panelp->iobase;
3708 } else {
3709 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
3710 }
3711 uartaddr = (i & 0x01) ? 0x080 : 0;
3712 outb(ioaddr, (GFRCR + uartaddr));
3713 outb((ioaddr + EREG_DATA), 0);
3714 outb(ioaddr, (CCR + uartaddr));
3715 outb((ioaddr + EREG_DATA), CCR_RESETFULL);
3716 outb((ioaddr + EREG_DATA), CCR_RESETFULL);
3717 outb(ioaddr, (GFRCR + uartaddr));
3718 for (j = 0; (j < CCR_MAXWAIT); j++) {
3719 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
3720 break;
3721 }
3722 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
3723 printf("STALLION: cd1400 not responding, "
3724 "board=%d panel=%d chip=%d\n", panelp->brdnr,
3725 panelp->panelnr, i);
3726 continue;
3727 }
3728 chipmask |= (0x1 << i);
3729 outb(ioaddr, (PPR + uartaddr));
3730 outb((ioaddr + EREG_DATA), PPR_SCALAR);
3731 }
3732
3733
3734 BRDDISABLE(panelp->brdnr);
3735 return(chipmask);
3736}
3737
3738/*****************************************************************************/
3739/* SC26198 HARDWARE FUNCTIONS */
3740/*****************************************************************************/
3741
3742/*
3743 * These functions get/set/update the registers of the sc26198 UARTs.
3744 * Access to the sc26198 registers is via an address/data io port pair.
3745 * (Maybe should make this inline...)
3746 */
3747
3748static int stl_sc26198getreg(stlport_t *portp, int regnr)
3749{
3750 outb((portp->ioaddr + XP_ADDR), (regnr | portp->uartaddr));
3751 return(inb(portp->ioaddr + XP_DATA));
3752}
3753
3754static void stl_sc26198setreg(stlport_t *portp, int regnr, int value)
3755{
3756 outb((portp->ioaddr + XP_ADDR), (regnr | portp->uartaddr));
3757 outb((portp->ioaddr + XP_DATA), value);
3758}
3759
3760static int stl_sc26198updatereg(stlport_t *portp, int regnr, int value)
3761{
3762 outb((portp->ioaddr + XP_ADDR), (regnr | portp->uartaddr));
3763 if (inb(portp->ioaddr + XP_DATA) != value) {
3764 outb((portp->ioaddr + XP_DATA), value);
3765 return(1);
3766 }
3767 return(0);
3768}
3769
3770/*****************************************************************************/
3771
3772/*
3773 * Functions to get and set the sc26198 global registers.
3774 */
3775
3776static int stl_sc26198getglobreg(stlport_t *portp, int regnr)
3777{
3778 outb((portp->ioaddr + XP_ADDR), regnr);
3779 return(inb(portp->ioaddr + XP_DATA));
3780}
3781
3782#if 0
3783static void stl_sc26198setglobreg(stlport_t *portp, int regnr, int value)
3784{
3785 outb((portp->ioaddr + XP_ADDR), regnr);
3786 outb((portp->ioaddr + XP_DATA), value);
3787}
3788#endif
3789
3790/*****************************************************************************/
3791
3792/*
3793 * Inbitialize the UARTs in a panel. We don't care what sort of board
3794 * these ports are on - since the port io registers are almost
3795 * identical when dealing with ports.
3796 */
3797
3798static int stl_sc26198panelinit(stlbrd_t *brdp, stlpanel_t *panelp)
3799{
3800 int chipmask, i;
3801 int nrchips, ioaddr;
3802
3803#if STLDEBUG
3804 printf("stl_sc26198panelinit(brdp=%x,panelp=%x)\n", (int) brdp,
3805 (int) panelp);
3806#endif
3807
3808 BRDENABLE(panelp->brdnr, panelp->pagenr);
3809
3810/*
3811 * Check that each chip is present and started up OK.
3812 */
3813 chipmask = 0;
3814 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3815 if (brdp->brdtype == BRD_ECHPCI)
3816 outb(brdp->ioctrl, panelp->pagenr);
3817
3818 for (i = 0; (i < nrchips); i++) {
3819 ioaddr = panelp->iobase + (i * 4);
3820 outb((ioaddr + XP_ADDR), SCCR);
3821 outb((ioaddr + XP_DATA), CR_RESETALL);
3822 outb((ioaddr + XP_ADDR), TSTR);
3823 if (inb(ioaddr + XP_DATA) != 0) {
3824 printf("STALLION: sc26198 not responding, "
3825 "board=%d panel=%d chip=%d\n", panelp->brdnr,
3826 panelp->panelnr, i);
3827 continue;
3828 }
3829 chipmask |= (0x1 << i);
3830 outb((ioaddr + XP_ADDR), GCCR);
3831 outb((ioaddr + XP_DATA), GCCR_IVRTYPCHANACK);
3832 outb((ioaddr + XP_ADDR), WDTRCR);
3833 outb((ioaddr + XP_DATA), 0xff);
3834 }
3835
3836 BRDDISABLE(panelp->brdnr);
3837 return(chipmask);
3838}
3839
3840/*****************************************************************************/
3841
3842/*
3843 * Initialize hardware specific port registers.
3844 */
3845
3846static void stl_sc26198portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp)
3847{
3848#if STLDEBUG
3849 printf("stl_sc26198portinit(brdp=%x,panelp=%x,portp=%x)\n",
3850 (int) brdp, (int) panelp, (int) portp);
3851#endif
3852
3853 if ((brdp == (stlbrd_t *) NULL) || (panelp == (stlpanel_t *) NULL) ||
3854 (portp == (stlport_t *) NULL))
3855 return;
3856
3857 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3858 portp->uartaddr = (portp->portnr & 0x07) << 4;
3859 portp->pagenr = panelp->pagenr;
3860 portp->hwid = 0x1;
3861
3862 BRDENABLE(portp->brdnr, portp->pagenr);
3863 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3864 BRDDISABLE(portp->brdnr);
3865}
3866
3867/*****************************************************************************/
3868
3869/*
3870 * Set up the sc26198 registers for a port based on the termios port
3871 * settings.
3872 */
3873
3874static int stl_sc26198setport(stlport_t *portp, struct termios *tiosp)
3875{
3876 unsigned char mr0, mr1, mr2, clk;
3877 unsigned char imron, imroff, iopr, ipr;
3878
3879#if STLDEBUG
3880 printf("stl_sc26198setport(portp=%x,tiosp=%x): brdnr=%d portnr=%d\n",
3881 (int) portp, (int) tiosp, portp->brdnr, portp->portnr);
3882#endif
3883
3884 mr0 = 0;
3885 mr1 = 0;
3886 mr2 = 0;
3887 clk = 0;
3888 iopr = 0;
3889 imron = 0;
3890 imroff = 0;
3891
3892/*
3893 * Set up the RX char ignore mask with those RX error types we
3894 * can ignore.
3895 */
3896 portp->rxignoremsk = 0;
3897 if (tiosp->c_iflag & IGNPAR)
3898 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3899 SR_RXOVERRUN);
3900 if (tiosp->c_iflag & IGNBRK)
3901 portp->rxignoremsk |= SR_RXBREAK;
3902
3903 portp->rxmarkmsk = SR_RXOVERRUN;
3904 if (tiosp->c_iflag & (INPCK | PARMRK))
3905 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3906 if (tiosp->c_iflag & BRKINT)
3907 portp->rxmarkmsk |= SR_RXBREAK;
3908
3909/*
3910 * Go through the char size, parity and stop bits and set all the
3911 * option registers appropriately.
3912 */
3913 switch (tiosp->c_cflag & CSIZE) {
3914 case CS5:
3915 mr1 |= MR1_CS5;
3916 break;
3917 case CS6:
3918 mr1 |= MR1_CS6;
3919 break;
3920 case CS7:
3921 mr1 |= MR1_CS7;
3922 break;
3923 default:
3924 mr1 |= MR1_CS8;
3925 break;
3926 }
3927
3928 if (tiosp->c_cflag & CSTOPB)
3929 mr2 |= MR2_STOP2;
3930 else
3931 mr2 |= MR2_STOP1;
3932
3933 if (tiosp->c_cflag & PARENB) {
3934 if (tiosp->c_cflag & PARODD)
3935 mr1 |= (MR1_PARENB | MR1_PARODD);
3936 else
3937 mr1 |= (MR1_PARENB | MR1_PAREVEN);
3938 } else {
3939 mr1 |= MR1_PARNONE;
3940 }
3941
3942 mr1 |= MR1_ERRBLOCK;
3943
3944/*
3945 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3946 * space for hardware flow control and the like. This should be set to
3947 * VMIN.
3948 */
3949 mr2 |= MR2_RXFIFOHALF;
3950
3951/*
3952 * Calculate the baud rate timers. For now we will just assume that
3953 * the input and output baud are the same. The sc26198 has a fixed
3954 * baud rate table, so only discrete baud rates possible.
3955 */
3956 if (tiosp->c_ispeed == 0)
3957 tiosp->c_ispeed = tiosp->c_ospeed;
3958 if ((tiosp->c_ospeed < 0) || (tiosp->c_ospeed > SC26198_MAXBAUD))
3959 return(EINVAL);
3960
3961 if (tiosp->c_ospeed > 0) {
3962 for (clk = 0; (clk < SC26198_NRBAUDS); clk++) {
3963 if (tiosp->c_ospeed <= sc26198_baudtable[clk])
3964 break;
3965 }
3966 }
3967
3968/*
3969 * Check what form of modem signaling is required and set it up.
3970 */
3971 if ((tiosp->c_cflag & CLOCAL) == 0) {
3972 iopr |= IOPR_DCDCOS;
3973 imron |= IR_IOPORT;
3974 }
3975
3976/*
3977 * Setup sc26198 enhanced modes if we can. In particular we want to
3978 * handle as much of the flow control as possible automatically. As
3979 * well as saving a few CPU cycles it will also greatly improve flow
3980 * control reliability.
3981 */
3982 if (tiosp->c_iflag & IXON) {
3983 mr0 |= MR0_SWFTX | MR0_SWFT;
3984 imron |= IR_XONXOFF;
3985 } else {
3986 imroff |= IR_XONXOFF;
3987 }
3988#if 0
3989 if (tiosp->c_iflag & IXOFF)
3990 mr0 |= MR0_SWFRX;
3991#endif
3992
3993 if (tiosp->c_cflag & CCTS_OFLOW)
3994 mr2 |= MR2_AUTOCTS;
3995 if (tiosp->c_cflag & CRTS_IFLOW)
3996 mr1 |= MR1_AUTORTS;
3997
3998/*
3999 * All sc26198 register values calculated so go through and set
4000 * them all up.
4001 */
4002
4003#if STLDEBUG
4004 printf("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", portp->portnr,
4005 portp->panelnr, portp->brdnr);
4006 printf(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
4007 printf(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
4008 printf(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
4009 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
4010 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
4011#endif
4012
4013 crit_enter();
4014 BRDENABLE(portp->brdnr, portp->pagenr);
4015 stl_sc26198setreg(portp, IMR, 0);
4016 stl_sc26198updatereg(portp, MR0, mr0);
4017 stl_sc26198updatereg(portp, MR1, mr1);
4018 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
4019 stl_sc26198updatereg(portp, MR2, mr2);
4020 iopr = (stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr;
4021 if (tiosp->c_ospeed == 0) {
4022 iopr &= ~IPR_DTR;
4023 } else {
4024 iopr |= IPR_DTR;
4025 stl_sc26198setreg(portp, TXCSR, clk);
4026 stl_sc26198setreg(portp, RXCSR, clk);
4027 }
4028 stl_sc26198updatereg(portp, IOPIOR, iopr);
4029 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
4030 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
4031 ipr = stl_sc26198getreg(portp, IPR);
4032 if (ipr & IPR_DCD)
4033 portp->sigs &= ~TIOCM_CD;
4034 else
4035 portp->sigs |= TIOCM_CD;
4036 portp->imr = (portp->imr & ~imroff) | imron;
4037 stl_sc26198setreg(portp, IMR, portp->imr);
4038 BRDDISABLE(portp->brdnr);
4039 portp->state &= ~(ASY_RTSFLOWMODE | ASY_CTSFLOWMODE);
4040 portp->state |= ((tiosp->c_cflag & CRTS_IFLOW) ? ASY_RTSFLOWMODE : 0);
4041 portp->state |= ((tiosp->c_cflag & CCTS_OFLOW) ? ASY_CTSFLOWMODE : 0);
4042 stl_ttyoptim(portp, tiosp);
4043 crit_exit();
4044
4045 return(0);
4046}
4047
4048/*****************************************************************************/
4049
4050/*
4051 * Set the state of the DTR and RTS signals.
4052 */
4053
4054static void stl_sc26198setsignals(stlport_t *portp, int dtr, int rts)
4055{
4056 unsigned char iopioron, iopioroff;
4057
4058#if STLDEBUG
4059 printf("stl_sc26198setsignals(portp=%x,dtr=%d,rts=%d)\n",
4060 (int) portp, dtr, rts);
4061#endif
4062
4063 iopioron = 0;
4064 iopioroff = 0;
4065 if (dtr == 0)
4066 iopioroff |= IPR_DTR;
4067 else if (dtr > 0)
4068 iopioron |= IPR_DTR;
4069 if (rts == 0)
4070 iopioroff |= IPR_RTS;
4071 else if (rts > 0)
4072 iopioron |= IPR_RTS;
4073
4074 crit_enter();
4075 BRDENABLE(portp->brdnr, portp->pagenr);
4076 if ((rts >= 0) && (portp->tty.t_cflag & CRTS_IFLOW)) {
4077 if (rts == 0) {
4078 stl_sc26198setreg(portp, MR1,
4079 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4080 portp->stats.rxrtsoff++;
4081 } else {
4082 stl_sc26198setreg(portp, MR1,
4083 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4084 portp->stats.rxrtson++;
4085 }
4086 }
4087 stl_sc26198setreg(portp, IOPIOR,
4088 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
4089 BRDDISABLE(portp->brdnr);
4090 crit_exit();
4091}
4092
4093/*****************************************************************************/
4094
4095/*
4096 * Return the state of the signals.
4097 */
4098
4099static int stl_sc26198getsignals(stlport_t *portp)
4100{
4101 unsigned char ipr;
4102 int sigs;
4103
4104#if STLDEBUG
4105 printf("stl_sc26198getsignals(portp=%x)\n", (int) portp);
4106#endif
4107
4108 crit_enter();
4109 BRDENABLE(portp->brdnr, portp->pagenr);
4110 ipr = stl_sc26198getreg(portp, IPR);
4111 BRDDISABLE(portp->brdnr);
4112 crit_exit();
4113
4114 sigs = TIOCM_DSR;
4115 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
4116 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
4117 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
4118 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
4119 return(sigs);
4120}
4121
4122/*****************************************************************************/
4123
4124/*
4125 * Enable/Disable the Transmitter and/or Receiver.
4126 */
4127
4128static void stl_sc26198enablerxtx(stlport_t *portp, int rx, int tx)
4129{
4130 unsigned char ccr;
4131
4132#if STLDEBUG
4133 printf("stl_sc26198enablerxtx(portp=%x,rx=%d,tx=%d)\n",
4134 (int) portp, rx, tx);
4135#endif
4136
4137 ccr = portp->crenable;
4138 if (tx == 0)
4139 ccr &= ~CR_TXENABLE;
4140 else if (tx > 0)
4141 ccr |= CR_TXENABLE;
4142 if (rx == 0)
4143 ccr &= ~CR_RXENABLE;
4144 else if (rx > 0)
4145 ccr |= CR_RXENABLE;
4146
4147 crit_enter();
4148 BRDENABLE(portp->brdnr, portp->pagenr);
4149 stl_sc26198setreg(portp, SCCR, ccr);
4150 BRDDISABLE(portp->brdnr);
4151 portp->crenable = ccr;
4152 crit_exit();
4153}
4154
4155/*****************************************************************************/
4156
4157/*
4158 * Start/stop the Transmitter and/or Receiver.
4159 */
4160
4161static void stl_sc26198startrxtx(stlport_t *portp, int rx, int tx)
4162{
4163 unsigned char imr;
4164
4165#if STLDEBUG
4166 printf("stl_sc26198startrxtx(portp=%x,rx=%d,tx=%d)\n",
4167 (int) portp, rx, tx);
4168#endif
4169
4170 imr = portp->imr;
4171 if (tx == 0)
4172 imr &= ~IR_TXRDY;
4173 else if (tx == 1)
4174 imr |= IR_TXRDY;
4175 if (rx == 0)
4176 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
4177 else if (rx > 0)
4178 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
4179
4180 crit_enter();
4181 BRDENABLE(portp->brdnr, portp->pagenr);
4182 stl_sc26198setreg(portp, IMR, imr);
4183 BRDDISABLE(portp->brdnr);
4184 portp->imr = imr;
4185 if (tx > 0) {
4186 portp->state |= ASY_TXBUSY;
4187 portp->tty.t_state |= TS_BUSY;
4188 }
4189 crit_exit();
4190}
4191
4192/*****************************************************************************/
4193
4194/*
4195 * Disable all interrupts from this port.
4196 */
4197
4198static void stl_sc26198disableintrs(stlport_t *portp)
4199{
4200
4201#if STLDEBUG
4202 printf("stl_sc26198disableintrs(portp=%x)\n", (int) portp);
4203#endif
4204
4205 crit_enter();
4206 BRDENABLE(portp->brdnr, portp->pagenr);
4207 portp->imr = 0;
4208 stl_sc26198setreg(portp, IMR, 0);
4209 BRDDISABLE(portp->brdnr);
4210 crit_exit();
4211}
4212
4213/*****************************************************************************/
4214
4215static void stl_sc26198sendbreak(stlport_t *portp, long len)
4216{
4217
4218#if STLDEBUG
4219 printf("stl_sc26198sendbreak(portp=%x,len=%d)\n",
4220 (int) portp, (int) len);
4221#endif
4222
4223 crit_enter();
4224 BRDENABLE(portp->brdnr, portp->pagenr);
4225 if (len == -1) {
4226 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
4227 portp->stats.txbreaks++;
4228 } else {
4229 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
4230 }
4231 BRDDISABLE(portp->brdnr);
4232 crit_exit();
4233}
4234
4235/*****************************************************************************/
4236
4237/*
4238 * Take flow control actions...
4239 */
4240
4241static void stl_sc26198sendflow(stlport_t *portp, int hw, int sw)
4242{
4243 unsigned char mr0;
4244
4245#if STLDEBUG
4246 printf("stl_sc26198sendflow(portp=%x,hw=%d,sw=%d)\n",
4247 (int) portp, hw, sw);
4248#endif
4249
4250 if (portp == (stlport_t *) NULL)
4251 return;
4252
4253 crit_enter();
4254 BRDENABLE(portp->brdnr, portp->pagenr);
4255
4256 if (sw >= 0) {
4257 mr0 = stl_sc26198getreg(portp, MR0);
4258 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4259 if (sw > 0) {
4260 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4261 mr0 &= ~MR0_SWFRX;
4262 portp->stats.rxxoff++;
4263 } else {
4264 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4265 mr0 |= MR0_SWFRX;
4266 portp->stats.rxxon++;
4267 }
4268 stl_sc26198wait(portp);
4269 stl_sc26198setreg(portp, MR0, mr0);
4270 }
4271
4272 if (hw == 0) {
4273 portp->state |= ASY_RTSFLOW;
4274 stl_sc26198setreg(portp, MR1,
4275 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4276 stl_sc26198setreg(portp, IOPIOR,
4277 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4278 portp->stats.rxrtsoff++;
4279 } else if (hw > 0) {
4280 portp->state &= ~ASY_RTSFLOW;
4281 stl_sc26198setreg(portp, MR1,
4282 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4283 stl_sc26198setreg(portp, IOPIOR,
4284 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4285 portp->stats.rxrtson++;
4286 }
4287
4288 BRDDISABLE(portp->brdnr);
4289 crit_exit();
4290}
4291
4292/*****************************************************************************/
4293
4294/*
4295 * Return the current state of data flow on this port. This is only
4296 * really interresting when determining if data has fully completed
4297 * transmission or not... The sc26198 interrupt scheme cannot
4298 * determine when all data has actually drained, so we need to
4299 * check the port statusy register to be sure.
4300 */
4301
4302static int stl_sc26198datastate(stlport_t *portp)
4303{
4304 unsigned char sr;
4305
4306#if STLDEBUG
4307 printf("stl_sc26198datastate(portp=%x)\n", (int) portp);
4308#endif
4309
4310 if (portp == (stlport_t *) NULL)
4311 return(0);
4312 if (portp->state & ASY_TXBUSY)
4313 return(1);
4314
4315 crit_enter();
4316 BRDENABLE(portp->brdnr, portp->pagenr);
4317 sr = stl_sc26198getreg(portp, SR);
4318 BRDDISABLE(portp->brdnr);
4319 crit_exit();
4320
4321 return((sr & SR_TXEMPTY) ? 0 : 1);
4322}
4323
4324/*****************************************************************************/
4325
4326static void stl_sc26198flush(stlport_t *portp, int flag)
4327{
4328
4329#if STLDEBUG
4330 printf("stl_sc26198flush(portp=%x,flag=%x)\n", (int) portp, flag);
4331#endif
4332
4333 if (portp == (stlport_t *) NULL)
4334 return;
4335
4336 crit_enter();
4337 BRDENABLE(portp->brdnr, portp->pagenr);
4338 if (flag & FWRITE) {
4339 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4340 stl_sc26198setreg(portp, SCCR, portp->crenable);
4341 }
4342 if (flag & FREAD) {
4343 while (stl_sc26198getreg(portp, SR) & SR_RXRDY)
4344 stl_sc26198getreg(portp, RXFIFO);
4345 }
4346 BRDDISABLE(portp->brdnr);
4347 crit_exit();
4348}
4349
4350/*****************************************************************************/
4351
4352/*
4353 * If we are TX flow controlled and in IXANY mode then we may
4354 * need to unflow control here. We gotta do this because of the
4355 * automatic flow control modes of the sc26198 - which downs't
4356 * support any concept of an IXANY mode.
4357 */
4358
4359static void stl_sc26198txunflow(stlport_t *portp)
4360{
4361 unsigned char mr0;
4362
4363 mr0 = stl_sc26198getreg(portp, MR0);
4364 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4365 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4366 stl_sc26198setreg(portp, MR0, mr0);
4367 portp->state &= ~ASY_TXFLOWED;
4368}
4369
4370/*****************************************************************************/
4371
4372/*
4373 * Delay for a small amount of time, to give the sc26198 a chance
4374 * to process a command...
4375 */
4376
4377static void stl_sc26198wait(stlport_t *portp)
4378{
4379 int i;
4380
4381#if STLDEBUG
4382 printf("stl_sc26198wait(portp=%x)\n", (int) portp);
4383#endif
4384
4385 if (portp == (stlport_t *) NULL)
4386 return;
4387
4388 for (i = 0; (i < 20); i++)
4389 stl_sc26198getglobreg(portp, TSTR);
4390}
4391
4392/*****************************************************************************/
4393
4394/*
4395 * Transmit interrupt handler. This has gotta be fast! Handling TX
4396 * chars is pretty simple, stuff as many as possible from the TX buffer
4397 * into the sc26198 FIFO.
4398 */
4399
4400static __inline void stl_sc26198txisr(stlport_t *portp)
4401{
4402 unsigned int ioaddr;
4403 unsigned char mr0;
4404 char *head, *tail;
4405 int len, stlen;
4406
4407#if STLDEBUG
4408 printf("stl_sc26198txisr(portp=%x)\n", (int) portp);
4409#endif
4410
4411 ioaddr = portp->ioaddr;
4412
4413 head = portp->tx.head;
4414 tail = portp->tx.tail;
4415 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4416 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4417 ((portp->state & ASY_TXLOW) == 0))) {
4418 portp->state |= ASY_TXLOW;
4419 stl_dotimeout();
4420 }
4421
4422 if (len == 0) {
4423 outb((ioaddr + XP_ADDR), (MR0 | portp->uartaddr));
4424 mr0 = inb(ioaddr + XP_DATA);
4425 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4426 portp->imr &= ~IR_TXRDY;
4427 outb((ioaddr + XP_ADDR), (IMR | portp->uartaddr));
4428 outb((ioaddr + XP_DATA), portp->imr);
4429 portp->state |= ASY_TXEMPTY;
4430 portp->state &= ~ASY_TXBUSY;
4431 } else {
4432 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4433 outb((ioaddr + XP_DATA), mr0);
4434 }
4435 } else {
4436 len = MIN(len, SC26198_TXFIFOSIZE);
4437 portp->stats.txtotal += len;
4438 stlen = MIN(len, (portp->tx.endbuf - tail));
4439 outb((ioaddr + XP_ADDR), GTXFIFO);
4440 outsb((ioaddr + XP_DATA), tail, stlen);
4441 len -= stlen;
4442 tail += stlen;
4443 if (tail >= portp->tx.endbuf)
4444 tail = portp->tx.buf;
4445 if (len > 0) {
4446 outsb((ioaddr + XP_DATA), tail, len);
4447 tail += len;
4448 }
4449 portp->tx.tail = tail;
4450 }
4451}
4452
4453/*****************************************************************************/
4454
4455/*
4456 * Receive character interrupt handler. Determine if we have good chars
4457 * or bad chars and then process appropriately. Good chars are easy
4458 * just shove the lot into the RX buffer and set all status byte to 0.
4459 * If a bad RX char then process as required. This routine needs to be
4460 * fast!
4461 */
4462
4463static __inline void stl_sc26198rxisr(stlport_t *portp, unsigned int iack)
4464{
4465#if STLDEBUG
4466 printf("stl_sc26198rxisr(portp=%x,iack=%x)\n", (int) portp, iack);
4467#endif
4468
4469 if ((iack & IVR_TYPEMASK) == IVR_RXDATA)
4470 stl_sc26198rxgoodchars(portp);
4471 else
4472 stl_sc26198rxbadchars(portp);
4473
4474/*
4475 * If we are TX flow controlled and in IXANY mode then we may need
4476 * to unflow control here. We gotta do this because of the automatic
4477 * flow control modes of the sc26198.
4478 */
4479 if ((portp->state & ASY_TXFLOWED) && (portp->tty.t_iflag & IXANY))
4480 stl_sc26198txunflow(portp);
4481}
4482
4483/*****************************************************************************/
4484
4485/*
4486 * Process the good received characters from RX FIFO.
4487 */
4488
4489static void stl_sc26198rxgoodchars(stlport_t *portp)
4490{
4491 unsigned int ioaddr, len, buflen, stlen;
4492 char *head, *tail;
4493
4494#if STLDEBUG
4495 printf("stl_sc26198rxgoodchars(port=%x)\n", (int) portp);
4496#endif
4497
4498 ioaddr = portp->ioaddr;
4499
4500/*
4501 * First up, calculate how much room there is in the RX ring queue.
4502 * We also want to keep track of the longest possible copy length,
4503 * this has to allow for the wrapping of the ring queue.
4504 */
4505 head = portp->rx.head;
4506 tail = portp->rx.tail;
4507 if (head >= tail) {
4508 buflen = STL_RXBUFSIZE - (head - tail) - 1;
4509 stlen = portp->rx.endbuf - head;
4510 } else {
4511 buflen = tail - head - 1;
4512 stlen = buflen;
4513 }
4514
4515/*
4516 * Check if the input buffer is near full. If so then we should take
4517 * some flow control action... It is very easy to do hardware and
4518 * software flow control from here since we have the port selected on
4519 * the UART.
4520 */
4521 if (buflen <= (STL_RXBUFSIZE - STL_RXBUFHIGH)) {
4522 if (((portp->state & ASY_RTSFLOW) == 0) &&
4523 (portp->state & ASY_RTSFLOWMODE)) {
4524 portp->state |= ASY_RTSFLOW;
4525 stl_sc26198setreg(portp, MR1,
4526 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4527 stl_sc26198setreg(portp, IOPIOR,
4528 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4529 portp->stats.rxrtsoff++;
4530 }
4531 }
4532
4533/*
4534 * OK we are set, process good data... If the RX ring queue is full
4535 * just chuck the chars - don't leave them in the UART.
4536 */
4537 outb((ioaddr + XP_ADDR), GIBCR);
4538 len = inb(ioaddr + XP_DATA) + 1;
4539 if (buflen == 0) {
4540 outb((ioaddr + XP_ADDR), GRXFIFO);
4541 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4542 portp->stats.rxlost += len;
4543 portp->stats.rxtotal += len;
4544 } else {
4545 len = MIN(len, buflen);
4546 portp->stats.rxtotal += len;
4547 stlen = MIN(len, stlen);
4548 if (len > 0) {
4549 outb((ioaddr + XP_ADDR), GRXFIFO);
4550 insb((ioaddr + XP_DATA), head, stlen);
4551 head += stlen;
4552 if (head >= portp->rx.endbuf) {
4553 head = portp->rx.buf;
4554 len -= stlen;
4555 insb((ioaddr + XP_DATA), head, len);
4556 head += len;
4557 }
4558 }
4559 }
4560
4561 portp->rx.head = head;
4562 portp->state |= ASY_RXDATA;
4563 stl_dotimeout();
4564}
4565
4566/*****************************************************************************/
4567
4568/*
4569 * Process all characters in the RX FIFO of the UART. Check all char
4570 * status bytes as well, and process as required. We need to check
4571 * all bytes in the FIFO, in case some more enter the FIFO while we
4572 * are here. To get the exact character error type we need to switch
4573 * into CHAR error mode (that is why we need to make sure we empty
4574 * the FIFO).
4575 */
4576
4577static void stl_sc26198rxbadchars(stlport_t *portp)
4578{
4579 unsigned char mr1;
4580 unsigned int status;
4581 char *head, *tail;
4582 char ch;
4583 int len;
4584
4585/*
4586 * First up, calculate how much room there is in the RX ring queue.
4587 * We also want to keep track of the longest possible copy length,
4588 * this has to allow for the wrapping of the ring queue.
4589 */
4590 head = portp->rx.head;
4591 tail = portp->rx.tail;
4592 len = (head >= tail) ? (STL_RXBUFSIZE - (head - tail) - 1) :
4593 (tail - head - 1);
4594
4595/*
4596 * To get the precise error type for each character we must switch
4597 * back into CHAR error mode.
4598 */
4599 mr1 = stl_sc26198getreg(portp, MR1);
4600 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4601
4602 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4603 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4604 ch = stl_sc26198getreg(portp, RXFIFO);
4605
4606 if (status & SR_RXBREAK)
4607 portp->stats.rxbreaks++;
4608 if (status & SR_RXFRAMING)
4609 portp->stats.rxframing++;
4610 if (status & SR_RXPARITY)
4611 portp->stats.rxparity++;
4612 if (status & SR_RXOVERRUN)
4613 portp->stats.rxoverrun++;
4614 if ((portp->rxignoremsk & status) == 0) {
4615 if ((portp->tty.t_state & TS_CAN_BYPASS_L_RINT) &&
4616 ((status & SR_RXFRAMING) ||
4617 ((status & SR_RXPARITY) &&
4618 (portp->tty.t_iflag & INPCK))))
4619 ch = 0;
4620 if ((portp->rxmarkmsk & status) == 0)
4621 status = 0;
4622 if (len > 0) {
4623 *(head + STL_RXBUFSIZE) = status;
4624 *head++ = ch;
4625 if (head >= portp->rx.endbuf)
4626 head = portp->rx.buf;
4627 len--;
4628 }
4629 }
4630 }
4631
4632/*
4633 * To get correct interrupt class we must switch back into BLOCK
4634 * error mode.
4635 */
4636 stl_sc26198setreg(portp, MR1, mr1);
4637
4638 portp->rx.head = head;
4639 portp->state |= ASY_RXDATA;
4640 stl_dotimeout();
4641}
4642
4643/*****************************************************************************/
4644
4645/*
4646 * Other interrupt handler. This includes modem signals, flow
4647 * control actions, etc.
4648 */
4649
4650static void stl_sc26198otherisr(stlport_t *portp, unsigned int iack)
4651{
4652 unsigned char cir, ipr, xisr;
4653
4654#if STLDEBUG
4655 printf("stl_sc26198otherisr(portp=%x,iack=%x)\n", (int) portp, iack);
4656#endif
4657
4658 cir = stl_sc26198getglobreg(portp, CIR);
4659
4660 switch (cir & CIR_SUBTYPEMASK) {
4661 case CIR_SUBCOS:
4662 ipr = stl_sc26198getreg(portp, IPR);
4663 if (ipr & IPR_DCDCHANGE) {
4664 portp->state |= ASY_DCDCHANGE;
4665 portp->stats.modem++;
4666 stl_dotimeout();
4667 }
4668 break;
4669 case CIR_SUBXONXOFF:
4670 xisr = stl_sc26198getreg(portp, XISR);
4671 if (xisr & XISR_RXXONGOT) {
4672 portp->state |= ASY_TXFLOWED;
4673 portp->stats.txxoff++;
4674 }
4675 if (xisr & XISR_RXXOFFGOT) {
4676 portp->state &= ~ASY_TXFLOWED;
4677 portp->stats.txxon++;
4678 }
4679 break;
4680 case CIR_SUBBREAK:
4681 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4682 stl_sc26198rxbadchars(portp);
4683 break;
4684 default:
4685 break;
4686 }
4687}
4688
4689/*****************************************************************************/
4690
4691/*
4692 * Interrupt service routine for sc26198 panels.
4693 */
4694
4695static void stl_sc26198intr(stlpanel_t *panelp, unsigned int iobase)
4696{
4697 stlport_t *portp;
4698 unsigned int iack;
4699
4700/*
4701 * Work around bug in sc26198 chip... Cannot have A6 address
4702 * line of UART high, else iack will be returned as 0.
4703 */
4704 outb((iobase + 1), 0);
4705
4706 iack = inb(iobase + XP_IACK);
4707#if STLDEBUG
4708 printf("stl_sc26198intr(panelp=%p,iobase=%x): iack=%x\n", panelp, iobase, iack);
4709#endif
4710 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4711
4712 if (iack & IVR_RXDATA)
4713 stl_sc26198rxisr(portp, iack);
4714 else if (iack & IVR_TXDATA)
4715 stl_sc26198txisr(portp);
4716 else
4717 stl_sc26198otherisr(portp, iack);
4718}
4719
4720/*****************************************************************************/