sys/dev/netif/sr/if_sr.c

   1 /*
   2  * Copyright (c) 1996 - 2001 John Hay.
   3  * Copyright (c) 1996 SDL Communications, Inc.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. Neither the name of the author nor the names of any co-contributors
  15  *    may be used to endorse or promote products derived from this software
  16  *    without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * $FreeBSD: src/sys/dev/sr/if_sr.c,v 1.48.2.1 2002/06/17 15:10:58 jhay Exp $
  31  */
  32
  33 /*
  34  * Programming assumptions and other issues.
  35  *
  36  * Only a 16K window will be used.
  37  *
  38  * The descriptors of a DMA channel will fit in a 16K memory window.
  39  *
  40  * The buffers of a transmit DMA channel will fit in a 16K memory window.
  41  *
  42  * When interface is going up, handshaking is set and it is only cleared
  43  * when the interface is down'ed.
  44  *
  45  * There should be a way to set/reset Raw HDLC/PPP, Loopback, DCE/DTE,
  46  * internal/external clock, etc.....
  47  *
  48  */
  49
  50 #include "opt_netgraph.h"
  51 #ifdef NETGRAPH
  52 #include "if_sr.h"
  53 #endif  /* NETGRAPH */
  54
  55 #include <sys/param.h>
  56 #include <sys/systm.h>
  57 #include <sys/kernel.h>
  58 #include <sys/malloc.h>
  59 #include <sys/mbuf.h>
  60 #include <sys/sockio.h>
  61 #include <sys/socket.h>
  62 #include <sys/thread2.h>
  63 #include <sys/bus.h>
  64 #include <sys/rman.h>
  65
  66 #include <net/if.h>
  67 #ifdef NETGRAPH
  68 #include <sys/syslog.h>
  69 #else /* NETGRAPH */
  70 #include <net/if_arp.h>
  71 #include <net/sppp/if_sppp.h>
  72
  73 #include <net/bpf.h>
  74 #endif  /* NETGRAPH */
  75
  76 #include <machine/md_var.h>
  77
  78 #include "../ic_layer/hd64570.h"
  79 #include "if_srregs.h"
  80
  81 #ifdef NETGRAPH
  82 #include <netgraph/ng_message.h>
  83 #include <netgraph/netgraph.h>
  84 #endif /* NETGRAPH */
  85 /* #define USE_MODEMCK */
  86
  87 #ifndef BUGGY
  88 #define BUGGY           0
  89 #endif
  90
  91 #ifndef NETGRAPH
  92 #define PPP_HEADER_LEN  4
  93 #endif /* NETGRAPH */
  94
  95 static int      next_sc_unit = 0;
  96 #ifndef NETGRAPH
  97 #ifdef USE_MODEMCK
  98 static int      sr_watcher = 0;
  99 #endif
 100 #endif /* NETGRAPH */
 101
 102 /*
 103  * Define the software interface for the card... There is one for
 104  * every channel (port).
 105  */
 106 struct sr_softc {
 107 #ifndef NETGRAPH
 108         struct  sppp ifsppp;    /* PPP service w/in system */
 109 #endif /* NETGRAPH */
 110         struct  sr_hardc *hc;   /* card-level information */
 111
 112         int     unit;           /* With regard to all sr devices */
 113         int     subunit;        /* With regard to this card */
 114
 115         struct  buf_block {
 116                 u_int   txdesc; /* DPRAM offset */
 117                 u_int   txstart;/* DPRAM offset */
 118                 u_int   txend;  /* DPRAM offset */
 119                 u_int   txtail; /* # of 1st free gran */
 120                 u_int   txmax;  /* # of free grans */
 121                 u_int   txeda;  /* err descr addr */
 122         } block[SR_TX_BLOCKS];
 123
 124         char    xmit_busy;      /* Transmitter is busy */
 125         char    txb_inuse;      /* # of tx grans in use */
 126         u_int   txb_new;        /* ndx to new buffer */
 127         u_int   txb_next_tx;    /* ndx to next gran rdy tx */
 128
 129         u_int   rxdesc;         /* DPRAM offset */
 130         u_int   rxstart;        /* DPRAM offset */
 131         u_int   rxend;          /* DPRAM offset */
 132         u_int   rxhind;         /* ndx to the hd of rx bufrs */
 133         u_int   rxmax;          /* # of avail grans */
 134
 135         u_int   clk_cfg;        /* Clock configuration */
 136
 137         int     scachan;        /* channel # on card */
 138 #ifdef NETGRAPH
 139         int     running;        /* something is attached so we are running */
 140         int     dcd;            /* do we have dcd? */
 141         /* ---netgraph bits --- */
 142         char            nodename[NG_NODESIZ]; /* store our node name */
 143         int             datahooks;      /* number of data hooks attached */
 144         node_p          node;           /* netgraph node */
 145         hook_p          hook;           /* data hook */
 146         hook_p          debug_hook;
 147         struct ifqueue  xmitq_hipri;    /* hi-priority transmit queue */
 148         struct ifqueue  xmitq;          /* transmit queue */
 149         int             flags;          /* state */
 150 #define SCF_RUNNING     0x01            /* board is active */
 151 #define SCF_OACTIVE     0x02            /* output is active */
 152         int             out_dog;        /* watchdog cycles output count-down */
 153         struct callout  sr_timer;       /* timeout(9) handle */
 154         u_long          inbytes, outbytes;      /* stats */
 155         u_long          lastinbytes, lastoutbytes; /* a second ago */
 156         u_long          inrate, outrate;        /* highest rate seen */
 157         u_long          inlast;         /* last input N secs ago */
 158         u_long          out_deficit;    /* output since last input */
 159         u_long          oerrors, ierrors[6];
 160         u_long          opackets, ipackets;
 161 #endif /* NETGRAPH */
 162 };
 163
 164 #ifdef NETGRAPH
 165 #define DOG_HOLDOFF     6       /* dog holds off for 6 secs */
 166 #define QUITE_A_WHILE   300     /* 5 MINUTES */
 167 #define LOTS_OF_PACKETS 100
 168 #endif /* NETGRAPH */
 169
 170 /*
 171  * Baud Rate table for Sync Mode.
 172  * Each entry consists of 3 elements:
 173  * Baud Rate (x100) , TMC, BR
 174  *
 175  * Baud Rate = FCLK / TMC / 2^BR
 176  * Baud table for Crystal freq. of 9.8304 Mhz
 177  */
 178 #ifdef N2_TEST_SPEED
 179 struct rate_line {
 180         int     target;         /* target rate/100 */
 181         int     tmc_reg;        /* TMC register value */
 182         int     br_reg;         /* BR (BaudRateClk) selector */
 183 } n2_rates[] = {
 184         /* Baudx100     TMC             BR */
 185         { 3,            128,            8 },
 186         { 6,            128,            7 },
 187         { 12,           128,            6 },
 188         { 24,           128,            5 },
 189         { 48,           128,            4 },
 190         { 96,           128,            3 },
 191         { 192,          128,            2 },
 192         { 384,          128,            1 },
 193         { 560,          88,             1 },
 194         { 640,          77,             1 },
 195         { 1280,         38,             1 },
 196         { 2560,         19,             1 },
 197         { 5120,         10,             1 },
 198         { 10000,        5,              1 },
 199         { 15000,        3,              1 },
 200         { 25000,        2,              1 },
 201         { 50000,        1,              1 },
 202         { 0,            0,              0 }
 203 };
 204
 205 int     sr_test_speed[] = {
 206         N2_TEST_SPEED,
 207         N2_TEST_SPEED
 208 };
 209
 210 int     etc0vals[] = {
 211         SR_MCR_ETC0,            /* ISA channel 0 */
 212         SR_MCR_ETC1,            /* ISA channel 1 */
 213         SR_FECR_ETC0,           /* PCI channel 0 */
 214         SR_FECR_ETC1            /* PCI channel 1 */
 215 };
 216 #endif
 217
 218 devclass_t sr_devclass;
 219 #ifndef NETGRAPH
 220 DECLARE_DUMMY_MODULE(if_sr);
 221 MODULE_DEPEND(if_sr, sppp, 1, 1, 1);
 222 #else
 223 MODULE_DEPEND(ng_sync_sr, netgraph, NG_ABI_VERSION, NG_ABI_VERSION, NG_ABI_VERSION);
 224 #endif
 225
 226 static void     srintr(void *arg);
 227 static void     sr_xmit(struct sr_softc *sc);
 228 #ifndef NETGRAPH
 229 static void     srstart(struct ifnet *ifp);
 230 static int      srioctl(struct ifnet *ifp, u_long cmd, caddr_t data,
 231                         struct ucred *);
 232 static void     srwatchdog(struct ifnet *ifp);
 233 #else
 234 static void     srstart(struct sr_softc *sc);
 235 static void     srwatchdog(struct sr_softc *sc);
 236 #endif /* NETGRAPH */
 237 static int      sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat);
 238 static void     sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len);
 239 static void     sr_eat_packet(struct sr_softc *sc, int single);
 240 static void     sr_get_packets(struct sr_softc *sc);
 241
 242 static void     sr_up(struct sr_softc *sc);
 243 static void     sr_down(struct sr_softc *sc);
 244 static void     src_init(struct sr_hardc *hc);
 245 static void     sr_init_sca(struct sr_hardc *hc);
 246 static void     sr_init_msci(struct sr_softc *sc);
 247 static void     sr_init_rx_dmac(struct sr_softc *sc);
 248 static void     sr_init_tx_dmac(struct sr_softc *sc);
 249 static void     sr_dmac_intr(struct sr_hardc *hc, u_char isr);
 250 static void     sr_msci_intr(struct sr_hardc *hc, u_char isr);
 251 static void     sr_timer_intr(struct sr_hardc *hc, u_char isr);
 252 #ifndef NETGRAPH
 253 #ifdef USE_MODEMCK
 254 static void     sr_modemck(void *x);
 255 #endif
 256 #else
 257 static void     sr_modemck(struct sr_softc *x);
 258 #endif /* NETGRAPH */
 259
 260 #ifdef NETGRAPH
 261 static  void    ngsr_watchdog_frame(void * arg);
 262 static  void    ngsr_init(void* ignored);
 263
 264 static ng_constructor_t ngsr_constructor;
 265 static ng_rcvmsg_t      ngsr_rcvmsg;
 266 static ng_shutdown_t    ngsr_rmnode;
 267 static ng_newhook_t     ngsr_newhook;
 268 /*static ng_findhook_t  ngsr_findhook; */
 269 static ng_connect_t     ngsr_connect;
 270 static ng_rcvdata_t     ngsr_rcvdata;
 271 static ng_disconnect_t  ngsr_disconnect;
 272
 273 static struct ng_type typestruct = {
 274         NG_VERSION,
 275         NG_SR_NODE_TYPE,
 276         NULL,
 277         ngsr_constructor,
 278         ngsr_rcvmsg,
 279         ngsr_rmnode,
 280         ngsr_newhook,
 281         NULL,
 282         ngsr_connect,
 283         ngsr_rcvdata,
 284         ngsr_rcvdata,
 285         ngsr_disconnect,
 286         NULL
 287 };
 288
 289 static int      ngsr_done_init = 0;
 290 #endif /* NETGRAPH */
 291
 292 /*
 293  * Register the ports on the adapter.
 294  * Fill in the info for each port.
 295 #ifndef NETGRAPH
 296  * Attach each port to sppp and bpf.
 297 #endif
 298  */
 299 int
 300 sr_attach(device_t device)
 301 {
 302         int intf_sw, pndx;
 303         u_int32_t flags;
 304         u_int fecr, *fecrp;
 305         struct sr_hardc *hc;
 306         struct sr_softc *sc;
 307 #ifndef NETGRAPH
 308         struct ifnet *ifp;
 309 #endif /* NETGRAPH */
 310         int unit;               /* index: channel w/in card */
 311
 312         hc = (struct sr_hardc *)device_get_softc(device);
 313         sc = kmalloc(hc->numports * sizeof(struct sr_softc), M_DEVBUF,
 314                      M_WAITOK | M_ZERO);
 315         hc->sc = sc;
 316
 317         /*
 318          * Get the TX clock direction and configuration. The default is a
 319          * single external clock which is used by RX and TX.
 320          */
 321         switch(hc->cardtype) {
 322         case SR_CRD_N2:
 323                 flags = device_get_flags(device);
 324 #ifdef N2_TEST_SPEED
 325                 if (sr_test_speed[0] > 0)
 326                         hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 327                 else
 328 #endif
 329                 if (flags & SR_FLAGS_0_CLK_MSK)
 330                         hc->sc[0].clk_cfg =
 331                             (flags & SR_FLAGS_0_CLK_MSK)
 332                             >> SR_FLAGS_CLK_SHFT;
 333
 334                 if (hc->numports == 2)
 335 #ifdef N2_TEST_SPEED
 336                         if (sr_test_speed[1] > 0)
 337                                 hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 338                         else
 339 #endif
 340                         if (flags & SR_FLAGS_1_CLK_MSK)
 341                                 hc->sc[1].clk_cfg = (flags & SR_FLAGS_1_CLK_MSK)
 342                                     >> (SR_FLAGS_CLK_SHFT +
 343                                     SR_FLAGS_CLK_CHAN_SHFT);
 344                 break;
 345         case SR_CRD_N2PCI:
 346                 fecrp = (u_int *)(hc->sca_base + SR_FECR);
 347                 fecr = *fecrp;
 348                 for (pndx = 0; pndx < hc->numports; pndx++, sc++) {
 349                         switch (pndx) {
 350                         case 1:
 351                                 intf_sw = fecr & SR_FECR_ID1 >> SR_FE_ID1_SHFT;
 352                                 break;
 353                         case 0:
 354                         default:
 355                                 intf_sw = fecr & SR_FECR_ID0 >> SR_FE_ID0_SHFT;
 356                         }
 357
 358 #ifdef N2_TEST_SPEED
 359                         if (sr_test_speed[pndx] > 0)
 360                                 sc->clk_cfg = SR_FLAGS_INT_CLK;
 361                         else
 362 #endif
 363                                 switch (intf_sw) {
 364                                 default:
 365                                 case SR_FE_ID_RS232:
 366                                 case SR_FE_ID_HSSI:
 367                                 case SR_FE_ID_RS422:
 368                                 case SR_FE_ID_TEST:
 369                                         break;
 370
 371                                 case SR_FE_ID_V35:
 372                                         sc->clk_cfg = SR_FLAGS_EXT_SEP_CLK;
 373                                         break;
 374
 375                                 case SR_FE_ID_X21:
 376                                         sc->clk_cfg = SR_FLAGS_EXT_CLK;
 377                                         break;
 378                                 }
 379                 }
 380                 sc = hc->sc;
 381                 break;
 382         }
 383
 384         /*
 385          * Report Card configuration information before we start configuring
 386          * each channel on the card...
 387          */
 388         kprintf("src%d: %uK RAM (%d mempages) @ %08x-%08x, %u ports.\n",
 389                hc->cunit, hc->memsize / 1024, hc->mempages,
 390                (u_int)hc->mem_start, (u_int)hc->mem_end, hc->numports);
 391
 392         src_init(hc);
 393         sr_init_sca(hc);
 394
 395         if (BUS_SETUP_INTR(device_get_parent(device), device, hc->res_irq,
 396                            0, srintr, hc,
 397                            &hc->intr_cookie, NULL) != 0)
 398                 goto errexit;
 399
 400         /*
 401          * Now configure each port on the card.
 402          */
 403         for (unit = 0; unit < hc->numports; sc++, unit++) {
 404                 sc->hc = hc;
 405                 sc->subunit = unit;
 406                 sc->unit = next_sc_unit;
 407                 next_sc_unit++;
 408                 sc->scachan = unit % NCHAN;
 409
 410                 sr_init_rx_dmac(sc);
 411                 sr_init_tx_dmac(sc);
 412                 sr_init_msci(sc);
 413
 414                 kprintf("sr%d: Adapter %d, port %d.\n",
 415                        sc->unit, hc->cunit, sc->subunit);
 416
 417 #ifndef NETGRAPH
 418                 ifp = &sc->ifsppp.pp_if;
 419                 ifp->if_softc = sc;
 420                 if_initname(ifp, "sr", sc->unit);
 421                 ifp->if_mtu = PP_MTU;
 422                 ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST;
 423                 ifp->if_ioctl = srioctl;
 424                 ifp->if_start = srstart;
 425                 ifp->if_watchdog = srwatchdog;
 426
 427                 sc->ifsppp.pp_flags = PP_KEEPALIVE;
 428                 sppp_attach((struct ifnet *)&sc->ifsppp);
 429                 if_attach(ifp, NULL);
 430
 431                 bpfattach(ifp, DLT_PPP, PPP_HEADER_LEN);
 432 #else   /* NETGRAPH */
 433                 /*
 434                  * we have found a node, make sure our 'type' is availabe.
 435                  */
 436                 if (ngsr_done_init == 0) ngsr_init(NULL);
 437                 if (ng_make_node_common(&typestruct, &sc->node) != 0)
 438                         goto errexit;
 439                 sc->node->private = sc;
 440                 callout_init(&sc->sr_timer);
 441                 sc->xmitq.ifq_maxlen = IFQ_MAXLEN;
 442                 sc->xmitq_hipri.ifq_maxlen = IFQ_MAXLEN;
 443                 ksprintf(sc->nodename, "%s%d", NG_SR_NODE_TYPE, sc->unit);
 444                 if (ng_name_node(sc->node, sc->nodename)) {
 445                         ng_rmnode(sc->node);
 446                         ng_unref(sc->node);
 447                         return (0);
 448                 }
 449                 sc->running = 0;
 450 #endif  /* NETGRAPH */
 451         }
 452
 453         return (0);
 454
 455 errexit:
 456         sr_deallocate_resources(device);
 457         return (ENXIO);
 458 }
 459
 460 int
 461 sr_detach(device_t device)
 462 {
 463         device_t parent = device_get_parent(device);
 464         struct sr_hardc *hc = device_get_softc(device);
 465
 466         if (hc->intr_cookie != NULL) {
 467                 if (BUS_TEARDOWN_INTR(parent, device,
 468                         hc->res_irq, hc->intr_cookie) != 0) {
 469                                 kprintf("intr teardown failed.. continuing\n");
 470                 }
 471                 hc->intr_cookie = NULL;
 472         }
 473
 474         /* XXX Stop the DMA. */
 475
 476         /*
 477          * deallocate any system resources we may have
 478          * allocated on behalf of this driver.
 479          */
 480         kfree(hc->sc, M_DEVBUF);
 481         hc->sc = NULL;
 482         hc->mem_start = NULL;
 483         return (sr_deallocate_resources(device));
 484 }
 485
 486 int
 487 sr_allocate_irq(device_t device, int rid, u_long size)
 488 {
 489         struct sr_hardc *hc = device_get_softc(device);
 490
 491         hc->rid_irq = rid;
 492         hc->res_irq = bus_alloc_resource_any(device, SYS_RES_IRQ,
 493             &hc->rid_irq, RF_SHAREABLE|RF_ACTIVE);
 494         if (hc->res_irq == NULL) {
 495                 goto errexit;
 496         }
 497         return (0);
 498
 499 errexit:
 500         sr_deallocate_resources(device);
 501         return (ENXIO);
 502 }
 503
 504 int
 505 sr_allocate_memory(device_t device, int rid, u_long size)
 506 {
 507         struct sr_hardc *hc = device_get_softc(device);
 508
 509         hc->rid_memory = rid;
 510         hc->res_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 511                         &hc->rid_memory, 0ul, ~0ul, size, RF_ACTIVE);
 512         if (hc->res_memory == NULL) {
 513                 goto errexit;
 514         }
 515         return (0);
 516
 517 errexit:
 518         sr_deallocate_resources(device);
 519         return (ENXIO);
 520 }
 521
 522 int
 523 sr_allocate_plx_memory(device_t device, int rid, u_long size)
 524 {
 525         struct sr_hardc *hc = device_get_softc(device);
 526
 527         hc->rid_plx_memory = rid;
 528         hc->res_plx_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 529                         &hc->rid_plx_memory, 0ul, ~0ul, size, RF_ACTIVE);
 530         if (hc->res_plx_memory == NULL) {
 531                 goto errexit;
 532         }
 533         return (0);
 534
 535 errexit:
 536         sr_deallocate_resources(device);
 537         return (ENXIO);
 538 }
 539
 540 int
 541 sr_deallocate_resources(device_t device)
 542 {
 543         struct sr_hardc *hc = device_get_softc(device);
 544
 545         if (hc->res_irq != 0) {
 546                 bus_deactivate_resource(device, SYS_RES_IRQ,
 547                         hc->rid_irq, hc->res_irq);
 548                 bus_release_resource(device, SYS_RES_IRQ,
 549                         hc->rid_irq, hc->res_irq);
 550                 hc->res_irq = 0;
 551         }
 552         if (hc->res_memory != 0) {
 553                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 554                         hc->rid_memory, hc->res_memory);
 555                 bus_release_resource(device, SYS_RES_MEMORY,
 556                         hc->rid_memory, hc->res_memory);
 557                 hc->res_memory = 0;
 558         }
 559         if (hc->res_plx_memory != 0) {
 560                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 561                         hc->rid_plx_memory, hc->res_plx_memory);
 562                 bus_release_resource(device, SYS_RES_MEMORY,
 563                         hc->rid_plx_memory, hc->res_plx_memory);
 564                 hc->res_plx_memory = 0;
 565         }
 566         return (0);
 567 }
 568
 569 /*
 570  * N2 Interrupt Service Routine
 571  *
 572  * First figure out which SCA gave the interrupt.
 573  * Process it.
 574  * See if there is other interrupts pending.
 575  * Repeat until there no interrupts remain.
 576  */
 577 static void
 578 srintr(void *arg)
 579 {
 580         struct sr_hardc *hc = (struct sr_hardc *)arg;
 581         sca_regs *sca = hc->sca;        /* MSCI register tree */
 582         u_char  isr0, isr1, isr2;       /* interrupt statii captured */
 583
 584 #if BUGGY > 1
 585         kprintf("sr: srintr_hc(hc=%08x)\n", hc);
 586 #endif
 587
 588         /*
 589          * Since multiple interfaces may share this interrupt, we must loop
 590          * until no interrupts are still pending service.
 591          */
 592         while (1) {
 593                 /*
 594                  * Read all three interrupt status registers from the N2
 595                  * card...
 596                  */
 597                 isr0 = SRC_GET8(hc->sca_base, sca->isr0);
 598                 isr1 = SRC_GET8(hc->sca_base, sca->isr1);
 599                 isr2 = SRC_GET8(hc->sca_base, sca->isr2);
 600
 601                 /*
 602                  * If all three registers returned 0, we've finished
 603                  * processing interrupts from this device, so we can quit
 604                  * this loop...
 605                  */
 606                 if ((isr0 | isr1 | isr2) == 0)
 607                         break;
 608
 609 #if BUGGY > 2
 610                 kprintf("src%d: srintr_hc isr0 %x, isr1 %x, isr2 %x\n",
 611 #ifndef NETGRAPH
 612                         unit, isr0, isr1, isr2);
 613 #else
 614                         hc->cunit, isr0, isr1, isr2);
 615 #endif /* NETGRAPH */
 616 #endif
 617
 618                 /*
 619                  * Now we can dispatch the interrupts. Since we don't expect
 620                  * either MSCI or timer interrupts, we'll test for DMA
 621                  * interrupts first...
 622                  */
 623                 if (isr1)       /* DMA-initiated interrupt */
 624                         sr_dmac_intr(hc, isr1);
 625
 626                 if (isr0)       /* serial part IRQ? */
 627                         sr_msci_intr(hc, isr0);
 628
 629                 if (isr2)       /* timer-initiated interrupt */
 630                         sr_timer_intr(hc, isr2);
 631         }
 632 }
 633
 634 /*
 635  * This will only start the transmitter. It is assumed that the data
 636  * is already there.
 637  * It is normally called from srstart() or sr_dmac_intr().
 638  */
 639 static void
 640 sr_xmit(struct sr_softc *sc)
 641 {
 642         u_short cda_value;      /* starting descriptor */
 643         u_short eda_value;      /* ending descriptor */
 644         struct sr_hardc *hc;
 645 #ifndef NETGRAPH
 646         struct ifnet *ifp;      /* O/S Network Services */
 647 #endif /* NETGRAPH */
 648         dmac_channel *dmac;     /* DMA channel registers */
 649
 650 #if BUGGY > 0
 651         kprintf("sr: sr_xmit( sc=%08x)\n", sc);
 652 #endif
 653
 654         hc = sc->hc;
 655 #ifndef NETGRAPH
 656         ifp = &sc->ifsppp.pp_if;
 657 #endif /* NETGRAPH */
 658         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
 659
 660         /*
 661          * Get the starting and ending addresses of the chain to be
 662          * transmitted and pass these on to the DMA engine on-chip.
 663          */
 664         cda_value = sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart;
 665         cda_value &= 0x00ffff;
 666         eda_value = sc->block[sc->txb_next_tx].txeda + hc->mem_pstart;
 667         eda_value &= 0x00ffff;
 668
 669         SRC_PUT16(hc->sca_base, dmac->cda, cda_value);
 670         SRC_PUT16(hc->sca_base, dmac->eda, eda_value);
 671
 672         /*
 673          * Now we'll let the DMA status register know about this change
 674          */
 675         SRC_PUT8(hc->sca_base, dmac->dsr, SCA_DSR_DE);
 676
 677         sc->xmit_busy = 1;      /* mark transmitter busy */
 678
 679 #if BUGGY > 2
 680         kprintf("sr%d: XMIT  cda=%04x, eda=%4x, rcda=%08lx\n",
 681                sc->unit, cda_value, eda_value,
 682                sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart);
 683 #endif
 684
 685         sc->txb_next_tx++;      /* update next transmit seq# */
 686
 687         if (sc->txb_next_tx == SR_TX_BLOCKS)    /* handle wrap... */
 688                 sc->txb_next_tx = 0;
 689
 690 #ifndef NETGRAPH
 691         /*
 692          * Finally, we'll set a timout (which will start srwatchdog())
 693          * within the O/S network services layer...
 694          */
 695         ifp->if_timer = 2;      /* Value in seconds. */
 696 #else
 697         /*
 698          * Don't time out for a while.
 699          */
 700         sc->out_dog = DOG_HOLDOFF;      /* give ourself some breathing space*/
 701 #endif /* NETGRAPH */
 702 }
 703
 704 /*
 705  * This function will be called from the upper level when a user add a
 706  * packet to be send, and from the interrupt handler after a finished
 707  * transmit.
 708  *
 709  * This function only place the data in the oncard buffers. It does not
 710  * start the transmition. sr_xmit() does that.
 711  *
 712  * Transmitter idle state is indicated by the IFF_OACTIVE flag.
 713  * The function that clears that should ensure that the transmitter
 714  * and its DMA is in a "good" idle state.
 715  */
 716 #ifndef NETGRAPH
 717 static void
 718 srstart(struct ifnet *ifp)
 719 {
 720         struct sr_softc *sc;    /* channel control structure */
 721 #else
 722 static void
 723 srstart(struct sr_softc *sc)
 724 {
 725 #endif /* NETGRAPH */
 726         struct sr_hardc *hc;    /* card control/config block */
 727         int len;                /* total length of a packet */
 728         int pkts;               /* packets placed in DPRAM */
 729         int tlen;               /* working length of pkt */
 730         u_int i;
 731         struct mbuf *mtx;       /* message buffer from O/S */
 732         u_char *txdata;         /* buffer address in DPRAM */
 733         sca_descriptor *txdesc; /* working descriptor pointr */
 734         struct buf_block *blkp;
 735
 736 #ifndef NETGRAPH
 737 #if BUGGY > 0
 738         kprintf("sr: srstart( ifp=%08x)\n", ifp);
 739 #endif
 740         sc = ifp->if_softc;
 741         if ((ifp->if_flags & IFF_RUNNING) == 0)
 742                 return;
 743 #endif /* NETGRAPH */
 744         hc = sc->hc;
 745         /*
 746          * It is OK to set the memory window outside the loop because all tx
 747          * buffers and descriptors are assumed to be in the same 16K window.
 748          */
 749
 750         /*
 751          * Loop to place packets into DPRAM.
 752          *
 753          * We stay in this loop until there is nothing in
 754          * the TX queue left or the tx buffers are full.
 755          */
 756 top_srstart:
 757
 758         /*
 759          * See if we have space for more packets.
 760          */
 761         if (sc->txb_inuse == SR_TX_BLOCKS) {    /* out of space? */
 762 #ifndef NETGRAPH
 763                 ifp->if_flags |= IFF_OACTIVE;   /* yes, mark active */
 764 #else
 765                 /*ifp->if_flags |= IFF_OACTIVE;*/       /* yes, mark active */
 766 #endif /* NETGRAPH */
 767
 768 #if BUGGY > 9
 769                 kprintf("sr%d.srstart: sc->txb_inuse=%d; DPRAM full...\n",
 770                        sc->unit, sc->txb_inuse);
 771 #endif
 772                 return;
 773         }
 774         /*
 775          * OK, the card can take more traffic.  Let's see if there's any
 776          * pending from the system...
 777          *
 778          * NOTE:
 779          * The architecture of the networking interface doesn't
 780          * actually call us like 'write()', providing an address.  We get
 781          * started, a lot like a disk strategy routine, and we actually call
 782          * back out to the system to get traffic to send...
 783          *
 784          * NOTE:
 785          * If we were gonna run through another layer, we would use a
 786          * dispatch table to select the service we're getting a packet
 787          * from...
 788          */
 789 #ifndef NETGRAPH
 790         mtx = sppp_dequeue(ifp);
 791 #else /* NETGRAPH */
 792         IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 793         if (mtx == NULL) {
 794                 IF_DEQUEUE(&sc->xmitq, mtx);
 795         }
 796 #endif /* NETGRAPH */
 797         if (!mtx) {
 798                 return;
 799         }
 800         /*
 801          * OK, we got a packet from the network services of the O/S. Now we
 802          * can move it into the DPRAM (under control of the descriptors) and
 803          * fire it off...
 804          */
 805         pkts = 0;
 806         i = 0;                  /* counts # of granules used */
 807
 808         blkp = &sc->block[sc->txb_new]; /* address of free granule */
 809         txdesc = (sca_descriptor *)
 810             (hc->mem_start + (blkp->txdesc & hc->winmsk));
 811
 812         txdata = (u_char *)(hc->mem_start
 813                             + (blkp->txstart & hc->winmsk));
 814
 815         /*
 816          * Now we'll try to install as many packets as possible into the
 817          * card's DP RAM buffers.
 818          */
 819         for (;;) {              /* perform actual copy of packet */
 820                 len = mtx->m_pkthdr.len;        /* length of message */
 821
 822 #if BUGGY > 1
 823                 kprintf("sr%d.srstart: mbuf @ %08lx, %d bytes\n",
 824                            sc->unit, mtx, len);
 825 #endif
 826
 827 #ifndef NETGRAPH
 828                 BPF_MTAP(ifp, mtx);
 829 #else   /* NETGRAPH */
 830                 sc->outbytes += len;
 831 #endif  /* NETGRAPH */
 832
 833                 /*
 834                  * We can perform a straight copy because the tranmit
 835                  * buffers won't wrap.
 836                  */
 837                 m_copydata(mtx, 0, len, txdata);
 838
 839                 /*
 840                  * Now we know how big the message is gonna be.  We must now
 841                  * construct the descriptors to drive this message out...
 842                  */
 843                 tlen = len;
 844                 while (tlen > SR_BUF_SIZ) {     /* loop for full granules */
 845                         txdesc->stat = 0;       /* reset bits */
 846                         txdesc->len = SR_BUF_SIZ;       /* size of granule */
 847                         tlen -= SR_BUF_SIZ;
 848
 849                         txdesc++;       /* move to next dscr */
 850                         txdata += SR_BUF_SIZ;   /* adjust data addr */
 851                         i++;
 852                 }
 853
 854                 /*
 855                  * This section handles the setting of the final piece of a
 856                  * message.
 857                  */
 858                 txdesc->stat = SCA_DESC_EOM;
 859                 txdesc->len = tlen;
 860                 pkts++;
 861
 862                 /*
 863                  * prepare for subsequent packets (if any)
 864                  */
 865                 txdesc++;
 866                 txdata += SR_BUF_SIZ;   /* next mem granule */
 867                 i++;            /* count of granules */
 868
 869                 /*
 870                  * OK, we've now placed the message into the DPRAM where it
 871                  * can be transmitted.  We'll now release the message memory
 872                  * and update the statistics...
 873                  */
 874                 m_freem(mtx);
 875 #ifndef NETGRAPH
 876                 ++sc->ifsppp.pp_if.if_opackets;
 877 #else   /* NETGRAPH */
 878                 sc->opackets++;
 879 #endif /* NETGRAPH */
 880
 881                 /*
 882                  * Check if we have space for another packet. XXX This is
 883                  * hardcoded.  A packet can't be larger than 3 buffers (3 x
 884                  * 512).
 885                  */
 886                 if ((i + 3) >= blkp->txmax) {   /* enough remains? */
 887 #if BUGGY > 9
 888                         kprintf("sr%d.srstart: i=%d (%d pkts); card full.\n",
 889                                sc->unit, i, pkts);
 890 #endif
 891                         break;
 892                 }
 893                 /*
 894                  * We'll pull the next message to be sent (if any)
 895                  */
 896 #ifndef NETGRAPH
 897                 mtx = sppp_dequeue(ifp);
 898 #else /* NETGRAPH */
 899                 IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 900                 if (mtx == NULL) {
 901                         IF_DEQUEUE(&sc->xmitq, mtx);
 902                 }
 903 #endif /* NETGRAPH */
 904                 if (!mtx) {     /* no message?  We're done! */
 905 #if BUGGY > 9
 906                         kprintf("sr%d.srstart: pending=0, pkts=%d\n",
 907                                sc->unit, pkts);
 908 #endif
 909                         break;
 910                 }
 911         }
 912
 913         blkp->txtail = i;       /* record next free granule */
 914
 915         /*
 916          * Mark the last descriptor, so that the SCA know where to stop.
 917          */
 918         txdesc--;               /* back up to last descriptor in list */
 919         txdesc->stat |= SCA_DESC_EOT;   /* mark as end of list */
 920
 921         /*
 922          * Now we'll reset the transmit granule's descriptor address so we
 923          * can record this in the structure and fire it off w/ the DMA
 924          * processor of the serial chip...
 925          */
 926         txdesc = (sca_descriptor *)blkp->txdesc;
 927         blkp->txeda = (u_short)((u_int)&txdesc[i]);
 928
 929         sc->txb_inuse++;        /* update inuse status */
 930         sc->txb_new++;          /* new traffic wuz added */
 931
 932         if (sc->txb_new == SR_TX_BLOCKS)
 933                 sc->txb_new = 0;
 934
 935         /*
 936          * If the tranmitter wasn't marked as "busy" we will force it to be
 937          * started...
 938          */
 939         if (sc->xmit_busy == 0) {
 940                 sr_xmit(sc);
 941 #if BUGGY > 9
 942                 kprintf("sr%d.srstart: called sr_xmit()\n", sc->unit);
 943 #endif
 944         }
 945         goto top_srstart;
 946 }
 947
 948 #ifndef NETGRAPH
 949 /*
 950  * Handle ioctl's at the device level, though we *will* call up
 951  * a layer...
 952  */
 953 #if BUGGY > 2
 954 static int bug_splats[] = {0, 0, 0, 0, 0, 0, 0, 0};
 955 #endif
 956
 957 static int
 958 srioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
 959 {
 960         int error, was_up, should_be_up;
 961         struct sr_softc *sc = ifp->if_softc;
 962
 963 #if BUGGY > 0
 964         kprintf("%s: srioctl(ifp=%08x, cmd=%08x, data=%08x)\n",
 965                ifp->if_xname, ifp, cmd, data);
 966 #endif
 967
 968         was_up = ifp->if_flags & IFF_RUNNING;
 969
 970         error = sppp_ioctl(ifp, cmd, data);
 971
 972 #if BUGGY > 1
 973         kprintf("%s: ioctl: ifsppp.pp_flags = %08x, if_flags %08x.\n",
 974               ifp->if_xname, ((struct sppp *)ifp)->pp_flags, ifp->if_flags);
 975 #endif
 976
 977         if (error)
 978                 return error;
 979
 980         if ((cmd != SIOCSIFFLAGS) && (cmd != SIOCSIFADDR)) {
 981 #if BUGGY > 2
 982                 if (bug_splats[sc->unit]++ < 2) {
 983                         kprintf("sr(%d).if_addrheads = %08x\n",
 984                                sc->unit, ifp->if_addrheads);
 985                         kprintf("sr(%d).if_bpf = %08x\n",
 986                                sc->unit, ifp->if_bpf);
 987                         kprintf("sr(%d).if_init = %08x\n",
 988                                sc->unit, ifp->if_init);
 989                         kprintf("sr(%d).if_output = %08x\n",
 990                                sc->unit, ifp->if_output);
 991                         kprintf("sr(%d).if_start = %08x\n",
 992                                sc->unit, ifp->if_start);
 993                         kprintf("sr(%d).if_done = %08x\n",
 994                                sc->unit, ifp->if_done);
 995                         kprintf("sr(%d).if_ioctl = %08x\n",
 996                                sc->unit, ifp->if_ioctl);
 997                         kprintf("sr(%d).if_reset = %08x\n",
 998                                sc->unit, ifp->if_reset);
 999                         kprintf("sr(%d).if_watchdog = %08x\n",
1000                                sc->unit, ifp->if_watchdog);
1001                 }
1002 #endif
1003                 return 0;
1004         }
1005
1006         crit_enter();
1007
1008         should_be_up = ifp->if_flags & IFF_RUNNING;
1009
1010         if (!was_up && should_be_up) {
1011                 /*
1012                  * Interface should be up -- start it.
1013                  */
1014                 sr_up(sc);
1015                 srstart(ifp);
1016
1017                 /*
1018                  * XXX Clear the IFF_UP flag so that the link will only go
1019                  * up after sppp lcp and ipcp negotiation.
1020                  */
1021                 /* ifp->if_flags &= ~IFF_UP; */
1022         } else if (was_up && !should_be_up) {
1023                 /*
1024                  * Interface should be down -- stop it.
1025                  */
1026                 sr_down(sc);
1027                 sppp_flush(ifp);
1028         }
1029
1030         crit_exit();
1031
1032         return 0;
1033 }
1034 #endif /* NETGRAPH */
1035
1036 /*
1037  * This is to catch lost tx interrupts.
1038  */
1039 static void
1040 #ifndef NETGRAPH
1041 srwatchdog(struct ifnet *ifp)
1042 #else
1043 srwatchdog(struct sr_softc *sc)
1044 #endif /* NETGRAPH */
1045 {
1046         int     got_st0, got_st1, got_st3, got_dsr;
1047 #ifndef NETGRAPH
1048         struct sr_softc *sc = ifp->if_softc;
1049 #endif /* NETGRAPH */
1050         struct sr_hardc *hc = sc->hc;
1051         msci_channel *msci = &hc->sca->msci[sc->scachan];
1052         dmac_channel *dmac = &sc->hc->sca->dmac[sc->scachan];
1053
1054 #if BUGGY > 0
1055 #ifndef NETGRAPH
1056         kprintf("srwatchdog(unit=%d)\n", unit);
1057 #else
1058         kprintf("srwatchdog(unit=%d)\n", sc->unit);
1059 #endif /* NETGRAPH */
1060 #endif
1061
1062 #ifndef NETGRAPH
1063         if (!(ifp->if_flags & IFF_RUNNING))
1064                 return;
1065
1066         ifp->if_oerrors++;      /* update output error count */
1067 #else   /* NETGRAPH */
1068         sc->oerrors++;  /* update output error count */
1069 #endif /* NETGRAPH */
1070
1071         got_st0 = SRC_GET8(hc->sca_base, msci->st0);
1072         got_st1 = SRC_GET8(hc->sca_base, msci->st1);
1073         got_st3 = SRC_GET8(hc->sca_base, msci->st3);
1074         got_dsr = SRC_GET8(hc->sca_base, dmac->dsr);
1075
1076 #ifndef NETGRAPH
1077 #if     0
1078         if (ifp->if_flags & IFF_DEBUG)
1079 #endif
1080                 kprintf("sr%d: transmit failed, "
1081 #else   /* NETGRAPH */
1082         kprintf("sr%d: transmit failed, "
1083 #endif /* NETGRAPH */
1084                        "ST0 %02x, ST1 %02x, ST3 %02x, DSR %02x.\n",
1085                        sc->unit,
1086                        got_st0, got_st1, got_st3, got_dsr);
1087
1088         if (SRC_GET8(hc->sca_base, msci->st1) & SCA_ST1_UDRN) {
1089                 SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXABORT);
1090                 SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXENABLE);
1091                 SRC_PUT8(hc->sca_base, msci->st1, SCA_ST1_UDRN);
1092         }
1093         sc->xmit_busy = 0;
1094 #ifndef NETGRAPH
1095         ifp->if_flags &= ~IFF_OACTIVE;
1096 #else
1097         /*ifp->if_flags &= ~IFF_OACTIVE; */
1098 #endif /* NETGRAPH */
1099
1100         if (sc->txb_inuse && --sc->txb_inuse)
1101                 sr_xmit(sc);
1102
1103 #ifndef NETGRAPH
1104         srstart(ifp);   /* restart transmitter */
1105 #else
1106         srstart(sc);    /* restart transmitter */
1107 #endif /* NETGRAPH */
1108 }
1109
1110 static void
1111 sr_up(struct sr_softc *sc)
1112 {
1113         u_int *fecrp;
1114         struct sr_hardc *hc = sc->hc;
1115         sca_regs *sca = hc->sca;
1116         msci_channel *msci = &sca->msci[sc->scachan];
1117
1118 #if BUGGY > 0
1119         kprintf("sr_up(sc=%08x)\n", sc);
1120 #endif
1121
1122         /*
1123          * Enable transmitter and receiver. Raise DTR and RTS. Enable
1124          * interrupts.
1125          *
1126          * XXX What about using AUTO mode in msci->md0 ???
1127          */
1128         SRC_PUT8(hc->sca_base, msci->ctl,
1129                  SRC_GET8(hc->sca_base, msci->ctl) & ~SCA_CTL_RTS);
1130
1131         if (sc->scachan == 0)
1132                 switch (hc->cardtype) {
1133                 case SR_CRD_N2PCI:
1134                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1135                         *fecrp &= ~SR_FECR_DTR0;
1136                         break;
1137                 }
1138         else
1139                 switch (hc->cardtype) {
1140                 case SR_CRD_N2PCI:
1141                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1142                         *fecrp &= ~SR_FECR_DTR1;
1143                         break;
1144                 }
1145
1146         if (sc->scachan == 0) {
1147                 SRC_PUT8(hc->sca_base, sca->ier0,
1148                          SRC_GET8(hc->sca_base, sca->ier0) | 0x000F);
1149                 SRC_PUT8(hc->sca_base, sca->ier1,
1150                          SRC_GET8(hc->sca_base, sca->ier1) | 0x000F);
1151         } else {
1152                 SRC_PUT8(hc->sca_base, sca->ier0,
1153                          SRC_GET8(hc->sca_base, sca->ier0) | 0x00F0);
1154                 SRC_PUT8(hc->sca_base, sca->ier1,
1155                          SRC_GET8(hc->sca_base, sca->ier1) | 0x00F0);
1156         }
1157
1158         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXENABLE);
1159         DELAY(1000);    /* XXX slow it down a bit. */
1160         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXENABLE);
1161
1162 #ifndef NETGRAPH
1163 #ifdef USE_MODEMCK
1164         if (sr_watcher == 0)
1165                 sr_modemck(NULL);
1166 #endif
1167 #else   /* NETGRAPH */
1168         callout_reset(&sc->sr_timer, hz, ngsr_watchdog_frame, sc);
1169         sc->running = 1;
1170 #endif /* NETGRAPH */
1171 }
1172
1173 static void
1174 sr_down(struct sr_softc *sc)
1175 {
1176         u_int *fecrp;
1177         struct sr_hardc *hc = sc->hc;
1178         sca_regs *sca = hc->sca;
1179         msci_channel *msci = &sca->msci[sc->scachan];
1180
1181 #if BUGGY > 0
1182         kprintf("sr_down(sc=%08x)\n", sc);
1183 #endif
1184 #ifdef NETGRAPH
1185         callout_stop(&sc->sr_timer);
1186         sc->running = 0;
1187 #endif /* NETGRAPH */
1188
1189         /*
1190          * Disable transmitter and receiver. Lower DTR and RTS. Disable
1191          * interrupts.
1192          */
1193         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXDISABLE);
1194         DELAY(1000);    /* XXX slow it down a bit. */
1195         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXDISABLE);
1196
1197         SRC_PUT8(hc->sca_base, msci->ctl,
1198                  SRC_GET8(hc->sca_base, msci->ctl) | SCA_CTL_RTS);
1199
1200         if (sc->scachan == 0)
1201                 switch (hc->cardtype) {
1202                 case SR_CRD_N2PCI:
1203                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1204                         *fecrp |= SR_FECR_DTR0;
1205                         break;
1206                 }
1207         else
1208                 switch (hc->cardtype) {
1209                 case SR_CRD_N2PCI:
1210                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1211                         *fecrp |= SR_FECR_DTR1;
1212                         break;
1213                 }
1214
1215         if (sc->scachan == 0) {
1216                 SRC_PUT8(hc->sca_base, sca->ier0,
1217                          SRC_GET8(hc->sca_base, sca->ier0) & ~0x0F);
1218                 SRC_PUT8(hc->sca_base, sca->ier1,
1219                          SRC_GET8(hc->sca_base, sca->ier1) & ~0x0F);
1220         } else {
1221                 SRC_PUT8(hc->sca_base, sca->ier0,
1222                          SRC_GET8(hc->sca_base, sca->ier0) & ~0xF0);
1223                 SRC_PUT8(hc->sca_base, sca->ier1,
1224                          SRC_GET8(hc->sca_base, sca->ier1) & ~0xF0);
1225         }
1226 }
1227
1228 /*
1229  * Initialize the card, allocate memory for the sr_softc structures
1230  * and fill in the pointers.
1231  */
1232 static void
1233 src_init(struct sr_hardc *hc)
1234 {
1235         struct sr_softc *sc = hc->sc;
1236         int x;
1237         u_int chanmem;
1238         u_int bufmem;
1239         u_int next;
1240         u_int descneeded;
1241
1242 #if BUGGY > 0
1243         kprintf("src_init(hc=%08x)\n", hc);
1244 #endif
1245
1246         chanmem = hc->memsize / hc->numports;
1247         next = 0;
1248
1249         for (x = 0; x < hc->numports; x++, sc++) {
1250                 int blk;
1251
1252                 for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1253                         sc->block[blk].txdesc = next;
1254                         bufmem = (16 * 1024) / SR_TX_BLOCKS;
1255                         descneeded = bufmem / SR_BUF_SIZ;
1256
1257                         sc->block[blk].txstart = sc->block[blk].txdesc
1258                             + ((((descneeded * sizeof(sca_descriptor))
1259                                  / SR_BUF_SIZ) + 1)
1260                                * SR_BUF_SIZ);
1261
1262                         sc->block[blk].txend = next + bufmem;
1263                         sc->block[blk].txmax =
1264                             (sc->block[blk].txend - sc->block[blk].txstart)
1265                             / SR_BUF_SIZ;
1266                         next += bufmem;
1267
1268 #if BUGGY > 2
1269                         kprintf("sr%d: blk %d: txdesc %08x, txstart %08x\n",
1270                                sc->unit, blk,
1271                                sc->block[blk].txdesc, sc->block[blk].txstart);
1272 #endif
1273                 }
1274
1275                 sc->rxdesc = next;
1276                 bufmem = chanmem - (bufmem * SR_TX_BLOCKS);
1277                 descneeded = bufmem / SR_BUF_SIZ;
1278                 sc->rxstart = sc->rxdesc +
1279                     ((((descneeded * sizeof(sca_descriptor)) /
1280                        SR_BUF_SIZ) + 1) * SR_BUF_SIZ);
1281                 sc->rxend = next + bufmem;
1282                 sc->rxmax = (sc->rxend - sc->rxstart) / SR_BUF_SIZ;
1283                 next += bufmem;
1284         }
1285 }
1286
1287 /*
1288  * The things done here are channel independent.
1289  *
1290  * Configure the sca waitstates.
1291  * Configure the global interrupt registers.
1292  * Enable master dma enable.
1293  */
1294 static void
1295 sr_init_sca(struct sr_hardc *hc)
1296 {
1297         sca_regs *sca = hc->sca;
1298
1299 #if BUGGY > 0
1300         kprintf("sr_init_sca(hc=%08x)\n", hc);
1301 #endif
1302
1303         /*
1304          * Do the wait registers. Set everything to 0 wait states.
1305          */
1306         SRC_PUT8(hc->sca_base, sca->pabr0, 0);
1307         SRC_PUT8(hc->sca_base, sca->pabr1, 0);
1308         SRC_PUT8(hc->sca_base, sca->wcrl, 0);
1309         SRC_PUT8(hc->sca_base, sca->wcrm, 0);
1310         SRC_PUT8(hc->sca_base, sca->wcrh, 0);
1311
1312         /*
1313          * Configure the interrupt registers. Most are cleared until the
1314          * interface is configured.
1315          */
1316         SRC_PUT8(hc->sca_base, sca->ier0, 0x00);        /* MSCI interrupts. */
1317         SRC_PUT8(hc->sca_base, sca->ier1, 0x00);        /* DMAC interrupts */
1318         SRC_PUT8(hc->sca_base, sca->ier2, 0x00);        /* TIMER interrupts. */
1319         SRC_PUT8(hc->sca_base, sca->itcr, 0x00);        /* Use ivr and no intr
1320                                                          * ack */
1321         SRC_PUT8(hc->sca_base, sca->ivr, 0x40); /* Interrupt vector. */
1322         SRC_PUT8(hc->sca_base, sca->imvr, 0x40);
1323
1324         /*
1325          * Configure the timers. XXX Later
1326          */
1327
1328         /*
1329          * Set the DMA channel priority to rotate between all four channels.
1330          *
1331          * Enable all dma channels.
1332          */
1333         SRC_PUT8(hc->sca_base, sca->pcr, SCA_PCR_PR2);
1334         SRC_PUT8(hc->sca_base, sca->dmer, SCA_DMER_EN);
1335 }
1336
1337 /*
1338  * Configure the msci
1339  *
1340  * NOTE: The serial port configuration is hardcoded at the moment.
1341  */
1342 static void
1343 sr_init_msci(struct sr_softc *sc)
1344 {
1345         int portndx;            /* on-board port number */
1346         u_int *fecrp;           /* pointer for PCI's MCR i/o */
1347         struct sr_hardc *hc = sc->hc;
1348         msci_channel *msci = &hc->sca->msci[sc->scachan];
1349 #ifdef N2_TEST_SPEED
1350         int br_v;               /* contents for BR divisor */
1351         int etcndx;             /* index into ETC table */
1352         int fifo_v, gotspeed;   /* final tabled speed found */
1353         int tmc_v;              /* timer control register */
1354         int wanted;             /* speed (bitrate) wanted... */
1355         struct rate_line *rtp;
1356 #endif
1357
1358         portndx = sc->scachan;
1359
1360 #if BUGGY > 0
1361         kprintf("sr: sr_init_msci( sc=%08x)\n", sc);
1362 #endif
1363
1364         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RESET);
1365         SRC_PUT8(hc->sca_base, msci->md0, SCA_MD0_CRC_1 |
1366                  SCA_MD0_CRC_CCITT |
1367                  SCA_MD0_CRC_ENABLE |
1368                  SCA_MD0_MODE_HDLC);
1369         SRC_PUT8(hc->sca_base, msci->md1, SCA_MD1_NOADDRCHK);
1370         SRC_PUT8(hc->sca_base, msci->md2, SCA_MD2_DUPLEX | SCA_MD2_NRZ);
1371
1372         /*
1373          * According to the manual I should give a reset after changing the
1374          * mode registers.
1375          */
1376         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXRESET);
1377         SRC_PUT8(hc->sca_base, msci->ctl, SCA_CTL_IDLPAT |
1378                  SCA_CTL_UDRNC |
1379                  SCA_CTL_RTS);
1380
1381         /*
1382          * XXX Later we will have to support different clock settings.
1383          */
1384         switch (sc->clk_cfg) {
1385         default:
1386 #if BUGGY > 0
1387                 kprintf("sr%: clk_cfg=%08x, selected default clock.\n",
1388                        portndx, sc->clk_cfg);
1389 #endif
1390                 /* FALLTHROUGH */
1391         case SR_FLAGS_EXT_CLK:
1392                 /*
1393                  * For now all interfaces are programmed to use the RX clock
1394                  * for the TX clock.
1395                  */
1396
1397 #if BUGGY > 0
1398                 kprintf("sr%d: External Clock Selected.\n", portndx);
1399 #endif
1400
1401                 SRC_PUT8(hc->sca_base, msci->rxs,
1402                          SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1403                 SRC_PUT8(hc->sca_base, msci->txs,
1404                          SCA_TXS_CLK_RX | SCA_TXS_DIV1);
1405                 break;
1406
1407         case SR_FLAGS_EXT_SEP_CLK:
1408 #if BUGGY > 0
1409                 kprintf("sr%d: Split Clocking Selected.\n", portndx);
1410 #endif
1411
1412                 SRC_PUT8(hc->sca_base, msci->rxs,
1413                          SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1414                 SRC_PUT8(hc->sca_base, msci->txs,
1415                          SCA_TXS_CLK_TXC | SCA_TXS_DIV1);
1416                 break;
1417
1418         case SR_FLAGS_INT_CLK:
1419 #if BUGGY > 0
1420                 kprintf("sr%d: Internal Clocking selected.\n", portndx);
1421 #endif
1422
1423                 /*
1424                  * XXX I do need some code to set the baud rate here!
1425                  */
1426 #ifdef N2_TEST_SPEED
1427                 switch (hc->cardtype) {
1428                 case SR_CRD_N2PCI:
1429                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1430                         mcr_v = *fecrp;
1431                         etcndx = 2;
1432                         break;
1433                 }
1434
1435                 fifo_v = 0x10;  /* stolen from Linux version */
1436
1437                 /*
1438                  * search for appropriate speed in table, don't calc it:
1439                  */
1440                 wanted = sr_test_speed[portndx];
1441                 rtp = &n2_rates[0];     /* point to first table item */
1442
1443                 while ((rtp->target > 0)        /* search table for speed */
1444                        &&(rtp->target != wanted))
1445                         rtp++;
1446
1447                 /*
1448                  * We've searched the table for a matching speed.  If we've
1449                  * found the correct rate line, we'll get the pre-calc'd
1450                  * values for the TMC and baud rate divisor for subsequent
1451                  * use...
1452                  */
1453                 if (rtp->target > 0) {  /* use table-provided values */
1454                         gotspeed = wanted;
1455                         tmc_v = rtp->tmc_reg;
1456                         br_v = rtp->br_reg;
1457                 } else {        /* otherwise assume 1MBit comm rate */
1458                         gotspeed = 10000;
1459                         tmc_v = 5;
1460                         br_v = 1;
1461                 }
1462
1463                 /*
1464                  * Now we mask in the enable clock output for the MCR:
1465                  */
1466                 mcr_v |= etc0vals[etcndx + portndx];
1467
1468                 /*
1469                  * Now we'll program the registers with these speed- related
1470                  * contents...
1471                  */
1472                 SRC_PUT8(hc->sca_base, msci->tmc, tmc_v);
1473                 SRC_PUT8(hc->sca_base, msci->trc0, fifo_v);
1474                 SRC_PUT8(hc->sca_base, msci->rxs, SCA_RXS_CLK_INT + br_v);
1475                 SRC_PUT8(hc->sca_base, msci->txs, SCA_TXS_CLK_INT + br_v);
1476
1477                 switch (hc->cardtype) {
1478                 case SR_CRD_N2PCI:
1479                         *fecrp = mcr_v;
1480                         break;
1481                 }
1482
1483 #if BUGGY > 0
1484                 if (wanted != gotspeed)
1485                         kprintf("sr%d: Speed wanted=%d, found=%d\n",
1486                                wanted, gotspeed);
1487
1488                 kprintf("sr%d: Internal Clock %dx100 BPS, tmc=%d, div=%d\n",
1489                        portndx, gotspeed, tmc_v, br_v);
1490 #endif
1491 #else
1492                 SRC_PUT8(hc->sca_base, msci->rxs,
1493                          SCA_RXS_CLK_INT | SCA_RXS_DIV1);
1494                 SRC_PUT8(hc->sca_base, msci->txs,
1495                          SCA_TXS_CLK_INT | SCA_TXS_DIV1);
1496
1497                 SRC_PUT8(hc->sca_base, msci->tmc, 5);
1498
1499                 if (portndx == 0)
1500                         switch (hc->cardtype) {
1501                         case SR_CRD_N2PCI:
1502                                 fecrp = (u_int *)(hc->sca_base + SR_FECR);
1503                                 *fecrp |= SR_FECR_ETC0;
1504                                 break;
1505                         }
1506                 else
1507                         switch (hc->cardtype) {
1508                         case SR_CRD_N2PCI:
1509                                 fecrp = (u_int *)(hc->sca_base + SR_FECR);
1510                                 *fecrp |= SR_FECR_ETC1;
1511                                 break;
1512                         }
1513 #endif
1514         }
1515
1516         /*
1517          * XXX Disable all interrupts for now. I think if you are using the
1518          * dmac you don't use these interrupts.
1519          */
1520         SRC_PUT8(hc->sca_base, msci->ie0, 0);
1521         SRC_PUT8(hc->sca_base, msci->ie1, 0x0C);
1522         SRC_PUT8(hc->sca_base, msci->ie2, 0);
1523         SRC_PUT8(hc->sca_base, msci->fie, 0);
1524
1525         SRC_PUT8(hc->sca_base, msci->sa0, 0);
1526         SRC_PUT8(hc->sca_base, msci->sa1, 0);
1527
1528         SRC_PUT8(hc->sca_base, msci->idl, 0x7E);        /* set flags value */
1529
1530         SRC_PUT8(hc->sca_base, msci->rrc, 0x0E);
1531         SRC_PUT8(hc->sca_base, msci->trc0, 0x10);
1532         SRC_PUT8(hc->sca_base, msci->trc1, 0x1F);
1533 }
1534
1535 /*
1536  * Configure the rx dma controller.
1537  */
1538 static void
1539 sr_init_rx_dmac(struct sr_softc *sc)
1540 {
1541         struct sr_hardc *hc;
1542         dmac_channel *dmac;
1543         sca_descriptor *rxd;
1544         u_int cda_v, sarb_v, rxbuf, rxda, rxda_d;
1545
1546 #if BUGGY > 0
1547         kprintf("sr_init_rx_dmac(sc=%08x)\n", sc);
1548 #endif
1549
1550         hc = sc->hc;
1551         dmac = &hc->sca->dmac[DMAC_RXCH(sc->scachan)];
1552
1553         /*
1554          * This phase initializes the contents of the descriptor table
1555          * needed to construct a circular buffer...
1556          */
1557         rxd = (sca_descriptor *)(hc->mem_start + (sc->rxdesc & hc->winmsk));
1558         rxda_d = (u_int) hc->mem_start - (sc->rxdesc & ~hc->winmsk);
1559
1560         for (rxbuf = sc->rxstart;
1561              rxbuf < sc->rxend;
1562              rxbuf += SR_BUF_SIZ, rxd++) {
1563                 /*
1564                  * construct the circular chain...
1565                  */
1566                 rxda = (u_int) & rxd[1] - rxda_d + hc->mem_pstart;
1567                 rxd->cp = (u_short)(rxda & 0xffff);
1568
1569                 /*
1570                  * set the on-card buffer address...
1571                  */
1572                 rxd->bp = (u_short)((rxbuf + hc->mem_pstart) & 0xffff);
1573                 rxd->bpb = (u_char)(((rxbuf + hc->mem_pstart) >> 16) & 0xff);
1574
1575                 rxd->len = 0;   /* bytes resident w/in granule */
1576                 rxd->stat = 0xff;       /* The sca write here when finished */
1577         }
1578
1579         /*
1580          * heal the chain so that the last entry points to the first...
1581          */
1582         rxd--;
1583         rxd->cp = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1584
1585         /*
1586          * reset the reception handler's index...
1587          */
1588         sc->rxhind = 0;
1589
1590         /*
1591          * We'll now configure the receiver's DMA logic...
1592          */
1593         SRC_PUT8(hc->sca_base, dmac->dsr, 0);   /* Disable DMA transfer */
1594         SRC_PUT8(hc->sca_base, dmac->dcr, SCA_DCR_ABRT);
1595
1596         /* XXX maybe also SCA_DMR_CNTE */
1597         SRC_PUT8(hc->sca_base, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1598         SRC_PUT16(hc->sca_base, dmac->bfl, SR_BUF_SIZ);
1599
1600         cda_v = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1601         sarb_v = (u_char)(((sc->rxdesc + hc->mem_pstart) >> 16) & 0xff);
1602
1603         SRC_PUT16(hc->sca_base, dmac->cda, cda_v);
1604         SRC_PUT8(hc->sca_base, dmac->sarb, sarb_v);
1605
1606         rxd = (sca_descriptor *)sc->rxstart;
1607
1608         SRC_PUT16(hc->sca_base, dmac->eda,
1609                   (u_short)((u_int) & rxd[sc->rxmax - 1] & 0xffff));
1610
1611         SRC_PUT8(hc->sca_base, dmac->dir, 0xF0);
1612
1613
1614         SRC_PUT8(hc->sca_base, dmac->dsr, SCA_DSR_DE);  /* Enable DMA */
1615 }
1616
1617 /*
1618  * Configure the TX DMA descriptors.
1619  * Initialize the needed values and chain the descriptors.
1620  */
1621 static void
1622 sr_init_tx_dmac(struct sr_softc *sc)
1623 {
1624         int blk;
1625         u_int txbuf, txda, txda_d;
1626         struct sr_hardc *hc;
1627         sca_descriptor *txd;
1628         dmac_channel *dmac;
1629         struct buf_block *blkp;
1630         u_int x;
1631         u_int sarb_v;
1632
1633 #if BUGGY > 0
1634         kprintf("sr_init_tx_dmac(sc=%08x)\n", sc);
1635 #endif
1636
1637         hc = sc->hc;
1638         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
1639
1640         /*
1641          * Initialize the array of descriptors for transmission
1642          */
1643         for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1644                 blkp = &sc->block[blk];
1645                 txd = (sca_descriptor *)(hc->mem_start
1646                                          + (blkp->txdesc & hc->winmsk));
1647                 txda_d = (u_int) hc->mem_start
1648                     - (blkp->txdesc & ~hc->winmsk);
1649
1650                 x = 0;
1651                 txbuf = blkp->txstart;
1652                 for (; txbuf < blkp->txend; txbuf += SR_BUF_SIZ, txd++) {
1653                         txda = (u_int) & txd[1] - txda_d + hc->mem_pstart;
1654                         txd->cp = (u_short)(txda & 0xffff);
1655
1656                         txd->bp = (u_short)((txbuf + hc->mem_pstart)
1657                                             & 0xffff);
1658                         txd->bpb = (u_char)(((txbuf + hc->mem_pstart) >> 16)
1659                                             & 0xff);
1660                         txd->len = 0;
1661                         txd->stat = 0;
1662                         x++;
1663                 }
1664
1665                 txd--;
1666                 txd->cp = (u_short)((blkp->txdesc + hc->mem_pstart)
1667                                     & 0xffff);
1668
1669                 blkp->txtail = (u_int)txd - (u_int)hc->mem_start;
1670         }
1671
1672         SRC_PUT8(hc->sca_base, dmac->dsr, 0);   /* Disable DMA */
1673         SRC_PUT8(hc->sca_base, dmac->dcr, SCA_DCR_ABRT);
1674         SRC_PUT8(hc->sca_base, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1675         SRC_PUT8(hc->sca_base, dmac->dir,
1676                  SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF);
1677
1678         sarb_v = (sc->block[0].txdesc + hc->mem_pstart) >> 16;
1679         sarb_v &= 0x00ff;
1680
1681         SRC_PUT8(hc->sca_base, dmac->sarb, (u_char) sarb_v);
1682 }
1683
1684 /*
1685  * Look through the descriptors to see if there is a complete packet
1686  * available. Stop if we get to where the sca is busy.
1687  *
1688  * Return the length and status of the packet.
1689  * Return nonzero if there is a packet available.
1690  *
1691  * NOTE:
1692  * It seems that we get the interrupt a bit early. The updateing of
1693  * descriptor values is not always completed when this is called.
1694  */
1695 static int
1696 sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat)
1697 {
1698         int granules;   /* count of granules in pkt */
1699         int wki, wko;
1700         struct sr_hardc *hc;
1701         sca_descriptor *rxdesc; /* current descriptor */
1702         sca_descriptor *endp;   /* ending descriptor */
1703         sca_descriptor *cda;    /* starting descriptor */
1704
1705         hc = sc->hc;            /* get card's information */
1706
1707         /*
1708          * set up starting descriptor by pulling that info from the DMA half
1709          * of the HD chip...
1710          */
1711         wki = DMAC_RXCH(sc->scachan);
1712         wko = SRC_GET16(hc->sca_base, hc->sca->dmac[wki].cda);
1713
1714         cda = (sca_descriptor *)(hc->mem_start + (wko & hc->winmsk));
1715
1716 #if BUGGY > 1
1717         kprintf("sr_packet_avail(): wki=%d, wko=%04x, cda=%08x\n",
1718                wki, wko, cda);
1719 #endif
1720
1721         /*
1722          * open the appropriate memory window and set our expectations...
1723          */
1724         rxdesc = (sca_descriptor *)
1725             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1726         endp = rxdesc;
1727         rxdesc = &rxdesc[sc->rxhind];
1728         endp = &endp[sc->rxmax];
1729
1730         *len = 0;               /* reset result total length */
1731         granules = 0;           /* reset count of granules */
1732
1733         /*
1734          * This loop will scan descriptors, but it *will* puke up if we wrap
1735          * around to our starting point...
1736          */
1737         while (rxdesc != cda) {
1738                 *len += rxdesc->len;    /* increment result length */
1739                 granules++;
1740
1741                 /*
1742                  * If we hit a valid packet's completion we'll know we've
1743                  * got a live one, and that we can deliver the packet.
1744                  * Since we're only allowed to report a packet available,
1745                  * somebody else does that...
1746                  */
1747                 if (rxdesc->stat & SCA_DESC_EOM) {      /* End Of Message */
1748                         *rxstat = rxdesc->stat; /* return closing */
1749 #if BUGGY > 0
1750                         kprintf("sr%d: PKT AVAIL len %d, %x, bufs %u.\n",
1751                                sc->unit, *len, *rxstat, granules);
1752 #endif
1753                         return 1;       /* indicate success */
1754                 }
1755                 /*
1756                  * OK, this packet take up multiple granules.  Move on to
1757                  * the next descriptor so we can consider it...
1758                  */
1759                 rxdesc++;
1760
1761                 if (rxdesc == endp)     /* recognize & act on wrap point */
1762                         rxdesc = (sca_descriptor *)
1763                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1764         }
1765
1766         /*
1767          * Nothing found in the DPRAM.  Let the caller know...
1768          */
1769         *len = 0;
1770         *rxstat = 0;
1771
1772         return 0;
1773 }
1774
1775 /*
1776  * Copy a packet from the on card memory into a provided mbuf.
1777  * Take into account that buffers wrap and that a packet may
1778  * be larger than a buffer.
1779  */
1780 static void
1781 sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len)
1782 {
1783         struct sr_hardc *hc;
1784         sca_descriptor *rxdesc;
1785         u_int rxdata;
1786         u_int rxmax;
1787         u_int off = 0;
1788         u_int tlen;
1789
1790 #if BUGGY > 0
1791         kprintf("sr_copy_rxbuf(m=%08x,sc=%08x,len=%d)\n",
1792                m, sc, len);
1793 #endif
1794
1795         hc = sc->hc;
1796
1797         rxdata = sc->rxstart + (sc->rxhind * SR_BUF_SIZ);
1798         rxmax = sc->rxstart + (sc->rxmax * SR_BUF_SIZ);
1799
1800         rxdesc = (sca_descriptor *)
1801             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1802         rxdesc = &rxdesc[sc->rxhind];
1803
1804         /*
1805          * Using the count of bytes in the received packet, we decrement it
1806          * for each granule (controller by an SCA descriptor) to control the
1807          * looping...
1808          */
1809         while (len) {
1810                 /*
1811                  * tlen gets the length of *this* granule... ...which is
1812                  * then copied to the target buffer.
1813                  */
1814                 tlen = (len < SR_BUF_SIZ) ? len : SR_BUF_SIZ;
1815
1816                 bcopy(hc->mem_start + (rxdata & hc->winmsk),
1817                       mtod(m, caddr_t) +off,
1818                       tlen);
1819
1820                 off += tlen;
1821                 len -= tlen;
1822
1823                 /*
1824                  * now, return to the descriptor's window in DPRAM and reset
1825                  * the descriptor we've just suctioned...
1826                  */
1827
1828                 rxdesc->len = 0;
1829                 rxdesc->stat = 0xff;
1830
1831                 /*
1832                  * Move on to the next granule.  If we've any remaining
1833                  * bytes to process we'll just continue in our loop...
1834                  */
1835                 rxdata += SR_BUF_SIZ;
1836                 rxdesc++;
1837
1838                 if (rxdata == rxmax) {  /* handle the wrap point */
1839                         rxdata = sc->rxstart;
1840                         rxdesc = (sca_descriptor *)
1841                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1842                 }
1843         }
1844 }
1845
1846 /*
1847  * If single is set, just eat a packet. Otherwise eat everything up to
1848  * where cda points. Update pointers to point to the next packet.
1849  *
1850  * This handles "flushing" of a packet as received...
1851  *
1852  * If the "single" parameter is zero, all pending reeceive traffic will
1853  * be flushed out of existence.  A non-zero value will only drop the
1854  * *next* (currently) pending packet...
1855  */
1856 static void
1857 sr_eat_packet(struct sr_softc *sc, int single)
1858 {
1859         struct sr_hardc *hc;
1860         sca_descriptor *rxdesc; /* current descriptor being eval'd */
1861         sca_descriptor *endp;   /* last descriptor in chain */
1862         sca_descriptor *cda;    /* current start point */
1863         u_int loopcnt = 0;      /* count of packets flushed ??? */
1864         u_char stat;            /* captured status byte from descr */
1865
1866         hc = sc->hc;
1867         cda = (sca_descriptor *)(hc->mem_start +
1868                                  (SRC_GET16(hc->sca_base,
1869                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda) &
1870                                   hc->winmsk));
1871
1872         /*
1873          * loop until desc->stat == (0xff || EOM) Clear the status and
1874          * length in the descriptor. Increment the descriptor.
1875          */
1876
1877         rxdesc = (sca_descriptor *)
1878             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1879         endp = rxdesc;
1880         rxdesc = &rxdesc[sc->rxhind];
1881         endp = &endp[sc->rxmax];
1882
1883         /*
1884          * allow loop, but abort it if we wrap completely...
1885          */
1886         while (rxdesc != cda) {
1887                 loopcnt++;
1888
1889                 if (loopcnt > sc->rxmax) {
1890                         kprintf("sr%d: eat pkt %d loop, cda %x, "
1891                                "rxdesc %x, stat %x.\n",
1892                                sc->unit, loopcnt, (u_int) cda, (u_int) rxdesc,
1893                                rxdesc->stat);
1894                         break;
1895                 }
1896                 stat = rxdesc->stat;
1897
1898                 rxdesc->len = 0;
1899                 rxdesc->stat = 0xff;
1900
1901                 rxdesc++;
1902                 sc->rxhind++;
1903
1904                 if (rxdesc == endp) {
1905                         rxdesc = (sca_descriptor *)
1906                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1907                         sc->rxhind = 0;
1908                 }
1909                 if (single && (stat == SCA_DESC_EOM))
1910                         break;
1911         }
1912
1913         /*
1914          * Update the eda to the previous descriptor.
1915          */
1916         rxdesc = (sca_descriptor *)sc->rxdesc;
1917         rxdesc = &rxdesc[(sc->rxhind + sc->rxmax - 2) % sc->rxmax];
1918
1919         SRC_PUT16(hc->sca_base,
1920                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
1921                   (u_short)((u_int)(rxdesc + hc->mem_pstart) & 0xffff));
1922 }
1923
1924 /*
1925  * While there is packets available in the rx buffer, read them out
1926  * into mbufs and ship them off.
1927  */
1928 static void
1929 sr_get_packets(struct sr_softc *sc)
1930 {
1931         u_char rxstat;          /* acquired status byte */
1932         int i;
1933         int pkts;               /* count of packets found */
1934         int rxndx;              /* rcv buffer index */
1935         int tries;              /* settling time counter */
1936         u_int len;              /* length of pending packet */
1937         struct sr_hardc *hc;    /* card-level information */
1938         sca_descriptor *rxdesc; /* descriptor in memory */
1939 #ifndef NETGRAPH
1940         struct ifnet *ifp;      /* network intf ctl table */
1941 #endif /* NETGRAPH */
1942         struct mbuf *m = NULL;  /* message buffer */
1943
1944 #if BUGGY > 0
1945         kprintf("sr_get_packets(sc=%08x)\n", sc);
1946 #endif
1947
1948         hc = sc->hc;
1949 #ifndef NETGRAPH
1950         ifp = &sc->ifsppp.pp_if;
1951 #endif /* NETGRAPH */
1952
1953         pkts = 0;               /* reset count of found packets */
1954
1955         /*
1956          * for each complete packet in the receiving pool, process each
1957          * packet...
1958          */
1959         while (sr_packet_avail(sc, &len, &rxstat)) {    /* packet pending? */
1960                 /*
1961                  * I have seen situations where we got the interrupt but the
1962                  * status value wasn't deposited.  This code should allow
1963                  * the status byte's value to settle...
1964                  */
1965
1966                 tries = 5;
1967
1968                 while ((rxstat == 0x00ff)
1969                        && --tries)
1970                         sr_packet_avail(sc, &len, &rxstat);
1971
1972 #if BUGGY > 1
1973                 kprintf("sr_packet_avail() returned len=%d, rxstat=%02ux\n",
1974                        len, rxstat);
1975 #endif
1976
1977                 pkts++;
1978 #ifdef NETGRAPH
1979                 sc->inbytes += len;
1980                 sc->inlast = 0;
1981 #endif /* NETGRAPH */
1982
1983                 /*
1984                  * OK, we've settled the incoming message status. We can now
1985                  * process it...
1986                  */
1987                 if (((rxstat & SCA_DESC_ERRORS) == 0) && (len < MCLBYTES)) {
1988 #if BUGGY > 1
1989                         kprintf("sr%d: sr_get_packet() rxstat=%02x, len=%d\n",
1990                                sc->unit, rxstat, len);
1991 #endif
1992
1993                         MGETHDR(m, MB_DONTWAIT, MT_DATA);
1994                         if (m == NULL) {
1995                                 /*
1996                                  * eat (flush) packet if get mbuf fail!!
1997                                  */
1998                                 sr_eat_packet(sc, 1);
1999                                 continue;
2000                         }
2001                         /*
2002                          * construct control information for pass-off
2003                          */
2004 #ifndef NETGRAPH
2005                         m->m_pkthdr.rcvif = ifp;
2006 #else
2007                         m->m_pkthdr.rcvif = NULL;
2008 #endif /* NETGRAPH */
2009                         m->m_pkthdr.len = m->m_len = len;
2010                         if (len > MHLEN) {
2011                                 MCLGET(m, MB_DONTWAIT);
2012                                 if ((m->m_flags & M_EXT) == 0) {
2013                                         /*
2014                                          * We couldn't get a big enough
2015                                          * message packet, so we'll send the
2016                                          * packet to /dev/null...
2017                                          */
2018                                         m_freem(m);
2019                                         sr_eat_packet(sc, 1);
2020                                         continue;
2021                                 }
2022                         }
2023                         /*
2024                          * OK, we've got a good message buffer.  Now we can
2025                          * copy the received message into it
2026                          */
2027                         sr_copy_rxbuf(m, sc, len);      /* copy from DPRAM */
2028
2029 #ifndef NETGRAPH
2030                         BPF_MTAP(ifp, m);
2031
2032 #if BUGGY > 3
2033                         {
2034                                 u_char *bp;
2035
2036                                 bp = (u_char *)m;
2037                                 kprintf("sr%d: rcvd=%02x%02x%02x%02x%02x%02x\n",
2038                                        sc->unit,
2039                                        bp[0], bp[1], bp[2],
2040                                        bp[4], bp[5], bp[6]);
2041                         }
2042 #endif
2043                         sppp_input(ifp, m);
2044                         ifp->if_ipackets++;
2045
2046 #else   /* NETGRAPH */
2047 #if BUGGY > 3
2048                         {
2049                                 u_char *bp;
2050
2051                                 bp = mtod(m,u_char *);
2052                                 kprintf("sr%d: rd=%02x:%02x:%02x:%02x:%02x:%02x",
2053                                        sc->unit,
2054                                        bp[0], bp[1], bp[2],
2055                                        bp[4], bp[5], bp[6]);
2056                                 kprintf(":%02x:%02x:%02x:%02x:%02x:%02x\n",
2057                                        bp[6], bp[7], bp[8],
2058                                        bp[9], bp[10], bp[11]);
2059                         }
2060 #endif
2061                         ng_queue_data(sc->hook, m, NULL);
2062                         sc->ipackets++;
2063 #endif /* NETGRAPH */
2064                         /*
2065                          * Update the eda to the previous descriptor.
2066                          */
2067                         i = (len + SR_BUF_SIZ - 1) / SR_BUF_SIZ;
2068                         sc->rxhind = (sc->rxhind + i) % sc->rxmax;
2069
2070                         rxdesc = (sca_descriptor *)sc->rxdesc;
2071                         rxndx = (sc->rxhind + sc->rxmax - 2) % sc->rxmax;
2072                         rxdesc = &rxdesc[rxndx];
2073
2074                         SRC_PUT16(hc->sca_base,
2075                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
2076                                   (u_short)((u_int)(rxdesc + hc->mem_pstart)
2077                                              & 0xffff));
2078
2079                 } else {
2080                         int got_st3, got_cda, got_eda;
2081                         int tries = 5;
2082
2083                         while ((rxstat == 0xff) && --tries)
2084                                 sr_packet_avail(sc, &len, &rxstat);
2085
2086                         /*
2087                          * It look like we get an interrupt early
2088                          * sometimes and then the status is not
2089                          * filled in yet.
2090                          */
2091                         if (tries && (tries != 5))
2092                                 continue;
2093
2094                         /*
2095                          * This chunk of code handles the error packets.
2096                          * We'll log them for posterity...
2097                          */
2098                         sr_eat_packet(sc, 1);
2099
2100 #ifndef NETGRAPH
2101                         ifp->if_ierrors++;
2102 #else
2103                         sc->ierrors[0]++;
2104 #endif /* NETGRAPH */
2105
2106                         got_st3 = SRC_GET8(hc->sca_base,
2107                                   hc->sca->msci[sc->scachan].st3);
2108                         got_cda = SRC_GET16(hc->sca_base,
2109                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda);
2110                         got_eda = SRC_GET16(hc->sca_base,
2111                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda);
2112
2113 #if BUGGY > 0
2114                         kprintf("sr%d: Receive error chan %d, "
2115                                "stat %02x, msci st3 %02x,"
2116                                "rxhind %d, cda %04x, eda %04x.\n",
2117                                sc->unit, sc->scachan, rxstat,
2118                                got_st3, sc->rxhind, got_cda, got_eda);
2119 #endif
2120                 }
2121         }
2122
2123 #if BUGGY > 0
2124         kprintf("sr%d: sr_get_packets() found %d packet(s)\n",
2125                sc->unit, pkts);
2126 #endif
2127 }
2128
2129 /*
2130  * All DMA interrupts come here.
2131  *
2132  * Each channel has two interrupts.
2133  * Interrupt A for errors and Interrupt B for normal stuff like end
2134  * of transmit or receive dmas.
2135  */
2136 static void
2137 sr_dmac_intr(struct sr_hardc *hc, u_char isr1)
2138 {
2139         u_char dsr;             /* contents of DMA Stat Reg */
2140         u_char dotxstart;       /* enables for tranmit part */
2141         int mch;                /* channel being processed */
2142         struct sr_softc *sc;    /* channel's softc structure */
2143         sca_regs *sca = hc->sca;
2144         dmac_channel *dmac;     /* dma structure of chip */
2145
2146 #if BUGGY > 0
2147         kprintf("sr_dmac_intr(hc=%08x,isr1=%04x)\n", hc, isr1);
2148 #endif
2149
2150         mch = 0;                /* assume chan0 on card */
2151         dotxstart = isr1;       /* copy for xmitter starts */
2152
2153         /*
2154          * Shortcut if there is no interrupts for dma channel 0 or 1.
2155          * Skip processing for channel 0 if no incoming hit
2156          */
2157         if ((isr1 & 0x0F) == 0) {
2158                 mch = 1;
2159                 isr1 >>= 4;
2160         }
2161         do {
2162                 sc = &hc->sc[mch];
2163
2164                 /*
2165                  * Transmit channel - DMA Status Register Evaluation
2166                  */
2167                 if (isr1 & 0x0C) {
2168                         dmac = &sca->dmac[DMAC_TXCH(mch)];
2169
2170                         /*
2171                          * get the DMA Status Register contents and write
2172                          * back to reset interrupt...
2173                          */
2174                         dsr = SRC_GET8(hc->sca_base, dmac->dsr);
2175                         SRC_PUT8(hc->sca_base, dmac->dsr, dsr);
2176
2177                         /*
2178                          * Check for (& process) a Counter overflow
2179                          */
2180                         if (dsr & SCA_DSR_COF) {
2181                                 kprintf("sr%d: TX DMA Counter overflow, "
2182                                        "txpacket no %lu.\n",
2183 #ifndef NETGRAPH
2184                                        sc->unit, sc->ifsppp.pp_if.if_opackets);
2185                                 sc->ifsppp.pp_if.if_oerrors++;
2186 #else
2187                                        sc->unit, sc->opackets);
2188                                 sc->oerrors++;
2189 #endif /* NETGRAPH */
2190                         }
2191                         /*
2192                          * Check for (& process) a Buffer overflow
2193                          */
2194                         if (dsr & SCA_DSR_BOF) {
2195                                 kprintf("sr%d: TX DMA Buffer overflow, "
2196                                        "txpacket no %lu, dsr %02x, "
2197                                        "cda %04x, eda %04x.\n",
2198 #ifndef NETGRAPH
2199                                        sc->unit, sc->ifsppp.pp_if.if_opackets,
2200 #else
2201                                        sc->unit, sc->opackets,
2202 #endif /* NETGRAPH */
2203                                        dsr,
2204                                        SRC_GET16(hc->sca_base, dmac->cda),
2205                                        SRC_GET16(hc->sca_base, dmac->eda));
2206 #ifndef NETGRAPH
2207                                 sc->ifsppp.pp_if.if_oerrors++;
2208 #else
2209                                 sc->oerrors++;
2210 #endif /* NETGRAPH */
2211                         }
2212                         /*
2213                          * Check for (& process) an End of Transfer (OK)
2214                          */
2215                         if (dsr & SCA_DSR_EOT) {
2216                                 /*
2217                                  * This should be the most common case.
2218                                  *
2219                                  * Clear the IFF_OACTIVE flag.
2220                                  *
2221                                  * Call srstart to start a new transmit if
2222                                  * there is data to transmit.
2223                                  */
2224 #if BUGGY > 0
2225                                 kprintf("sr%d: TX Completed OK\n", sc->unit);
2226 #endif
2227                                 sc->xmit_busy = 0;
2228 #ifndef NETGRAPH
2229                                 sc->ifsppp.pp_if.if_flags &= ~IFF_OACTIVE;
2230                                 sc->ifsppp.pp_if.if_timer = 0;
2231 #else
2232                                 /* XXX may need to mark tx inactive? */
2233                                 sc->out_deficit++;
2234                                 sc->out_dog = DOG_HOLDOFF;
2235 #endif /* NETGRAPH */
2236
2237                                 if (sc->txb_inuse && --sc->txb_inuse)
2238                                         sr_xmit(sc);
2239                         }
2240                 }
2241                 /*
2242                  * Receive channel processing of DMA Status Register
2243                  */
2244                 if (isr1 & 0x03) {
2245                         dmac = &sca->dmac[DMAC_RXCH(mch)];
2246
2247                         dsr = SRC_GET8(hc->sca_base, dmac->dsr);
2248                         SRC_PUT8(hc->sca_base, dmac->dsr, dsr);
2249
2250                         /*
2251                          * End of frame processing (MSG OK?)
2252                          */
2253                         if (dsr & SCA_DSR_EOM) {
2254 #if BUGGY > 0
2255                                 int tt, ind;
2256
2257 #ifndef NETGRAPH
2258                                 tt = sc->ifsppp.pp_if.if_ipackets;
2259 #else   /* NETGRAPH */
2260                                 tt = sc->ipackets;
2261 #endif /* NETGRAPH */
2262                                 ind = sc->rxhind;
2263 #endif
2264
2265                                 sr_get_packets(sc);
2266 #if BUGGY > 0
2267 #ifndef NETGRAPH
2268                                 if (tt == sc->ifsppp.pp_if.if_ipackets)
2269 #else   /* NETGRAPH */
2270                                 if (tt == sc->ipackets)
2271 #endif /* NETGRAPH */
2272                                 {
2273                                         sca_descriptor *rxdesc;
2274                                         int i;
2275
2276                                         kprintf("SR: RXINTR isr1 %x, dsr %x, "
2277                                                "no data %d pkts, orxind %d.\n",
2278                                                dotxstart, dsr, tt, ind);
2279                                         kprintf("SR: rxdesc %x, rxstart %x, "
2280                                                "rxend %x, rxhind %d, "
2281                                                "rxmax %d.\n",
2282                                                sc->rxdesc, sc->rxstart,
2283                                                sc->rxend, sc->rxhind,
2284                                                sc->rxmax);
2285                                         kprintf("SR: cda %x, eda %x.\n",
2286                                             SRC_GET16(hc->sca_base, dmac->cda),
2287                                             SRC_GET16(hc->sca_base, dmac->eda));
2288
2289                                         rxdesc = (sca_descriptor *)
2290                                                  (hc->mem_start +
2291                                                   (sc->rxdesc & hc->winmsk));
2292                                         rxdesc = &rxdesc[sc->rxhind];
2293
2294                                         for (i = 0; i < 3; i++, rxdesc++)
2295                                                 kprintf("SR: rxdesc->stat %x, "
2296                                                        "len %d.\n",
2297                                                        rxdesc->stat,
2298                                                        rxdesc->len);
2299                                 }
2300 #endif /* BUGGY */
2301                         }
2302                         /*
2303                          * Check for Counter overflow
2304                          */
2305                         if (dsr & SCA_DSR_COF) {
2306                                 kprintf("sr%d: RX DMA Counter overflow, "
2307                                        "rxpkts %lu.\n",
2308 #ifndef NETGRAPH
2309                                        sc->unit, sc->ifsppp.pp_if.if_ipackets);
2310                                 sc->ifsppp.pp_if.if_ierrors++;
2311 #else   /* NETGRAPH */
2312                                        sc->unit, sc->ipackets);
2313                                 sc->ierrors[1]++;
2314 #endif /* NETGRAPH */
2315                         }
2316                         /*
2317                          * Check for Buffer overflow
2318                          */
2319                         if (dsr & SCA_DSR_BOF) {
2320                                 kprintf("sr%d: RX DMA Buffer overflow, "
2321                                        "rxpkts %lu, rxind %d, "
2322                                        "cda %x, eda %x, dsr %x.\n",
2323 #ifndef NETGRAPH
2324                                        sc->unit, sc->ifsppp.pp_if.if_ipackets,
2325 #else   /* NETGRAPH */
2326                                        sc->unit, sc->ipackets,
2327 #endif /* NETGRAPH */
2328                                        sc->rxhind,
2329                                        SRC_GET16(hc->sca_base, dmac->cda),
2330                                        SRC_GET16(hc->sca_base, dmac->eda),
2331                                        dsr);
2332
2333                                 /*
2334                                  * Make sure we eat as many as possible.
2335                                  * Then get the system running again.
2336                                  */
2337
2338                                 sr_eat_packet(sc, 0);
2339 #ifndef NETGRAPH
2340                                 sc->ifsppp.pp_if.if_ierrors++;
2341 #else   /* NETGRAPH */
2342                                 sc->ierrors[2]++;
2343 #endif /* NETGRAPH */
2344
2345                                 SRC_PUT8(hc->sca_base,
2346                                          sca->msci[mch].cmd,
2347                                          SCA_CMD_RXMSGREJ);
2348
2349                                 SRC_PUT8(hc->sca_base, dmac->dsr, SCA_DSR_DE);
2350
2351 #if BUGGY > 0
2352                                 kprintf("sr%d: RX DMA Buffer overflow, "
2353                                        "rxpkts %lu, rxind %d, "
2354                                        "cda %x, eda %x, dsr %x. After\n",
2355                                        sc->unit,
2356 #ifndef NETGRAPH
2357                                        sc->ipackets,
2358 #else   /* NETGRAPH */
2359                                        sc->ifsppp.pp_if.if_ipackets,
2360 #endif /* NETGRAPH */
2361                                        sc->rxhind,
2362                                        SRC_GET16(hc->sca_base, dmac->cda),
2363                                        SRC_GET16(hc->sca_base, dmac->eda),
2364                                        SRC_GET8(hc->sca_base, dmac->dsr));
2365 #endif
2366                         }
2367                         /*
2368                          * End of Transfer
2369                          */
2370                         if (dsr & SCA_DSR_EOT) {
2371                                 /*
2372                                  * If this happen, it means that we are
2373                                  * receiving faster than what the processor
2374                                  * can handle.
2375                                  *
2376                                  * XXX We should enable the dma again.
2377                                  */
2378                                 kprintf("sr%d: RX End of xfer, rxpkts %lu.\n",
2379                                        sc->unit,
2380 #ifndef NETGRAPH
2381                                        sc->ifsppp.pp_if.if_ipackets);
2382                                 sc->ifsppp.pp_if.if_ierrors++;
2383 #else
2384                                        sc->ipackets);
2385                                 sc->ierrors[3]++;
2386 #endif /* NETGRAPH */
2387                         }
2388                 }
2389                 isr1 >>= 4;     /* process next half of ISR */
2390                 mch++;          /* and move to next channel */
2391         } while ((mch < NCHAN) && isr1);        /* loop for each chn */
2392
2393         /*
2394          * Now that we have done all the urgent things, see if we can fill
2395          * the transmit buffers.
2396          */
2397         for (mch = 0; mch < NCHAN; mch++) {
2398                 if (dotxstart & 0x0C) { /* TX initiation enabled? */
2399                         sc = &hc->sc[mch];
2400 #ifndef NETGRAPH
2401                         srstart(&sc->ifsppp.pp_if);
2402 #else
2403                         srstart(sc);
2404 #endif /* NETGRAPH */
2405                 }
2406                 dotxstart >>= 4;/* shift for next channel */
2407         }
2408 }
2409 #ifndef NETGRAPH
2410 #ifdef USE_MODEMCK
2411 /*
2412  * Perform timeout on an FR channel
2413  *
2414  * Establish a periodic check of open N2 ports;  If
2415  * a port is open/active, its DCD state is checked
2416  * and a loss of DCD is recognized (and eventually
2417  * processed).
2418  */
2419 static void
2420 sr_modemck(void *arg)
2421 {
2422         int card;               /* card index in table */
2423         int cards;              /* card list index */
2424         int mch;                /* channel on card */
2425         u_char dcd_v;           /* Data Carrier Detect */
2426         u_char got_st0;         /* contents of ST0 */
2427         u_char got_st1;         /* contents of ST1 */
2428         u_char got_st2;         /* contents of ST2 */
2429         u_char got_st3;         /* contents of ST3 */
2430         struct sr_hardc *hc;    /* card's configuration */
2431         struct sr_hardc *Card[16];/* up to 16 cards in system */
2432         struct sr_softc *sc;    /* channel's softc structure */
2433         struct ifnet *ifp;      /* interface control table */
2434         msci_channel *msci;     /* regs specific to channel */
2435
2436         crit_enter();
2437
2438 #if     0
2439         if (sr_opens == 0) {    /* count of "up" channels */
2440                 sr_watcher = 0; /* indicate no watcher */
2441
2442                 crit_exit();
2443
2444                 return;
2445         }
2446 #endif
2447
2448         sr_watcher = 1;         /* mark that we're online */
2449
2450         /*
2451          * Now we'll need a list of cards to process.  Since we can handle
2452          * both ISA and PCI cards (and I didn't think of making this logic
2453          * global YET) we'll generate a single table of card table
2454          * addresses.
2455          */
2456         cards = 0;
2457
2458         for (card = 0; card < NSR; card++) {
2459                 hc = &sr_hardc[card];
2460
2461                 if (hc->sc == NULL)
2462                         continue;
2463
2464                 Card[cards++] = hc;
2465         }
2466
2467         hc = sr_hardc_pci;
2468
2469         while (hc) {
2470                 Card[cards++] = hc;
2471                 hc = hc->next;
2472         }
2473
2474         /*
2475          * OK, we've got work we can do.  Let's do it... (Please note that
2476          * this code _only_ deals w/ ISA cards)
2477          */
2478         for (card = 0; card < cards; card++) {
2479                 hc = Card[card];/* get card table */
2480
2481                 for (mch = 0; mch < hc->numports; mch++) {
2482                         sc = &hc->sc[mch];
2483
2484                         ifp = &sc->ifsppp.pp_if;
2485
2486                         /*
2487                          * if this channel isn't "up", skip it
2488                          */
2489                         if ((ifp->if_flags & IFF_UP) == 0)
2490                                 continue;
2491
2492                         /*
2493                          * OK, now we can go looking at this channel's
2494                          * actual register contents...
2495                          */
2496                         msci = &hc->sca->msci[sc->scachan];
2497
2498                         /*
2499                          * OK, now we'll look into the actual status of this
2500                          * channel...
2501                          *
2502                          * I suck in more registers than strictly needed
2503                          */
2504                         got_st0 = SRC_GET8(hc->sca_base, msci->st0);
2505                         got_st1 = SRC_GET8(hc->sca_base, msci->st1);
2506                         got_st2 = SRC_GET8(hc->sca_base, msci->st2);
2507                         got_st3 = SRC_GET8(hc->sca_base, msci->st3);
2508
2509                         /*
2510                          * We want to see if the DCD signal is up (DCD is
2511                          * true if zero)
2512                          */
2513                         dcd_v = (got_st3 & SCA_ST3_DCD) == 0;
2514
2515                         if (dcd_v == 0)
2516                                 kprintf("sr%d: DCD lost\n", sc->unit);
2517                 }
2518         }
2519
2520         /*
2521          * OK, now set up for the next modem signal checking pass...
2522          */
2523         timeout(sr_modemck, NULL, hz);
2524
2525         crit_exit();
2526 }
2527 #endif
2528 #else   /* NETGRAPH */
2529 /*
2530  * If a port is open/active, it's DCD state is checked
2531  * and a loss of DCD is recognized (and eventually processed?).
2532  */
2533 static void
2534 sr_modemck(struct sr_softc *sc )
2535 {
2536         u_char got_st3;                 /* contents of ST3 */
2537         struct sr_hardc *hc = sc->hc;   /* card's configuration */
2538         msci_channel *msci;             /* regs specific to channel */
2539
2540         crit_enter();
2541
2542         if (sc->running == 0) {
2543                 crit_exit();
2544                 return;
2545         }
2546
2547         /*
2548          * OK, now we can go looking at this channel's register contents...
2549          */
2550         msci = &hc->sca->msci[sc->scachan];
2551         got_st3 = SRC_GET8(hc->sca_base, msci->st3);
2552
2553         /*
2554          * We want to see if the DCD signal is up (DCD is true if zero)
2555          */
2556         sc->dcd = (got_st3 & SCA_ST3_DCD) == 0;
2557
2558         crit_exit();
2559 }
2560
2561 #endif  /* NETGRAPH */
2562 static void
2563 sr_msci_intr(struct sr_hardc *hc, u_char isr0)
2564 {
2565         kprintf("src%d: SRINTR: MSCI\n", hc->cunit);
2566 }
2567
2568 static void
2569 sr_timer_intr(struct sr_hardc *hc, u_char isr2)
2570 {
2571         kprintf("src%d: SRINTR: TIMER\n", hc->cunit);
2572 }
2573
2574 #ifdef  NETGRAPH
2575 /*****************************************
2576  * Device timeout/watchdog routine.
2577  * called once per second.
2578  * checks to see that if activity was expected, that it hapenned.
2579  * At present we only look to see if expected output was completed.
2580  */
2581 static void
2582 ngsr_watchdog_frame(void * arg)
2583 {
2584         struct sr_softc * sc = arg;
2585         int     speed;
2586
2587         crit_enter();
2588
2589         if (sc->running == 0) {
2590                 crit_enter();
2591                 return; /* if we are not running let timeouts die */
2592         }
2593         /*
2594          * calculate the apparent throughputs
2595          *  XXX a real hack
2596          */
2597
2598         speed = sc->inbytes - sc->lastinbytes;
2599         sc->lastinbytes = sc->inbytes;
2600         if ( sc->inrate < speed )
2601                 sc->inrate = speed;
2602         speed = sc->outbytes - sc->lastoutbytes;
2603         sc->lastoutbytes = sc->outbytes;
2604         if ( sc->outrate < speed )
2605                 sc->outrate = speed;
2606         sc->inlast++;
2607
2608         crit_exit();
2609
2610         if ((sc->inlast > QUITE_A_WHILE)
2611         && (sc->out_deficit > LOTS_OF_PACKETS)) {
2612                 log(LOG_ERR, "sr%d: No response from remote end\n", sc->unit);
2613
2614                 crit_enter();
2615
2616                 sr_down(sc);
2617                 sr_up(sc);
2618                 sc->inlast = sc->out_deficit = 0;
2619
2620                 crit_exit();
2621         } else if ( sc->xmit_busy ) { /* no TX -> no TX timeouts */
2622                 if (sc->out_dog == 0) {
2623                         log(LOG_ERR, "sr%d: Transmit failure.. no clock?\n",
2624                                         sc->unit);
2625
2626                         crit_enter();
2627
2628                         srwatchdog(sc);
2629 #if 0
2630                         sr_down(sc);
2631                         sr_up(sc);
2632 #endif
2633
2634                         crit_exit();
2635
2636                         sc->inlast = sc->out_deficit = 0;
2637                 } else {
2638                         sc->out_dog--;
2639                 }
2640         }
2641         sr_modemck(sc);         /* update the DCD status */
2642         callout_reset(&sc->sr_timer, hz, ngsr_watchdog_frame, sc);
2643 }
2644
2645 /***********************************************************************
2646  * This section contains the methods for the Netgraph interface
2647  ***********************************************************************/
2648 /*
2649  * It is not possible or allowable to create a node of this type.
2650  * If the hardware exists, it will already have created it.
2651  */
2652 static  int
2653 ngsr_constructor(node_p *nodep)
2654 {
2655         return (EINVAL);
2656 }
2657
2658 /*
2659  * give our ok for a hook to be added...
2660  * If we are not running this should kick the device into life.
2661  * The hook's private info points to our stash of info about that
2662  * channel.
2663  */
2664 static int
2665 ngsr_newhook(node_p node, hook_p hook, const char *name)
2666 {
2667         struct sr_softc *       sc = node->private;
2668
2669         /*
2670          * check if it's our friend the debug hook
2671          */
2672         if (strcmp(name, NG_SR_HOOK_DEBUG) == 0) {
2673                 hook->private = NULL; /* paranoid */
2674                 sc->debug_hook = hook;
2675                 return (0);
2676         }
2677
2678         /*
2679          * Check for raw mode hook.
2680          */
2681         if (strcmp(name, NG_SR_HOOK_RAW) != 0) {
2682                 return (EINVAL);
2683         }
2684         hook->private = sc;
2685         sc->hook = hook;
2686         sc->datahooks++;
2687         sr_up(sc);
2688         return (0);
2689 }
2690
2691 /*
2692  * incoming messages.
2693  * Just respond to the generic TEXT_STATUS message
2694  */
2695 static  int
2696 ngsr_rcvmsg(node_p node,
2697         struct ng_mesg *msg, const char *retaddr, struct ng_mesg **resp)
2698 {
2699         struct sr_softc *       sc;
2700         int error = 0;
2701
2702         sc = node->private;
2703         switch (msg->header.typecookie) {
2704             case        NG_SR_COOKIE:
2705                 error = EINVAL;
2706                 break;
2707             case        NGM_GENERIC_COOKIE:
2708                 switch(msg->header.cmd) {
2709                     case NGM_TEXT_STATUS: {
2710                             char        *arg;
2711                             int pos = 0;
2712                             int resplen = sizeof(struct ng_mesg) + 512;
2713                             *resp = kmalloc(resplen, M_NETGRAPH,
2714                                             M_INTWAIT | M_ZERO);
2715                             if (*resp == NULL) {
2716                                 error = ENOMEM;
2717                                 break;
2718                             }
2719                             arg = (*resp)->data;
2720
2721                             /*
2722                              * Put in the throughput information.
2723                              */
2724                             pos = ksprintf(arg, "%ld bytes in, %ld bytes out\n"
2725                             "highest rate seen: %ld B/S in, %ld B/S out\n",
2726                             sc->inbytes, sc->outbytes,
2727                             sc->inrate, sc->outrate);
2728                             pos += ksprintf(arg + pos,
2729                                 "%ld output errors\n",
2730                                 sc->oerrors);
2731                             pos += ksprintf(arg + pos,
2732                                 "ierrors = %ld, %ld, %ld, %ld, %ld, %ld\n",
2733                                 sc->ierrors[0],
2734                                 sc->ierrors[1],
2735                                 sc->ierrors[2],
2736                                 sc->ierrors[3],
2737                                 sc->ierrors[4],
2738                                 sc->ierrors[5]);
2739
2740                             (*resp)->header.version = NG_VERSION;
2741                             (*resp)->header.arglen = strlen(arg) + 1;
2742                             (*resp)->header.token = msg->header.token;
2743                             (*resp)->header.typecookie = NG_SR_COOKIE;
2744                             (*resp)->header.cmd = msg->header.cmd;
2745                             strlcpy((*resp)->header.cmdstr, "status",
2746                                         NG_CMDSTRSIZ);
2747                         }
2748                         break;
2749                     default:
2750                         error = EINVAL;
2751                         break;
2752                     }
2753                 break;
2754             default:
2755                 error = EINVAL;
2756                 break;
2757         }
2758         kfree(msg, M_NETGRAPH);
2759         return (error);
2760 }
2761
2762 /*
2763  * get data from another node and transmit it to the correct channel
2764  */
2765 static  int
2766 ngsr_rcvdata(hook_p hook, struct mbuf *m, meta_p meta)
2767 {
2768         int error = 0;
2769         struct sr_softc * sc = hook->node->private;
2770         struct ifqueue  *xmitq_p;
2771
2772         /*
2773          * data doesn't come in from just anywhere (e.g control hook)
2774          */
2775         if ( hook->private == NULL) {
2776                 error = ENETDOWN;
2777                 goto bad;
2778         }
2779
2780         /*
2781          * Now queue the data for when it can be sent
2782          */
2783         if (meta && meta->priority > 0) {
2784                 xmitq_p = (&sc->xmitq_hipri);
2785         } else {
2786                 xmitq_p = (&sc->xmitq);
2787         }
2788
2789         crit_enter();
2790
2791         if (IF_QFULL(xmitq_p)) {
2792                 IF_DROP(xmitq_p);
2793
2794                 crit_exit();
2795
2796                 error = ENOBUFS;
2797                 goto bad;
2798         }
2799         IF_ENQUEUE(xmitq_p, m);
2800         srstart(sc);
2801
2802         crit_exit();
2803
2804         return (0);
2805
2806 bad:
2807         /*
2808          * It was an error case.
2809          * check if we need to free the mbuf, and then return the error
2810          */
2811         NG_FREE_DATA(m, meta);
2812         return (error);
2813 }
2814
2815 /*
2816  * do local shutdown processing..
2817  * this node will refuse to go away, unless the hardware says to..
2818  * don't unref the node, or remove our name. just clear our links up.
2819  */
2820 static  int
2821 ngsr_rmnode(node_p node)
2822 {
2823         struct sr_softc * sc = node->private;
2824
2825         sr_down(sc);
2826         ng_cutlinks(node);
2827         node->flags &= ~NG_INVALID; /* bounce back to life */
2828         return (0);
2829 }
2830
2831 /* already linked */
2832 static  int
2833 ngsr_connect(hook_p hook)
2834 {
2835         /* be really amiable and just say "YUP that's OK by me! " */
2836         return (0);
2837 }
2838
2839 /*
2840  * notify on hook disconnection (destruction)
2841  *
2842  * Invalidate the private data associated with this dlci.
2843  * For this type, removal of the last link resets tries to destroy the node.
2844  * As the device still exists, the shutdown method will not actually
2845  * destroy the node, but reset the device and leave it 'fresh' :)
2846  *
2847  * The node removal code will remove all references except that owned by the
2848  * driver.
2849  */
2850 static  int
2851 ngsr_disconnect(hook_p hook)
2852 {
2853         struct sr_softc * sc = hook->node->private;
2854         /*
2855          * If it's the data hook, then free resources etc.
2856          */
2857         if (hook->private) {
2858                 crit_enter();
2859
2860                 sc->datahooks--;
2861                 if (sc->datahooks == 0)
2862                         sr_down(sc);
2863
2864                 crit_exit();
2865         } else {
2866                 sc->debug_hook = NULL;
2867         }
2868         return (0);
2869 }
2870
2871 /*
2872  * called during bootup
2873  * or LKM loading to put this type into the list of known modules
2874  */
2875 static void
2876 ngsr_init(void *ignored)
2877 {
2878         if (ng_newtype(&typestruct))
2879                 kprintf("ngsr install failed\n");
2880         ngsr_done_init = 1;
2881 }
2882 #endif /* NETGRAPH */
2883
2884 /*
2885  ********************************* END ************************************
2886  */