2 * Copyright (c) 1998 - 2006 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.121 2007/02/23 12:18:33 piso Exp $
27 * $DragonFly: src/sys/dev/disk/nata/ata-pci.c,v 1.7 2007/12/02 05:03:17 sephe Exp $
32 #include <sys/param.h>
34 #include <sys/bus_resource.h>
35 #include <sys/malloc.h>
36 #include <sys/module.h>
39 #include <sys/systm.h>
41 #include <bus/pci/pcireg.h>
42 #include <bus/pci/pcivar.h>
49 static MALLOC_DEFINE(M_ATAPCI, "ata_pci", "ATA driver PCI");
52 #define IOMASK 0xfffffffc
53 #define ATA_PROBE_OK -10
55 static const struct none_atapci {
60 } none_atapci_table[] = {
61 /* Appears on Intel PRO/1000 PM */
62 { ATA_INTEL_ID, 0x108d, ATA_INTEL_ID, 0x0000 },
67 ata_legacy(device_t dev)
69 return (((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&&
70 ((pci_read_config(dev, PCIR_PROGIF, 1) &
71 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) !=
72 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) ||
73 (!pci_read_config(dev, PCIR_BAR(0), 4) &&
74 !pci_read_config(dev, PCIR_BAR(1), 4) &&
75 !pci_read_config(dev, PCIR_BAR(2), 4) &&
76 !pci_read_config(dev, PCIR_BAR(3), 4)));
81 ata_pci_probe(device_t dev)
83 if (pci_get_class(dev) != PCIC_STORAGE)
86 switch (pci_get_vendor(dev)) {
88 if (!ata_acard_ident(dev))
91 case ATA_ACER_LABS_ID:
92 if (!ata_ali_ident(dev))
96 if (!ata_amd_ident(dev))
100 if (!ata_ati_ident(dev))
104 if (!ata_cyrix_ident(dev))
108 if (!ata_cypress_ident(dev))
111 case ATA_HIGHPOINT_ID:
112 if (!ata_highpoint_ident(dev))
116 if (!ata_intel_ident(dev))
120 if (!ata_ite_ident(dev))
124 if (!ata_jmicron_ident(dev))
128 if (!ata_marvell_ident(dev))
131 case ATA_NATIONAL_ID:
132 if (!ata_national_ident(dev))
136 if (!ata_netcell_ident(dev))
140 if (!ata_nvidia_ident(dev))
144 if (!ata_promise_ident(dev))
147 case ATA_SERVERWORKS_ID:
148 if (!ata_serverworks_ident(dev))
151 case ATA_SILICON_IMAGE_ID:
152 if (!ata_sii_ident(dev))
156 if (!ata_sis_ident(dev))
160 if (!ata_via_ident(dev))
164 if (pci_get_devid(dev) == ATA_CENATEK_ROCKET) {
165 ata_generic_ident(dev);
166 device_set_desc(dev, "Cenatek Rocket Drive controller");
171 if (pci_get_devid(dev) == ATA_MICRON_RZ1000 ||
172 pci_get_devid(dev) == ATA_MICRON_RZ1001) {
173 ata_generic_ident(dev);
175 "RZ 100? ATA controller !WARNING! data loss/corruption risk");
181 /* unknown chipset, try generic AHCI or DMA if it seems possible */
182 if (pci_get_class(dev) == PCIC_STORAGE) {
183 if (pci_get_subclass(dev) == PCIS_STORAGE_SATA) {
184 if (!ata_genahci_ident(dev))
186 } else if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) {
187 uint16_t vendor, device, subvendor, subdevice;
188 const struct none_atapci *e;
190 vendor = pci_get_vendor(dev);
191 device = pci_get_device(dev);
192 subvendor = pci_get_subvendor(dev);
193 subdevice = pci_get_subdevice(dev);
194 for (e = none_atapci_table; e->vendor != 0xffff; ++e) {
195 if (e->vendor == vendor && e->device == device &&
196 e->subvendor == subvendor && e->subdevice == subdevice)
200 if (!ata_generic_ident(dev))
208 ata_pci_attach(device_t dev)
210 struct ata_pci_controller *ctlr = device_get_softc(dev);
214 /* do chipset specific setups only needed once */
215 if (ata_legacy(dev) || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK)
219 ctlr->allocate = ata_pci_allocate;
220 ctlr->dmainit = ata_pci_dmainit;
223 /* if needed try to enable busmastering */
224 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
225 if (!(cmd & PCIM_CMD_BUSMASTEREN)) {
226 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2);
227 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
230 /* if busmastering mode "stuck" use it */
231 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) {
232 ctlr->r_type1 = SYS_RES_IOPORT;
233 ctlr->r_rid1 = ATA_BMADDR_RID;
234 ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1,
238 if (ctlr->chipinit(dev))
241 /* attach all channels on this controller */
242 for (unit = 0; unit < ctlr->channels; unit++) {
244 if ((unit == 0 || unit == 1) && ata_legacy(dev)) {
245 device_add_child(dev, "ata", unit);
248 /* XXX TGEN devclass_find_free_unit() implementation */
249 while (freeunit < devclass_get_maxunit(ata_devclass) &&
250 devclass_get_device(ata_devclass, freeunit) != NULL)
252 device_add_child(dev, "ata", freeunit);
254 bus_generic_attach(dev);
259 ata_pci_detach(device_t dev)
261 struct ata_pci_controller *ctlr = device_get_softc(dev);
265 /* detach & delete all children */
266 if (!device_get_children(dev, &children, &nchildren)) {
267 for (i = 0; i < nchildren; i++)
268 device_delete_child(dev, children[i]);
269 kfree(children, M_TEMP);
273 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle);
274 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq);
277 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2);
279 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1);
285 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
286 u_long start, u_long end, u_long count, u_int flags)
288 struct ata_pci_controller *controller = device_get_softc(dev);
289 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
290 struct resource *res = NULL;
293 if (type == SYS_RES_IOPORT) {
296 if (ata_legacy(dev)) {
297 start = (unit ? ATA_SECONDARY : ATA_PRIMARY);
299 end = start + count - 1;
301 myrid = PCIR_BAR(0) + (unit << 3);
302 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
303 SYS_RES_IOPORT, &myrid,
304 start, end, count, flags);
307 case ATA_CTLADDR_RID:
308 if (ata_legacy(dev)) {
309 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_CTLOFFSET;
310 count = ATA_CTLIOSIZE;
311 end = start + count - 1;
313 myrid = PCIR_BAR(1) + (unit << 3);
314 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
315 SYS_RES_IOPORT, &myrid,
316 start, end, count, flags);
320 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
321 if (ata_legacy(dev)) {
322 int irq = (unit == 0 ? 14 : 15);
324 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
325 SYS_RES_IRQ, rid, irq, irq, 1, flags);
328 res = controller->r_irq;
334 ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
337 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
339 if (type == SYS_RES_IOPORT) {
342 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
344 PCIR_BAR(0) + (unit << 3), r);
347 case ATA_CTLADDR_RID:
348 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
350 PCIR_BAR(1) + (unit << 3), r);
356 if (type == SYS_RES_IRQ) {
357 if (rid != ATA_IRQ_RID)
360 if (ata_legacy(dev)) {
361 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
362 SYS_RES_IRQ, rid, r);
371 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
372 int flags, driver_intr_t *function, void *argument,
375 if (ata_legacy(dev)) {
376 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
377 flags, function, argument, cookiep, NULL);
380 struct ata_pci_controller *controller = device_get_softc(dev);
381 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
383 controller->interrupt[unit].function = function;
384 controller->interrupt[unit].argument = argument;
385 *cookiep = controller;
391 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
394 if (ata_legacy(dev)) {
395 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
398 struct ata_pci_controller *controller = device_get_softc(dev);
399 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
401 controller->interrupt[unit].function = NULL;
402 controller->interrupt[unit].argument = NULL;
408 ata_pci_allocate(device_t dev)
410 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
411 struct ata_channel *ch = device_get_softc(dev);
412 struct resource *io = NULL, *ctlio = NULL;
415 rid = ATA_IOADDR_RID;
416 if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE)))
419 rid = ATA_CTLADDR_RID;
420 if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){
421 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
425 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) {
426 ch->r_io[i].res = io;
427 ch->r_io[i].offset = i;
429 ch->r_io[ATA_CONTROL].res = ctlio;
430 ch->r_io[ATA_CONTROL].offset = ata_legacy(device_get_parent(dev)) ? 0 : 2;
431 ch->r_io[ATA_IDX_ADDR].res = io;
432 ata_default_registers(dev);
434 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
435 ch->r_io[i].res = ctlr->r_res1;
436 ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE);
445 ata_pci_hw(device_t dev)
447 struct ata_channel *ch = device_get_softc(dev);
450 ch->hw.status = ata_pci_status;
454 ata_pci_status(device_t dev)
456 struct ata_channel *ch = device_get_softc(dev);
458 if ((dumping || !ata_legacy(device_get_parent(dev))) &&
459 ch->dma && ((ch->flags & ATA_ALWAYS_DMASTAT) ||
460 (ch->dma->flags & ATA_DMA_ACTIVE))) {
461 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
463 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
464 ATA_BMSTAT_INTERRUPT)
466 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
469 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
471 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
478 ata_pci_dmastart(device_t dev)
480 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
483 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
484 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
485 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->sg_bus);
486 ch->dma->flags |= ATA_DMA_ACTIVE;
487 val = ATA_IDX_INB(ch, ATA_BMCMD_PORT);
488 if (ch->dma->flags & ATA_DMA_READ)
489 val |= ATA_BMCMD_WRITE_READ;
491 val &= ~ATA_BMCMD_WRITE_READ;
492 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val);
495 * Issue the start command separately from configuration setup,
496 * in case the hardware latches portions of the configuration.
498 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val | ATA_BMCMD_START_STOP);
504 ata_pci_dmastop(device_t dev)
506 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
509 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
510 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
511 ch->dma->flags &= ~ATA_DMA_ACTIVE;
512 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
513 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
518 ata_pci_dmareset(device_t dev)
520 struct ata_channel *ch = device_get_softc(dev);
522 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
523 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
524 ch->dma->flags &= ~ATA_DMA_ACTIVE;
525 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
526 ch->dma->unload(dev);
530 ata_pci_dmainit(device_t dev)
532 struct ata_channel *ch = device_get_softc(dev);
536 ch->dma->start = ata_pci_dmastart;
537 ch->dma->stop = ata_pci_dmastop;
538 ch->dma->reset = ata_pci_dmareset;
542 static device_method_t ata_pci_methods[] = {
543 /* device interface */
544 DEVMETHOD(device_probe, ata_pci_probe),
545 DEVMETHOD(device_attach, ata_pci_attach),
546 DEVMETHOD(device_detach, ata_pci_detach),
547 DEVMETHOD(device_shutdown, bus_generic_shutdown),
548 DEVMETHOD(device_suspend, bus_generic_suspend),
549 DEVMETHOD(device_resume, bus_generic_resume),
552 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
553 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
554 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
555 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
556 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
557 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
562 devclass_t atapci_devclass;
564 static driver_t ata_pci_driver = {
567 sizeof(struct ata_pci_controller),
570 DRIVER_MODULE(atapci, pci, ata_pci_driver, atapci_devclass, 0, 0);
571 MODULE_VERSION(atapci, 1);
572 MODULE_DEPEND(atapci, ata, 1, 1, 1);
575 ata_pcichannel_probe(device_t dev)
577 struct ata_channel *ch = device_get_softc(dev);
582 /* take care of green memory */
583 bzero(ch, sizeof(struct ata_channel));
585 /* find channel number on this controller */
586 device_get_children(device_get_parent(dev), &children, &count);
587 for (i = 0; i < count; i++) {
588 if (children[i] == dev)
591 kfree(children, M_TEMP);
593 ksprintf(buffer, "ATA channel %d", ch->unit);
594 device_set_desc_copy(dev, buffer);
596 return ata_probe(dev);
600 ata_pcichannel_attach(device_t dev)
602 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
603 struct ata_channel *ch = device_get_softc(dev);
611 if ((error = ctlr->allocate(dev))) {
617 return ata_attach(dev);
621 ata_pcichannel_detach(device_t dev)
623 struct ata_channel *ch = device_get_softc(dev);
626 if ((error = ata_detach(dev)))
632 /* XXX SOS free resources for io and ctlio ?? */
638 ata_pcichannel_locking(device_t dev, int mode)
640 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
641 struct ata_channel *ch = device_get_softc(dev);
644 return ctlr->locking(dev, mode);
650 ata_pcichannel_reset(device_t dev)
652 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
653 struct ata_channel *ch = device_get_softc(dev);
655 /* if DMA engine present reset it */
659 ch->dma->unload(dev);
662 /* reset the controller HW */
666 ata_generic_reset(dev);
670 ata_pcichannel_setmode(device_t parent, device_t dev)
672 struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev));
673 struct ata_device *atadev = device_get_softc(dev);
674 int mode = atadev->mode;
676 ctlr->setmode(dev, ATA_PIO_MAX);
678 ctlr->setmode(dev, mode);
681 static device_method_t ata_pcichannel_methods[] = {
682 /* device interface */
683 DEVMETHOD(device_probe, ata_pcichannel_probe),
684 DEVMETHOD(device_attach, ata_pcichannel_attach),
685 DEVMETHOD(device_detach, ata_pcichannel_detach),
686 DEVMETHOD(device_shutdown, bus_generic_shutdown),
687 DEVMETHOD(device_suspend, ata_suspend),
688 DEVMETHOD(device_resume, ata_resume),
691 DEVMETHOD(ata_setmode, ata_pcichannel_setmode),
692 DEVMETHOD(ata_locking, ata_pcichannel_locking),
693 DEVMETHOD(ata_reset, ata_pcichannel_reset),
698 driver_t ata_pcichannel_driver = {
700 ata_pcichannel_methods,
701 sizeof(struct ata_channel),
704 DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, 0, 0);