sys/dev/netif/bwi/if_bwi.c

   1 /*
   2  * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
   3  *
   4  * This code is derived from software contributed to The DragonFly Project
   5  * by Sepherosa Ziehau <sepherosa@gmail.com>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in
  15  *    the documentation and/or other materials provided with the
  16  *    distribution.
  17  * 3. Neither the name of The DragonFly Project nor the names of its
  18  *    contributors may be used to endorse or promote products derived
  19  *    from this software without specific, prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  * $DragonFly: src/sys/dev/netif/bwi/if_bwi.c,v 1.11 2007/09/30 12:32:20 sephe Exp $
  35  */
  36
  37 #include <sys/param.h>
  38 #include <sys/endian.h>
  39 #include <sys/kernel.h>
  40 #include <sys/bus.h>
  41 #include <sys/malloc.h>
  42 #include <sys/proc.h>
  43 #include <sys/rman.h>
  44 #include <sys/serialize.h>
  45 #include <sys/socket.h>
  46 #include <sys/sockio.h>
  47 #include <sys/sysctl.h>
  48
  49 #include <net/ethernet.h>
  50 #include <net/if.h>
  51 #include <net/bpf.h>
  52 #include <net/if_arp.h>
  53 #include <net/if_dl.h>
  54 #include <net/if_media.h>
  55 #include <net/ifq_var.h>
  56
  57 #include <netproto/802_11/ieee80211_radiotap.h>
  58 #include <netproto/802_11/ieee80211_var.h>
  59
  60 #include <bus/pci/pcireg.h>
  61 #include <bus/pci/pcivar.h>
  62 #include <bus/pci/pcidevs.h>
  63
  64 #include "bitops.h"
  65 #include "if_bwireg.h"
  66 #include "if_bwivar.h"
  67 #include "bwimac.h"
  68 #include "bwirf.h"
  69
  70 struct bwi_clock_freq {
  71         u_int           clkfreq_min;
  72         u_int           clkfreq_max;
  73 };
  74
  75 struct bwi_myaddr_bssid {
  76         uint8_t         myaddr[IEEE80211_ADDR_LEN];
  77         uint8_t         bssid[IEEE80211_ADDR_LEN];
  78 } __packed;
  79
  80 static int      bwi_probe(device_t);
  81 static int      bwi_attach(device_t);
  82 static int      bwi_detach(device_t);
  83 static int      bwi_shutdown(device_t);
  84
  85 static void     bwi_init(void *);
  86 static int      bwi_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
  87 static void     bwi_start(struct ifnet *);
  88 static void     bwi_watchdog(struct ifnet *);
  89 static int      bwi_newstate(struct ieee80211com *, enum ieee80211_state, int);
  90 static void     bwi_updateslot(struct ifnet *);
  91 static int      bwi_media_change(struct ifnet *);
  92
  93 static void     bwi_next_scan(void *);
  94 static void     bwi_calibrate(void *);
  95
  96 static int      bwi_stop(struct bwi_softc *);
  97 static int      bwi_newbuf(struct bwi_softc *, int, int);
  98 static int      bwi_encap(struct bwi_softc *, int, struct mbuf *,
  99                           struct ieee80211_node **, int);
 100
 101 static void     bwi_init_rxdesc_ring32(struct bwi_softc *, uint32_t,
 102                                        bus_addr_t, int, int);
 103 static void     bwi_reset_rx_ring32(struct bwi_softc *, uint32_t);
 104
 105 static int      bwi_init_tx_ring32(struct bwi_softc *, int);
 106 static int      bwi_init_rx_ring32(struct bwi_softc *);
 107 static int      bwi_init_txstats32(struct bwi_softc *);
 108 static void     bwi_free_tx_ring32(struct bwi_softc *, int);
 109 static void     bwi_free_rx_ring32(struct bwi_softc *);
 110 static void     bwi_free_txstats32(struct bwi_softc *);
 111 static void     bwi_setup_rx_desc32(struct bwi_softc *, int, bus_addr_t, int);
 112 static void     bwi_setup_tx_desc32(struct bwi_softc *, struct bwi_ring_data *,
 113                                     int, bus_addr_t, int);
 114 static void     bwi_rxeof32(struct bwi_softc *);
 115 static void     bwi_start_tx32(struct bwi_softc *, uint32_t, int);
 116 static void     bwi_txeof_status32(struct bwi_softc *);
 117
 118 static int      bwi_init_tx_ring64(struct bwi_softc *, int);
 119 static int      bwi_init_rx_ring64(struct bwi_softc *);
 120 static int      bwi_init_txstats64(struct bwi_softc *);
 121 static void     bwi_free_tx_ring64(struct bwi_softc *, int);
 122 static void     bwi_free_rx_ring64(struct bwi_softc *);
 123 static void     bwi_free_txstats64(struct bwi_softc *);
 124 static void     bwi_setup_rx_desc64(struct bwi_softc *, int, bus_addr_t, int);
 125 static void     bwi_setup_tx_desc64(struct bwi_softc *, struct bwi_ring_data *,
 126                                     int, bus_addr_t, int);
 127 static void     bwi_rxeof64(struct bwi_softc *);
 128 static void     bwi_start_tx64(struct bwi_softc *, uint32_t, int);
 129 static void     bwi_txeof_status64(struct bwi_softc *);
 130
 131 static void     bwi_intr(void *);
 132 static void     bwi_rxeof(struct bwi_softc *, int);
 133 static void     _bwi_txeof(struct bwi_softc *, uint16_t, int, int);
 134 static void     bwi_txeof(struct bwi_softc *);
 135 static void     bwi_txeof_status(struct bwi_softc *, int);
 136 static void     bwi_enable_intrs(struct bwi_softc *, uint32_t);
 137 static void     bwi_disable_intrs(struct bwi_softc *, uint32_t);
 138 static int      bwi_calc_rssi(struct bwi_softc *, const struct bwi_rxbuf_hdr *);
 139 static void     bwi_rx_radiotap(struct bwi_softc *, struct mbuf *,
 140                                 struct bwi_rxbuf_hdr *, const void *, int);
 141
 142 static int      bwi_dma_alloc(struct bwi_softc *);
 143 static void     bwi_dma_free(struct bwi_softc *);
 144 static int      bwi_dma_ring_alloc(struct bwi_softc *, bus_dma_tag_t,
 145                                    struct bwi_ring_data *, bus_size_t,
 146                                    uint32_t);
 147 static int      bwi_dma_mbuf_create(struct bwi_softc *);
 148 static void     bwi_dma_mbuf_destroy(struct bwi_softc *, int, int);
 149 static int      bwi_dma_txstats_alloc(struct bwi_softc *, uint32_t, bus_size_t);
 150 static void     bwi_dma_txstats_free(struct bwi_softc *);
 151 static void     bwi_dma_ring_addr(void *, bus_dma_segment_t *, int, int);
 152 static void     bwi_dma_buf_addr(void *, bus_dma_segment_t *, int,
 153                                  bus_size_t, int);
 154
 155 static void     bwi_power_on(struct bwi_softc *, int);
 156 static int      bwi_power_off(struct bwi_softc *, int);
 157 static int      bwi_set_clock_mode(struct bwi_softc *, enum bwi_clock_mode);
 158 static int      bwi_set_clock_delay(struct bwi_softc *);
 159 static void     bwi_get_clock_freq(struct bwi_softc *, struct bwi_clock_freq *);
 160 static int      bwi_get_pwron_delay(struct bwi_softc *sc);
 161 static void     bwi_set_addr_filter(struct bwi_softc *, uint16_t,
 162                                     const uint8_t *);
 163 static void     bwi_set_bssid(struct bwi_softc *, const uint8_t *);
 164 static int      bwi_set_chan(struct bwi_softc *, struct ieee80211_channel *);
 165
 166 static void     bwi_get_card_flags(struct bwi_softc *);
 167 static void     bwi_get_eaddr(struct bwi_softc *, uint16_t, uint8_t *);
 168
 169 static int      bwi_bus_attach(struct bwi_softc *);
 170 static int      bwi_bbp_attach(struct bwi_softc *);
 171 static int      bwi_bbp_power_on(struct bwi_softc *, enum bwi_clock_mode);
 172 static void     bwi_bbp_power_off(struct bwi_softc *);
 173
 174 static const char *bwi_regwin_name(const struct bwi_regwin *);
 175 static uint32_t bwi_regwin_disable_bits(struct bwi_softc *);
 176 static void     bwi_regwin_info(struct bwi_softc *, uint16_t *, uint8_t *);
 177 static int      bwi_regwin_select(struct bwi_softc *, int);
 178
 179 static const struct bwi_dev {
 180         uint16_t        vid;
 181         uint16_t        did;
 182         const char      *desc;
 183 } bwi_devices[] = {
 184         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4301,
 185           "Broadcom BCM4301 802.11 Wireless Lan" },
 186
 187         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4307,
 188           "Broadcom BCM4307 802.11 Wireless Lan" },
 189
 190         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4311,
 191           "Broadcom BCM4311 802.11 Wireless Lan" },
 192
 193         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4312,
 194           "Broadcom BCM4312 802.11 Wireless Lan" },
 195
 196         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4306_1,
 197           "Broadcom BCM4306 802.11 Wireless Lan" },
 198
 199         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4306_2,
 200           "Broadcom BCM4306 802.11 Wireless Lan" },
 201
 202         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4306_3,
 203           "Broadcom BCM4306 802.11 Wireless Lan" },
 204
 205         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4309,
 206           "Broadcom BCM4309 802.11 Wireless Lan" },
 207
 208         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4318,
 209           "Broadcom BCM4318 802.11 Wireless Lan" },
 210
 211         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4319,
 212           "Broadcom BCM4319 802.11 Wireless Lan" }
 213 };
 214
 215 static device_method_t bwi_methods[] = {
 216         DEVMETHOD(device_probe,         bwi_probe),
 217         DEVMETHOD(device_attach,        bwi_attach),
 218         DEVMETHOD(device_detach,        bwi_detach),
 219         DEVMETHOD(device_shutdown,      bwi_shutdown),
 220 #if 0
 221         DEVMETHOD(device_suspend,       bwi_suspend),
 222         DEVMETHOD(device_resume,        bwi_resume),
 223 #endif
 224         { 0, 0 }
 225 };
 226
 227 static driver_t bwi_driver = {
 228         "bwi",
 229         bwi_methods,
 230         sizeof(struct bwi_softc)
 231 };
 232
 233 static devclass_t bwi_devclass;
 234
 235 DRIVER_MODULE(bwi, pci, bwi_driver, bwi_devclass, 0, 0);
 236 DRIVER_MODULE(bwi, cardbus, bwi_driver, bwi_devclass, 0, 0);
 237
 238 MODULE_DEPEND(bwi, wlan, 1, 1, 1);
 239 MODULE_DEPEND(bwi, wlan_ratectl_onoe, 1, 1, 1);
 240 #if 0
 241 MODULE_DEPEND(bwi, wlan_ratectl_amrr, 1, 1, 1);
 242 #endif
 243 MODULE_DEPEND(bwi, pci, 1, 1, 1);
 244 MODULE_DEPEND(bwi, cardbus, 1, 1, 1);
 245
 246 static const struct {
 247         uint16_t        did_min;
 248         uint16_t        did_max;
 249         uint16_t        bbp_id;
 250 } bwi_bbpid_map[] = {
 251         { 0x4301, 0x4301, 0x4301 },
 252         { 0x4305, 0x4307, 0x4307 },
 253         { 0x4403, 0x4403, 0x4402 },
 254         { 0x4610, 0x4615, 0x4610 },
 255         { 0x4710, 0x4715, 0x4710 },
 256         { 0x4720, 0x4725, 0x4309 }
 257 };
 258
 259 static const struct {
 260         uint16_t        bbp_id;
 261         int             nregwin;
 262 } bwi_regwin_count[] = {
 263         { 0x4301, 5 },
 264         { 0x4306, 6 },
 265         { 0x4307, 5 },
 266         { 0x4310, 8 },
 267         { 0x4401, 3 },
 268         { 0x4402, 3 },
 269         { 0x4610, 9 },
 270         { 0x4704, 9 },
 271         { 0x4710, 9 },
 272         { 0x5365, 7 }
 273 };
 274
 275 #define CLKSRC(src)                             \
 276 [BWI_CLKSRC_ ## src] = {                        \
 277         .freq_min = BWI_CLKSRC_ ##src## _FMIN,  \
 278         .freq_max = BWI_CLKSRC_ ##src## _FMAX   \
 279 }
 280
 281 static const struct {
 282         u_int   freq_min;
 283         u_int   freq_max;
 284 } bwi_clkfreq[BWI_CLKSRC_MAX] = {
 285         CLKSRC(LP_OSC),
 286         CLKSRC(CS_OSC),
 287         CLKSRC(PCI)
 288 };
 289
 290 #undef CLKSRC
 291
 292 #ifdef BWI_DEBUG
 293 static uint32_t bwi_debug = BWI_DBG_ATTACH | BWI_DBG_INIT | BWI_DBG_TXPOWER;
 294 TUNABLE_INT("hw.bwi.debug", (int *)&bwi_debug);
 295 #endif
 296
 297 static const uint8_t bwi_zero_addr[IEEE80211_ADDR_LEN];
 298
 299 static const struct ieee80211_rateset bwi_rateset_11b =
 300         { 4, { 2, 4, 11, 22 } };
 301 static const struct ieee80211_rateset bwi_rateset_11g =
 302         { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
 303
 304 uint16_t
 305 bwi_read_sprom(struct bwi_softc *sc, uint16_t ofs)
 306 {
 307         return CSR_READ_2(sc, ofs + BWI_SPROM_START);
 308 }
 309
 310 static __inline void
 311 bwi_setup_desc32(struct bwi_softc *sc, struct bwi_desc32 *desc_array,
 312                  int ndesc, int desc_idx, bus_addr_t paddr, int buf_len,
 313                  int tx)
 314 {
 315         struct bwi_desc32 *desc = &desc_array[desc_idx];
 316         uint32_t ctrl, addr, addr_hi, addr_lo;
 317
 318         addr_lo = __SHIFTOUT(paddr, BWI_DESC32_A_ADDR_MASK);
 319         addr_hi = __SHIFTOUT(paddr, BWI_DESC32_A_FUNC_MASK);
 320
 321         addr = __SHIFTIN(addr_lo, BWI_DESC32_A_ADDR_MASK) |
 322                __SHIFTIN(BWI_DESC32_A_FUNC_TXRX, BWI_DESC32_A_FUNC_MASK);
 323
 324         ctrl = __SHIFTIN(buf_len, BWI_DESC32_C_BUFLEN_MASK) |
 325                __SHIFTIN(addr_hi, BWI_DESC32_C_ADDRHI_MASK);
 326         if (desc_idx == ndesc - 1)
 327                 ctrl |= BWI_DESC32_C_EOR;
 328         if (tx) {
 329                 /* XXX */
 330                 ctrl |= BWI_DESC32_C_FRAME_START |
 331                         BWI_DESC32_C_FRAME_END |
 332                         BWI_DESC32_C_INTR;
 333         }
 334
 335         desc->addr = htole32(addr);
 336         desc->ctrl = htole32(ctrl);
 337 }
 338
 339 static int
 340 bwi_probe(device_t dev)
 341 {
 342         const struct bwi_dev *b;
 343         uint16_t did, vid;
 344
 345         did = pci_get_device(dev);
 346         vid = pci_get_vendor(dev);
 347
 348         for (b = bwi_devices; b->desc != NULL; ++b) {
 349                 if (b->did == did && b->vid == vid) {
 350                         device_set_desc(dev, b->desc);
 351                         return 0;
 352                 }
 353         }
 354         return ENXIO;
 355 }
 356
 357 static int
 358 bwi_attach(device_t dev)
 359 {
 360         struct bwi_softc *sc = device_get_softc(dev);
 361         struct ieee80211com *ic = &sc->sc_ic;
 362         struct ifnet *ifp = &ic->ic_if;
 363         struct bwi_mac *mac;
 364         struct bwi_phy *phy;
 365         int i, error;
 366
 367         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 368         sc->sc_dev = dev;
 369
 370         /*
 371          * Initialize sysctl variables
 372          */
 373         sc->sc_fw_version = BWI_FW_VERSION3;
 374         sc->sc_dwell_time = 200;
 375 #ifdef BWI_DEBUG
 376         sc->sc_debug = bwi_debug;
 377 #endif
 378
 379         callout_init(&sc->sc_scan_ch);
 380         callout_init(&sc->sc_calib_ch);
 381
 382 #ifndef BURN_BRIDGES
 383         if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
 384                 uint32_t irq, mem;
 385
 386                 /* XXX Save more PCIR */
 387                 irq = pci_read_config(dev, PCIR_INTLINE, 4);
 388                 mem = pci_read_config(dev, BWI_PCIR_BAR, 4);
 389
 390                 device_printf(dev, "chip is in D%d power mode "
 391                     "-- setting to D0\n", pci_get_powerstate(dev));
 392
 393                 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
 394
 395                 pci_write_config(dev, PCIR_INTLINE, irq, 4);
 396                 pci_write_config(dev, BWI_PCIR_BAR, irq, 4);
 397         }
 398 #endif  /* !BURN_BRIDGE */
 399
 400         pci_enable_busmaster(dev);
 401
 402         /* Get more PCI information */
 403         sc->sc_pci_revid = pci_get_revid(dev);
 404         sc->sc_pci_subvid = pci_get_subvendor(dev);
 405         sc->sc_pci_subdid = pci_get_subdevice(dev);
 406
 407         /*
 408          * Allocate IO memory
 409          */
 410         sc->sc_mem_rid = BWI_PCIR_BAR;
 411         sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 412                                                 &sc->sc_mem_rid, RF_ACTIVE);
 413         if (sc->sc_mem_res == NULL) {
 414                 device_printf(dev, "can't allocate IO memory\n");
 415                 return ENXIO;
 416         }
 417         sc->sc_mem_bt = rman_get_bustag(sc->sc_mem_res);
 418         sc->sc_mem_bh = rman_get_bushandle(sc->sc_mem_res);
 419
 420         /*
 421          * Allocate IRQ
 422          */
 423         sc->sc_irq_rid = 0;
 424         sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
 425                                                 &sc->sc_irq_rid,
 426                                                 RF_SHAREABLE | RF_ACTIVE);
 427         if (sc->sc_irq_res == NULL) {
 428                 device_printf(dev, "can't allocate irq\n");
 429                 error = ENXIO;
 430                 goto fail;
 431         }
 432
 433         /*
 434          * Create sysctl tree
 435          */
 436         sysctl_ctx_init(&sc->sc_sysctl_ctx);
 437         sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
 438                                              SYSCTL_STATIC_CHILDREN(_hw),
 439                                              OID_AUTO,
 440                                              device_get_nameunit(dev),
 441                                              CTLFLAG_RD, 0, "");
 442         if (sc->sc_sysctl_tree == NULL) {
 443                 device_printf(dev, "can't add sysctl node\n");
 444                 error = ENXIO;
 445                 goto fail;
 446         }
 447
 448         SYSCTL_ADD_UINT(&sc->sc_sysctl_ctx,
 449                         SYSCTL_CHILDREN(sc->sc_sysctl_tree), OID_AUTO,
 450                         "dwell_time", CTLFLAG_RW, &sc->sc_dwell_time, 0,
 451                         "Channel dwell time during scan (msec)");
 452         SYSCTL_ADD_UINT(&sc->sc_sysctl_ctx,
 453                         SYSCTL_CHILDREN(sc->sc_sysctl_tree), OID_AUTO,
 454                         "fw_version", CTLFLAG_RD, &sc->sc_fw_version, 0,
 455                         "Firmware version");
 456 #ifdef BWI_DEBUG
 457         SYSCTL_ADD_UINT(&sc->sc_sysctl_ctx,
 458                         SYSCTL_CHILDREN(sc->sc_sysctl_tree), OID_AUTO,
 459                         "debug", CTLFLAG_RW, &sc->sc_debug, 0, "Debug flags");
 460 #endif
 461
 462         bwi_power_on(sc, 1);
 463
 464         error = bwi_bbp_attach(sc);
 465         if (error)
 466                 goto fail;
 467
 468         error = bwi_bbp_power_on(sc, BWI_CLOCK_MODE_FAST);
 469         if (error)
 470                 goto fail;
 471
 472         if (BWI_REGWIN_EXIST(&sc->sc_com_regwin)) {
 473                 error = bwi_set_clock_delay(sc);
 474                 if (error)
 475                         goto fail;
 476
 477                 error = bwi_set_clock_mode(sc, BWI_CLOCK_MODE_FAST);
 478                 if (error)
 479                         goto fail;
 480
 481                 error = bwi_get_pwron_delay(sc);
 482                 if (error)
 483                         goto fail;
 484         }
 485
 486         error = bwi_bus_attach(sc);
 487         if (error)
 488                 goto fail;
 489
 490         bwi_get_card_flags(sc);
 491
 492         /* TODO: LED */
 493
 494         for (i = 0; i < sc->sc_nmac; ++i) {
 495                 struct bwi_regwin *old;
 496
 497                 mac = &sc->sc_mac[i];
 498                 error = bwi_regwin_switch(sc, &mac->mac_regwin, &old);
 499                 if (error)
 500                         goto fail;
 501
 502                 error = bwi_mac_lateattach(mac);
 503                 if (error)
 504                         goto fail;
 505
 506                 error = bwi_regwin_switch(sc, old, NULL);
 507                 if (error)
 508                         goto fail;
 509         }
 510
 511         /*
 512          * XXX First MAC is known to exist
 513          * TODO2
 514          */
 515         mac = &sc->sc_mac[0];
 516         phy = &mac->mac_phy;
 517
 518         bwi_bbp_power_off(sc);
 519
 520         error = bwi_dma_alloc(sc);
 521         if (error)
 522                 goto fail;
 523
 524         ifp->if_softc = sc;
 525         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 526         ifp->if_init = bwi_init;
 527         ifp->if_ioctl = bwi_ioctl;
 528         ifp->if_start = bwi_start;
 529         ifp->if_watchdog = bwi_watchdog;
 530         ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
 531         ifq_set_ready(&ifp->if_snd);
 532
 533         /* Get locale */
 534         sc->sc_locale = __SHIFTOUT(bwi_read_sprom(sc, BWI_SPROM_CARD_INFO),
 535                                    BWI_SPROM_CARD_INFO_LOCALE);
 536         DPRINTF(sc, BWI_DBG_ATTACH, "locale: %d\n", sc->sc_locale);
 537
 538         /*
 539          * Setup ratesets, phytype, channels and get MAC address
 540          */
 541         if (phy->phy_mode == IEEE80211_MODE_11B ||
 542             phy->phy_mode == IEEE80211_MODE_11G) {
 543                 uint16_t chan_flags;
 544
 545                 ic->ic_sup_rates[IEEE80211_MODE_11B] = bwi_rateset_11b;
 546
 547                 if (phy->phy_mode == IEEE80211_MODE_11B) {
 548                         chan_flags = IEEE80211_CHAN_B;
 549                         ic->ic_phytype = IEEE80211_T_DS;
 550                 } else {
 551                         chan_flags = IEEE80211_CHAN_CCK |
 552                                      IEEE80211_CHAN_OFDM |
 553                                      IEEE80211_CHAN_DYN |
 554                                      IEEE80211_CHAN_2GHZ;
 555                         ic->ic_phytype = IEEE80211_T_OFDM;
 556                         ic->ic_sup_rates[IEEE80211_MODE_11G] =
 557                                 bwi_rateset_11g;
 558                 }
 559
 560                 /* XXX depend on locale */
 561                 for (i = 1; i <= 14; ++i) {
 562                         ic->ic_channels[i].ic_freq =
 563                                 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
 564                         ic->ic_channels[i].ic_flags = chan_flags;
 565                 }
 566
 567                 bwi_get_eaddr(sc, BWI_SPROM_11BG_EADDR, ic->ic_myaddr);
 568                 if (IEEE80211_IS_MULTICAST(ic->ic_myaddr)) {
 569                         bwi_get_eaddr(sc, BWI_SPROM_11A_EADDR, ic->ic_myaddr);
 570                         if (IEEE80211_IS_MULTICAST(ic->ic_myaddr)) {
 571                                 device_printf(dev, "invalid MAC address: "
 572                                         "%6D\n", ic->ic_myaddr, ":");
 573                         }
 574                 }
 575         } else if (phy->phy_mode == IEEE80211_MODE_11A) {
 576                 /* TODO:11A */
 577                 error = ENXIO;
 578                 goto fail;
 579         } else {
 580                 panic("unknown phymode %d\n", phy->phy_mode);
 581         }
 582
 583         ic->ic_caps = IEEE80211_C_SHSLOT |
 584                       IEEE80211_C_SHPREAMBLE |
 585                       IEEE80211_C_WPA |
 586                       IEEE80211_C_MONITOR;
 587         ic->ic_state = IEEE80211_S_INIT;
 588         ic->ic_opmode = IEEE80211_M_STA;
 589
 590         ic->ic_ratectl.rc_st_ratectl_cap = IEEE80211_RATECTL_CAP_ONOE;
 591         ic->ic_ratectl.rc_st_ratectl = IEEE80211_RATECTL_ONOE;
 592
 593         ic->ic_updateslot = bwi_updateslot;
 594
 595         ieee80211_ifattach(ic);
 596
 597         ic->ic_headroom = sizeof(struct bwi_txbuf_hdr);
 598         ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
 599
 600         sc->sc_newstate = ic->ic_newstate;
 601         ic->ic_newstate = bwi_newstate;
 602
 603         ieee80211_media_init(ic, bwi_media_change, ieee80211_media_status);
 604
 605         /*
 606          * Attach radio tap
 607          */
 608         bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
 609                       sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
 610                       &sc->sc_drvbpf);
 611
 612         sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(uint32_t));
 613         sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len);
 614         sc->sc_tx_th.wt_ihdr.it_present = htole32(BWI_TX_RADIOTAP_PRESENT);
 615
 616         sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(uint32_t));
 617         sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len);
 618         sc->sc_rx_th.wr_ihdr.it_present = htole32(BWI_RX_RADIOTAP_PRESENT);
 619
 620         error = bus_setup_intr(dev, sc->sc_irq_res, INTR_MPSAFE, bwi_intr, sc,
 621                                &sc->sc_irq_handle, ifp->if_serializer);
 622         if (error) {
 623                 device_printf(dev, "can't setup intr\n");
 624                 bpfdetach(ifp);
 625                 ieee80211_ifdetach(ic);
 626                 goto fail;
 627         }
 628
 629         if (bootverbose)
 630                 ieee80211_announce(ic);
 631
 632         return 0;
 633 fail:
 634         bwi_detach(dev);
 635         return error;
 636 }
 637
 638 static int
 639 bwi_detach(device_t dev)
 640 {
 641         struct bwi_softc *sc = device_get_softc(dev);
 642
 643         if (device_is_attached(dev)) {
 644                 struct ifnet *ifp = &sc->sc_ic.ic_if;
 645                 int i;
 646
 647                 lwkt_serialize_enter(ifp->if_serializer);
 648                 bwi_stop(sc);
 649                 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_handle);
 650                 lwkt_serialize_exit(ifp->if_serializer);
 651
 652                 bpfdetach(ifp);
 653                 ieee80211_ifdetach(&sc->sc_ic);
 654
 655                 for (i = 0; i < sc->sc_nmac; ++i)
 656                         bwi_mac_detach(&sc->sc_mac[i]);
 657         }
 658
 659         if (sc->sc_sysctl_tree != NULL)
 660                 sysctl_ctx_free(&sc->sc_sysctl_ctx);
 661
 662         if (sc->sc_irq_res != NULL) {
 663                 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
 664                                      sc->sc_irq_res);
 665         }
 666
 667         if (sc->sc_mem_res != NULL) {
 668                 bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid,
 669                                      sc->sc_mem_res);
 670         }
 671
 672         bwi_dma_free(sc);
 673
 674         return 0;
 675 }
 676
 677 static int
 678 bwi_shutdown(device_t dev)
 679 {
 680         struct bwi_softc *sc = device_get_softc(dev);
 681         struct ifnet *ifp = &sc->sc_ic.ic_if;
 682
 683         lwkt_serialize_enter(ifp->if_serializer);
 684         bwi_stop(sc);
 685         lwkt_serialize_exit(ifp->if_serializer);
 686         return 0;
 687 }
 688
 689 static void
 690 bwi_power_on(struct bwi_softc *sc, int with_pll)
 691 {
 692         uint32_t gpio_in, gpio_out, gpio_en;
 693         uint16_t status;
 694
 695         gpio_in = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_IN, 4);
 696         if (gpio_in & BWI_PCIM_GPIO_PWR_ON)
 697                 goto back;
 698
 699         gpio_out = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
 700         gpio_en = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, 4);
 701
 702         gpio_out |= BWI_PCIM_GPIO_PWR_ON;
 703         gpio_en |= BWI_PCIM_GPIO_PWR_ON;
 704         if (with_pll) {
 705                 /* Turn off PLL first */
 706                 gpio_out |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 707                 gpio_en |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 708         }
 709
 710         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, gpio_out, 4);
 711         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, gpio_en, 4);
 712         DELAY(1000);
 713
 714         if (with_pll) {
 715                 /* Turn on PLL */
 716                 gpio_out &= ~BWI_PCIM_GPIO_PLL_PWR_OFF;
 717                 pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, gpio_out, 4);
 718                 DELAY(5000);
 719         }
 720
 721 back:
 722         /* Clear "Signaled Target Abort" */
 723         status = pci_read_config(sc->sc_dev, PCIR_STATUS, 2);
 724         status &= ~PCIM_STATUS_STABORT;
 725         pci_write_config(sc->sc_dev, PCIR_STATUS, status, 2);
 726 }
 727
 728 static int
 729 bwi_power_off(struct bwi_softc *sc, int with_pll)
 730 {
 731         uint32_t gpio_out, gpio_en;
 732
 733         pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_IN, 4); /* dummy read */
 734         gpio_out = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
 735         gpio_en = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, 4);
 736
 737         gpio_out &= ~BWI_PCIM_GPIO_PWR_ON;
 738         gpio_en |= BWI_PCIM_GPIO_PWR_ON;
 739         if (with_pll) {
 740                 gpio_out |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 741                 gpio_en |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 742         }
 743
 744         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, gpio_out, 4);
 745         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, gpio_en, 4);
 746         return 0;
 747 }
 748
 749 int
 750 bwi_regwin_switch(struct bwi_softc *sc, struct bwi_regwin *rw,
 751                   struct bwi_regwin **old_rw)
 752 {
 753         int error;
 754
 755         if (old_rw != NULL)
 756                 *old_rw = NULL;
 757
 758         if (!BWI_REGWIN_EXIST(rw))
 759                 return EINVAL;
 760
 761         if (sc->sc_cur_regwin != rw) {
 762                 error = bwi_regwin_select(sc, rw->rw_id);
 763                 if (error) {
 764                         if_printf(&sc->sc_ic.ic_if, "can't select regwin %d\n",
 765                                   rw->rw_id);
 766                         return error;
 767                 }
 768         }
 769
 770         if (old_rw != NULL)
 771                 *old_rw = sc->sc_cur_regwin;
 772         sc->sc_cur_regwin = rw;
 773         return 0;
 774 }
 775
 776 static int
 777 bwi_regwin_select(struct bwi_softc *sc, int id)
 778 {
 779         uint32_t win = BWI_PCIM_REGWIN(id);
 780         int i;
 781
 782 #define RETRY_MAX       50
 783         for (i = 0; i < RETRY_MAX; ++i) {
 784                 pci_write_config(sc->sc_dev, BWI_PCIR_SEL_REGWIN, win, 4);
 785                 if (pci_read_config(sc->sc_dev, BWI_PCIR_SEL_REGWIN, 4) == win)
 786                         return 0;
 787                 DELAY(10);
 788         }
 789 #undef RETRY_MAX
 790
 791         return ENXIO;
 792 }
 793
 794 static void
 795 bwi_regwin_info(struct bwi_softc *sc, uint16_t *type, uint8_t *rev)
 796 {
 797         uint32_t val;
 798
 799         val = CSR_READ_4(sc, BWI_ID_HI);
 800         *type = BWI_ID_HI_REGWIN_TYPE(val);
 801         *rev = BWI_ID_HI_REGWIN_REV(val);
 802
 803         DPRINTF(sc, BWI_DBG_ATTACH, "regwin: type 0x%03x, rev %d, "
 804                 "vendor 0x%04x\n", *type, *rev,
 805                 __SHIFTOUT(val, BWI_ID_HI_REGWIN_VENDOR_MASK));
 806 }
 807
 808 static int
 809 bwi_bbp_attach(struct bwi_softc *sc)
 810 {
 811 #define N(arr)  (int)(sizeof(arr) / sizeof(arr[0]))
 812         uint16_t bbp_id, rw_type;
 813         uint8_t rw_rev;
 814         uint32_t info;
 815         int error, nregwin, i;
 816
 817         /*
 818          * Get 0th regwin information
 819          * NOTE: 0th regwin should exist
 820          */
 821         error = bwi_regwin_select(sc, 0);
 822         if (error) {
 823                 device_printf(sc->sc_dev, "can't select regwin 0\n");
 824                 return error;
 825         }
 826         bwi_regwin_info(sc, &rw_type, &rw_rev);
 827
 828         /*
 829          * Find out BBP id
 830          */
 831         bbp_id = 0;
 832         info = 0;
 833         if (rw_type == BWI_REGWIN_T_COM) {
 834                 info = CSR_READ_4(sc, BWI_INFO);
 835                 bbp_id = __SHIFTOUT(info, BWI_INFO_BBPID_MASK);
 836
 837                 BWI_CREATE_REGWIN(&sc->sc_com_regwin, 0, rw_type, rw_rev);
 838
 839                 sc->sc_cap = CSR_READ_4(sc, BWI_CAPABILITY);
 840         } else {
 841                 uint16_t did = pci_get_device(sc->sc_dev);
 842                 uint8_t revid = pci_get_revid(sc->sc_dev);
 843
 844                 for (i = 0; i < N(bwi_bbpid_map); ++i) {
 845                         if (did >= bwi_bbpid_map[i].did_min &&
 846                             did <= bwi_bbpid_map[i].did_max) {
 847                                 bbp_id = bwi_bbpid_map[i].bbp_id;
 848                                 break;
 849                         }
 850                 }
 851                 if (bbp_id == 0) {
 852                         device_printf(sc->sc_dev, "no BBP id for device id "
 853                                       "0x%04x\n", did);
 854                         return ENXIO;
 855                 }
 856
 857                 info = __SHIFTIN(revid, BWI_INFO_BBPREV_MASK) |
 858                        __SHIFTIN(0, BWI_INFO_BBPPKG_MASK);
 859         }
 860
 861         /*
 862          * Find out number of regwins
 863          */
 864         nregwin = 0;
 865         if (rw_type == BWI_REGWIN_T_COM && rw_rev >= 4) {
 866                 nregwin = __SHIFTOUT(info, BWI_INFO_NREGWIN_MASK);
 867         } else {
 868                 for (i = 0; i < N(bwi_regwin_count); ++i) {
 869                         if (bwi_regwin_count[i].bbp_id == bbp_id) {
 870                                 nregwin = bwi_regwin_count[i].nregwin;
 871                                 break;
 872                         }
 873                 }
 874                 if (nregwin == 0) {
 875                         device_printf(sc->sc_dev, "no number of win for "
 876                                       "BBP id 0x%04x\n", bbp_id);
 877                         return ENXIO;
 878                 }
 879         }
 880
 881         /* Record BBP id/rev for later using */
 882         sc->sc_bbp_id = bbp_id;
 883         sc->sc_bbp_rev = __SHIFTOUT(info, BWI_INFO_BBPREV_MASK);
 884         sc->sc_bbp_pkg = __SHIFTOUT(info, BWI_INFO_BBPPKG_MASK);
 885         device_printf(sc->sc_dev, "BBP: id 0x%04x, rev 0x%x, pkg %d\n",
 886                       sc->sc_bbp_id, sc->sc_bbp_rev, sc->sc_bbp_pkg);
 887
 888         DPRINTF(sc, BWI_DBG_ATTACH, "nregwin %d, cap 0x%08x\n",
 889                 nregwin, sc->sc_cap);
 890
 891         /*
 892          * Create rest of the regwins
 893          */
 894
 895         /* Don't re-create common regwin, if it is already created */
 896         i = BWI_REGWIN_EXIST(&sc->sc_com_regwin) ? 1 : 0;
 897
 898         for (; i < nregwin; ++i) {
 899                 /*
 900                  * Get regwin information
 901                  */
 902                 error = bwi_regwin_select(sc, i);
 903                 if (error) {
 904                         device_printf(sc->sc_dev,
 905                                       "can't select regwin %d\n", i);
 906                         return error;
 907                 }
 908                 bwi_regwin_info(sc, &rw_type, &rw_rev);
 909
 910                 /*
 911                  * Try attach:
 912                  * 1) Bus (PCI/PCIE) regwin
 913                  * 2) MAC regwin
 914                  * Ignore rest types of regwin
 915                  */
 916                 if (rw_type == BWI_REGWIN_T_BUSPCI ||
 917                     rw_type == BWI_REGWIN_T_BUSPCIE) {
 918                         if (BWI_REGWIN_EXIST(&sc->sc_bus_regwin)) {
 919                                 device_printf(sc->sc_dev,
 920                                               "bus regwin already exists\n");
 921                         } else {
 922                                 BWI_CREATE_REGWIN(&sc->sc_bus_regwin, i,
 923                                                   rw_type, rw_rev);
 924                         }
 925                 } else if (rw_type == BWI_REGWIN_T_MAC) {
 926                         /* XXX ignore return value */
 927                         bwi_mac_attach(sc, i, rw_rev);
 928                 }
 929         }
 930
 931         /* At least one MAC shold exist */
 932         if (!BWI_REGWIN_EXIST(&sc->sc_mac[0].mac_regwin)) {
 933                 device_printf(sc->sc_dev, "no MAC was found\n");
 934                 return ENXIO;
 935         }
 936         KKASSERT(sc->sc_nmac > 0);
 937
 938         /* Bus regwin must exist */
 939         if (!BWI_REGWIN_EXIST(&sc->sc_bus_regwin)) {
 940                 device_printf(sc->sc_dev, "no bus regwin was found\n");
 941                 return ENXIO;
 942         }
 943
 944         /* Start with first MAC */
 945         error = bwi_regwin_switch(sc, &sc->sc_mac[0].mac_regwin, NULL);
 946         if (error)
 947                 return error;
 948
 949         return 0;
 950 #undef N
 951 }
 952
 953 int
 954 bwi_bus_init(struct bwi_softc *sc, struct bwi_mac *mac)
 955 {
 956         struct bwi_regwin *old, *bus;
 957         uint32_t val;
 958         int error;
 959
 960         bus = &sc->sc_bus_regwin;
 961         KKASSERT(sc->sc_cur_regwin == &mac->mac_regwin);
 962
 963         /*
 964          * Tell bus to generate requested interrupts
 965          */
 966         if (bus->rw_rev < 6 && bus->rw_type == BWI_REGWIN_T_BUSPCI) {
 967                 /*
 968                  * NOTE: Read BWI_FLAGS from MAC regwin
 969                  */
 970                 val = CSR_READ_4(sc, BWI_FLAGS);
 971
 972                 error = bwi_regwin_switch(sc, bus, &old);
 973                 if (error)
 974                         return error;
 975
 976                 CSR_SETBITS_4(sc, BWI_INTRVEC, (val & BWI_FLAGS_INTR_MASK));
 977         } else {
 978                 uint32_t mac_mask;
 979
 980                 mac_mask = 1 << mac->mac_id;
 981
 982                 error = bwi_regwin_switch(sc, bus, &old);
 983                 if (error)
 984                         return error;
 985
 986                 val = pci_read_config(sc->sc_dev, BWI_PCIR_INTCTL, 4);
 987                 val |= mac_mask << 8;
 988                 pci_write_config(sc->sc_dev, BWI_PCIR_INTCTL, val, 4);
 989         }
 990
 991         if (sc->sc_flags & BWI_F_BUS_INITED)
 992                 goto back;
 993
 994         if (bus->rw_type == BWI_REGWIN_T_BUSPCI) {
 995                 /*
 996                  * Enable prefetch and burst
 997                  */
 998                 CSR_SETBITS_4(sc, BWI_BUS_CONFIG,
 999                               BWI_BUS_CONFIG_PREFETCH | BWI_BUS_CONFIG_BURST);
1000
1001                 if (bus->rw_rev < 5) {
1002                         struct bwi_regwin *com = &sc->sc_com_regwin;
1003
1004                         /*
1005                          * Configure timeouts for bus operation
1006                          */
1007
1008                         /*
1009                          * Set service timeout and request timeout
1010                          */
1011                         CSR_SETBITS_4(sc, BWI_CONF_LO,
1012                         __SHIFTIN(BWI_CONF_LO_SERVTO, BWI_CONF_LO_SERVTO_MASK) |
1013                         __SHIFTIN(BWI_CONF_LO_REQTO, BWI_CONF_LO_REQTO_MASK));
1014
1015                         /*
1016                          * If there is common regwin, we switch to that regwin
1017                          * and switch back to bus regwin once we have done.
1018                          */
1019                         if (BWI_REGWIN_EXIST(com)) {
1020                                 error = bwi_regwin_switch(sc, com, NULL);
1021                                 if (error)
1022                                         return error;
1023                         }
1024
1025                         /* Let bus know what we have changed */
1026                         CSR_WRITE_4(sc, BWI_BUS_ADDR, BWI_BUS_ADDR_MAGIC);
1027                         CSR_READ_4(sc, BWI_BUS_ADDR); /* Flush */
1028                         CSR_WRITE_4(sc, BWI_BUS_DATA, 0);
1029                         CSR_READ_4(sc, BWI_BUS_DATA); /* Flush */
1030
1031                         if (BWI_REGWIN_EXIST(com)) {
1032                                 error = bwi_regwin_switch(sc, bus, NULL);
1033                                 if (error)
1034                                         return error;
1035                         }
1036                 } else if (bus->rw_rev >= 11) {
1037                         /*
1038                          * Enable memory read multiple
1039                          */
1040                         CSR_SETBITS_4(sc, BWI_BUS_CONFIG, BWI_BUS_CONFIG_MRM);
1041                 }
1042         } else {
1043                 /* TODO:PCIE */
1044         }
1045
1046         sc->sc_flags |= BWI_F_BUS_INITED;
1047 back:
1048         return bwi_regwin_switch(sc, old, NULL);
1049 }
1050
1051 static void
1052 bwi_get_card_flags(struct bwi_softc *sc)
1053 {
1054         sc->sc_card_flags = bwi_read_sprom(sc, BWI_SPROM_CARD_FLAGS);
1055         if (sc->sc_card_flags == 0xffff)
1056                 sc->sc_card_flags = 0;
1057
1058         if (sc->sc_pci_subvid == PCI_VENDOR_APPLE &&
1059             sc->sc_pci_subdid == 0x4e && /* XXX */
1060             sc->sc_pci_revid > 0x40)
1061                 sc->sc_card_flags |= BWI_CARD_F_PA_GPIO9;
1062
1063         DPRINTF(sc, BWI_DBG_ATTACH, "card flags 0x%04x\n", sc->sc_card_flags);
1064 }
1065
1066 static void
1067 bwi_get_eaddr(struct bwi_softc *sc, uint16_t eaddr_ofs, uint8_t *eaddr)
1068 {
1069         int i;
1070
1071         for (i = 0; i < 3; ++i) {
1072                 *((uint16_t *)eaddr + i) =
1073                         htobe16(bwi_read_sprom(sc, eaddr_ofs + 2 * i));
1074         }
1075 }
1076
1077 static void
1078 bwi_get_clock_freq(struct bwi_softc *sc, struct bwi_clock_freq *freq)
1079 {
1080         struct bwi_regwin *com;
1081         uint32_t val;
1082         u_int div;
1083         int src;
1084
1085         bzero(freq, sizeof(*freq));
1086         com = &sc->sc_com_regwin;
1087
1088         KKASSERT(BWI_REGWIN_EXIST(com));
1089         KKASSERT(sc->sc_cur_regwin == com);
1090         KKASSERT(sc->sc_cap & BWI_CAP_CLKMODE);
1091
1092         /*
1093          * Calculate clock frequency
1094          */
1095         src = -1;
1096         div = 0;
1097         if (com->rw_rev < 6) {
1098                 val = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
1099                 if (val & BWI_PCIM_GPIO_OUT_CLKSRC) {
1100                         src = BWI_CLKSRC_PCI;
1101                         div = 64;
1102                 } else {
1103                         src = BWI_CLKSRC_CS_OSC;
1104                         div = 32;
1105                 }
1106         } else if (com->rw_rev < 10) {
1107                 val = CSR_READ_4(sc, BWI_CLOCK_CTRL);
1108
1109                 src = __SHIFTOUT(val, BWI_CLOCK_CTRL_CLKSRC);
1110                 if (src == BWI_CLKSRC_LP_OSC) {
1111                         div = 1;
1112                 } else {
1113                         div = (__SHIFTOUT(val, BWI_CLOCK_CTRL_FDIV) + 1) << 2;
1114
1115                         /* Unknown source */
1116                         if (src >= BWI_CLKSRC_MAX)
1117                                 src = BWI_CLKSRC_CS_OSC;
1118                 }
1119         } else {
1120                 val = CSR_READ_4(sc, BWI_CLOCK_INFO);
1121
1122                 src = BWI_CLKSRC_CS_OSC;
1123                 div = (__SHIFTOUT(val, BWI_CLOCK_INFO_FDIV) + 1) << 2;
1124         }
1125
1126         KKASSERT(src >= 0 && src < BWI_CLKSRC_MAX);
1127         KKASSERT(div != 0);
1128
1129         DPRINTF(sc, BWI_DBG_ATTACH, "clksrc %s\n",
1130                 src == BWI_CLKSRC_PCI ? "PCI" :
1131                 (src == BWI_CLKSRC_LP_OSC ? "LP_OSC" : "CS_OSC"));
1132
1133         freq->clkfreq_min = bwi_clkfreq[src].freq_min / div;
1134         freq->clkfreq_max = bwi_clkfreq[src].freq_max / div;
1135
1136         DPRINTF(sc, BWI_DBG_ATTACH, "clkfreq min %u, max %u\n",
1137                 freq->clkfreq_min, freq->clkfreq_max);
1138 }
1139
1140 static int
1141 bwi_set_clock_mode(struct bwi_softc *sc, enum bwi_clock_mode clk_mode)
1142 {
1143         struct bwi_regwin *old, *com;
1144         uint32_t clk_ctrl, clk_src;
1145         int error, pwr_off = 0;
1146
1147         com = &sc->sc_com_regwin;
1148         if (!BWI_REGWIN_EXIST(com))
1149                 return 0;
1150
1151         if (com->rw_rev >= 10 || com->rw_rev < 6)
1152                 return 0;
1153
1154         /*
1155          * For common regwin whose rev is [6, 10), the chip
1156          * must be capable to change clock mode.
1157          */
1158         if ((sc->sc_cap & BWI_CAP_CLKMODE) == 0)
1159                 return 0;
1160
1161         error = bwi_regwin_switch(sc, com, &old);
1162         if (error)
1163                 return error;
1164
1165         if (clk_mode == BWI_CLOCK_MODE_FAST)
1166                 bwi_power_on(sc, 0);    /* Don't turn on PLL */
1167
1168         clk_ctrl = CSR_READ_4(sc, BWI_CLOCK_CTRL);
1169         clk_src = __SHIFTOUT(clk_ctrl, BWI_CLOCK_CTRL_CLKSRC);
1170
1171         switch (clk_mode) {
1172         case BWI_CLOCK_MODE_FAST:
1173                 clk_ctrl &= ~BWI_CLOCK_CTRL_SLOW;
1174                 clk_ctrl |= BWI_CLOCK_CTRL_IGNPLL;
1175                 break;
1176         case BWI_CLOCK_MODE_SLOW:
1177                 clk_ctrl |= BWI_CLOCK_CTRL_SLOW;
1178                 break;
1179         case BWI_CLOCK_MODE_DYN:
1180                 clk_ctrl &= ~(BWI_CLOCK_CTRL_SLOW |
1181                               BWI_CLOCK_CTRL_IGNPLL |
1182                               BWI_CLOCK_CTRL_NODYN);
1183                 if (clk_src != BWI_CLKSRC_CS_OSC) {
1184                         clk_ctrl |= BWI_CLOCK_CTRL_NODYN;
1185                         pwr_off = 1;
1186                 }
1187                 break;
1188         }
1189         CSR_WRITE_4(sc, BWI_CLOCK_CTRL, clk_ctrl);
1190
1191         if (pwr_off)
1192                 bwi_power_off(sc, 0);   /* Leave PLL as it is */
1193
1194         return bwi_regwin_switch(sc, old, NULL);
1195 }
1196
1197 static int
1198 bwi_set_clock_delay(struct bwi_softc *sc)
1199 {
1200         struct bwi_regwin *old, *com;
1201         int error;
1202
1203         com = &sc->sc_com_regwin;
1204         if (!BWI_REGWIN_EXIST(com))
1205                 return 0;
1206
1207         error = bwi_regwin_switch(sc, com, &old);
1208         if (error)
1209                 return error;
1210
1211         if (sc->sc_bbp_id == BWI_BBPID_BCM4321) {
1212                 if (sc->sc_bbp_rev == 0)
1213                         CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC0);
1214                 else if (sc->sc_bbp_rev == 1)
1215                         CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC1);
1216         }
1217
1218         if (sc->sc_cap & BWI_CAP_CLKMODE) {
1219                 if (com->rw_rev >= 10) {
1220                         CSR_FILT_SETBITS_4(sc, BWI_CLOCK_INFO, 0xffff, 0x40000);
1221                 } else {
1222                         struct bwi_clock_freq freq;
1223
1224                         bwi_get_clock_freq(sc, &freq);
1225                         CSR_WRITE_4(sc, BWI_PLL_ON_DELAY,
1226                                 howmany(freq.clkfreq_max * 150, 1000000));
1227                         CSR_WRITE_4(sc, BWI_FREQ_SEL_DELAY,
1228                                 howmany(freq.clkfreq_max * 15, 1000000));
1229                 }
1230         }
1231
1232         return bwi_regwin_switch(sc, old, NULL);
1233 }
1234
1235 static void
1236 bwi_init(void *xsc)
1237 {
1238         struct bwi_softc *sc = xsc;
1239         struct ieee80211com *ic = &sc->sc_ic;
1240         struct ifnet *ifp = &ic->ic_if;
1241         struct bwi_mac *mac;
1242         int error;
1243
1244         ASSERT_SERIALIZED(ifp->if_serializer);
1245
1246         error = bwi_stop(sc);
1247         if (error) {
1248                 if_printf(ifp, "can't stop\n");
1249                 return;
1250         }
1251
1252         bwi_bbp_power_on(sc, BWI_CLOCK_MODE_FAST);
1253
1254         /* TODO: 2 MAC */
1255
1256         mac = &sc->sc_mac[0];
1257         error = bwi_regwin_switch(sc, &mac->mac_regwin, NULL);
1258         if (error)
1259                 goto back;
1260
1261         error = bwi_mac_init(mac);
1262         if (error)
1263                 goto back;
1264
1265         bwi_bbp_power_on(sc, BWI_CLOCK_MODE_DYN);
1266
1267         bcopy(IF_LLADDR(ifp), ic->ic_myaddr, sizeof(ic->ic_myaddr));
1268
1269         bwi_set_bssid(sc, bwi_zero_addr);       /* Clear BSSID */
1270         bwi_set_addr_filter(sc, BWI_ADDR_FILTER_MYADDR, ic->ic_myaddr);
1271
1272         bwi_mac_reset_hwkeys(mac);
1273
1274         if ((mac->mac_flags & BWI_MAC_F_HAS_TXSTATS) == 0) {
1275                 int i;
1276
1277 #define NRETRY  1000
1278                 /*
1279                  * Drain any possible pending TX status
1280                  */
1281                 for (i = 0; i < NRETRY; ++i) {
1282                         if ((CSR_READ_4(sc, BWI_TXSTATUS0) &
1283                              BWI_TXSTATUS0_VALID) == 0)
1284                                 break;
1285                         CSR_READ_4(sc, BWI_TXSTATUS1);
1286                 }
1287                 if (i == NRETRY)
1288                         if_printf(ifp, "can't drain TX status\n");
1289 #undef NRETRY
1290         }
1291
1292         if (mac->mac_phy.phy_mode == IEEE80211_MODE_11G)
1293                 bwi_mac_updateslot(mac, 1);
1294
1295         /* Start MAC */
1296         error = bwi_mac_start(mac);
1297         if (error)
1298                 goto back;
1299
1300         /* Enable intrs */
1301         bwi_enable_intrs(sc, BWI_INIT_INTRS);
1302
1303         ifp->if_flags |= IFF_RUNNING;
1304         ifp->if_flags &= ~IFF_OACTIVE;
1305
1306         if (ic->ic_opmode != IEEE80211_M_MONITOR) {
1307                 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
1308                         ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
1309         } else {
1310                 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
1311         }
1312 back:
1313         if (error)
1314                 bwi_stop(sc);
1315 }
1316
1317 static int
1318 bwi_ioctl(struct ifnet *ifp, u_long cmd, caddr_t req, struct ucred *cr)
1319 {
1320         struct bwi_softc *sc = ifp->if_softc;
1321         int error = 0;
1322
1323         ASSERT_SERIALIZED(ifp->if_serializer);
1324
1325         switch (cmd) {
1326         case SIOCSIFFLAGS:
1327                 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1328                     (IFF_UP | IFF_RUNNING)) {
1329                         struct bwi_mac *mac;
1330                         int promisc = -1;
1331
1332                         KKASSERT(sc->sc_cur_regwin->rw_type ==
1333                                  BWI_REGWIN_T_MAC);
1334                         mac = (struct bwi_mac *)sc->sc_cur_regwin;
1335
1336                         if ((ifp->if_flags & IFF_PROMISC) &&
1337                             (sc->sc_flags & BWI_F_PROMISC) == 0) {
1338                                 promisc = 1;
1339                                 sc->sc_flags |= BWI_F_PROMISC;
1340                         } else if ((ifp->if_flags & IFF_PROMISC) == 0 &&
1341                                    (sc->sc_flags & BWI_F_PROMISC)) {
1342                                 promisc = 0;
1343                                 sc->sc_flags &= ~BWI_F_PROMISC;
1344                         }
1345
1346                         if (promisc >= 0)
1347                                 bwi_mac_set_promisc(mac, promisc);
1348                 }
1349
1350                 if (ifp->if_flags & IFF_UP) {
1351                         if ((ifp->if_flags & IFF_RUNNING) == 0)
1352                                 bwi_init(sc);
1353                 } else {
1354                         if (ifp->if_flags & IFF_RUNNING)
1355                                 bwi_stop(sc);
1356                 }
1357                 break;
1358         default:
1359                 error = ieee80211_ioctl(&sc->sc_ic, cmd, req, cr);
1360                 break;
1361         }
1362
1363         if (error == ENETRESET) {
1364                 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1365                     (IFF_UP | IFF_RUNNING))
1366                         bwi_init(sc);
1367                 error = 0;
1368         }
1369         return error;
1370 }
1371
1372 static void
1373 bwi_start(struct ifnet *ifp)
1374 {
1375         struct bwi_softc *sc = ifp->if_softc;
1376         struct ieee80211com *ic = &sc->sc_ic;
1377         struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[BWI_TX_DATA_RING];
1378         int trans, idx;
1379
1380         ASSERT_SERIALIZED(ifp->if_serializer);
1381
1382         if ((ifp->if_flags & IFF_OACTIVE) ||
1383             (ifp->if_flags & IFF_RUNNING) == 0)
1384                 return;
1385
1386         trans = 0;
1387         idx = tbd->tbd_idx;
1388
1389         while (tbd->tbd_buf[idx].tb_mbuf == NULL) {
1390                 struct ieee80211_frame *wh;
1391                 struct ieee80211_node *ni;
1392                 struct mbuf *m;
1393                 int mgt_pkt = 0;
1394
1395                 if (!IF_QEMPTY(&ic->ic_mgtq)) {
1396                         IF_DEQUEUE(&ic->ic_mgtq, m);
1397
1398                         ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1399                         m->m_pkthdr.rcvif = NULL;
1400
1401                         mgt_pkt = 1;
1402                 } else if (!ifq_is_empty(&ifp->if_snd)) {
1403                         struct ether_header *eh;
1404
1405                         if (ic->ic_state != IEEE80211_S_RUN)
1406                                 break;
1407
1408                         m = ifq_dequeue(&ifp->if_snd, NULL);
1409                         if (m == NULL)
1410                                 break;
1411
1412                         if (m->m_len < sizeof(*eh)) {
1413                                 m = m_pullup(m, sizeof(*eh));
1414                                 if (m == NULL) {
1415                                         ifp->if_oerrors++;
1416                                         continue;
1417                                 }
1418                         }
1419                         eh = mtod(m, struct ether_header *);
1420
1421                         ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1422                         if (ni == NULL) {
1423                                 m_freem(m);
1424                                 ifp->if_oerrors++;
1425                                 continue;
1426                         }
1427
1428                         /* TODO: PS */
1429
1430                         BPF_MTAP(ifp, m);
1431
1432                         m = ieee80211_encap(ic, m, ni);
1433                         if (m == NULL) {
1434                                 ieee80211_free_node(ni);
1435                                 ifp->if_oerrors++;
1436                                 continue;
1437                         }
1438                 } else {
1439                         break;
1440                 }
1441
1442                 if (ic->ic_rawbpf != NULL)
1443                         bpf_mtap(ic->ic_rawbpf, m);
1444
1445                 wh = mtod(m, struct ieee80211_frame *);
1446                 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1447                         if (ieee80211_crypto_encap(ic, ni, m) == NULL) {
1448                                 ieee80211_free_node(ni);
1449                                 m_freem(m);
1450                                 ifp->if_oerrors++;
1451                                 continue;
1452                         }
1453                 }
1454                 wh = NULL;      /* Catch any invalid use */
1455
1456                 if (bwi_encap(sc, idx, m, &ni, mgt_pkt) != 0) {
1457                         /* 'm' is freed in bwi_encap() if we reach here */
1458                         if (ni != NULL)
1459                                 ieee80211_free_node(ni);
1460                         ifp->if_oerrors++;
1461                         continue;
1462                 }
1463
1464                 trans = 1;
1465                 tbd->tbd_used++;
1466                 idx = (idx + 1) % BWI_TX_NDESC;
1467
1468                 if (tbd->tbd_used + BWI_TX_NSPRDESC >= BWI_TX_NDESC) {
1469                         ifp->if_flags |= IFF_OACTIVE;
1470                         break;
1471                 }
1472         }
1473         tbd->tbd_idx = idx;
1474
1475         if (trans)
1476                 sc->sc_tx_timer = 5;
1477         ifp->if_timer = 1;
1478 }
1479
1480 static void
1481 bwi_watchdog(struct ifnet *ifp)
1482 {
1483         struct bwi_softc *sc = ifp->if_softc;
1484
1485         ASSERT_SERIALIZED(ifp->if_serializer);
1486
1487         ifp->if_timer = 0;
1488
1489         if ((ifp->if_flags & IFF_RUNNING) == 0)
1490                 return;
1491
1492         if (sc->sc_tx_timer) {
1493                 if (--sc->sc_tx_timer == 0) {
1494                         if_printf(ifp, "watchdog timeout\n");
1495                         ifp->if_oerrors++;
1496                         /* TODO */
1497                 } else {
1498                         ifp->if_timer = 1;
1499                 }
1500         }
1501         ieee80211_watchdog(&sc->sc_ic);
1502 }
1503
1504 static int
1505 bwi_stop(struct bwi_softc *sc)
1506 {
1507         struct ieee80211com *ic = &sc->sc_ic;
1508         struct ifnet *ifp = &ic->ic_if;
1509         struct bwi_mac *mac;
1510         int i, error, pwr_off = 0;
1511
1512         ASSERT_SERIALIZED(ifp->if_serializer);
1513
1514         ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
1515
1516         if (ifp->if_flags & IFF_RUNNING) {
1517                 KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
1518                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
1519
1520                 bwi_disable_intrs(sc, BWI_ALL_INTRS);
1521                 CSR_READ_4(sc, BWI_MAC_INTR_MASK);
1522                 bwi_mac_stop(mac);
1523         }
1524
1525         for (i = 0; i < sc->sc_nmac; ++i) {
1526                 struct bwi_regwin *old_rw;
1527
1528                 mac = &sc->sc_mac[i];
1529                 if ((mac->mac_flags & BWI_MAC_F_INITED) == 0)
1530                         continue;
1531
1532                 error = bwi_regwin_switch(sc, &mac->mac_regwin, &old_rw);
1533                 if (error)
1534                         continue;
1535
1536                 bwi_mac_shutdown(mac);
1537                 pwr_off = 1;
1538
1539                 bwi_regwin_switch(sc, old_rw, NULL);
1540         }
1541
1542         if (pwr_off)
1543                 bwi_bbp_power_off(sc);
1544
1545         sc->sc_tx_timer = 0;
1546         ifp->if_timer = 0;
1547         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1548         return 0;
1549 }
1550
1551 static void
1552 bwi_intr(void *xsc)
1553 {
1554         struct bwi_softc *sc = xsc;
1555         struct ifnet *ifp = &sc->sc_ic.ic_if;
1556         uint32_t intr_status;
1557         uint32_t txrx_intr_status[BWI_TXRX_NRING];
1558         int i, txrx_error;
1559
1560         ASSERT_SERIALIZED(ifp->if_serializer);
1561
1562         if ((ifp->if_flags & IFF_RUNNING) == 0)
1563                 return;
1564
1565         /*
1566          * Get interrupt status
1567          */
1568         intr_status = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
1569         if (intr_status == 0xffffffff)  /* Not for us */
1570                 return;
1571
1572         DPRINTF(sc, BWI_DBG_INTR, "intr status 0x%08x\n", intr_status);
1573
1574         intr_status &= CSR_READ_4(sc, BWI_MAC_INTR_MASK);
1575         if (intr_status == 0)           /* Nothing is interesting */
1576                 return;
1577
1578         txrx_error = 0;
1579         DPRINTF(sc, BWI_DBG_INTR, "%s\n", "TX/RX intr");
1580         for (i = 0; i < BWI_TXRX_NRING; ++i) {
1581                 uint32_t mask;
1582
1583                 if (BWI_TXRX_IS_RX(i))
1584                         mask = BWI_TXRX_RX_INTRS;
1585                 else
1586                         mask = BWI_TXRX_TX_INTRS;
1587
1588                 txrx_intr_status[i] =
1589                 CSR_READ_4(sc, BWI_TXRX_INTR_STATUS(i)) & mask;
1590
1591                 _DPRINTF(sc, BWI_DBG_INTR, ", %d 0x%08x",
1592                          i, txrx_intr_status[i]);
1593
1594                 if (txrx_intr_status[i] & BWI_TXRX_INTR_ERROR) {
1595                         if_printf(ifp, "intr fatal TX/RX (%d) error 0x%08x\n",
1596                                   i, txrx_intr_status[i]);
1597                         txrx_error = 1;
1598                 }
1599         }
1600         _DPRINTF(sc, BWI_DBG_INTR, "%s\n", "");
1601
1602         /*
1603          * Acknowledge interrupt
1604          */
1605         CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, intr_status);
1606
1607         for (i = 0; i < BWI_TXRX_NRING; ++i)
1608                 CSR_WRITE_4(sc, BWI_TXRX_INTR_STATUS(i), txrx_intr_status[i]);
1609
1610         /* Disable all interrupts */
1611         bwi_disable_intrs(sc, BWI_ALL_INTRS);
1612
1613         if (intr_status & BWI_INTR_PHY_TXERR)
1614                 if_printf(ifp, "intr PHY TX error\n");
1615
1616         if (txrx_error) {
1617                 /* TODO: reset device */
1618         }
1619
1620         if (intr_status & BWI_INTR_TBTT) {
1621                 KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
1622                 bwi_mac_config_ps((struct bwi_mac *)sc->sc_cur_regwin);
1623         }
1624
1625         if (intr_status & BWI_INTR_EO_ATIM)
1626                 if_printf(ifp, "EO_ATIM\n");
1627
1628         if (intr_status & BWI_INTR_PMQ) {
1629                 for (;;) {
1630                         if ((CSR_READ_4(sc, BWI_MAC_PS_STATUS) & 0x8) == 0)
1631                                 break;
1632                 }
1633                 CSR_WRITE_2(sc, BWI_MAC_PS_STATUS, 0x2);
1634         }
1635
1636         if (intr_status & BWI_INTR_NOISE)
1637                 if_printf(ifp, "intr noise\n");
1638
1639         if (txrx_intr_status[0] & BWI_TXRX_INTR_RX)
1640                 sc->sc_rxeof(sc);
1641
1642         if (txrx_intr_status[3] & BWI_TXRX_INTR_RX)
1643                 sc->sc_txeof_status(sc);
1644
1645         if (intr_status & BWI_INTR_TX_DONE)
1646                 bwi_txeof(sc);
1647
1648         /* TODO:LED */
1649
1650         /* Re-enable interrupts */
1651         bwi_enable_intrs(sc, BWI_INIT_INTRS);
1652 }
1653
1654 static int
1655 bwi_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
1656 {
1657         struct bwi_softc *sc = ic->ic_if.if_softc;
1658         struct ifnet *ifp = &ic->ic_if;
1659         int error;
1660
1661         ASSERT_SERIALIZED(ifp->if_serializer);
1662
1663         callout_stop(&sc->sc_scan_ch);
1664         callout_stop(&sc->sc_calib_ch);
1665
1666         ieee80211_ratectl_newstate(ic, nstate);
1667
1668         if (nstate == IEEE80211_S_INIT)
1669                 goto back;
1670
1671         error = bwi_set_chan(sc, ic->ic_curchan);
1672         if (error) {
1673                 if_printf(ifp, "can't set channel to %u\n",
1674                           ieee80211_chan2ieee(ic, ic->ic_curchan));
1675                 return error;
1676         }
1677
1678         if (ic->ic_opmode == IEEE80211_M_MONITOR) {
1679                 /* Nothing to do */
1680         } else if (nstate == IEEE80211_S_RUN) {
1681                 struct bwi_mac *mac;
1682
1683                 bwi_set_bssid(sc, ic->ic_bss->ni_bssid);
1684
1685                 KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
1686                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
1687
1688                 /* Initial TX power calibration */
1689                 bwi_mac_calibrate_txpower(mac);
1690         } else {
1691                 bwi_set_bssid(sc, bwi_zero_addr);
1692         }
1693
1694 back:
1695         error = sc->sc_newstate(ic, nstate, arg);
1696
1697         if (nstate == IEEE80211_S_SCAN) {
1698                 callout_reset(&sc->sc_scan_ch,
1699                               (sc->sc_dwell_time * hz) / 1000,
1700                               bwi_next_scan, sc);
1701         } else if (nstate == IEEE80211_S_RUN) {
1702                 /* XXX 15 seconds */
1703                 callout_reset(&sc->sc_calib_ch, hz * 15, bwi_calibrate, sc);
1704         }
1705         return error;
1706 }
1707
1708 static int
1709 bwi_media_change(struct ifnet *ifp)
1710 {
1711         int error;
1712
1713         ASSERT_SERIALIZED(ifp->if_serializer);
1714
1715         error = ieee80211_media_change(ifp);
1716         if (error != ENETRESET)
1717                 return error;
1718
1719         if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
1720                 bwi_init(ifp->if_softc);
1721         return 0;
1722 }
1723
1724 static int
1725 bwi_dma_alloc(struct bwi_softc *sc)
1726 {
1727         int error, i, has_txstats;
1728         bus_addr_t lowaddr = 0;
1729         bus_size_t tx_ring_sz, rx_ring_sz, desc_sz = 0;
1730         uint32_t txrx_ctrl_step = 0;
1731
1732         has_txstats = 0;
1733         for (i = 0; i < sc->sc_nmac; ++i) {
1734                 if (sc->sc_mac[i].mac_flags & BWI_MAC_F_HAS_TXSTATS) {
1735                         has_txstats = 1;
1736                         break;
1737                 }
1738         }
1739
1740         switch (sc->sc_bus_space) {
1741         case BWI_BUS_SPACE_30BIT:
1742         case BWI_BUS_SPACE_32BIT:
1743                 if (sc->sc_bus_space == BWI_BUS_SPACE_30BIT)
1744                         lowaddr = BWI_BUS_SPACE_MAXADDR;
1745                 else
1746                         lowaddr = BUS_SPACE_MAXADDR_32BIT;
1747                 desc_sz = sizeof(struct bwi_desc32);
1748                 txrx_ctrl_step = 0x20;
1749
1750                 sc->sc_init_tx_ring = bwi_init_tx_ring32;
1751                 sc->sc_free_tx_ring = bwi_free_tx_ring32;
1752                 sc->sc_init_rx_ring = bwi_init_rx_ring32;
1753                 sc->sc_free_rx_ring = bwi_free_rx_ring32;
1754                 sc->sc_setup_rxdesc = bwi_setup_rx_desc32;
1755                 sc->sc_setup_txdesc = bwi_setup_tx_desc32;
1756                 sc->sc_rxeof = bwi_rxeof32;
1757                 sc->sc_start_tx = bwi_start_tx32;
1758                 if (has_txstats) {
1759                         sc->sc_init_txstats = bwi_init_txstats32;
1760                         sc->sc_free_txstats = bwi_free_txstats32;
1761                         sc->sc_txeof_status = bwi_txeof_status32;
1762                 }
1763                 break;
1764
1765         case BWI_BUS_SPACE_64BIT:
1766                 lowaddr = BUS_SPACE_MAXADDR;    /* XXX */
1767                 desc_sz = sizeof(struct bwi_desc64);
1768                 txrx_ctrl_step = 0x40;
1769
1770                 sc->sc_init_tx_ring = bwi_init_tx_ring64;
1771                 sc->sc_free_tx_ring = bwi_free_tx_ring64;
1772                 sc->sc_init_rx_ring = bwi_init_rx_ring64;
1773                 sc->sc_free_rx_ring = bwi_free_rx_ring64;
1774                 sc->sc_setup_rxdesc = bwi_setup_rx_desc64;
1775                 sc->sc_setup_txdesc = bwi_setup_tx_desc64;
1776                 sc->sc_rxeof = bwi_rxeof64;
1777                 sc->sc_start_tx = bwi_start_tx64;
1778                 if (has_txstats) {
1779                         sc->sc_init_txstats = bwi_init_txstats64;
1780                         sc->sc_free_txstats = bwi_free_txstats64;
1781                         sc->sc_txeof_status = bwi_txeof_status64;
1782                 }
1783                 break;
1784         }
1785
1786         KKASSERT(lowaddr != 0);
1787         KKASSERT(desc_sz != 0);
1788         KKASSERT(txrx_ctrl_step != 0);
1789
1790         tx_ring_sz = roundup(desc_sz * BWI_TX_NDESC, BWI_RING_ALIGN);
1791         rx_ring_sz = roundup(desc_sz * BWI_RX_NDESC, BWI_RING_ALIGN);
1792
1793         /*
1794          * Create top level DMA tag
1795          */
1796         error = bus_dma_tag_create(NULL, BWI_ALIGN, 0,
1797                                    lowaddr, BUS_SPACE_MAXADDR,
1798                                    NULL, NULL,
1799                                    MAXBSIZE,
1800                                    BUS_SPACE_UNRESTRICTED,
1801                                    BUS_SPACE_MAXSIZE_32BIT,
1802                                    0, &sc->sc_parent_dtag);
1803         if (error) {
1804                 device_printf(sc->sc_dev, "can't create parent DMA tag\n");
1805                 return error;
1806         }
1807
1808 #define TXRX_CTRL(idx)  (BWI_TXRX_CTRL_BASE + (idx) * txrx_ctrl_step)
1809
1810         /*
1811          * Create TX ring DMA stuffs
1812          */
1813         error = bus_dma_tag_create(sc->sc_parent_dtag, BWI_RING_ALIGN, 0,
1814                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
1815                                    NULL, NULL,
1816                                    tx_ring_sz, 1, BUS_SPACE_MAXSIZE_32BIT,
1817                                    0, &sc->sc_txring_dtag);
1818         if (error) {
1819                 device_printf(sc->sc_dev, "can't create TX ring DMA tag\n");
1820                 return error;
1821         }
1822
1823         for (i = 0; i < BWI_TX_NRING; ++i) {
1824                 error = bwi_dma_ring_alloc(sc, sc->sc_txring_dtag,
1825                                            &sc->sc_tx_rdata[i], tx_ring_sz,
1826                                            TXRX_CTRL(i));
1827                 if (error) {
1828                         device_printf(sc->sc_dev, "%dth TX ring "
1829                                       "DMA alloc failed\n", i);
1830                         return error;
1831                 }
1832         }
1833
1834         /*
1835          * Create RX ring DMA stuffs
1836          */
1837         error = bus_dma_tag_create(sc->sc_parent_dtag, BWI_RING_ALIGN, 0,
1838                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
1839                                    NULL, NULL,
1840                                    rx_ring_sz, 1, BUS_SPACE_MAXSIZE_32BIT,
1841                                    0, &sc->sc_rxring_dtag);
1842         if (error) {
1843                 device_printf(sc->sc_dev, "can't create RX ring DMA tag\n");
1844                 return error;
1845         }
1846
1847         error = bwi_dma_ring_alloc(sc, sc->sc_rxring_dtag, &sc->sc_rx_rdata,
1848                                    rx_ring_sz, TXRX_CTRL(0));
1849         if (error) {
1850                 device_printf(sc->sc_dev, "RX ring DMA alloc failed\n");
1851                 return error;
1852         }
1853
1854         if (has_txstats) {
1855                 error = bwi_dma_txstats_alloc(sc, TXRX_CTRL(3), desc_sz);
1856                 if (error) {
1857                         device_printf(sc->sc_dev,
1858                                       "TX stats DMA alloc failed\n");
1859                         return error;
1860                 }
1861         }
1862
1863 #undef TXRX_CTRL
1864
1865         return bwi_dma_mbuf_create(sc);
1866 }
1867
1868 static void
1869 bwi_dma_free(struct bwi_softc *sc)
1870 {
1871         if (sc->sc_txring_dtag != NULL) {
1872                 int i;
1873
1874                 for (i = 0; i < BWI_TX_NRING; ++i) {
1875                         struct bwi_ring_data *rd = &sc->sc_tx_rdata[i];
1876
1877                         if (rd->rdata_desc != NULL) {
1878                                 bus_dmamap_unload(sc->sc_txring_dtag,
1879                                                   rd->rdata_dmap);
1880                                 bus_dmamem_free(sc->sc_txring_dtag,
1881                                                 rd->rdata_desc,
1882                                                 rd->rdata_dmap);
1883                         }
1884                 }
1885                 bus_dma_tag_destroy(sc->sc_txring_dtag);
1886         }
1887
1888         if (sc->sc_rxring_dtag != NULL) {
1889                 struct bwi_ring_data *rd = &sc->sc_rx_rdata;
1890
1891                 if (rd->rdata_desc != NULL) {
1892                         bus_dmamap_unload(sc->sc_rxring_dtag, rd->rdata_dmap);
1893                         bus_dmamem_free(sc->sc_rxring_dtag, rd->rdata_desc,
1894                                         rd->rdata_dmap);
1895                 }
1896                 bus_dma_tag_destroy(sc->sc_rxring_dtag);
1897         }
1898
1899         bwi_dma_txstats_free(sc);
1900         bwi_dma_mbuf_destroy(sc, BWI_TX_NRING, 1);
1901
1902         if (sc->sc_parent_dtag != NULL)
1903                 bus_dma_tag_destroy(sc->sc_parent_dtag);
1904 }
1905
1906 static int
1907 bwi_dma_ring_alloc(struct bwi_softc *sc, bus_dma_tag_t dtag,
1908                    struct bwi_ring_data *rd, bus_size_t size,
1909                    uint32_t txrx_ctrl)
1910 {
1911         int error;
1912
1913         error = bus_dmamem_alloc(dtag, &rd->rdata_desc,
1914                                  BUS_DMA_WAITOK | BUS_DMA_ZERO,
1915                                  &rd->rdata_dmap);
1916         if (error) {
1917                 device_printf(sc->sc_dev, "can't allocate DMA mem\n");
1918                 return error;
1919         }
1920
1921         error = bus_dmamap_load(dtag, rd->rdata_dmap, rd->rdata_desc, size,
1922                                 bwi_dma_ring_addr, &rd->rdata_paddr,
1923                                 BUS_DMA_WAITOK);
1924         if (error) {
1925                 device_printf(sc->sc_dev, "can't load DMA mem\n");
1926                 bus_dmamem_free(dtag, rd->rdata_desc, rd->rdata_dmap);
1927                 rd->rdata_desc = NULL;
1928                 return error;
1929         }
1930
1931         rd->rdata_txrx_ctrl = txrx_ctrl;
1932         return 0;
1933 }
1934
1935 static int
1936 bwi_dma_txstats_alloc(struct bwi_softc *sc, uint32_t ctrl_base,
1937                       bus_size_t desc_sz)
1938 {
1939         struct bwi_txstats_data *st;
1940         bus_size_t dma_size;
1941         int error;
1942
1943         st = kmalloc(sizeof(*st), M_DEVBUF, M_WAITOK | M_ZERO);
1944         sc->sc_txstats = st;
1945
1946         /*
1947          * Create TX stats descriptor DMA stuffs
1948          */
1949         dma_size = roundup(desc_sz * BWI_TXSTATS_NDESC, BWI_RING_ALIGN);
1950
1951         error = bus_dma_tag_create(sc->sc_parent_dtag, BWI_RING_ALIGN, 0,
1952                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
1953                                    NULL, NULL,
1954                                    dma_size, 1, BUS_SPACE_MAXSIZE_32BIT,
1955                                    0, &st->stats_ring_dtag);
1956         if (error) {
1957                 device_printf(sc->sc_dev, "can't create txstats ring "
1958                               "DMA tag\n");
1959                 return error;
1960         }
1961
1962         error = bus_dmamem_alloc(st->stats_ring_dtag, &st->stats_ring,
1963                                  BUS_DMA_WAITOK | BUS_DMA_ZERO,
1964                                  &st->stats_ring_dmap);
1965         if (error) {
1966                 device_printf(sc->sc_dev, "can't allocate txstats ring "
1967                               "DMA mem\n");
1968                 bus_dma_tag_destroy(st->stats_ring_dtag);
1969                 st->stats_ring_dtag = NULL;
1970                 return error;
1971         }
1972
1973         error = bus_dmamap_load(st->stats_ring_dtag, st->stats_ring_dmap,
1974                                 st->stats_ring, dma_size,
1975                                 bwi_dma_ring_addr, &st->stats_ring_paddr,
1976                                 BUS_DMA_WAITOK);
1977         if (error) {
1978                 device_printf(sc->sc_dev, "can't load txstats ring DMA mem\n");
1979                 bus_dmamem_free(st->stats_ring_dtag, st->stats_ring,
1980                                 st->stats_ring_dmap);
1981                 bus_dma_tag_destroy(st->stats_ring_dtag);
1982                 st->stats_ring_dtag = NULL;
1983                 return error;
1984         }
1985
1986         /*
1987          * Create TX stats DMA stuffs
1988          */
1989         dma_size = roundup(sizeof(struct bwi_txstats) * BWI_TXSTATS_NDESC,
1990                            BWI_ALIGN);
1991
1992         error = bus_dma_tag_create(sc->sc_parent_dtag, BWI_ALIGN, 0,
1993                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
1994                                    NULL, NULL,
1995                                    dma_size, 1, BUS_SPACE_MAXSIZE_32BIT,
1996                                    0, &st->stats_dtag);
1997         if (error) {
1998                 device_printf(sc->sc_dev, "can't create txstats DMA tag\n");
1999                 return error;
2000         }
2001
2002         error = bus_dmamem_alloc(st->stats_dtag, (void **)&st->stats,
2003                                  BUS_DMA_WAITOK | BUS_DMA_ZERO,
2004                                  &st->stats_dmap);
2005         if (error) {
2006                 device_printf(sc->sc_dev, "can't allocate txstats DMA mem\n");
2007                 bus_dma_tag_destroy(st->stats_dtag);
2008                 st->stats_dtag = NULL;
2009                 return error;
2010         }
2011
2012         error = bus_dmamap_load(st->stats_dtag, st->stats_dmap, st->stats,
2013                                 dma_size, bwi_dma_ring_addr, &st->stats_paddr,
2014                                 BUS_DMA_WAITOK);
2015         if (error) {
2016                 device_printf(sc->sc_dev, "can't load txstats DMA mem\n");
2017                 bus_dmamem_free(st->stats_dtag, st->stats, st->stats_dmap);
2018                 bus_dma_tag_destroy(st->stats_dtag);
2019                 st->stats_dtag = NULL;
2020                 return error;
2021         }
2022
2023         st->stats_ctrl_base = ctrl_base;
2024         return 0;
2025 }
2026
2027 static void
2028 bwi_dma_txstats_free(struct bwi_softc *sc)
2029 {
2030         struct bwi_txstats_data *st;
2031
2032         if (sc->sc_txstats == NULL)
2033                 return;
2034         st = sc->sc_txstats;
2035
2036         if (st->stats_ring_dtag != NULL) {
2037                 bus_dmamap_unload(st->stats_ring_dtag, st->stats_ring_dmap);
2038                 bus_dmamem_free(st->stats_ring_dtag, st->stats_ring,
2039                                 st->stats_ring_dmap);
2040                 bus_dma_tag_destroy(st->stats_ring_dtag);
2041         }
2042
2043         if (st->stats_dtag != NULL) {
2044                 bus_dmamap_unload(st->stats_dtag, st->stats_dmap);
2045                 bus_dmamem_free(st->stats_dtag, st->stats, st->stats_dmap);
2046                 bus_dma_tag_destroy(st->stats_dtag);
2047         }
2048
2049         kfree(st, M_DEVBUF);
2050 }
2051
2052 static void
2053 bwi_dma_ring_addr(void *arg, bus_dma_segment_t *seg, int nseg, int error)
2054 {
2055         KASSERT(nseg == 1, ("too many segments\n"));
2056         *((bus_addr_t *)arg) = seg->ds_addr;
2057 }
2058
2059 static int
2060 bwi_dma_mbuf_create(struct bwi_softc *sc)
2061 {
2062         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2063         int i, j, k, ntx, error;
2064
2065         /*
2066          * Create TX/RX mbuf DMA tag
2067          */
2068         error = bus_dma_tag_create(sc->sc_parent_dtag, 1, 0,
2069                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
2070                                    NULL, NULL, MCLBYTES, 1,
2071                                    BUS_SPACE_MAXSIZE_32BIT,
2072                                    0, &sc->sc_buf_dtag);
2073         if (error) {
2074                 device_printf(sc->sc_dev, "can't create mbuf DMA tag\n");
2075                 return error;
2076         }
2077
2078         ntx = 0;
2079
2080         /*
2081          * Create TX mbuf DMA map
2082          */
2083         for (i = 0; i < BWI_TX_NRING; ++i) {
2084                 struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[i];
2085
2086                 for (j = 0; j < BWI_TX_NDESC; ++j) {
2087                         error = bus_dmamap_create(sc->sc_buf_dtag, 0,
2088                                                   &tbd->tbd_buf[j].tb_dmap);
2089                         if (error) {
2090                                 device_printf(sc->sc_dev, "can't create "
2091                                               "%dth tbd, %dth DMA map\n", i, j);
2092
2093                                 ntx = i;
2094                                 for (k = 0; k < j; ++k) {
2095                                         bus_dmamap_destroy(sc->sc_buf_dtag,
2096                                                 tbd->tbd_buf[k].tb_dmap);
2097                                 }
2098                                 goto fail;
2099                         }
2100                 }
2101         }
2102         ntx = BWI_TX_NRING;
2103
2104         /*
2105          * Create RX mbuf DMA map and a spare DMA map
2106          */
2107         error = bus_dmamap_create(sc->sc_buf_dtag, 0,
2108                                   &rbd->rbd_tmp_dmap);
2109         if (error) {
2110                 device_printf(sc->sc_dev,
2111                               "can't create spare RX buf DMA map\n");
2112                 goto fail;
2113         }
2114
2115         for (j = 0; j < BWI_RX_NDESC; ++j) {
2116                 error = bus_dmamap_create(sc->sc_buf_dtag, 0,
2117                                           &rbd->rbd_buf[j].rb_dmap);
2118                 if (error) {
2119                         device_printf(sc->sc_dev, "can't create %dth "
2120                                       "RX buf DMA map\n", j);
2121
2122                         for (k = 0; k < j; ++k) {
2123                                 bus_dmamap_destroy(sc->sc_buf_dtag,
2124                                         rbd->rbd_buf[j].rb_dmap);
2125                         }
2126                         bus_dmamap_destroy(sc->sc_buf_dtag,
2127                                            rbd->rbd_tmp_dmap);
2128                         goto fail;
2129                 }
2130         }
2131
2132         return 0;
2133 fail:
2134         bwi_dma_mbuf_destroy(sc, ntx, 0);
2135         return error;
2136 }
2137
2138 static void
2139 bwi_dma_mbuf_destroy(struct bwi_softc *sc, int ntx, int nrx)
2140 {
2141         int i, j;
2142
2143         if (sc->sc_buf_dtag == NULL)
2144                 return;
2145
2146         for (i = 0; i < ntx; ++i) {
2147                 struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[i];
2148
2149                 for (j = 0; j < BWI_TX_NDESC; ++j) {
2150                         struct bwi_txbuf *tb = &tbd->tbd_buf[j];
2151
2152                         if (tb->tb_mbuf != NULL) {
2153                                 bus_dmamap_unload(sc->sc_buf_dtag,
2154                                                   tb->tb_dmap);
2155                                 m_freem(tb->tb_mbuf);
2156                         }
2157                         if (tb->tb_ni != NULL)
2158                                 ieee80211_free_node(tb->tb_ni);
2159                         bus_dmamap_destroy(sc->sc_buf_dtag, tb->tb_dmap);
2160                 }
2161         }
2162
2163         if (nrx) {
2164                 struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2165
2166                 bus_dmamap_destroy(sc->sc_buf_dtag, rbd->rbd_tmp_dmap);
2167                 for (j = 0; j < BWI_RX_NDESC; ++j) {
2168                         struct bwi_rxbuf *rb = &rbd->rbd_buf[j];
2169
2170                         if (rb->rb_mbuf != NULL) {
2171                                 bus_dmamap_unload(sc->sc_buf_dtag,
2172                                                   rb->rb_dmap);
2173                                 m_freem(rb->rb_mbuf);
2174                         }
2175                         bus_dmamap_destroy(sc->sc_buf_dtag, rb->rb_dmap);
2176                 }
2177         }
2178
2179         bus_dma_tag_destroy(sc->sc_buf_dtag);
2180         sc->sc_buf_dtag = NULL;
2181 }
2182
2183 static void
2184 bwi_enable_intrs(struct bwi_softc *sc, uint32_t enable_intrs)
2185 {
2186         CSR_SETBITS_4(sc, BWI_MAC_INTR_MASK, enable_intrs);
2187 }
2188
2189 static void
2190 bwi_disable_intrs(struct bwi_softc *sc, uint32_t disable_intrs)
2191 {
2192         CSR_CLRBITS_4(sc, BWI_MAC_INTR_MASK, disable_intrs);
2193 }
2194
2195 static int
2196 bwi_init_tx_ring32(struct bwi_softc *sc, int ring_idx)
2197 {
2198         struct bwi_ring_data *rd;
2199         struct bwi_txbuf_data *tbd;
2200         uint32_t val, addr_hi, addr_lo;
2201
2202         KKASSERT(ring_idx < BWI_TX_NRING);
2203         rd = &sc->sc_tx_rdata[ring_idx];
2204         tbd = &sc->sc_tx_bdata[ring_idx];
2205
2206         tbd->tbd_idx = 0;
2207         tbd->tbd_used = 0;
2208
2209         bzero(rd->rdata_desc, sizeof(struct bwi_desc32) * BWI_TX_NDESC);
2210         bus_dmamap_sync(sc->sc_txring_dtag, rd->rdata_dmap,
2211                         BUS_DMASYNC_PREWRITE);
2212
2213         addr_lo = __SHIFTOUT(rd->rdata_paddr, BWI_TXRX32_RINGINFO_ADDR_MASK);
2214         addr_hi = __SHIFTOUT(rd->rdata_paddr, BWI_TXRX32_RINGINFO_FUNC_MASK);
2215
2216         val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |
2217               __SHIFTIN(BWI_TXRX32_RINGINFO_FUNC_TXRX,
2218                         BWI_TXRX32_RINGINFO_FUNC_MASK);
2219         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, val);
2220
2221         val = __SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |
2222               BWI_TXRX32_CTRL_ENABLE;
2223         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, val);
2224
2225         return 0;
2226 }
2227
2228 static void
2229 bwi_init_rxdesc_ring32(struct bwi_softc *sc, uint32_t ctrl_base,
2230                        bus_addr_t paddr, int hdr_size, int ndesc)
2231 {
2232         uint32_t val, addr_hi, addr_lo;
2233
2234         addr_lo = __SHIFTOUT(paddr, BWI_TXRX32_RINGINFO_ADDR_MASK);
2235         addr_hi = __SHIFTOUT(paddr, BWI_TXRX32_RINGINFO_FUNC_MASK);
2236
2237         val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |
2238               __SHIFTIN(BWI_TXRX32_RINGINFO_FUNC_TXRX,
2239                         BWI_TXRX32_RINGINFO_FUNC_MASK);
2240         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_RINGINFO, val);
2241
2242         val = __SHIFTIN(hdr_size, BWI_RX32_CTRL_HDRSZ_MASK) |
2243               __SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |
2244               BWI_TXRX32_CTRL_ENABLE;
2245         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_CTRL, val);
2246
2247         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
2248                     (ndesc - 1) * sizeof(struct bwi_desc32));
2249 }
2250
2251 static int
2252 bwi_init_rx_ring32(struct bwi_softc *sc)
2253 {
2254         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2255         int i, error;
2256
2257         sc->sc_rx_bdata.rbd_idx = 0;
2258
2259         for (i = 0; i < BWI_RX_NDESC; ++i) {
2260                 error = bwi_newbuf(sc, i, 1);
2261                 if (error) {
2262                         if_printf(&sc->sc_ic.ic_if,
2263                                   "can't allocate %dth RX buffer\n", i);
2264                         return error;
2265                 }
2266         }
2267         bus_dmamap_sync(sc->sc_rxring_dtag, rd->rdata_dmap,
2268                         BUS_DMASYNC_PREWRITE);
2269
2270         bwi_init_rxdesc_ring32(sc, rd->rdata_txrx_ctrl, rd->rdata_paddr,
2271                                sizeof(struct bwi_rxbuf_hdr), BWI_RX_NDESC);
2272         return 0;
2273 }
2274
2275 static int
2276 bwi_init_txstats32(struct bwi_softc *sc)
2277 {
2278         struct bwi_txstats_data *st = sc->sc_txstats;
2279         bus_addr_t stats_paddr;
2280         int i;
2281
2282         bzero(st->stats, BWI_TXSTATS_NDESC * sizeof(struct bwi_txstats));
2283         bus_dmamap_sync(st->stats_dtag, st->stats_dmap, BUS_DMASYNC_PREWRITE);
2284
2285         st->stats_idx = 0;
2286
2287         stats_paddr = st->stats_paddr;
2288         for (i = 0; i < BWI_TXSTATS_NDESC; ++i) {
2289                 bwi_setup_desc32(sc, st->stats_ring, BWI_TXSTATS_NDESC, i,
2290                                  stats_paddr, sizeof(struct bwi_txstats), 0);
2291                 stats_paddr += sizeof(struct bwi_txstats);
2292         }
2293         bus_dmamap_sync(st->stats_ring_dtag, st->stats_ring_dmap,
2294                         BUS_DMASYNC_PREWRITE);
2295
2296         bwi_init_rxdesc_ring32(sc, st->stats_ctrl_base,
2297                                st->stats_ring_paddr, 0, BWI_TXSTATS_NDESC);
2298         return 0;
2299 }
2300
2301 static void
2302 bwi_setup_rx_desc32(struct bwi_softc *sc, int buf_idx, bus_addr_t paddr,
2303                     int buf_len)
2304 {
2305         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2306
2307         KKASSERT(buf_idx < BWI_RX_NDESC);
2308         bwi_setup_desc32(sc, rd->rdata_desc, BWI_RX_NDESC, buf_idx,
2309                          paddr, buf_len, 0);
2310 }
2311
2312 static void
2313 bwi_setup_tx_desc32(struct bwi_softc *sc, struct bwi_ring_data *rd,
2314                     int buf_idx, bus_addr_t paddr, int buf_len)
2315 {
2316         KKASSERT(buf_idx < BWI_TX_NDESC);
2317         bwi_setup_desc32(sc, rd->rdata_desc, BWI_TX_NDESC, buf_idx,
2318                          paddr, buf_len, 1);
2319 }
2320
2321 static int
2322 bwi_init_tx_ring64(struct bwi_softc *sc, int ring_idx)
2323 {
2324         /* TODO:64 */
2325         return EOPNOTSUPP;
2326 }
2327
2328 static int
2329 bwi_init_rx_ring64(struct bwi_softc *sc)
2330 {
2331         /* TODO:64 */
2332         return EOPNOTSUPP;
2333 }
2334
2335 static int
2336 bwi_init_txstats64(struct bwi_softc *sc)
2337 {
2338         /* TODO:64 */
2339         return EOPNOTSUPP;
2340 }
2341
2342 static void
2343 bwi_setup_rx_desc64(struct bwi_softc *sc, int buf_idx, bus_addr_t paddr,
2344                     int buf_len)
2345 {
2346         /* TODO:64 */
2347 }
2348
2349 static void
2350 bwi_setup_tx_desc64(struct bwi_softc *sc, struct bwi_ring_data *rd,
2351                     int buf_idx, bus_addr_t paddr, int buf_len)
2352 {
2353         /* TODO:64 */
2354 }
2355
2356 static void
2357 bwi_dma_buf_addr(void *arg, bus_dma_segment_t *seg, int nseg,
2358                  bus_size_t mapsz __unused, int error)
2359 {
2360         if (!error) {
2361                 KASSERT(nseg == 1, ("too many segments(%d)\n", nseg));
2362                 *((bus_addr_t *)arg) = seg->ds_addr;
2363         }
2364 }
2365
2366 static int
2367 bwi_newbuf(struct bwi_softc *sc, int buf_idx, int init)
2368 {
2369         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2370         struct bwi_rxbuf *rxbuf = &rbd->rbd_buf[buf_idx];
2371         struct bwi_rxbuf_hdr *hdr;
2372         bus_dmamap_t map;
2373         bus_addr_t paddr;
2374         struct mbuf *m;
2375         int error;
2376
2377         KKASSERT(buf_idx < BWI_RX_NDESC);
2378
2379         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2380         if (m == NULL) {
2381                 error = ENOBUFS;
2382
2383                 /*
2384                  * If the NIC is up and running, we need to:
2385                  * - Clear RX buffer's header.
2386                  * - Restore RX descriptor settings.
2387                  */
2388                 if (init)
2389                         return error;
2390                 else
2391                         goto back;
2392         }
2393         m->m_len = m->m_pkthdr.len = MCLBYTES;
2394
2395         /*
2396          * Try to load RX buf into temporary DMA map
2397          */
2398         error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, rbd->rbd_tmp_dmap, m,
2399                                      bwi_dma_buf_addr, &paddr,
2400                                      init ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT);
2401         if (error) {
2402                 m_freem(m);
2403
2404                 /*
2405                  * See the comment above
2406                  */
2407                 if (init)
2408                         return error;
2409                 else
2410                         goto back;
2411         }
2412
2413         if (!init)
2414                 bus_dmamap_unload(sc->sc_buf_dtag, rxbuf->rb_dmap);
2415         rxbuf->rb_mbuf = m;
2416         rxbuf->rb_paddr = paddr;
2417
2418         /*
2419          * Swap RX buf's DMA map with the loaded temporary one
2420          */
2421         map = rxbuf->rb_dmap;
2422         rxbuf->rb_dmap = rbd->rbd_tmp_dmap;
2423         rbd->rbd_tmp_dmap = map;
2424
2425 back:
2426         /*
2427          * Clear RX buf header
2428          */
2429         hdr = mtod(rxbuf->rb_mbuf, struct bwi_rxbuf_hdr *);
2430         bzero(hdr, sizeof(*hdr));
2431         bus_dmamap_sync(sc->sc_buf_dtag, rxbuf->rb_dmap, BUS_DMASYNC_PREWRITE);
2432
2433         /*
2434          * Setup RX buf descriptor
2435          */
2436         sc->sc_setup_rxdesc(sc, buf_idx, rxbuf->rb_paddr,
2437                             rxbuf->rb_mbuf->m_len - sizeof(*hdr));
2438         return error;
2439 }
2440
2441 static void
2442 bwi_set_addr_filter(struct bwi_softc *sc, uint16_t addr_ofs,
2443                     const uint8_t *addr)
2444 {
2445         int i;
2446
2447         CSR_WRITE_2(sc, BWI_ADDR_FILTER_CTRL,
2448                     BWI_ADDR_FILTER_CTRL_SET | addr_ofs);
2449
2450         for (i = 0; i < (IEEE80211_ADDR_LEN / 2); ++i) {
2451                 uint16_t addr_val;
2452
2453                 addr_val = (uint16_t)addr[i * 2] |
2454                            (((uint16_t)addr[(i * 2) + 1]) << 8);
2455                 CSR_WRITE_2(sc, BWI_ADDR_FILTER_DATA, addr_val);
2456         }
2457 }
2458
2459 static int
2460 bwi_set_chan(struct bwi_softc *sc, struct ieee80211_channel *c)
2461 {
2462         struct ieee80211com *ic = &sc->sc_ic;
2463         struct ifnet *ifp = &ic->ic_if;
2464         struct bwi_mac *mac;
2465         uint16_t flags;
2466         u_int chan;
2467
2468         ASSERT_SERIALIZED(ifp->if_serializer);
2469
2470         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
2471         mac = (struct bwi_mac *)sc->sc_cur_regwin;
2472
2473         chan = ieee80211_chan2ieee(ic, c);
2474
2475         bwi_rf_set_chan(mac, chan, 0);
2476
2477         /*
2478          * Setup radio tap channel freq and flags
2479          */
2480         if (IEEE80211_IS_CHAN_G(c))
2481                 flags = IEEE80211_CHAN_G;
2482         else
2483                 flags = IEEE80211_CHAN_B;
2484
2485         sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
2486                 htole16(c->ic_freq);
2487         sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
2488                 htole16(flags);
2489
2490         return 0;
2491 }
2492
2493 static void
2494 bwi_next_scan(void *xsc)
2495 {
2496         struct bwi_softc *sc = xsc;
2497         struct ieee80211com *ic = &sc->sc_ic;
2498         struct ifnet *ifp = &ic->ic_if;
2499
2500         lwkt_serialize_enter(ifp->if_serializer);
2501
2502         if (ic->ic_state == IEEE80211_S_SCAN)
2503                 ieee80211_next_scan(ic);
2504
2505         lwkt_serialize_exit(ifp->if_serializer);
2506 }
2507
2508 static void
2509 bwi_rxeof(struct bwi_softc *sc, int end_idx)
2510 {
2511         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2512         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2513         struct ieee80211com *ic = &sc->sc_ic;
2514         struct ifnet *ifp = &ic->ic_if;
2515         int idx;
2516
2517         idx = rbd->rbd_idx;
2518         while (idx != end_idx) {
2519                 struct bwi_rxbuf *rb = &rbd->rbd_buf[idx];
2520                 struct bwi_rxbuf_hdr *hdr;
2521                 struct ieee80211_frame_min *wh;
2522                 struct ieee80211_node *ni;
2523                 struct mbuf *m;
2524                 const uint8_t *plcp;
2525                 uint16_t flags2;
2526                 int buflen, wh_ofs, hdr_extra, rssi;
2527
2528                 m = rb->rb_mbuf;
2529                 bus_dmamap_sync(sc->sc_buf_dtag, rb->rb_dmap,
2530                                 BUS_DMASYNC_POSTREAD);
2531
2532                 if (bwi_newbuf(sc, idx, 0)) {
2533                         ifp->if_ierrors++;
2534                         goto next;
2535                 }
2536
2537                 hdr = mtod(m, struct bwi_rxbuf_hdr *);
2538                 flags2 = le16toh(hdr->rxh_flags2);
2539
2540                 hdr_extra = 0;
2541                 if (flags2 & BWI_RXH_F2_TYPE2FRAME)
2542                         hdr_extra = 2;
2543                 wh_ofs = hdr_extra + 6; /* XXX magic number */
2544
2545                 buflen = le16toh(hdr->rxh_buflen);
2546                 if (buflen < BWI_FRAME_MIN_LEN(wh_ofs)) {
2547                         if_printf(ifp, "short frame %d, hdr_extra %d\n",
2548                                   buflen, hdr_extra);
2549                         ifp->if_ierrors++;
2550                         m_freem(m);
2551                         goto next;
2552                 }
2553
2554                 plcp = ((const uint8_t *)(hdr + 1) + hdr_extra);
2555                 rssi = bwi_calc_rssi(sc, hdr);
2556
2557                 m->m_pkthdr.rcvif = ifp;
2558                 m->m_len = m->m_pkthdr.len = buflen + sizeof(*hdr);
2559                 m_adj(m, sizeof(*hdr) + wh_ofs);
2560
2561                 /* RX radio tap */
2562                 if (sc->sc_drvbpf != NULL)
2563                         bwi_rx_radiotap(sc, m, hdr, plcp, rssi);
2564
2565                 m_adj(m, -IEEE80211_CRC_LEN);
2566
2567                 wh = mtod(m, struct ieee80211_frame_min *);
2568                 ni = ieee80211_find_rxnode(ic, wh);
2569
2570                 ieee80211_input(ic, m, ni, rssi - BWI_NOISE_FLOOR,
2571                                 le16toh(hdr->rxh_tsf));
2572                 ieee80211_free_node(ni);
2573 next:
2574                 idx = (idx + 1) % BWI_RX_NDESC;
2575         }
2576
2577         rbd->rbd_idx = idx;
2578         bus_dmamap_sync(sc->sc_rxring_dtag, rd->rdata_dmap,
2579                         BUS_DMASYNC_PREWRITE);
2580 }
2581
2582 static void
2583 bwi_rxeof32(struct bwi_softc *sc)
2584 {
2585         uint32_t val, rx_ctrl;
2586         int end_idx;
2587
2588         rx_ctrl = sc->sc_rx_rdata.rdata_txrx_ctrl;
2589
2590         val = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);
2591         end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /
2592                   sizeof(struct bwi_desc32);
2593
2594         bwi_rxeof(sc, end_idx);
2595
2596         CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_INDEX,
2597                     end_idx * sizeof(struct bwi_desc32));
2598 }
2599
2600 static void
2601 bwi_rxeof64(struct bwi_softc *sc)
2602 {
2603         /* TODO:64 */
2604 }
2605
2606 static void
2607 bwi_reset_rx_ring32(struct bwi_softc *sc, uint32_t rx_ctrl)
2608 {
2609         int i;
2610
2611         CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_CTRL, 0);
2612
2613 #define NRETRY 10
2614
2615         for (i = 0; i < NRETRY; ++i) {
2616                 uint32_t status;
2617
2618                 status = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);
2619                 if (__SHIFTOUT(status, BWI_RX32_STATUS_STATE_MASK) ==
2620                     BWI_RX32_STATUS_STATE_DISABLED)
2621                         break;
2622
2623                 DELAY(1000);
2624         }
2625         if (i == NRETRY)
2626                 if_printf(&sc->sc_ic.ic_if, "reset rx ring timedout\n");
2627
2628 #undef NRETRY
2629
2630         CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_RINGINFO, 0);
2631 }
2632
2633 static void
2634 bwi_free_txstats32(struct bwi_softc *sc)
2635 {
2636         bwi_reset_rx_ring32(sc, sc->sc_txstats->stats_ctrl_base);
2637 }
2638
2639 static void
2640 bwi_free_rx_ring32(struct bwi_softc *sc)
2641 {
2642         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2643         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2644         int i;
2645
2646         bwi_reset_rx_ring32(sc, rd->rdata_txrx_ctrl);
2647
2648         for (i = 0; i < BWI_RX_NDESC; ++i) {
2649                 struct bwi_rxbuf *rb = &rbd->rbd_buf[i];
2650
2651                 if (rb->rb_mbuf != NULL) {
2652                         bus_dmamap_unload(sc->sc_buf_dtag, rb->rb_dmap);
2653                         m_freem(rb->rb_mbuf);
2654                         rb->rb_mbuf = NULL;
2655                 }
2656         }
2657 }
2658
2659 static void
2660 bwi_free_tx_ring32(struct bwi_softc *sc, int ring_idx)
2661 {
2662         struct bwi_ring_data *rd;
2663         struct bwi_txbuf_data *tbd;
2664         struct ifnet *ifp = &sc->sc_ic.ic_if;
2665         uint32_t state, val;
2666         int i;
2667
2668         KKASSERT(ring_idx < BWI_TX_NRING);
2669         rd = &sc->sc_tx_rdata[ring_idx];
2670         tbd = &sc->sc_tx_bdata[ring_idx];
2671
2672 #define NRETRY 10
2673
2674         for (i = 0; i < NRETRY; ++i) {
2675                 val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);
2676                 state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);
2677                 if (state == BWI_TX32_STATUS_STATE_DISABLED ||
2678                     state == BWI_TX32_STATUS_STATE_IDLE ||
2679                     state == BWI_TX32_STATUS_STATE_STOPPED)
2680                         break;
2681
2682                 DELAY(1000);
2683         }
2684         if (i == NRETRY) {
2685                 if_printf(ifp, "wait for TX ring(%d) stable timed out\n",
2686                           ring_idx);
2687         }
2688
2689         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, 0);
2690         for (i = 0; i < NRETRY; ++i) {
2691                 val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);
2692                 state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);
2693                 if (state == BWI_TX32_STATUS_STATE_DISABLED)
2694                         break;
2695
2696                 DELAY(1000);
2697         }
2698         if (i == NRETRY)
2699                 if_printf(ifp, "reset TX ring (%d) timed out\n", ring_idx);
2700
2701 #undef NRETRY
2702
2703         DELAY(1000);
2704
2705         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, 0);
2706
2707         for (i = 0; i < BWI_TX_NDESC; ++i) {
2708                 struct bwi_txbuf *tb = &tbd->tbd_buf[i];
2709
2710                 if (tb->tb_mbuf != NULL) {
2711                         bus_dmamap_unload(sc->sc_buf_dtag, tb->tb_dmap);
2712                         m_freem(tb->tb_mbuf);
2713                         tb->tb_mbuf = NULL;
2714                 }
2715                 if (tb->tb_ni != NULL) {
2716                         ieee80211_free_node(tb->tb_ni);
2717                         tb->tb_ni = NULL;
2718                 }
2719         }
2720 }
2721
2722 static void
2723 bwi_free_txstats64(struct bwi_softc *sc)
2724 {
2725         /* TODO:64 */
2726 }
2727
2728 static void
2729 bwi_free_rx_ring64(struct bwi_softc *sc)
2730 {
2731         /* TODO:64 */
2732 }
2733
2734 static void
2735 bwi_free_tx_ring64(struct bwi_softc *sc, int ring_idx)
2736 {
2737         /* TODO:64 */
2738 }
2739
2740 /* XXX does not belong here */
2741 uint8_t
2742 bwi_rate2plcp(uint8_t rate)
2743 {
2744         rate &= IEEE80211_RATE_VAL;
2745
2746         switch (rate) {
2747         case 2:         return 0xa;
2748         case 4:         return 0x14;
2749         case 11:        return 0x37;
2750         case 22:        return 0x6e;
2751         case 44:        return 0xdc;
2752
2753         case 12:        return 0xb;
2754         case 18:        return 0xf;
2755         case 24:        return 0xa;
2756         case 36:        return 0xe;
2757         case 48:        return 0x9;
2758         case 72:        return 0xd;
2759         case 96:        return 0x8;
2760         case 108:       return 0xc;
2761
2762         default:
2763                 panic("unsupported rate %u\n", rate);
2764         }
2765 }
2766
2767 /* XXX does not belong here */
2768 #define IEEE80211_OFDM_PLCP_RATE_MASK   __BITS(3, 0)
2769 #define IEEE80211_OFDM_PLCP_LEN_MASK    __BITS(16, 5)
2770
2771 static __inline void
2772 bwi_ofdm_plcp_header(uint32_t *plcp0, int pkt_len, uint8_t rate)
2773 {
2774         uint32_t plcp;
2775
2776         plcp = __SHIFTIN(bwi_rate2plcp(rate), IEEE80211_OFDM_PLCP_RATE_MASK) |
2777                __SHIFTIN(pkt_len, IEEE80211_OFDM_PLCP_LEN_MASK);
2778         *plcp0 = htole32(plcp);
2779 }
2780
2781 /* XXX does not belong here */
2782 struct ieee80211_ds_plcp_hdr {
2783         uint8_t         i_signal;
2784         uint8_t         i_service;
2785         uint16_t        i_length;
2786         uint16_t        i_crc;
2787 } __packed;
2788
2789 #define IEEE80211_DS_PLCP_SERVICE_LOCKED        0x04
2790 #define IEEE80211_DS_PLCL_SERVICE_PBCC          0x08
2791 #define IEEE80211_DS_PLCP_SERVICE_LENEXT5       0x20
2792 #define IEEE80211_DS_PLCP_SERVICE_LENEXT6       0x40
2793 #define IEEE80211_DS_PLCP_SERVICE_LENEXT7       0x80
2794
2795 static __inline void
2796 bwi_ds_plcp_header(struct ieee80211_ds_plcp_hdr *plcp, int pkt_len,
2797                    uint8_t rate)
2798 {
2799         int len, service, pkt_bitlen;
2800
2801         pkt_bitlen = pkt_len * NBBY;
2802         len = howmany(pkt_bitlen * 2, rate);
2803
2804         service = IEEE80211_DS_PLCP_SERVICE_LOCKED;
2805         if (rate == (11 * 2)) {
2806                 int pkt_bitlen1;
2807
2808                 /*
2809                  * PLCP service field needs to be adjusted,
2810                  * if TX rate is 11Mbytes/s
2811                  */
2812                 pkt_bitlen1 = len * 11;
2813                 if (pkt_bitlen1 - pkt_bitlen >= NBBY)
2814                         service |= IEEE80211_DS_PLCP_SERVICE_LENEXT7;
2815         }
2816
2817         plcp->i_signal = bwi_rate2plcp(rate);
2818         plcp->i_service = service;
2819         plcp->i_length = htole16(len);
2820         /* NOTE: do NOT touch i_crc */
2821 }
2822
2823 static __inline void
2824 bwi_plcp_header(void *plcp, int pkt_len, uint8_t rate)
2825 {
2826         enum ieee80211_modtype modtype;
2827
2828         /*
2829          * Assume caller has zeroed 'plcp'
2830          */
2831
2832         modtype = ieee80211_rate2modtype(rate);
2833         if (modtype == IEEE80211_MODTYPE_OFDM)
2834                 bwi_ofdm_plcp_header(plcp, pkt_len, rate);
2835         else if (modtype == IEEE80211_MODTYPE_DS)
2836                 bwi_ds_plcp_header(plcp, pkt_len, rate);
2837         else
2838                 panic("unsupport modulation type %u\n", modtype);
2839 }
2840
2841 static int
2842 bwi_encap(struct bwi_softc *sc, int idx, struct mbuf *m,
2843           struct ieee80211_node **ni0, int mgt_pkt)
2844 {
2845         struct ieee80211com *ic = &sc->sc_ic;
2846         struct ieee80211_node *ni = *ni0;
2847         struct bwi_ring_data *rd = &sc->sc_tx_rdata[BWI_TX_DATA_RING];
2848         struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[BWI_TX_DATA_RING];
2849         struct bwi_txbuf *tb = &tbd->tbd_buf[idx];
2850         struct bwi_mac *mac;
2851         struct bwi_txbuf_hdr *hdr;
2852         struct ieee80211_frame *wh;
2853         uint8_t rate, rate_fb;
2854         uint32_t mac_ctrl;
2855         uint16_t phy_ctrl;
2856         bus_addr_t paddr;
2857         int pkt_len, error, mcast_pkt = 0;
2858 #if 0
2859         const uint8_t *p;
2860         int i;
2861 #endif
2862
2863         KKASSERT(ni != NULL);
2864         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
2865         mac = (struct bwi_mac *)sc->sc_cur_regwin;
2866
2867         wh = mtod(m, struct ieee80211_frame *);
2868
2869         /* Get 802.11 frame len before prepending TX header */
2870         pkt_len = m->m_pkthdr.len + IEEE80211_CRC_LEN;
2871
2872         /*
2873          * Find TX rate
2874          */
2875         bzero(tb->tb_rateidx, sizeof(tb->tb_rateidx));
2876         if (!mgt_pkt) {
2877                 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
2878                         int idx;
2879
2880                         rate = IEEE80211_RS_RATE(&ni->ni_rates,
2881                                         ic->ic_fixed_rate);
2882
2883                         if (ic->ic_fixed_rate >= 1)
2884                                 idx = ic->ic_fixed_rate - 1;
2885                         else
2886                                 idx = 0;
2887                         rate_fb = IEEE80211_RS_RATE(&ni->ni_rates, idx);
2888                 } else {
2889                         tb->tb_rateidx_cnt = ieee80211_ratectl_findrate(ni,
2890                                 m->m_pkthdr.len, tb->tb_rateidx, BWI_NTXRATE);
2891
2892                         rate = IEEE80211_RS_RATE(&ni->ni_rates,
2893                                                  tb->tb_rateidx[0]);
2894                         if (tb->tb_rateidx_cnt == BWI_NTXRATE) {
2895                                 rate_fb = IEEE80211_RS_RATE(&ni->ni_rates,
2896                                                             tb->tb_rateidx[1]);
2897                         } else {
2898                                 rate_fb = rate;
2899                         }
2900                         tb->tb_buflen = m->m_pkthdr.len;
2901                 }
2902         } else {
2903                 /* Fixed at 1Mbits/s for mgt frames */
2904                 rate = rate_fb = (1 * 2);
2905         }
2906
2907         if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2908                 rate = rate_fb = ic->ic_mcast_rate;
2909                 mcast_pkt = 1;
2910         }
2911
2912         if (rate == 0 || rate_fb == 0) {
2913                 /* XXX this should not happen */
2914                 if_printf(&ic->ic_if, "invalid rate %u or fallback rate %u",
2915                           rate, rate_fb);
2916                 rate = rate_fb = (1 * 2); /* Force 1Mbits/s */
2917         }
2918
2919         /*
2920          * TX radio tap
2921          */
2922         if (sc->sc_drvbpf != NULL) {
2923                 sc->sc_tx_th.wt_flags = 0;
2924                 if (wh->i_fc[1] & IEEE80211_FC1_WEP)
2925                         sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2926                 if (ieee80211_rate2modtype(rate) == IEEE80211_MODTYPE_DS &&
2927                     (ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
2928                     rate != (1 * 2)) {
2929                         sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2930                 }
2931                 sc->sc_tx_th.wt_rate = rate;
2932
2933                 bpf_ptap(sc->sc_drvbpf, m, &sc->sc_tx_th, sc->sc_tx_th_len);
2934         }
2935
2936         /*
2937          * Setup the embedded TX header
2938          */
2939         M_PREPEND(m, sizeof(*hdr), MB_DONTWAIT);
2940         if (m == NULL) {
2941                 if_printf(&ic->ic_if, "prepend TX header failed\n");
2942                 return ENOBUFS;
2943         }
2944         hdr = mtod(m, struct bwi_txbuf_hdr *);
2945
2946         bzero(hdr, sizeof(*hdr));
2947
2948         bcopy(wh->i_fc, hdr->txh_fc, sizeof(hdr->txh_fc));
2949         bcopy(wh->i_addr1, hdr->txh_addr1, sizeof(hdr->txh_addr1));
2950
2951         if (!mcast_pkt) {
2952                 uint16_t dur;
2953                 uint8_t ack_rate;
2954
2955                 ack_rate = ieee80211_ack_rate(ni, rate_fb);
2956                 dur = ieee80211_txtime(ni,
2957                 sizeof(struct ieee80211_frame_ack) + IEEE80211_CRC_LEN,
2958                 ack_rate, ic->ic_flags & ~IEEE80211_F_SHPREAMBLE);
2959
2960                 hdr->txh_fb_duration = htole16(dur);
2961         }
2962
2963         hdr->txh_id = __SHIFTIN(BWI_TX_DATA_RING, BWI_TXH_ID_RING_MASK) |
2964                       __SHIFTIN(idx, BWI_TXH_ID_IDX_MASK);
2965
2966         bwi_plcp_header(hdr->txh_plcp, pkt_len, rate);
2967         bwi_plcp_header(hdr->txh_fb_plcp, pkt_len, rate_fb);
2968
2969         phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode,
2970                              BWI_TXH_PHY_C_ANTMODE_MASK);
2971         if (ieee80211_rate2modtype(rate) == IEEE80211_MODTYPE_OFDM)
2972                 phy_ctrl |= BWI_TXH_PHY_C_OFDM;
2973         else if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && rate != (2 * 1))
2974                 phy_ctrl |= BWI_TXH_PHY_C_SHPREAMBLE;
2975
2976         mac_ctrl = BWI_TXH_MAC_C_HWSEQ | BWI_TXH_MAC_C_FIRST_FRAG;
2977         if (!IEEE80211_IS_MULTICAST(wh->i_addr1))
2978                 mac_ctrl |= BWI_TXH_MAC_C_ACK;
2979         if (ieee80211_rate2modtype(rate_fb) == IEEE80211_MODTYPE_OFDM)
2980                 mac_ctrl |= BWI_TXH_MAC_C_FB_OFDM;
2981
2982         hdr->txh_mac_ctrl = htole32(mac_ctrl);
2983         hdr->txh_phy_ctrl = htole16(phy_ctrl);
2984
2985         /* Catch any further usage */
2986         hdr = NULL;
2987         wh = NULL;
2988
2989         /* DMA load */
2990         error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, tb->tb_dmap, m,
2991                                      bwi_dma_buf_addr, &paddr, BUS_DMA_NOWAIT);
2992         if (error && error != EFBIG) {
2993                 if_printf(&ic->ic_if, "can't load TX buffer (1) %d\n", error);
2994                 goto back;
2995         }
2996
2997         if (error) {    /* error == EFBIG */
2998                 struct mbuf *m_new;
2999
3000                 m_new = m_defrag(m, MB_DONTWAIT);
3001                 if (m_new == NULL) {
3002                         if_printf(&ic->ic_if, "can't defrag TX buffer\n");
3003                         error = ENOBUFS;
3004                         goto back;
3005                 } else {
3006                         m = m_new;
3007                 }
3008
3009                 error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, tb->tb_dmap, m,
3010                                              bwi_dma_buf_addr, &paddr,
3011                                              BUS_DMA_NOWAIT);
3012                 if (error) {
3013                         if_printf(&ic->ic_if, "can't load TX buffer (2) %d\n",
3014                                   error);
3015                         goto back;
3016                 }
3017         }
3018         error = 0;
3019
3020         bus_dmamap_sync(sc->sc_buf_dtag, tb->tb_dmap, BUS_DMASYNC_PREWRITE);
3021
3022         if (mgt_pkt || mcast_pkt) {
3023                 /* Don't involve mcast/mgt packets into TX rate control */
3024                 ieee80211_free_node(ni);
3025                 *ni0 = ni = NULL;
3026         }
3027         tb->tb_mbuf = m;
3028         tb->tb_ni = ni;
3029
3030 #if 0
3031         p = mtod(m, const uint8_t *);
3032         for (i = 0; i < m->m_pkthdr.len; ++i) {
3033                 if (i != 0 && i % 8 == 0)
3034                         kprintf("\n");
3035                 kprintf("%02x ", p[i]);
3036         }
3037         kprintf("\n");
3038 #endif
3039
3040         DPRINTF(sc, BWI_DBG_TX, "idx %d, pkt_len %d, buflen %d\n",
3041                 idx, pkt_len, m->m_pkthdr.len);
3042
3043         /* Setup TX descriptor */
3044         sc->sc_setup_txdesc(sc, rd, idx, paddr, m->m_pkthdr.len);
3045         bus_dmamap_sync(sc->sc_txring_dtag, rd->rdata_dmap,
3046                         BUS_DMASYNC_PREWRITE);
3047
3048         /* Kick start */
3049         sc->sc_start_tx(sc, rd->rdata_txrx_ctrl, idx);
3050
3051 back:
3052         if (error)
3053                 m_freem(m);
3054         return error;
3055 }
3056
3057 static void
3058 bwi_start_tx32(struct bwi_softc *sc, uint32_t tx_ctrl, int idx)
3059 {
3060         idx = (idx + 1) % BWI_TX_NDESC;
3061         CSR_WRITE_4(sc, tx_ctrl + BWI_TX32_INDEX,
3062                     idx * sizeof(struct bwi_desc32));
3063 }
3064
3065 static void
3066 bwi_start_tx64(struct bwi_softc *sc, uint32_t tx_ctrl, int idx)
3067 {
3068         /* TODO:64 */
3069 }
3070
3071 static void
3072 bwi_txeof_status32(struct bwi_softc *sc)
3073 {
3074         struct ifnet *ifp = &sc->sc_ic.ic_if;
3075         uint32_t val, ctrl_base;
3076         int end_idx;
3077
3078         ctrl_base = sc->sc_txstats->stats_ctrl_base;
3079
3080         val = CSR_READ_4(sc, ctrl_base + BWI_RX32_STATUS);
3081         end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /
3082                   sizeof(struct bwi_desc32);
3083
3084         bwi_txeof_status(sc, end_idx);
3085
3086         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
3087                     end_idx * sizeof(struct bwi_desc32));
3088
3089         if ((ifp->if_flags & IFF_OACTIVE) == 0)
3090                 ifp->if_start(ifp);
3091 }
3092
3093 static void
3094 bwi_txeof_status64(struct bwi_softc *sc)
3095 {
3096         /* TODO:64 */
3097 }
3098
3099 static void
3100 _bwi_txeof(struct bwi_softc *sc, uint16_t tx_id, int acked, int data_txcnt)
3101 {
3102         struct ifnet *ifp = &sc->sc_ic.ic_if;
3103         struct bwi_txbuf_data *tbd;
3104         struct bwi_txbuf *tb;
3105         int ring_idx, buf_idx;
3106
3107         if (tx_id == 0) {
3108                 if_printf(ifp, "zero tx id\n");
3109                 return;
3110         }
3111
3112         ring_idx = __SHIFTOUT(tx_id, BWI_TXH_ID_RING_MASK);
3113         buf_idx = __SHIFTOUT(tx_id, BWI_TXH_ID_IDX_MASK);
3114
3115         KKASSERT(ring_idx == BWI_TX_DATA_RING);
3116         KKASSERT(buf_idx < BWI_TX_NDESC);
3117
3118         tbd = &sc->sc_tx_bdata[ring_idx];
3119         KKASSERT(tbd->tbd_used > 0);
3120         tbd->tbd_used--;
3121
3122         tb = &tbd->tbd_buf[buf_idx];
3123
3124         DPRINTF(sc, BWI_DBG_TXEOF, "txeof idx %d, "
3125                 "acked %d, data_txcnt %d, ni %p\n",
3126                 buf_idx, acked, data_txcnt, tb->tb_ni);
3127
3128         bus_dmamap_unload(sc->sc_buf_dtag, tb->tb_dmap);
3129         m_freem(tb->tb_mbuf);
3130         tb->tb_mbuf = NULL;
3131
3132         if (tb->tb_ni != NULL) {
3133                 struct ieee80211_ratectl_res res[BWI_NTXRATE];
3134                 int res_len, retry;
3135
3136                 if (data_txcnt <= BWI_SHRETRY_FB || tb->tb_rateidx_cnt == 1) {
3137                         res_len = 1;
3138                         res[0].rc_res_rateidx = tb->tb_rateidx[0];
3139                         res[0].rc_res_tries = data_txcnt;
3140                 } else {
3141                         res_len = BWI_NTXRATE;
3142                         res[0].rc_res_rateidx = tb->tb_rateidx[0];
3143                         res[0].rc_res_tries = BWI_SHRETRY_FB;
3144                         res[1].rc_res_rateidx = tb->tb_rateidx[1];
3145                         res[1].rc_res_tries = data_txcnt - BWI_SHRETRY_FB;
3146                 }
3147
3148                 if (acked)
3149                         retry = data_txcnt > 0 ? data_txcnt - 1 : 0;
3150                 else
3151                         retry = data_txcnt;
3152
3153                 ieee80211_ratectl_tx_complete(tb->tb_ni, tb->tb_buflen,
3154                         res, res_len, retry, 0, !acked);
3155
3156                 ieee80211_free_node(tb->tb_ni);
3157                 tb->tb_ni = NULL;
3158         }
3159
3160         if (tbd->tbd_used == 0)
3161                 sc->sc_tx_timer = 0;
3162
3163         ifp->if_flags &= ~IFF_OACTIVE;
3164 }
3165
3166 static void
3167 bwi_txeof_status(struct bwi_softc *sc, int end_idx)
3168 {
3169         struct bwi_txstats_data *st = sc->sc_txstats;
3170         int idx;
3171
3172         bus_dmamap_sync(st->stats_dtag, st->stats_dmap, BUS_DMASYNC_POSTREAD);
3173
3174         idx = st->stats_idx;
3175         while (idx != end_idx) {
3176                 const struct bwi_txstats *stats = &st->stats[idx];
3177
3178                 if ((stats->txs_flags & BWI_TXS_F_PENDING) == 0) {
3179                         int data_txcnt;
3180
3181                         data_txcnt = __SHIFTOUT(stats->txs_txcnt,
3182                                                 BWI_TXS_TXCNT_DATA);
3183                         _bwi_txeof(sc, le16toh(stats->txs_id),
3184                                    stats->txs_flags & BWI_TXS_F_ACKED,
3185                                    data_txcnt);
3186                 }
3187                 idx = (idx + 1) % BWI_TXSTATS_NDESC;
3188         }
3189         st->stats_idx = idx;
3190 }
3191
3192 static void
3193 bwi_txeof(struct bwi_softc *sc)
3194 {
3195         struct ifnet *ifp = &sc->sc_ic.ic_if;
3196
3197         for (;;) {
3198                 uint32_t tx_status0, tx_status1;
3199                 uint16_t tx_id;
3200                 int data_txcnt;
3201
3202                 tx_status0 = CSR_READ_4(sc, BWI_TXSTATUS0);
3203                 if ((tx_status0 & BWI_TXSTATUS0_VALID) == 0)
3204                         break;
3205                 tx_status1 = CSR_READ_4(sc, BWI_TXSTATUS1);
3206
3207                 tx_id = __SHIFTOUT(tx_status0, BWI_TXSTATUS0_TXID_MASK);
3208                 data_txcnt = __SHIFTOUT(tx_status0,
3209                                 BWI_TXSTATUS0_DATA_TXCNT_MASK);
3210
3211                 if (tx_status0 & (BWI_TXSTATUS0_AMPDU | BWI_TXSTATUS0_PENDING))
3212                         continue;
3213
3214                 _bwi_txeof(sc, tx_id, tx_status0 & BWI_TXSTATUS0_ACKED,
3215                            data_txcnt);
3216         }
3217
3218         if ((ifp->if_flags & IFF_OACTIVE) == 0)
3219                 ifp->if_start(ifp);
3220 }
3221
3222 static int
3223 bwi_bbp_power_on(struct bwi_softc *sc, enum bwi_clock_mode clk_mode)
3224 {
3225         bwi_power_on(sc, 1);
3226         return bwi_set_clock_mode(sc, clk_mode);
3227 }
3228
3229 static void
3230 bwi_bbp_power_off(struct bwi_softc *sc)
3231 {
3232         bwi_set_clock_mode(sc, BWI_CLOCK_MODE_SLOW);
3233         bwi_power_off(sc, 1);
3234 }
3235
3236 static int
3237 bwi_get_pwron_delay(struct bwi_softc *sc)
3238 {
3239         struct bwi_regwin *com, *old;
3240         struct bwi_clock_freq freq;
3241         uint32_t val;
3242         int error;
3243
3244         com = &sc->sc_com_regwin;
3245         KKASSERT(BWI_REGWIN_EXIST(com));
3246
3247         if ((sc->sc_cap & BWI_CAP_CLKMODE) == 0)
3248                 return 0;
3249
3250         error = bwi_regwin_switch(sc, com, &old);
3251         if (error)
3252                 return error;
3253
3254         bwi_get_clock_freq(sc, &freq);
3255
3256         val = CSR_READ_4(sc, BWI_PLL_ON_DELAY);
3257         sc->sc_pwron_delay = howmany((val + 2) * 1000000, freq.clkfreq_min);
3258         DPRINTF(sc, BWI_DBG_ATTACH, "power on delay %u\n", sc->sc_pwron_delay);
3259
3260         return bwi_regwin_switch(sc, old, NULL);
3261 }
3262
3263 static int
3264 bwi_bus_attach(struct bwi_softc *sc)
3265 {
3266         struct bwi_regwin *bus, *old;
3267         int error;
3268
3269         bus = &sc->sc_bus_regwin;
3270
3271         error = bwi_regwin_switch(sc, bus, &old);
3272         if (error)
3273                 return error;
3274
3275         if (!bwi_regwin_is_enabled(sc, bus))
3276                 bwi_regwin_enable(sc, bus, 0);
3277
3278         /* Disable interripts */
3279         CSR_WRITE_4(sc, BWI_INTRVEC, 0);
3280
3281         return bwi_regwin_switch(sc, old, NULL);
3282 }
3283
3284 static const char *
3285 bwi_regwin_name(const struct bwi_regwin *rw)
3286 {
3287         switch (rw->rw_type) {
3288         case BWI_REGWIN_T_COM:
3289                 return "COM";
3290         case BWI_REGWIN_T_BUSPCI:
3291                 return "PCI";
3292         case BWI_REGWIN_T_MAC:
3293                 return "MAC";
3294         case BWI_REGWIN_T_BUSPCIE:
3295                 return "PCIE";
3296         }
3297         panic("unknown regwin type 0x%04x\n", rw->rw_type);
3298         return NULL;
3299 }
3300
3301 static uint32_t
3302 bwi_regwin_disable_bits(struct bwi_softc *sc)
3303 {
3304         uint32_t busrev;
3305
3306         /* XXX cache this */
3307         busrev = __SHIFTOUT(CSR_READ_4(sc, BWI_ID_LO), BWI_ID_LO_BUSREV_MASK);
3308         DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT | BWI_DBG_MISC,
3309                 "bus rev %u\n", busrev);
3310
3311         if (busrev == BWI_BUSREV_0)
3312                 return BWI_STATE_LO_DISABLE1;
3313         else if (busrev == BWI_BUSREV_1)
3314                 return BWI_STATE_LO_DISABLE2;
3315         else
3316                 return (BWI_STATE_LO_DISABLE1 | BWI_STATE_LO_DISABLE2);
3317 }
3318
3319 int
3320 bwi_regwin_is_enabled(struct bwi_softc *sc, struct bwi_regwin *rw)
3321 {
3322         uint32_t val, disable_bits;
3323
3324         disable_bits = bwi_regwin_disable_bits(sc);
3325         val = CSR_READ_4(sc, BWI_STATE_LO);
3326
3327         if ((val & (BWI_STATE_LO_CLOCK |
3328                     BWI_STATE_LO_RESET |
3329                     disable_bits)) == BWI_STATE_LO_CLOCK) {
3330                 DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT, "%s is enabled\n",
3331                         bwi_regwin_name(rw));
3332                 return 1;
3333         } else {
3334                 DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT, "%s is disabled\n",
3335                         bwi_regwin_name(rw));
3336                 return 0;
3337         }
3338 }
3339
3340 void
3341 bwi_regwin_disable(struct bwi_softc *sc, struct bwi_regwin *rw, uint32_t flags)
3342 {
3343         uint32_t state_lo, disable_bits;
3344         int i;
3345
3346         state_lo = CSR_READ_4(sc, BWI_STATE_LO);
3347
3348         /*
3349          * If current regwin is in 'reset' state, it was already disabled.
3350          */
3351         if (state_lo & BWI_STATE_LO_RESET) {
3352                 DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT,
3353                         "%s was already disabled\n", bwi_regwin_name(rw));
3354                 return;
3355         }
3356
3357         disable_bits = bwi_regwin_disable_bits(sc);
3358
3359         /*
3360          * Disable normal clock
3361          */
3362         state_lo = BWI_STATE_LO_CLOCK | disable_bits;
3363         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3364
3365         /*
3366          * Wait until normal clock is disabled
3367          */
3368 #define NRETRY  1000
3369         for (i = 0; i < NRETRY; ++i) {
3370                 state_lo = CSR_READ_4(sc, BWI_STATE_LO);
3371                 if (state_lo & disable_bits)
3372                         break;
3373                 DELAY(10);
3374         }
3375         if (i == NRETRY) {
3376                 device_printf(sc->sc_dev, "%s disable clock timeout\n",
3377                               bwi_regwin_name(rw));
3378         }
3379
3380         for (i = 0; i < NRETRY; ++i) {
3381                 uint32_t state_hi;
3382
3383                 state_hi = CSR_READ_4(sc, BWI_STATE_HI);
3384                 if ((state_hi & BWI_STATE_HI_BUSY) == 0)
3385                         break;
3386                 DELAY(10);
3387         }
3388         if (i == NRETRY) {
3389                 device_printf(sc->sc_dev, "%s wait BUSY unset timeout\n",
3390                               bwi_regwin_name(rw));
3391         }
3392 #undef NRETRY
3393
3394         /*
3395          * Reset and disable regwin with gated clock
3396          */
3397         state_lo = BWI_STATE_LO_RESET | disable_bits |
3398                    BWI_STATE_LO_CLOCK | BWI_STATE_LO_GATED_CLOCK |
3399                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3400         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3401
3402         /* Flush pending bus write */
3403         CSR_READ_4(sc, BWI_STATE_LO);
3404         DELAY(1);
3405
3406         /* Reset and disable regwin */
3407         state_lo = BWI_STATE_LO_RESET | disable_bits |
3408                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3409         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3410
3411         /* Flush pending bus write */
3412         CSR_READ_4(sc, BWI_STATE_LO);
3413         DELAY(1);
3414 }
3415
3416 void
3417 bwi_regwin_enable(struct bwi_softc *sc, struct bwi_regwin *rw, uint32_t flags)
3418 {
3419         uint32_t state_lo, state_hi, imstate;
3420
3421         bwi_regwin_disable(sc, rw, flags);
3422
3423         /* Reset regwin with gated clock */
3424         state_lo = BWI_STATE_LO_RESET |
3425                    BWI_STATE_LO_CLOCK |
3426                    BWI_STATE_LO_GATED_CLOCK |
3427                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3428         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3429
3430         /* Flush pending bus write */
3431         CSR_READ_4(sc, BWI_STATE_LO);
3432         DELAY(1);
3433
3434         state_hi = CSR_READ_4(sc, BWI_STATE_HI);
3435         if (state_hi & BWI_STATE_HI_SERROR)
3436                 CSR_WRITE_4(sc, BWI_STATE_HI, 0);
3437
3438         imstate = CSR_READ_4(sc, BWI_IMSTATE);
3439         if (imstate & (BWI_IMSTATE_INBAND_ERR | BWI_IMSTATE_TIMEOUT)) {
3440                 imstate &= ~(BWI_IMSTATE_INBAND_ERR | BWI_IMSTATE_TIMEOUT);
3441                 CSR_WRITE_4(sc, BWI_IMSTATE, imstate);
3442         }
3443
3444         /* Enable regwin with gated clock */
3445         state_lo = BWI_STATE_LO_CLOCK |
3446                    BWI_STATE_LO_GATED_CLOCK |
3447                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3448         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3449
3450         /* Flush pending bus write */
3451         CSR_READ_4(sc, BWI_STATE_LO);
3452         DELAY(1);
3453
3454         /* Enable regwin with normal clock */
3455         state_lo = BWI_STATE_LO_CLOCK |
3456                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3457         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3458
3459         /* Flush pending bus write */
3460         CSR_READ_4(sc, BWI_STATE_LO);
3461         DELAY(1);
3462 }
3463
3464 static void
3465 bwi_set_bssid(struct bwi_softc *sc, const uint8_t *bssid)
3466 {
3467         struct ieee80211com *ic = &sc->sc_ic;
3468         struct bwi_mac *mac;
3469         struct bwi_myaddr_bssid buf;
3470         const uint8_t *p;
3471         uint32_t val;
3472         int n, i;
3473
3474         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
3475         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3476
3477         bwi_set_addr_filter(sc, BWI_ADDR_FILTER_BSSID, bssid);
3478
3479         bcopy(ic->ic_myaddr, buf.myaddr, sizeof(buf.myaddr));
3480         bcopy(bssid, buf.bssid, sizeof(buf.bssid));
3481
3482         n = sizeof(buf) / sizeof(val);
3483         p = (const uint8_t *)&buf;
3484         for (i = 0; i < n; ++i) {
3485                 int j;
3486
3487                 val = 0;
3488                 for (j = 0; j < sizeof(val); ++j)
3489                         val |= ((uint32_t)(*p++)) << (j * 8);
3490
3491                 TMPLT_WRITE_4(mac, 0x20 + (i * sizeof(val)), val);
3492         }
3493 }
3494
3495 static void
3496 bwi_updateslot(struct ifnet *ifp)
3497 {
3498         struct bwi_softc *sc = ifp->if_softc;
3499         struct ieee80211com *ic = &sc->sc_ic;
3500         struct bwi_mac *mac;
3501
3502         if ((ifp->if_flags & IFF_RUNNING) == 0)
3503                 return;
3504
3505         ASSERT_SERIALIZED(ifp->if_serializer);
3506
3507         DPRINTF(sc, BWI_DBG_80211, "%s\n", __func__);
3508
3509         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
3510         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3511
3512         bwi_mac_updateslot(mac, (ic->ic_flags & IEEE80211_F_SHSLOT));
3513 }
3514
3515 static void
3516 bwi_calibrate(void *xsc)
3517 {
3518         struct bwi_softc *sc = xsc;
3519         struct ieee80211com *ic = &sc->sc_ic;
3520         struct ifnet *ifp = &ic->ic_if;
3521
3522         lwkt_serialize_enter(ifp->if_serializer);
3523
3524         if (ic->ic_state == IEEE80211_S_RUN) {
3525                 struct bwi_mac *mac;
3526
3527                 KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
3528                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
3529
3530                 if (ic->ic_opmode != IEEE80211_M_MONITOR)
3531                         bwi_mac_calibrate_txpower(mac);
3532
3533                 /* XXX 15 seconds */
3534                 callout_reset(&sc->sc_calib_ch, hz * 15, bwi_calibrate, sc);
3535         }
3536
3537         lwkt_serialize_exit(ifp->if_serializer);
3538 }
3539
3540 static int
3541 bwi_calc_rssi(struct bwi_softc *sc, const struct bwi_rxbuf_hdr *hdr)
3542 {
3543         struct bwi_mac *mac;
3544
3545         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
3546         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3547
3548         return bwi_rf_calc_rssi(mac, hdr);
3549 }
3550
3551 static __inline uint8_t
3552 bwi_ofdm_plcp2rate(const uint32_t *plcp0)
3553 {
3554         uint32_t plcp;
3555         uint8_t plcp_rate;
3556
3557         plcp = le32toh(*plcp0);
3558         plcp_rate = __SHIFTOUT(plcp, IEEE80211_OFDM_PLCP_RATE_MASK);
3559         return ieee80211_plcp2rate(plcp_rate, 1);
3560 }
3561
3562 static __inline uint8_t
3563 bwi_ds_plcp2rate(const struct ieee80211_ds_plcp_hdr *hdr)
3564 {
3565         return ieee80211_plcp2rate(hdr->i_signal, 0);
3566 }
3567
3568 static void
3569 bwi_rx_radiotap(struct bwi_softc *sc, struct mbuf *m,
3570                 struct bwi_rxbuf_hdr *hdr, const void *plcp, int rssi)
3571 {
3572         const struct ieee80211_frame_min *wh;
3573         uint16_t flags1;
3574         uint8_t rate;
3575
3576         KKASSERT(sc->sc_drvbpf != NULL);
3577
3578         flags1 = htole16(hdr->rxh_flags1);
3579         if (flags1 & BWI_RXH_F1_OFDM)
3580                 rate = bwi_ofdm_plcp2rate(plcp);
3581         else
3582                 rate = bwi_ds_plcp2rate(plcp);
3583
3584         sc->sc_rx_th.wr_flags = IEEE80211_RADIOTAP_F_FCS;
3585         if (flags1 & BWI_RXH_F1_SHPREAMBLE)
3586                 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3587
3588         wh = mtod(m, const struct ieee80211_frame_min *);
3589         if (wh->i_fc[1] & IEEE80211_FC1_WEP)
3590                 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_WEP;
3591
3592         sc->sc_rx_th.wr_tsf = hdr->rxh_tsf; /* No endian convertion */
3593         sc->sc_rx_th.wr_rate = rate;
3594         sc->sc_rx_th.wr_antsignal = rssi;
3595         sc->sc_rx_th.wr_antnoise = BWI_NOISE_FLOOR;
3596
3597         bpf_ptap(sc->sc_drvbpf, m, &sc->sc_rx_th, sc->sc_rx_th_len);
3598 }