2 * Copyright (c) 1997 Bruce Evans.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: src/sys/i386/isa/ipl_funcs.c,v 1.32.2.5 2002/12/17 18:04:02 sam Exp $
27 * $DragonFly: src/sys/i386/isa/Attic/ipl_funcs.c,v 1.9 2005/06/10 23:59:28 dillon Exp $
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
33 #include <sys/sysctl.h>
35 #include <machine/ipl.h>
36 #include <machine/globaldata.h>
37 #include <machine/pcb.h>
38 #include <i386/isa/intr_machdep.h>
41 * Bits in the ipending bitmap variable must be set atomically because
42 * ipending may be manipulated by interrupts or other cpu's without holding
45 * Note: setbits uses a locked or, making simple cases MP safe.
47 #define DO_SETBITS(name, var, bits) \
50 struct mdglobaldata *gd = mdcpu; \
51 atomic_set_int_nonlocked(var, bits); \
52 atomic_set_int_nonlocked(&gd->mi.gd_reqflags, RQF_INTPEND); \
55 DO_SETBITS(setdelayed, &gd->gd_ipending, loadandclear(&gd->gd_idelayed))
57 DO_SETBITS(setsoftcamnet,&gd->gd_ipending, SWI_CAMNET_PENDING)
58 DO_SETBITS(setsoftcambio,&gd->gd_ipending, SWI_CAMBIO_PENDING)
59 DO_SETBITS(setsoftclock, &gd->gd_ipending, SWI_CLOCK_PENDING)
60 DO_SETBITS(setsoftnet, &gd->gd_ipending, SWI_NET_PENDING)
61 DO_SETBITS(setsofttty, &gd->gd_ipending, SWI_TTY_PENDING)
62 DO_SETBITS(setsoftvm, &gd->gd_ipending, SWI_VM_PENDING)
63 DO_SETBITS(setsofttq, &gd->gd_ipending, SWI_TQ_PENDING)
64 DO_SETBITS(setsoftcrypto,&gd->gd_ipending, SWI_CRYPTO_PENDING)
66 DO_SETBITS(schedsoftcamnet, &gd->gd_idelayed, SWI_CAMNET_PENDING)
67 DO_SETBITS(schedsoftcambio, &gd->gd_idelayed, SWI_CAMBIO_PENDING)
68 DO_SETBITS(schedsoftnet, &gd->gd_idelayed, SWI_NET_PENDING)
69 DO_SETBITS(schedsofttty, &gd->gd_idelayed, SWI_TTY_PENDING)
70 DO_SETBITS(schedsoftvm, &gd->gd_idelayed, SWI_VM_PENDING)
71 DO_SETBITS(schedsofttq, &gd->gd_idelayed, SWI_TQ_PENDING)
72 /* YYY schedsoft what? */
75 softclockpending(void)
77 return ((mdcpu->gd_ipending | mdcpu->gd_fpending) & SWI_CLOCK_PENDING);
81 * Support for SPL assertions.
84 /************************************************************************
86 ************************************************************************
88 * Implement splXXX(), spl0(), splx(), and splq(). splXXX() disables a
89 * set of interrupts (e.g. splbio() disables interrupts relating to
90 * device I/O) and returns the previous interrupt mask. splx() restores
91 * the previous interrupt mask, spl0() is a special case which enables
92 * all interrupts and is typically used inside i386/i386 swtch.s and
93 * fork_trampoline. splq() is a generic version of splXXX().
95 * The SPL routines mess around with the 'cpl' global, which masks
96 * interrupts. Interrupts are not *actually* masked. What happens is
97 * that if an interrupt masked by the cpl occurs, the appropriate bit
98 * in '*pending' is set and the interrupt is defered. When we clear
99 * bits in the cpl we must check to see if any *pending interrupts have
100 * been unmasked and issue the synchronously, which is what the splz()
103 * Because the cpl is often saved and restored in a nested fashion, cpl
104 * modifications are only allowed in the SMP case when the MP lock is held
105 * to prevent multiple processes from tripping over each other's masks.
106 * The cpl is saved when you do a context switch (mi_switch()) and restored
107 * when your process gets cpu again.
109 * An interrupt routine is allowed to modify the cpl as long as it restores
110 * it prior to returning (thus the interrupted mainline code doesn't notice
111 * anything amiss). For the SMP case, the interrupt routine must hold
112 * the MP lock for any cpl manipulation.
114 * Likewise, due to the deterministic nature of cpl modifications, we do
115 * NOT need to use locked instructions to modify it.
118 #define GENSPL(NAME, OP, MODIFIER, PC) \
119 unsigned NAME(void) \
122 struct thread *td = curthread; \
125 td->td_cpl OP MODIFIER; \
130 * Note: we do not have to check td->td_nest_count in these functions, only
131 * whether we are in a critical section or not.
136 struct mdglobaldata *gd = mdcpu;
137 struct thread *td = gd->mi.gd_curthread;
140 if ((gd->gd_ipending || gd->gd_fpending) && td->td_pri < TDPRI_CRIT)
147 struct mdglobaldata *gd = mdcpu;
148 struct thread *td = gd->mi.gd_curthread;
151 if (((gd->gd_ipending | gd->gd_fpending) & ~ipl) &&
152 td->td_pri < TDPRI_CRIT) {
158 splq(intrmask_t mask)
160 struct mdglobaldata *gd = mdcpu;
161 struct thread *td = gd->mi.gd_curthread;
169 /* Finally, generate the actual spl*() functions */
171 /* NAME: OP: MODIFIER: PC: */
172 GENSPL(splbio, |=, bio_imask, 2)
173 GENSPL(splcam, |=, cam_imask, 7)
174 GENSPL(splclock, =, HWI_MASK | SWI_MASK, 3)
175 GENSPL(splhigh, =, HWI_MASK | SWI_MASK, 4)
176 GENSPL(splimp, |=, net_imask, 5)
177 GENSPL(splnet, |=, SWI_NET_MASK, 6)
178 GENSPL(splsoftcam, |=, SWI_CAMBIO_MASK | SWI_CAMNET_MASK, 8)
179 GENSPL(splsoftcambio, |=, SWI_CAMBIO_MASK, 9)
180 GENSPL(splsoftcamnet, |=, SWI_CAMNET_MASK, 10)
181 GENSPL(splsoftclock, =, SWI_CLOCK_MASK, 11)
182 GENSPL(splsofttty, |=, SWI_TTY_MASK, 12)
183 GENSPL(splsoftvm, |=, SWI_VM_MASK, 16)
184 GENSPL(splsofttq, |=, SWI_TQ_MASK, 17)
185 GENSPL(splstatclock, |=, stat_imask, 13)
186 GENSPL(spltty, |=, tty_imask, 14)
187 GENSPL(splvm, |=, net_imask | bio_imask | cam_imask, 15)
188 GENSPL(splcrypto, |=, net_imask | SWI_NET_MASK | SWI_CRYPTO_MASK,16)