2 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
19 * This code is derived from software contributed to The DragonFly Project
20 * by Matthew Dillon <dillon@backplane.com>
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in
30 * the documentation and/or other materials provided with the
32 * 3. Neither the name of The DragonFly Project nor the names of its
33 * contributors may be used to endorse or promote products derived
34 * from this software without specific, prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
39 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
40 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
41 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
42 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
44 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
46 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
49 * $OpenBSD: ahci.c,v 1.147 2009/02/16 21:19:07 miod Exp $
54 int ahci_port_start(struct ahci_port *ap);
55 int ahci_port_stop(struct ahci_port *ap, int stop_fis_rx);
56 int ahci_port_clo(struct ahci_port *ap);
57 void ahci_port_interrupt_enable(struct ahci_port *ap);
59 int ahci_load_prdt(struct ahci_ccb *);
60 void ahci_unload_prdt(struct ahci_ccb *);
61 static void ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs,
62 int nsegs, int error);
63 void ahci_start(struct ahci_ccb *);
64 int ahci_port_softreset(struct ahci_port *ap);
65 int ahci_port_pmprobe(struct ahci_port *ap);
66 int ahci_port_hardreset(struct ahci_port *ap, int hard);
67 void ahci_port_hardstop(struct ahci_port *ap);
68 void ahci_flush_tfd(struct ahci_port *ap);
70 static void ahci_ata_cmd_timeout_unserialized(void *);
71 void ahci_quick_timeout(struct ahci_ccb *ccb);
72 void ahci_check_active_timeouts(struct ahci_port *ap);
74 void ahci_beg_exclusive_access(struct ahci_port *ap, struct ata_port *at);
75 void ahci_end_exclusive_access(struct ahci_port *ap, struct ata_port *at);
76 void ahci_issue_pending_commands(struct ahci_port *ap, struct ahci_ccb *ccb);
77 void ahci_issue_saved_commands(struct ahci_port *ap, u_int32_t mask);
79 int ahci_port_read_ncq_error(struct ahci_port *, int *);
81 struct ahci_dmamem *ahci_dmamem_alloc(struct ahci_softc *, bus_dma_tag_t tag);
82 void ahci_dmamem_free(struct ahci_softc *, struct ahci_dmamem *);
83 static void ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error);
85 void ahci_empty_done(struct ahci_ccb *ccb);
86 void ahci_ata_cmd_done(struct ahci_ccb *ccb);
88 /* Wait for all bits in _b to be cleared */
89 #define ahci_pwait_clr(_ap, _r, _b) \
90 ahci_pwait_eq((_ap), AHCI_PWAIT_TIMEOUT, (_r), (_b), 0)
91 #define ahci_pwait_clr_to(_ap, _to, _r, _b) \
92 ahci_pwait_eq((_ap), _to, (_r), (_b), 0)
94 /* Wait for all bits in _b to be set */
95 #define ahci_pwait_set(_ap, _r, _b) \
96 ahci_pwait_eq((_ap), AHCI_PWAIT_TIMEOUT, (_r), (_b), (_b))
97 #define ahci_pwait_set_to(_ap, _to, _r, _b) \
98 ahci_pwait_eq((_ap), _to, (_r), (_b), (_b))
100 #define AHCI_PWAIT_TIMEOUT 1000
103 * Initialize the global AHCI hardware. This code does not set up any of
107 ahci_init(struct ahci_softc *sc)
111 struct ahci_port *ap;
113 DPRINTF(AHCI_D_VERBOSE, " GHC 0x%b",
114 ahci_read(sc, AHCI_REG_GHC), AHCI_FMT_GHC);
116 /* save BIOS initialised parameters, enable staggered spin up */
117 cap = ahci_read(sc, AHCI_REG_CAP);
118 cap &= AHCI_REG_CAP_SMPS;
119 cap |= AHCI_REG_CAP_SSS;
120 pi = ahci_read(sc, AHCI_REG_PI);
124 * This is a hack that currently does not appear to have
125 * a significant effect, but I noticed the port registers
126 * do not appear to be completely cleared after the host
127 * controller is reset.
129 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
131 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) {
132 if ((pi & (1 << i)) == 0)
134 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
135 AHCI_PORT_REGION(i), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
136 device_printf(sc->sc_dev, "can't map port\n");
139 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED |
140 AHCI_PREG_SCTL_DET_DISABLE);
141 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
142 ahci_pwrite(ap, AHCI_PREG_IE, 0);
143 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
144 ahci_pwrite(ap, AHCI_PREG_IS, 0);
150 * Unconditionally reset the controller, do not conditionalize on
151 * trying to figure it if it was previously active or not.
155 * If you have a port multiplier and it does not have a device
156 * in target 0, and it probes normally, but a later operation
157 * mis-probes a target behind that PM, it is possible for the
158 * port to brick such that only (a) a power cycle of the host
159 * or (b) placing a device in target 0 will fix the problem.
160 * Power cycling the PM has no effect (it works fine on another
161 * host port). This issue is unrelated to CLO.
163 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR);
164 if (ahci_wait_ne(sc, AHCI_REG_GHC,
165 AHCI_REG_GHC_HR, AHCI_REG_GHC_HR) != 0) {
166 device_printf(sc->sc_dev,
167 "unable to reset controller\n");
172 /* enable ahci (global interrupts disabled) */
173 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
175 /* restore parameters */
176 ahci_write(sc, AHCI_REG_CAP, cap);
177 ahci_write(sc, AHCI_REG_PI, pi);
183 * Allocate and initialize an AHCI port.
186 ahci_port_alloc(struct ahci_softc *sc, u_int port)
188 struct ahci_port *ap;
190 struct ahci_ccb *ccb;
193 struct ahci_cmd_hdr *hdr;
194 struct ahci_cmd_table *table;
199 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
201 ksnprintf(ap->ap_name, sizeof(ap->ap_name), "%s%d.%d",
202 device_get_name(sc->sc_dev),
203 device_get_unit(sc->sc_dev),
205 sc->sc_ports[port] = ap;
208 * Allocate enough so we never have to reallocate, it makes
211 * ap_pmcount will be reduced by the scan if we encounter the
212 * port multiplier port prior to target 15.
214 if (ap->ap_ata == NULL) {
215 ap->ap_ata = kmalloc(sizeof(*ap->ap_ata) * AHCI_MAX_PMPORTS,
216 M_DEVBUF, M_INTWAIT | M_ZERO);
217 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) {
219 at->at_ahci_port = ap;
221 at->at_probe = ATA_PROBE_NEED_INIT;
222 at->at_features |= ATA_PORT_F_RESCAN;
223 ksnprintf(at->at_name, sizeof(at->at_name),
224 "%s.%d", ap->ap_name, i);
227 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
228 AHCI_PORT_REGION(port), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
229 device_printf(sc->sc_dev,
230 "unable to create register window for port %d\n",
237 ap->ap_probe = ATA_PROBE_NEED_INIT;
238 TAILQ_INIT(&ap->ap_ccb_free);
239 TAILQ_INIT(&ap->ap_ccb_pending);
240 lockinit(&ap->ap_ccb_lock, "ahcipo", 0, 0);
242 /* Disable port interrupts */
243 ahci_pwrite(ap, AHCI_PREG_IE, 0);
244 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
247 * Sec 10.1.2 - deinitialise port if it is already running
249 cmd = ahci_pread(ap, AHCI_PREG_CMD);
250 if ((cmd & (AHCI_PREG_CMD_ST | AHCI_PREG_CMD_CR |
251 AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_FR)) ||
252 (ahci_pread(ap, AHCI_PREG_SCTL) & AHCI_PREG_SCTL_DET)) {
255 r = ahci_port_stop(ap, 1);
257 device_printf(sc->sc_dev,
258 "unable to disable %s, ignoring port %d\n",
259 ((r == 2) ? "CR" : "FR"), port);
264 /* Write DET to zero */
265 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
269 ap->ap_dmamem_rfis = ahci_dmamem_alloc(sc, sc->sc_tag_rfis);
270 if (ap->ap_dmamem_rfis == NULL) {
271 kprintf("%s: NORFIS\n", PORTNAME(ap));
275 /* Setup RFIS base address */
276 ap->ap_rfis = (struct ahci_rfis *) AHCI_DMA_KVA(ap->ap_dmamem_rfis);
277 dva = AHCI_DMA_DVA(ap->ap_dmamem_rfis);
278 ahci_pwrite(ap, AHCI_PREG_FBU, (u_int32_t)(dva >> 32));
279 ahci_pwrite(ap, AHCI_PREG_FB, (u_int32_t)dva);
281 /* Clear SERR before starting FIS reception or ST or anything */
283 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
285 /* Enable FIS reception and activate port. */
286 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
287 cmd &= ~(AHCI_PREG_CMD_CLO | AHCI_PREG_CMD_PMA);
288 cmd |= AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_POD | AHCI_PREG_CMD_SUD;
289 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_ICC_ACTIVE);
291 /* Check whether port activated. Skip it if not. */
292 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
293 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
294 kprintf("%s: NOT-ACTIVATED\n", PORTNAME(ap));
299 /* Allocate a CCB for each command slot */
300 ap->ap_ccbs = kmalloc(sizeof(struct ahci_ccb) * sc->sc_ncmds, M_DEVBUF,
302 if (ap->ap_ccbs == NULL) {
303 device_printf(sc->sc_dev,
304 "unable to allocate command list for port %d\n",
309 /* Command List Structures and Command Tables */
310 ap->ap_dmamem_cmd_list = ahci_dmamem_alloc(sc, sc->sc_tag_cmdh);
311 ap->ap_dmamem_cmd_table = ahci_dmamem_alloc(sc, sc->sc_tag_cmdt);
312 if (ap->ap_dmamem_cmd_table == NULL ||
313 ap->ap_dmamem_cmd_list == NULL) {
315 device_printf(sc->sc_dev,
316 "unable to allocate DMA memory for port %d\n",
321 /* Setup command list base address */
322 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_list);
323 ahci_pwrite(ap, AHCI_PREG_CLBU, (u_int32_t)(dva >> 32));
324 ahci_pwrite(ap, AHCI_PREG_CLB, (u_int32_t)dva);
326 /* Split CCB allocation into CCBs and assign to command header/table */
327 hdr = AHCI_DMA_KVA(ap->ap_dmamem_cmd_list);
328 table = AHCI_DMA_KVA(ap->ap_dmamem_cmd_table);
329 for (i = 0; i < sc->sc_ncmds; i++) {
330 ccb = &ap->ap_ccbs[i];
332 error = bus_dmamap_create(sc->sc_tag_data, BUS_DMA_ALLOCNOW,
335 device_printf(sc->sc_dev,
336 "unable to create dmamap for port %d "
337 "ccb %d\n", port, i);
341 callout_init(&ccb->ccb_timeout);
344 ccb->ccb_cmd_hdr = &hdr[i];
345 ccb->ccb_cmd_table = &table[i];
346 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_table) +
347 ccb->ccb_slot * sizeof(struct ahci_cmd_table);
348 ccb->ccb_cmd_hdr->ctba_hi = htole32((u_int32_t)(dva >> 32));
349 ccb->ccb_cmd_hdr->ctba_lo = htole32((u_int32_t)dva);
352 (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
353 ccb->ccb_xa.packetcmd = ccb->ccb_cmd_table->acmd;
356 ccb->ccb_xa.state = ATA_S_COMPLETE;
359 * CCB[1] is the error CCB and is not get or put. It is
360 * also used for probing. Numerous HBAs only load the
361 * signature from CCB[1] so it MUST be used for the second
365 ap->ap_err_ccb = ccb;
370 /* Wait for ICC change to complete */
371 ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_ICC);
374 * Start the port. The helper thread will call ahci_port_init()
375 * so the ports can all be started in parallel. A failure by
376 * ahci_port_init() does not deallocate the port since we still
377 * want hot-plug events.
379 ahci_os_start_port(ap);
382 ahci_port_free(sc, port);
387 * [re]initialize an idle port. No CCBs should be active.
389 * If at is NULL we are initializing a directly connected port, otherwise
390 * we are indirectly initializing a port multiplier port.
392 * This function is called during the initial port allocation sequence
393 * and is also called on hot-plug insertion. We take no chances and
394 * use a portreset instead of a softreset.
396 * This function is the only way to move a failed port back to active
399 * Returns 0 if a device is successfully detected.
402 ahci_port_init(struct ahci_port *ap, struct ata_port *atx)
408 * Clear all notification bits
410 if (atx == NULL && (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF))
411 ahci_pwrite(ap, AHCI_PREG_SNTF, -1);
414 * Hard-reset the port. If a device is detected but it is busy
415 * we try a second time, this time cycling the phy as well.
417 * XXX note: hard reset mode 2 (cycling the PHY) is not reliable.
420 atx->at_probe = ATA_PROBE_NEED_HARD_RESET;
422 ap->ap_probe = ATA_PROBE_NEED_HARD_RESET;
424 rc = ahci_port_reset(ap, atx, 1);
426 rc = ahci_port_reset(ap, atx, 1);
428 rc = ahci_port_reset(ap, atx, 2);
435 * We had problems talking to the device on the port.
438 ahci_pm_read(ap, atx->at_target,
439 SATA_PMREG_SSTS, &data);
441 data = ahci_pread(ap, AHCI_PREG_SSTS);
444 switch(data & AHCI_PREG_SSTS_DET) {
445 case AHCI_PREG_SSTS_DET_DEV_NE:
446 kprintf("%s: Device not communicating\n",
449 case AHCI_PREG_SSTS_DET_PHYOFFLINE:
450 kprintf("%s: PHY offline\n",
454 kprintf("%s: No device detected\n",
462 * The device on the port is still telling us its busy,
463 * which means that it is not properly handling a SATA
466 * It may be possible to softreset the device using CLO
467 * and a device reset command.
470 kprintf("%s: Device on port is bricked, giving up\n",
473 kprintf("%s: Device on port is bricked, "
474 "trying softreset\n", PORTNAME(ap));
476 rc = ahci_port_reset(ap, atx, 0);
478 kprintf("%s: Unable unbrick device\n",
481 kprintf("%s: Successfully unbricked\n",
492 * Command transfers can only be enabled if a device was successfully
495 * Allocate or deallocate the ap_ata array here too.
498 switch(ap->ap_type) {
499 case ATA_PORT_T_NONE:
512 * Start the port if we succeeded.
514 * There's nothing to start for devices behind a port multiplier.
516 if (rc == 0 && atx == NULL) {
517 if (ahci_port_start(ap)) {
518 kprintf("%s: failed to start command DMA on port, "
519 "disabling\n", PORTNAME(ap));
520 rc = ENXIO; /* couldn't start port */
525 * Flush interrupts on the port. XXX
527 * Enable interrupts on the port whether a device is sitting on
528 * it or not, to handle hot-plug events.
531 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
532 ahci_write(ap->ap_sc, AHCI_REG_IS, 1 << ap->ap_num);
534 ahci_port_interrupt_enable(ap);
540 * Enable or re-enable interrupts on a port.
542 * This routine is called from the port initialization code or from the
543 * helper thread as the real interrupt may be forced to turn off certain
547 ahci_port_interrupt_enable(struct ahci_port *ap)
551 data = AHCI_PREG_IE_TFEE | AHCI_PREG_IE_HBFE |
552 AHCI_PREG_IE_IFE | AHCI_PREG_IE_OFE |
553 AHCI_PREG_IE_DPE | AHCI_PREG_IE_UFE |
554 AHCI_PREG_IE_PCE | AHCI_PREG_IE_PRCE |
556 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF)
557 data |= AHCI_PREG_IE_SDBE;
559 if (sc->sc_ccc_ports & (1 << port)
560 data &= ~(AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE);
562 ahci_pwrite(ap, AHCI_PREG_IE, data);
566 * Run the port / target state machine from a main context.
568 * The state machine for the port is always run.
570 * If atx is non-NULL run the state machine for a particular target.
571 * If atx is NULL run the state machine for all targets.
574 ahci_port_state_machine(struct ahci_port *ap, int initial)
583 * State machine for port. Note that CAM is not yet associated
584 * during the initial parallel probe and the port's probe state
585 * will not get past ATA_PROBE_NEED_IDENT.
588 if (initial == 0 && ap->ap_probe <= ATA_PROBE_NEED_HARD_RESET) {
589 kprintf("%s: Waiting 10 seconds on insertion\n",
591 ahci_os_sleep(10000);
594 if (ap->ap_probe == ATA_PROBE_NEED_INIT)
595 ahci_port_init(ap, NULL);
596 if (ap->ap_probe == ATA_PROBE_NEED_HARD_RESET)
597 ahci_port_reset(ap, NULL, 1);
598 if (ap->ap_probe == ATA_PROBE_NEED_SOFT_RESET)
599 ahci_port_reset(ap, NULL, 0);
600 if (ap->ap_probe == ATA_PROBE_NEED_IDENT)
601 ahci_cam_probe(ap, NULL);
603 if (ap->ap_type != ATA_PORT_T_PM) {
604 if (ap->ap_probe == ATA_PROBE_FAILED) {
605 ahci_cam_changed(ap, NULL, 0);
606 } else if (ap->ap_probe >= ATA_PROBE_NEED_IDENT) {
607 ahci_cam_changed(ap, NULL, 1);
613 * Port Multiplier state machine.
615 * Get a mask of changed targets and combine with any runnable
616 * states already present.
618 for (loop = 0; ;++loop) {
619 if (ahci_pm_read(ap, 15, SATA_PMREG_EINFO, &data)) {
620 kprintf("%s: PM unable to read hot-plug bitmap\n",
626 * Do at least one loop, then stop if no more state changes
627 * have occured. The PM might not generate a new
628 * notification until we clear the entire bitmap.
630 if (loop && data == 0)
634 * New devices showing up in the bitmap require some spin-up
635 * time before we start probing them. Reset didsleep. The
636 * first new device we detect will sleep before probing.
638 * This only applies to devices whos change bit is set in
639 * the data, and does not apply to the initial boot-time
644 for (target = 0; target < ap->ap_pmcount; ++target) {
645 at = &ap->ap_ata[target];
648 * Check the target state for targets behind the PM
649 * which have changed state. This will adjust
650 * at_probe and set ATA_PORT_F_RESCAN
652 * We want to wait at least 10 seconds before probing
653 * a newly inserted device. If the check status
654 * indicates a device is present and in need of a
655 * hard reset, we make sure we have slept before
658 * We also need to wait at least 1 second for the
659 * PHY state to change after insertion, if we
660 * haven't already waited the 10 seconds.
662 * NOTE: When pm_check_good finds a good port it
663 * typically starts us in probe state
664 * NEED_HARD_RESET rather than INIT.
666 if (data & (1 << target)) {
667 if (initial == 0 && didsleep == 0)
669 ahci_pm_check_good(ap, target);
670 if (initial == 0 && didsleep == 0 &&
671 at->at_probe <= ATA_PROBE_NEED_HARD_RESET
674 kprintf("%s: Waiting 10 seconds on insertion\n", PORTNAME(ap));
675 ahci_os_sleep(10000);
680 * Report hot-plug events before the probe state
681 * really gets hot. Only actual events are reported
682 * here to reduce spew.
684 if (data & (1 << target)) {
685 kprintf("%s: HOTPLUG (PM) - ", ATANAME(ap, at));
686 switch(at->at_probe) {
687 case ATA_PROBE_NEED_INIT:
688 case ATA_PROBE_NEED_HARD_RESET:
689 kprintf("Device inserted\n");
691 case ATA_PROBE_FAILED:
692 kprintf("Device removed\n");
695 kprintf("Device probe in progress\n");
701 * Run through the state machine as necessary if
702 * the port is not marked failed.
704 * The state machine may stop at NEED_IDENT if
705 * CAM is not yet attached.
707 * Acquire exclusive access to the port while we
708 * are doing this. This prevents command-completion
709 * from queueing commands for non-polled targets
710 * inbetween our probe steps. We need to do this
711 * because the reset probes can generate severe PHY
712 * and protocol errors and soft-brick the port.
714 if (at->at_probe != ATA_PROBE_FAILED &&
715 at->at_probe != ATA_PROBE_GOOD) {
716 ahci_beg_exclusive_access(ap, at);
717 if (at->at_probe == ATA_PROBE_NEED_INIT)
718 ahci_port_init(ap, at);
719 if (at->at_probe == ATA_PROBE_NEED_HARD_RESET)
720 ahci_port_reset(ap, at, 1);
721 if (at->at_probe == ATA_PROBE_NEED_SOFT_RESET)
722 ahci_port_reset(ap, at, 0);
723 if (at->at_probe == ATA_PROBE_NEED_IDENT)
724 ahci_cam_probe(ap, at);
725 ahci_end_exclusive_access(ap, at);
729 * Add or remove from CAM
731 if (at->at_features & ATA_PORT_F_RESCAN) {
732 at->at_features &= ~ATA_PORT_F_RESCAN;
733 if (at->at_probe == ATA_PROBE_FAILED) {
734 ahci_cam_changed(ap, at, 0);
735 } else if (at->at_probe >= ATA_PROBE_NEED_IDENT) {
736 ahci_cam_changed(ap, at, 1);
739 data &= ~(1 << target);
742 kprintf("%s: WARNING (PM): extra bits set in "
743 "EINFO: %08x\n", PORTNAME(ap), data);
744 while (target < AHCI_MAX_PMPORTS) {
745 ahci_pm_check_good(ap, target);
754 * De-initialize and detach a port.
757 ahci_port_free(struct ahci_softc *sc, u_int port)
759 struct ahci_port *ap = sc->sc_ports[port];
760 struct ahci_ccb *ccb;
763 * Ensure port is disabled and its interrupts are all flushed.
766 ahci_port_stop(ap, 1);
767 ahci_os_stop_port(ap);
768 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
769 ahci_pwrite(ap, AHCI_PREG_IE, 0);
770 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
771 ahci_write(sc, AHCI_REG_IS, 1 << port);
775 while ((ccb = ahci_get_ccb(ap)) != NULL) {
776 if (ccb->ccb_dmamap) {
777 bus_dmamap_destroy(sc->sc_tag_data,
779 ccb->ccb_dmamap = NULL;
782 if ((ccb = ap->ap_err_ccb) != NULL) {
783 if (ccb->ccb_dmamap) {
784 bus_dmamap_destroy(sc->sc_tag_data,
786 ccb->ccb_dmamap = NULL;
788 ap->ap_err_ccb = NULL;
790 kfree(ap->ap_ccbs, M_DEVBUF);
794 if (ap->ap_dmamem_cmd_list) {
795 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_list);
796 ap->ap_dmamem_cmd_list = NULL;
798 if (ap->ap_dmamem_rfis) {
799 ahci_dmamem_free(sc, ap->ap_dmamem_rfis);
800 ap->ap_dmamem_rfis = NULL;
802 if (ap->ap_dmamem_cmd_table) {
803 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_table);
804 ap->ap_dmamem_cmd_table = NULL;
807 kfree(ap->ap_ata, M_DEVBUF);
811 /* bus_space(9) says we dont free the subregions handle */
814 sc->sc_ports[port] = NULL;
818 * Start high-level command processing on the port
821 ahci_port_start(struct ahci_port *ap)
823 u_int32_t r, oldr, s, olds, is, oldis, tfd, oldtfd;
826 * FRE must be turned on before ST. Wait for FR to go active
827 * before turning on ST. The spec doesn't seem to think this
828 * is necessary but waiting here avoids an on-off race in the
829 * ahci_port_stop() code.
832 olds = ahci_pread(ap, AHCI_PREG_SERR);
833 oldis= ahci_pread(ap, AHCI_PREG_IS);
834 oldtfd = ahci_pread(ap, AHCI_PREG_TFD);
835 oldr = r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
836 if ((r & AHCI_PREG_CMD_FRE) == 0) {
837 r |= AHCI_PREG_CMD_FRE;
838 ahci_pwrite(ap, AHCI_PREG_CMD, r);
840 if ((ap->ap_sc->sc_flags & AHCI_F_IGN_FR) == 0) {
841 if (ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR)) {
842 kprintf("%s: Cannot start FIS reception\n",
849 * Turn on ST, wait for CR to come up.
851 r |= AHCI_PREG_CMD_ST;
852 ahci_pwrite(ap, AHCI_PREG_CMD, r);
853 if (ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR)) {
854 s = ahci_pread(ap, AHCI_PREG_SERR);
855 is = ahci_pread(ap, AHCI_PREG_IS);
856 tfd = ahci_pread(ap, AHCI_PREG_TFD);
857 kprintf("%s: Cannot start command DMA\n"
860 "OLDIS=%b\nNEWIS=%b\n"
861 "OLDTFD=%b\nNEWTFD=%b\n",
863 oldr, AHCI_PFMT_CMD, olds, AHCI_PFMT_SERR,
864 r, AHCI_PFMT_CMD, s, AHCI_PFMT_SERR,
865 oldis, AHCI_PFMT_IS, is, AHCI_PFMT_IS,
866 oldtfd, AHCI_PFMT_TFD_STS, tfd, AHCI_PFMT_TFD_STS);
872 * (Re-)enable coalescing on the port.
874 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
875 ap->ap_sc->sc_ccc_ports_cur |= (1 << ap->ap_num);
876 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
877 ap->ap_sc->sc_ccc_ports_cur);
885 * Stop high-level command processing on a port
887 * WARNING! If the port is stopped while CR is still active our saved
888 * CI/SACT will race any commands completed by the command
889 * processor prior to being able to stop. Thus we never call
890 * this function unless we intend to dispose of any remaining
891 * active commands. In particular, this complicates the timeout
895 ahci_port_stop(struct ahci_port *ap, int stop_fis_rx)
901 * Disable coalescing on the port while it is stopped.
903 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
904 ap->ap_sc->sc_ccc_ports_cur &= ~(1 << ap->ap_num);
905 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
906 ap->ap_sc->sc_ccc_ports_cur);
911 * Turn off ST, then wait for CR to go off.
913 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
914 r &= ~AHCI_PREG_CMD_ST;
915 ahci_pwrite(ap, AHCI_PREG_CMD, r);
917 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR)) {
918 kprintf("%s: Port bricked, unable to stop (ST)\n",
925 * Turn off FRE, then wait for FR to go off. FRE cannot
926 * be turned off until CR transitions to 0.
928 if ((r & AHCI_PREG_CMD_FR) == 0) {
929 kprintf("%s: FR stopped, clear FRE for next start\n",
935 r &= ~AHCI_PREG_CMD_FRE;
936 ahci_pwrite(ap, AHCI_PREG_CMD, r);
937 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR)) {
938 kprintf("%s: Port bricked, unable to stop (FRE)\n",
948 * AHCI command list override -> forcibly clear TFD.STS.{BSY,DRQ}
951 ahci_port_clo(struct ahci_port *ap)
953 struct ahci_softc *sc = ap->ap_sc;
956 /* Only attempt CLO if supported by controller */
957 if ((ahci_read(sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO) == 0)
961 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
962 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_CLO);
964 /* Wait for completion */
965 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CLO)) {
966 kprintf("%s: CLO did not complete\n", PORTNAME(ap));
976 * If hard is 0 perform a softreset of the port.
977 * If hard is 1 perform a hard reset of the port.
978 * If hard is 2 perform a hard reset of the port and cycle the phy.
980 * If at is non-NULL an indirect port via a port-multiplier is being
981 * reset, otherwise a direct port is being reset.
983 * NOTE: Indirect ports can only be soft-reset.
986 ahci_port_reset(struct ahci_port *ap, struct ata_port *at, int hard)
992 rc = ahci_pm_hardreset(ap, at->at_target, hard);
994 rc = ahci_port_hardreset(ap, hard);
997 rc = ahci_pm_softreset(ap, at->at_target);
999 rc = ahci_port_softreset(ap);
1005 * AHCI soft reset, Section 10.4.1
1007 * (at) will be NULL when soft-resetting a directly-attached device, and
1008 * non-NULL when soft-resetting a device through a port multiplier.
1010 * This function keeps port communications intact and attempts to generate
1011 * a reset to the connected device using device commands.
1014 ahci_port_softreset(struct ahci_port *ap)
1016 struct ahci_ccb *ccb = NULL;
1017 struct ahci_cmd_hdr *cmd_slot;
1024 kprintf("%s: START SOFTRESET %b\n", PORTNAME(ap),
1025 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD);
1028 DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap));
1031 ap->ap_flags |= AP_F_IN_RESET;
1032 ap->ap_state = AP_S_NORMAL;
1035 * Remember port state in cmd (main to restore start/stop)
1039 if (ahci_port_stop(ap, 0)) {
1040 kprintf("%s: failed to stop port, cannot softreset\n",
1046 * Request CLO if device appears hung.
1048 if (ahci_pread(ap, AHCI_PREG_TFD) &
1049 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1054 * This is an attempt to clear errors so a new signature will
1055 * be latched. It isn't working properly. XXX
1058 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1061 if (ahci_port_start(ap)) {
1062 kprintf("%s: failed to start port, cannot softreset\n",
1067 /* Check whether CLO worked */
1068 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1069 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1070 kprintf("%s: CLO %s, need port reset\n",
1072 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO)
1073 ? "failed" : "unsupported");
1079 * Prep first D2H command with SRST feature & clear busy/reset flags
1081 * It is unclear which other fields in the FIS are used. Just zero
1084 * NOTE! This CCB is used for both the first and second commands.
1085 * The second command must use CCB slot 1 to properly load
1088 ccb = ahci_get_err_ccb(ap);
1089 ccb->ccb_done = ahci_empty_done;
1090 KKASSERT(ccb->ccb_slot == 1);
1091 ccb->ccb_xa.at = NULL;
1092 cmd_slot = ccb->ccb_cmd_hdr;
1094 fis = ccb->ccb_cmd_table->cfis;
1095 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1096 fis[0] = ATA_FIS_TYPE_H2D;
1097 fis[15] = ATA_FIS_CONTROL_SRST|ATA_FIS_CONTROL_4BIT;
1099 cmd_slot->prdtl = 0;
1100 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1101 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
1102 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
1104 ccb->ccb_xa.state = ATA_S_PENDING;
1105 ccb->ccb_xa.flags = 0;
1106 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
1107 kprintf("%s: First FIS failed\n", PORTNAME(ap));
1112 * WARNING! TIME SENSITIVE SPACE! WARNING!
1114 * The two FISes are supposed to be back to back. Don't issue other
1115 * commands or even delay if we can help it.
1119 * Prep second D2H command to read status and complete reset sequence
1120 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA
1121 * Rev 2.6 and it is unclear how the second FIS should be set up
1122 * from the AHCI document.
1124 * Give the device 3ms before sending the second FIS.
1126 * It is unclear which other fields in the FIS are used. Just zero
1129 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1130 fis[0] = ATA_FIS_TYPE_H2D;
1131 fis[15] = ATA_FIS_CONTROL_4BIT;
1133 cmd_slot->prdtl = 0;
1134 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1136 ccb->ccb_xa.state = ATA_S_PENDING;
1137 ccb->ccb_xa.flags = 0;
1138 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
1139 kprintf("%s: Second FIS failed\n", PORTNAME(ap));
1143 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1144 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1145 kprintf("%s: device didn't come ready after reset, TFD: 0x%b\n",
1147 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
1154 * If the softreset is trying to clear a BSY condition after a
1155 * normal portreset we assign the port type.
1157 * If the softreset is being run first as part of the ccb error
1158 * processing code then report if the device signature changed
1161 if (ap->ap_type == ATA_PORT_T_NONE) {
1162 ap->ap_type = ahci_port_signature_detect(ap, NULL);
1164 if (ahci_port_signature_detect(ap, NULL) != ap->ap_type) {
1165 kprintf("%s: device signature unexpectedly "
1166 "changed\n", PORTNAME(ap));
1167 error = EBUSY; /* XXX */
1175 ahci_put_err_ccb(ccb);
1178 * If the target is busy use CLO to clear the busy
1179 * condition. The BSY should be cleared on the next
1182 if (ahci_pread(ap, AHCI_PREG_TFD) &
1183 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1189 * If we failed to softreset make the port quiescent, otherwise
1190 * make sure the port's start/stop state matches what it was on
1193 * Don't kill the port if the softreset is on a port multiplier
1194 * target, that would kill all the targets!
1197 ahci_port_hardstop(ap);
1198 /* ap_probe set to failed */
1200 ap->ap_probe = ATA_PROBE_NEED_IDENT;
1201 ahci_port_start(ap);
1203 ap->ap_flags &= ~AP_F_IN_RESET;
1207 kprintf("%s: END SOFTRESET\n", PORTNAME(ap));
1213 * AHCI port reset, Section 10.4.2
1215 * This function does a hard reset of the port. Note that the device
1216 * connected to the port could still end-up hung.
1219 ahci_port_hardreset(struct ahci_port *ap, int hard)
1226 DPRINTF(AHCI_D_VERBOSE, "%s: port reset\n", PORTNAME(ap));
1228 ap->ap_flags |= AP_F_IN_RESET;
1233 ahci_port_stop(ap, 0);
1234 ap->ap_state = AP_S_NORMAL;
1238 * The port may have been quiescent with its SUD bit cleared, so
1239 * set the SUD (spin up device).
1241 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1242 cmd |= AHCI_PREG_CMD_SUD;
1243 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1246 * Perform device detection. Cycle the PHY off, wait 10ms.
1247 * This simulates the SATA cable being physically unplugged.
1249 * NOTE: hard reset mode 2 (cycling the PHY) is not reliable
1250 * and not currently used.
1252 ap->ap_type = ATA_PORT_T_NONE;
1254 r = AHCI_PREG_SCTL_IPM_DISABLED;
1256 r |= AHCI_PREG_SCTL_DET_DISABLE;
1257 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1261 * Start transmitting COMRESET. COMRESET must be sent for at
1264 r = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT;
1265 if (AhciForceGen1 & (1 << ap->ap_num))
1266 r |= AHCI_PREG_SCTL_SPD_GEN1;
1268 r |= AHCI_PREG_SCTL_SPD_ANY;
1269 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1272 * Through trial and error it seems to take around 100ms
1273 * for the detect logic to settle down. If this is too
1274 * short the softreset code will fail.
1279 * Only SERR_DIAG_X needs to be cleared for TFD updates, but
1280 * since we are hard-resetting the port we might as well clear
1281 * the whole enchillada
1284 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1285 r &= ~AHCI_PREG_SCTL_DET_INIT;
1286 r |= AHCI_PREG_SCTL_DET_NONE;
1287 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1290 * Try to determine if there is a device on the port.
1292 * Give the device 3/10 second to at least be detected.
1293 * If we fail clear PRCS (phy detect) since we may cycled
1294 * the phy and probably caused another PRCS interrupt.
1298 r = ahci_pread(ap, AHCI_PREG_SSTS);
1299 if (r & AHCI_PREG_SSTS_DET)
1301 loop -= ahci_os_softsleep();
1304 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_PRCS);
1306 kprintf("%s: Port appears to be unplugged\n",
1313 * There is something on the port. Give the device 3 seconds
1314 * to fully negotiate.
1317 ahci_pwait_eq(ap, 3000, AHCI_PREG_SSTS,
1318 AHCI_PREG_SSTS_DET, AHCI_PREG_SSTS_DET_DEV)) {
1320 kprintf("%s: Device may be powered down\n",
1329 * Wait for the device to become ready.
1331 * This can take more then a second, give it 3 seconds. If we
1332 * succeed give the device another 3ms after that.
1334 * NOTE: Port multipliers can do two things here. First they can
1335 * return device-ready if a device is on target 0 and also
1336 * return the signature for that device. If there is no
1337 * device on target 0 then BSY/DRQ is never cleared and
1338 * it never comes ready.
1341 ahci_pwait_clr_to(ap, 3000, AHCI_PREG_TFD,
1342 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1344 * The device is bricked or its a port multiplier and will
1345 * not unbusy until we do the pmprobe CLO softreset sequence.
1347 error = ahci_port_pmprobe(ap);
1349 kprintf("%s: Device will not come ready 0x%b\n",
1351 ahci_pread(ap, AHCI_PREG_TFD),
1354 ap->ap_type = ATA_PORT_T_PM;
1356 } else if (error == 0) {
1358 * We generally will not get a port multiplier signature in
1359 * this case even if this is a port multiplier, because of
1360 * Intel's stupidity. We almost certainly got target 0
1361 * behind the PM, if there is a PM.
1363 * Save the signature and probe for a PM. If we do not
1364 * find a PM then use the saved signature and return
1367 type = ahci_port_signature_detect(ap, NULL);
1368 error = ahci_port_pmprobe(ap);
1373 ap->ap_type = ATA_PORT_T_PM;
1374 kprintf("%s: Port multiplier detected\n",
1380 * hard-stop the port if we failed. This will set ap_probe
1383 ap->ap_flags &= ~AP_F_IN_RESET;
1385 ahci_port_hardstop(ap);
1386 /* ap_probe set to failed */
1388 if (ap->ap_type == ATA_PORT_T_PM)
1389 ap->ap_probe = ATA_PROBE_GOOD;
1391 ap->ap_probe = ATA_PROBE_NEED_SOFT_RESET;
1397 * AHCI port multiplier probe. This routine is run by the hardreset code
1398 * if it gets past the device detect, whether or not BSY is found to be
1401 * We MUST use CLO to properly probe whether the port multiplier exists
1404 * Return 0 on success, non-zero on failure.
1407 ahci_port_pmprobe(struct ahci_port *ap)
1409 struct ahci_cmd_hdr *cmd_slot;
1410 struct ata_port *at;
1411 struct ahci_ccb *ccb = NULL;
1412 u_int8_t *fis = NULL;
1419 * If we don't support port multipliers don't try to detect one.
1421 if ((ap->ap_sc->sc_cap & AHCI_REG_CAP_SPM) == 0)
1427 * This code is only called from hardreset, which does not
1428 * high level command processing. The port should be stopped.
1430 * Set PMA mode while the port is stopped.
1432 * NOTE: On retry the port might be running, stopped, or failed.
1434 ahci_port_stop(ap, 0);
1435 ap->ap_state = AP_S_NORMAL;
1436 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1437 if ((cmd & AHCI_PREG_CMD_PMA) == 0) {
1438 cmd |= AHCI_PREG_CMD_PMA;
1439 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1443 * Flush any errors and request CLO unconditionally, then start
1448 if (ahci_port_start(ap)) {
1449 kprintf("%s: PMPROBE failed to start port, cannot softreset\n",
1455 * Check whether CLO worked
1457 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1458 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1459 kprintf("%s: PMPROBE CLO %s, need port reset\n",
1461 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO)
1462 ? "failed" : "unsupported");
1468 * Use the error CCB for all commands
1470 * NOTE! This CCB is used for both the first and second commands.
1471 * The second command must use CCB slot 1 to properly load
1474 ccb = ahci_get_err_ccb(ap);
1475 ccb->ccb_done = ahci_empty_done;
1476 cmd_slot = ccb->ccb_cmd_hdr;
1477 KKASSERT(ccb->ccb_slot == 1);
1480 * Prep the first H2D command with SRST feature & clear busy/reset
1484 fis = ccb->ccb_cmd_table->cfis;
1485 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1486 fis[0] = ATA_FIS_TYPE_H2D;
1487 fis[1] = 0x0F; /* Target 15 */
1488 fis[15] = ATA_FIS_CONTROL_SRST | ATA_FIS_CONTROL_4BIT;
1490 cmd_slot->prdtl = 0;
1491 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1492 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
1493 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
1494 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */
1496 ccb->ccb_xa.state = ATA_S_PENDING;
1497 ccb->ccb_xa.flags = 0;
1499 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
1500 kprintf("%s: PMPROBE First FIS failed\n", PORTNAME(ap));
1502 ahci_put_err_ccb(ccb);
1507 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1508 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1509 kprintf("%s: PMPROBE Busy after first FIS\n", PORTNAME(ap));
1513 * The device may have muffed up the PHY when it reset.
1517 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1518 /* ahci_pm_phy_status(ap, 15, &cmd); */
1521 * Prep second D2H command to read status and complete reset sequence
1522 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA
1523 * Rev 2.6 and it is unclear how the second FIS should be set up
1524 * from the AHCI document.
1526 * Give the device 3ms before sending the second FIS.
1528 * It is unclear which other fields in the FIS are used. Just zero
1531 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1532 fis[0] = ATA_FIS_TYPE_H2D;
1534 fis[15] = ATA_FIS_CONTROL_4BIT;
1536 cmd_slot->prdtl = 0;
1537 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1538 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */
1540 ccb->ccb_xa.state = ATA_S_PENDING;
1541 ccb->ccb_xa.flags = 0;
1543 if (ahci_poll(ccb, 5000, ahci_quick_timeout) != ATA_S_COMPLETE) {
1544 kprintf("%s: PMPROBE Second FIS failed\n", PORTNAME(ap));
1546 ahci_put_err_ccb(ccb);
1553 * What? We succeeded? Yup, but for some reason the signature
1554 * is still latched from the original detect (that saw target 0
1555 * behind the PM), and I don't know how to clear the condition
1556 * other then by retrying the whole reset sequence.
1560 ahci_put_err_ccb(ccb);
1565 * Get the signature. The caller sets the ap fields.
1567 if (ahci_port_signature_detect(ap, NULL) == ATA_PORT_T_PM) {
1568 ap->ap_ata[15].at_probe = ATA_PROBE_GOOD;
1575 * Fall through / clean up the CCB and perform error processing.
1579 ahci_put_err_ccb(ccb);
1581 if (error == 0 && ahci_pm_identify(ap)) {
1582 kprintf("%s: PM - cannot identify port multiplier\n",
1588 * If we probed the PM reset the state for the targets behind
1589 * it so they get probed by the state machine.
1592 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) {
1593 at = &ap->ap_ata[i];
1594 at->at_probe = ATA_PROBE_NEED_INIT;
1595 at->at_features |= ATA_PORT_F_RESCAN;
1600 * If we failed turn off PMA, otherwise identify the port multiplier.
1601 * CAM will iterate the devices.
1604 ahci_port_stop(ap, 0);
1605 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1606 cmd &= ~AHCI_PREG_CMD_PMA;
1607 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1609 ahci_port_stop(ap, 0);
1615 * Hard-stop on hot-swap device removal. See 10.10.1
1617 * Place the port in a mode that will allow it to detect hot-swap insertions.
1618 * This is a bit imprecise because just setting-up SCTL to DET_INIT doesn't
1619 * seem to do the job.
1622 ahci_port_hardstop(struct ahci_port *ap)
1624 struct ahci_ccb *ccb;
1625 struct ata_port *at;
1632 * Stop the port. We can't modify things like SUD if the port
1635 ap->ap_state = AP_S_FATAL_ERROR;
1636 ap->ap_probe = ATA_PROBE_FAILED;
1637 ap->ap_type = ATA_PORT_T_NONE;
1638 ahci_port_stop(ap, 0);
1639 cmd = ahci_pread(ap, AHCI_PREG_CMD);
1642 * Clean up AT sub-ports on SATA port.
1644 for (i = 0; ap->ap_ata && i < AHCI_MAX_PMPORTS; ++i) {
1645 at = &ap->ap_ata[i];
1646 at->at_type = ATA_PORT_T_NONE;
1647 at->at_probe = ATA_PROBE_FAILED;
1651 * Turn off port-multiplier control bit
1653 if (cmd & AHCI_PREG_CMD_PMA) {
1654 cmd &= ~AHCI_PREG_CMD_PMA;
1655 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1659 * Make sure FRE is active. There isn't anything we can do if it
1660 * fails so just ignore errors.
1662 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
1663 cmd |= AHCI_PREG_CMD_FRE;
1664 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1665 if ((ap->ap_sc->sc_flags & AHCI_F_IGN_FR) == 0)
1666 ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR);
1670 * 10.10.3 DET must be set to 0 before setting SUD to 0.
1671 * 10.10.1 place us in the Listen state.
1673 * Deactivating SUD only applies if the controller supports SUD.
1675 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
1677 if (cmd & AHCI_PREG_CMD_SUD) {
1678 cmd &= ~AHCI_PREG_CMD_SUD;
1679 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1684 * Transition su to the spin-up state. HVA shall send COMRESET and
1685 * begin initialization sequence (whatever that means).
1687 * This only applies if the controller supports SUD.
1689 cmd |= AHCI_PREG_CMD_SUD;
1690 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1694 * Transition us to the Reset state. Theoretically we send a
1695 * continuous stream of COMRESETs in this state.
1697 r = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT;
1698 if (AhciForceGen1 & (1 << ap->ap_num)) {
1699 kprintf("%s: Force 1.5Gbits\n", PORTNAME(ap));
1700 r |= AHCI_PREG_SCTL_SPD_GEN1;
1702 r |= AHCI_PREG_SCTL_SPD_ANY;
1704 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1708 * Flush SERR_DIAG_X so the TFD can update.
1713 * Clean out pending ccbs
1715 while (ap->ap_active) {
1716 slot = ffs(ap->ap_active) - 1;
1717 ap->ap_active &= ~(1 << slot);
1718 ap->ap_expired &= ~(1 << slot);
1719 --ap->ap_active_cnt;
1720 ccb = &ap->ap_ccbs[slot];
1721 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_RUNNING) {
1722 callout_stop(&ccb->ccb_timeout);
1723 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
1725 ccb->ccb_xa.flags &= ~(ATA_F_TIMEOUT_DESIRED |
1726 ATA_F_TIMEOUT_EXPIRED);
1727 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1729 ccb->ccb_xa.complete(&ccb->ccb_xa);
1731 while (ap->ap_sactive) {
1732 slot = ffs(ap->ap_sactive) - 1;
1733 ap->ap_sactive &= ~(1 << slot);
1734 ap->ap_expired &= ~(1 << slot);
1735 ccb = &ap->ap_ccbs[slot];
1736 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_RUNNING) {
1737 callout_stop(&ccb->ccb_timeout);
1738 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
1740 ccb->ccb_xa.flags &= ~(ATA_F_TIMEOUT_DESIRED |
1741 ATA_F_TIMEOUT_EXPIRED);
1742 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1744 ccb->ccb_xa.complete(&ccb->ccb_xa);
1746 KKASSERT(ap->ap_active_cnt == 0);
1748 while ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) != NULL) {
1749 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
1750 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1751 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_DESIRED;
1753 ccb->ccb_xa.complete(&ccb->ccb_xa);
1757 * Leave us in COMRESET (both SUD and INIT active), the HBA should
1758 * hopefully send us a DIAG_X-related interrupt if it receives
1759 * a COMINIT, and if not that then at least a Phy transition
1762 * If we transition INIT from 1->0 to begin the initalization
1763 * sequence it is unclear if that sequence will remain active
1764 * until the next device insertion.
1766 * If we go back to the listen state it is unclear if the
1767 * device will actually send us a COMINIT, since we aren't
1768 * sending any COMRESET's
1774 * We can't loop on the X bit, a continuous COMINIT received will make
1775 * it loop forever. Just assume one event has built up and clear X
1776 * so the task file descriptor can update.
1779 ahci_flush_tfd(struct ahci_port *ap)
1783 r = ahci_pread(ap, AHCI_PREG_SERR);
1784 if (r & AHCI_PREG_SERR_DIAG_X)
1785 ahci_pwrite(ap, AHCI_PREG_SERR, AHCI_PREG_SERR_DIAG_X);
1789 * Figure out what type of device is connected to the port, ATAPI or
1793 ahci_port_signature_detect(struct ahci_port *ap, struct ata_port *at)
1797 sig = ahci_pread(ap, AHCI_PREG_SIG);
1799 kprintf("%s: sig %08x\n", ATANAME(ap, at), sig);
1800 if ((sig & 0xffff0000) == (SATA_SIGNATURE_ATAPI & 0xffff0000)) {
1801 return(ATA_PORT_T_ATAPI);
1802 } else if ((sig & 0xffff0000) ==
1803 (SATA_SIGNATURE_PORT_MULTIPLIER & 0xffff0000)) {
1804 return(ATA_PORT_T_PM);
1806 return(ATA_PORT_T_DISK);
1811 * Load the DMA descriptor table for a CCB's buffer.
1814 ahci_load_prdt(struct ahci_ccb *ccb)
1816 struct ahci_port *ap = ccb->ccb_port;
1817 struct ahci_softc *sc = ap->ap_sc;
1818 struct ata_xfer *xa = &ccb->ccb_xa;
1819 struct ahci_prdt *prdt = ccb->ccb_cmd_table->prdt;
1820 bus_dmamap_t dmap = ccb->ccb_dmamap;
1821 struct ahci_cmd_hdr *cmd_slot = ccb->ccb_cmd_hdr;
1824 if (xa->datalen == 0) {
1825 ccb->ccb_cmd_hdr->prdtl = 0;
1829 error = bus_dmamap_load(sc->sc_tag_data, dmap,
1830 xa->data, xa->datalen,
1831 ahci_load_prdt_callback,
1833 ((xa->flags & ATA_F_NOWAIT) ?
1834 BUS_DMA_NOWAIT : BUS_DMA_WAITOK));
1836 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap), error);
1839 if (xa->flags & ATA_F_PIO)
1840 prdt->flags |= htole32(AHCI_PRDT_FLAG_INTR);
1842 cmd_slot->prdtl = htole16(prdt - ccb->ccb_cmd_table->prdt + 1);
1844 bus_dmamap_sync(sc->sc_tag_data, dmap,
1845 (xa->flags & ATA_F_READ) ?
1846 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
1852 * Callback from BUSDMA system to load the segment list. The passed segment
1853 * list is a temporary structure.
1857 ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs, int nsegs,
1860 struct ahci_prdt *prd = *(void **)info;
1863 KKASSERT(nsegs <= AHCI_MAX_PRDT);
1866 addr = segs->ds_addr;
1867 prd->dba_hi = htole32((u_int32_t)(addr >> 32));
1868 prd->dba_lo = htole32((u_int32_t)addr);
1869 prd->flags = htole32(segs->ds_len - 1);
1875 *(void **)info = prd; /* return last valid segment */
1879 ahci_unload_prdt(struct ahci_ccb *ccb)
1881 struct ahci_port *ap = ccb->ccb_port;
1882 struct ahci_softc *sc = ap->ap_sc;
1883 struct ata_xfer *xa = &ccb->ccb_xa;
1884 bus_dmamap_t dmap = ccb->ccb_dmamap;
1886 if (xa->datalen != 0) {
1887 bus_dmamap_sync(sc->sc_tag_data, dmap,
1888 (xa->flags & ATA_F_READ) ?
1889 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1891 bus_dmamap_unload(sc->sc_tag_data, dmap);
1893 if (ccb->ccb_xa.flags & ATA_F_NCQ)
1896 xa->resid = xa->datalen -
1897 le32toh(ccb->ccb_cmd_hdr->prdbc);
1902 * Start a command and poll for completion.
1904 * timeout is in ms and only counts once the command gets on-chip.
1906 * Returns ATA_S_* state, compare against ATA_S_COMPLETE to determine
1907 * that no error occured.
1909 * NOTE: If the caller specifies a NULL timeout function the caller is
1910 * responsible for clearing hardware state on failure, but we will
1911 * deal with removing the ccb from any pending queue.
1913 * NOTE: NCQ should never be used with this function.
1915 * NOTE: If the port is in a failed state and stopped we do not try
1916 * to activate the ccb.
1919 ahci_poll(struct ahci_ccb *ccb, int timeout,
1920 void (*timeout_fn)(struct ahci_ccb *))
1922 struct ahci_port *ap = ccb->ccb_port;
1924 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR) {
1925 ccb->ccb_xa.state = ATA_S_ERROR;
1926 return(ccb->ccb_xa.state);
1932 ahci_port_intr(ap, 1);
1933 switch(ccb->ccb_xa.state) {
1935 timeout -= ahci_os_softsleep();
1938 ahci_os_softsleep();
1939 ahci_check_active_timeouts(ap);
1943 return (ccb->ccb_xa.state);
1945 } while (timeout > 0);
1947 kprintf("%s: Poll timeout slot %d CMD: %b TFD: 0x%b SERR: %b\n",
1948 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_slot,
1949 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
1950 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS,
1951 ahci_pread(ap, AHCI_PREG_SERR), AHCI_PFMT_SERR);
1957 return(ccb->ccb_xa.state);
1961 * When polling we have to check if the currently active CCB(s)
1962 * have timed out as the callout will be deadlocked while we
1963 * hold the port lock.
1966 ahci_check_active_timeouts(struct ahci_port *ap)
1968 struct ahci_ccb *ccb;
1972 mask = ap->ap_active | ap->ap_sactive;
1974 tag = ffs(mask) - 1;
1975 mask &= ~(1 << tag);
1976 ccb = &ap->ap_ccbs[tag];
1977 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_EXPIRED) {
1978 ahci_ata_cmd_timeout(ccb);
1986 ahci_start_timeout(struct ahci_ccb *ccb)
1988 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_DESIRED) {
1989 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_RUNNING;
1990 callout_reset(&ccb->ccb_timeout,
1991 (ccb->ccb_xa.timeout * hz + 999) / 1000,
1992 ahci_ata_cmd_timeout_unserialized, ccb);
1997 ahci_start(struct ahci_ccb *ccb)
1999 struct ahci_port *ap = ccb->ccb_port;
2000 struct ahci_softc *sc = ap->ap_sc;
2002 KKASSERT(ccb->ccb_xa.state == ATA_S_PENDING);
2004 /* Zero transferred byte count before transfer */
2005 ccb->ccb_cmd_hdr->prdbc = 0;
2007 /* Sync command list entry and corresponding command table entry */
2008 bus_dmamap_sync(sc->sc_tag_cmdh,
2009 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
2010 BUS_DMASYNC_PREWRITE);
2011 bus_dmamap_sync(sc->sc_tag_cmdt,
2012 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
2013 BUS_DMASYNC_PREWRITE);
2015 /* Prepare RFIS area for write by controller */
2016 bus_dmamap_sync(sc->sc_tag_rfis,
2017 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
2018 BUS_DMASYNC_PREREAD);
2021 * There's no point trying to optimize this, it only shaves a few
2022 * nanoseconds so just queue the command and call our generic issue.
2024 ahci_issue_pending_commands(ap, ccb);
2028 * While holding the port lock acquire exclusive access to the port.
2030 * This is used when running the state machine to initialize and identify
2031 * targets over a port multiplier. Setting exclusive access prevents
2032 * ahci_port_intr() from activating any requests sitting on the pending
2036 ahci_beg_exclusive_access(struct ahci_port *ap, struct ata_port *at)
2038 KKASSERT((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) == 0);
2039 ap->ap_flags |= AP_F_EXCLUSIVE_ACCESS;
2040 while (ap->ap_active || ap->ap_sactive) {
2041 ahci_port_intr(ap, 1);
2042 ahci_os_softsleep();
2047 ahci_end_exclusive_access(struct ahci_port *ap, struct ata_port *at)
2049 KKASSERT((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) != 0);
2050 ap->ap_flags &= ~AP_F_EXCLUSIVE_ACCESS;
2051 ahci_issue_pending_commands(ap, NULL);
2055 * If ccb is not NULL enqueue and/or issue it.
2057 * If ccb is NULL issue whatever we can from the queue. However, nothing
2058 * new is issued if the exclusive access flag is set or expired ccb's are
2061 * If existing commands are still active (ap_active/ap_sactive) we can only
2062 * issue matching new commands.
2065 ahci_issue_pending_commands(struct ahci_port *ap, struct ahci_ccb *ccb)
2073 * If just running the queue and in exclusive access mode we
2074 * just return. Also in this case if there are any expired ccb's
2075 * we want to clear the queue so the port can be safely stopped.
2078 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
2079 } else if ((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) || ap->ap_expired) {
2084 * Pull the next ccb off the queue and run it if possible.
2086 if ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) == NULL)
2089 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
2091 * The next command is a NCQ command and can be issued as
2092 * long as currently active commands are not standard.
2094 if (ap->ap_active) {
2095 KKASSERT(ap->ap_active_cnt > 0);
2098 KKASSERT(ap->ap_active_cnt == 0);
2102 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
2103 ahci_start_timeout(ccb);
2104 mask |= 1 << ccb->ccb_slot;
2105 ccb->ccb_xa.state = ATA_S_ONCHIP;
2106 ccb = TAILQ_FIRST(&ap->ap_ccb_pending);
2107 } while (ccb && (ccb->ccb_xa.flags & ATA_F_NCQ));
2109 ap->ap_sactive |= mask;
2110 ahci_pwrite(ap, AHCI_PREG_SACT, mask);
2111 ahci_pwrite(ap, AHCI_PREG_CI, mask);
2114 * The next command is a standard command and can be issued
2115 * as long as currently active commands are not NCQ.
2117 * We limit ourself to 1 command if we have a port multiplier,
2118 * (at least without FBSS support), otherwise timeouts on
2119 * one port can race completions on other ports (see
2120 * ahci_ata_cmd_timeout() for more information).
2122 * If not on a port multiplier generally allow up to 4
2123 * standard commands to be enqueued. Remember that the
2124 * command processor will still process them sequentially.
2128 if (ap->ap_type == ATA_PORT_T_PM)
2130 else if (ap->ap_sc->sc_ncmds > 4)
2135 while (ap->ap_active_cnt < limit && ccb &&
2136 (ccb->ccb_xa.flags & ATA_F_NCQ) == 0) {
2137 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
2138 ahci_start_timeout(ccb);
2139 ap->ap_active |= 1 << ccb->ccb_slot;
2140 ap->ap_active_cnt++;
2141 ccb->ccb_xa.state = ATA_S_ONCHIP;
2142 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
2143 ccb = TAILQ_FIRST(&ap->ap_ccb_pending);
2149 ahci_intr(void *arg)
2151 struct ahci_softc *sc = arg;
2152 struct ahci_port *ap;
2153 u_int32_t is, ack = 0;
2157 * Check if the master enable is up, and whether any interrupts are
2160 if ((sc->sc_flags & AHCI_F_INT_GOOD) == 0)
2162 is = ahci_read(sc, AHCI_REG_IS);
2163 if (is == 0 || is == 0xffffffff)
2167 #ifdef AHCI_COALESCE
2168 /* Check coalescing interrupt first */
2169 if (is & sc->sc_ccc_mask) {
2170 DPRINTF(AHCI_D_INTR, "%s: command coalescing interrupt\n",
2172 is &= ~sc->sc_ccc_mask;
2173 is |= sc->sc_ccc_ports_cur;
2178 * Process interrupts for each port in a non-blocking fashion.
2182 ap = sc->sc_ports[port];
2184 if (ahci_os_lock_port_nb(ap) == 0) {
2185 ahci_port_intr(ap, 0);
2186 ahci_os_unlock_port(ap);
2188 ahci_pwrite(ap, AHCI_PREG_IE, 0);
2189 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2195 /* Finally, acknowledge global interrupt */
2196 ahci_write(sc, AHCI_REG_IS, ack);
2200 * Core called from helper thread.
2203 ahci_port_thread_core(struct ahci_port *ap, int mask)
2206 * Process any expired timedouts.
2208 ahci_os_lock_port(ap);
2209 if (mask & AP_SIGF_TIMEOUT) {
2210 ahci_check_active_timeouts(ap);
2214 * Process port interrupts which require a higher level of
2217 if (mask & AP_SIGF_PORTINT) {
2218 ahci_port_intr(ap, 1);
2219 ahci_port_interrupt_enable(ap);
2220 ahci_os_unlock_port(ap);
2222 ahci_os_unlock_port(ap);
2227 * Core per-port interrupt handler.
2229 * If blockable is 0 we cannot call ahci_os_sleep() at all and we can only
2230 * deal with normal command completions which do not require blocking.
2233 ahci_port_intr(struct ahci_port *ap, int blockable)
2235 struct ahci_softc *sc = ap->ap_sc;
2236 u_int32_t is, ci_saved, ci_masked;
2238 struct ahci_ccb *ccb = NULL;
2239 struct ata_port *ccb_at = NULL;
2240 volatile u_int32_t *active;
2241 const u_int32_t blockable_mask = AHCI_PREG_IS_TFES |
2249 enum { NEED_NOTHING, NEED_RESTART, NEED_HOTPLUG_INSERT,
2250 NEED_HOTPLUG_REMOVE } need = NEED_NOTHING;
2252 is = ahci_pread(ap, AHCI_PREG_IS);
2255 * All basic command completions are always processed.
2257 if (is & AHCI_PREG_IS_DPS)
2258 ahci_pwrite(ap, AHCI_PREG_IS, is & AHCI_PREG_IS_DPS);
2261 * If we can't block then we can't handle these here. Disable
2262 * the interrupts in question so we don't live-lock, the helper
2263 * thread will re-enable them.
2265 * If the port is in a completely failed state we do not want
2266 * to drop through to failed-command-processing if blockable is 0,
2267 * just let the thread deal with it all.
2269 * Otherwise we fall through and still handle DHRS and any commands
2270 * which completed normally. Even if we are errored we haven't
2271 * stopped the port yet so CI/SACT are still good.
2273 if (blockable == 0) {
2274 if (ap->ap_state == AP_S_FATAL_ERROR) {
2275 ahci_pwrite(ap, AHCI_PREG_IE,
2276 ahci_pread(ap, AHCI_PREG_IE) & ~is);
2277 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2280 if (is & blockable_mask) {
2281 ahci_pwrite(ap, AHCI_PREG_IE,
2282 ahci_pread(ap, AHCI_PREG_IE) & ~blockable_mask);
2283 is &= ~blockable_mask;
2284 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2289 kprintf("%s: INTERRUPT %b\n", PORTNAME(ap),
2294 * Either NCQ or non-NCQ commands will be active, never both.
2296 if (ap->ap_sactive) {
2297 KKASSERT(ap->ap_active == 0);
2298 KKASSERT(ap->ap_active_cnt == 0);
2299 ci_saved = ahci_pread(ap, AHCI_PREG_SACT);
2300 active = &ap->ap_sactive;
2302 ci_saved = ahci_pread(ap, AHCI_PREG_CI);
2303 active = &ap->ap_active;
2306 if (is & AHCI_PREG_IS_TFES) {
2308 * Command failed (blockable).
2310 * See AHCI 1.1 spec 6.2.2.1 and 6.2.2.2.
2312 * This stops command processing.
2314 u_int32_t tfd, serr;
2317 tfd = ahci_pread(ap, AHCI_PREG_TFD);
2318 serr = ahci_pread(ap, AHCI_PREG_SERR);
2321 * If no NCQ commands are active the error slot is easily
2322 * determined, otherwise we have to extract the error
2323 * from the log page.
2325 if (ap->ap_sactive == 0) {
2326 err_slot = AHCI_PREG_CMD_CCS(
2327 ahci_pread(ap, AHCI_PREG_CMD));
2328 ccb = &ap->ap_ccbs[err_slot];
2329 ccb_at = ccb->ccb_xa.at; /* can be NULL */
2331 /* Preserve received taskfile data from the RFIS. */
2332 memcpy(&ccb->ccb_xa.rfis, ap->ap_rfis->rfis,
2333 sizeof(struct ata_fis_d2h));
2338 DPRINTF(AHCI_D_VERBOSE, "%s: errd slot %d, TFD: %b, SERR: %b\n",
2339 PORTNAME(ap), err_slot,
2340 tfd, AHCI_PFMT_TFD_STS,
2341 serr, AHCI_PFMT_SERR);
2343 /* Stopping the port clears CI and SACT */
2344 ahci_port_stop(ap, 0);
2345 need = NEED_RESTART;
2348 * Clear SERR (primarily DIAG_X) to enable capturing of the
2351 ahci_pwrite(ap, AHCI_PREG_SERR, serr);
2353 /* Acknowledge the interrupts we can recover from. */
2354 ahci_pwrite(ap, AHCI_PREG_IS,
2355 is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_IFS));
2356 is &= ~(AHCI_PREG_IS_TFES | AHCI_PREG_IS_IFS);
2358 /* If device hasn't cleared its busy status, try to idle it. */
2359 if (tfd & (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
2360 kprintf("%s: Attempting to idle device\n",
2361 ATANAME(ap, ccb_at));
2362 if (ap->ap_flags & AP_F_IN_RESET)
2365 * XXX how do we unbrick a PM target (ccb_at != NULL).
2367 * For now fail the target and use CLO to clear the
2368 * busy condition and make the ahci port usable for
2369 * the remaining devices.
2372 ccb_at->at_probe = ATA_PROBE_FAILED;
2374 } else if (ahci_port_reset(ap, ccb_at, 0)) {
2375 kprintf("%s: Unable to idle device, port "
2381 /* Had to reset device, can't gather extended info. */
2382 } else if (ap->ap_sactive) {
2384 * Recover the NCQ error from log page 10h.
2386 * XXX NCQ currently not supported with port
2389 ahci_port_read_ncq_error(ap, &err_slot);
2390 kprintf("recover from NCQ error err_slot %d\n",
2395 DPRINTF(AHCI_D_VERBOSE, "%s: NCQ errored slot %d\n",
2396 PORTNAME(ap), err_slot);
2398 ccb = &ap->ap_ccbs[err_slot];
2401 * Non-NCQ error. We could gather extended info from
2402 * the log but for now just fall through.
2408 * If we couldn't determine the errored slot, reset the port
2409 * and fail all the active slots.
2411 if (err_slot == -1) {
2412 if (ap->ap_flags & AP_F_IN_RESET)
2415 * XXX how do we unbrick a PM target (ccb_at != NULL).
2417 * For now fail the target and use CLO to clear the
2418 * busy condition and make the ahci port usable for
2419 * the remaining devices.
2422 ccb_at->at_probe = ATA_PROBE_FAILED;
2424 } else if (ahci_port_reset(ap, ccb_at, 0)) {
2425 kprintf("%s: Unable to idle device after "
2426 "NCQ error, port bricked on us\n",
2430 kprintf("%s: couldn't recover NCQ error, failing "
2431 "all outstanding commands.\n",
2436 /* Clear the failed command in saved CI so completion runs. */
2437 ci_saved &= ~(1 << err_slot);
2439 /* Note the error in the ata_xfer. */
2440 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
2441 ccb->ccb_xa.state = ATA_S_ERROR;
2442 } else if (is & AHCI_PREG_IS_DHRS) {
2444 * Command posted D2H register FIS to the rfis (non-blocking).
2446 * Command posted D2H register FIS to the rfis. This
2447 * does NOT stop command processing and it is unclear
2448 * how we are supposed to deal with it other then using
2449 * only a queue of 1.
2451 * We must copy the port rfis to the ccb and restart
2452 * command processing. ahci_pm_read() does not function
2453 * without this support.
2457 if (ap->ap_sactive == 0) {
2458 err_slot = AHCI_PREG_CMD_CCS(
2459 ahci_pread(ap, AHCI_PREG_CMD));
2460 ccb = &ap->ap_ccbs[err_slot];
2461 ccb_at = ccb->ccb_xa.at; /* can be NULL */
2463 memcpy(&ccb->ccb_xa.rfis, ap->ap_rfis->rfis,
2464 sizeof(struct ata_fis_d2h));
2466 kprintf("%s: Unexpected DHRS posted while "
2467 "NCQ running\n", PORTNAME(ap));
2470 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_DHRS);
2471 is &= ~AHCI_PREG_IS_DHRS;
2475 * Device notification to us (non-blocking)
2477 * NOTE! On some parts notification bits can get set without
2478 * generating an interrupt. It is unclear whether this is
2479 * a bug in the PM (sending a DTOH device setbits with 'N' set
2480 * and 'I' not set), or a bug in the host controller.
2482 * It only seems to occur under load.
2484 if (/*(is & AHCI_PREG_IS_SDBS) &&*/ (sc->sc_cap & AHCI_REG_CAP_SSNTF)) {
2488 data = ahci_pread(ap, AHCI_PREG_SNTF);
2489 if (is & AHCI_PREG_IS_SDBS) {
2490 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_SDBS);
2491 is &= ~AHCI_PREG_IS_SDBS;
2492 xstr = " (no SDBS!)";
2497 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_SDBS);
2499 kprintf("%s: NOTIFY %08x%s\n",
2500 PORTNAME(ap), data, xstr);
2501 ahci_pwrite(ap, AHCI_PREG_SERR, AHCI_PREG_SERR_DIAG_N);
2502 ahci_pwrite(ap, AHCI_PREG_SNTF, data);
2503 ahci_cam_changed(ap, NULL, -1);
2508 * Spurious IFS errors (blockable).
2510 * Spurious IFS errors can occur while we are doing a reset
2511 * sequence through a PM. Try to recover if we are being asked
2512 * to ignore IFS errors during these periods.
2514 if ((is & AHCI_PREG_IS_IFS) && (ap->ap_flags & AP_F_IGNORE_IFS)) {
2515 u_int32_t serr = ahci_pread(ap, AHCI_PREG_SERR);
2516 if ((ap->ap_flags & AP_F_IFS_IGNORED) == 0) {
2517 kprintf("%s: Ignoring IFS (XXX) (IS: %b, SERR: %b)\n",
2520 serr, AHCI_PFMT_SERR);
2521 ap->ap_flags |= AP_F_IFS_IGNORED;
2523 ap->ap_flags |= AP_F_IFS_OCCURED;
2524 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
2525 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS);
2526 is &= ~AHCI_PREG_IS_IFS;
2527 ahci_port_stop(ap, 0);
2528 ahci_port_start(ap);
2529 need = NEED_RESTART;
2533 * Port change (hot-plug) (blockable).
2535 * A PCS interrupt will occur on hot-plug once communication is
2538 * A PRCS interrupt will occur on hot-unplug (and possibly also
2541 * XXX We can then check the CPS (Cold Presence State) bit, if
2542 * supported, to determine if a device is plugged in or not and do
2545 * WARNING: A PCS interrupt is cleared by clearing DIAG_X, and
2546 * can also occur if an unsolicited COMINIT is received.
2547 * If this occurs command processing is automatically
2548 * stopped (CR goes inactive) and the port must be stopped
2551 if (is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS)) {
2552 ahci_pwrite(ap, AHCI_PREG_IS,
2553 is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS));
2554 is &= ~(AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS);
2555 ahci_pwrite(ap, AHCI_PREG_SERR,
2556 (AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_X));
2557 ahci_port_stop(ap, 0);
2558 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
2559 case AHCI_PREG_SSTS_DET_DEV:
2560 if (ap->ap_type == ATA_PORT_T_NONE) {
2561 need = NEED_HOTPLUG_INSERT;
2564 need = NEED_RESTART;
2567 if (ap->ap_type != ATA_PORT_T_NONE) {
2568 need = NEED_HOTPLUG_REMOVE;
2571 need = NEED_RESTART;
2577 * Check for remaining errors - they are fatal. (blockable)
2579 if (is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS | AHCI_PREG_IS_IFS |
2580 AHCI_PREG_IS_OFS | AHCI_PREG_IS_UFS)) {
2583 ahci_pwrite(ap, AHCI_PREG_IS,
2584 is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2585 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2587 serr = ahci_pread(ap, AHCI_PREG_SERR);
2588 kprintf("%s: Unrecoverable errors (IS: %b, SERR: %b), "
2589 "disabling port.\n",
2592 serr, AHCI_PFMT_SERR
2594 is &= ~(AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2595 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2597 /* XXX try recovery first */
2602 * Fail all outstanding commands if we know the port won't recover.
2604 * We may have a ccb_at if the failed command is known and was
2605 * being sent to a device over a port multiplier (PM). In this
2606 * case if the port itself has not completely failed we fail just
2607 * the commands related to that target.
2609 if (ap->ap_state == AP_S_FATAL_ERROR) {
2611 ap->ap_state = AP_S_FATAL_ERROR;
2614 /* Stopping the port clears CI/SACT */
2615 ahci_port_stop(ap, 0);
2618 * Error all the active slots. If running across a PM
2619 * try to error out just the slots related to the target.
2621 ci_masked = ci_saved & *active;
2623 slot = ffs(ci_masked) - 1;
2624 ccb = &ap->ap_ccbs[slot];
2625 if (ccb_at == ccb->ccb_xa.at ||
2626 ap->ap_state == AP_S_FATAL_ERROR) {
2627 ci_masked &= ~(1 << slot);
2628 ccb->ccb_xa.state = ATA_S_ERROR;
2632 /* Run completion for all active slots. */
2633 ci_saved &= ~*active;
2636 * Don't restart the port if our problems were deemed fatal.
2638 * Also acknowlege all fatal interrupt sources to prevent
2641 if (ap->ap_state == AP_S_FATAL_ERROR) {
2642 if (need == NEED_RESTART)
2643 need = NEED_NOTHING;
2644 ahci_pwrite(ap, AHCI_PREG_IS,
2645 AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2646 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2652 * CCB completion (non blocking).
2654 * CCB completion is detected by noticing its slot's bit in CI has
2655 * changed to zero some time after we activated it.
2656 * If we are polling, we may only be interested in particular slot(s).
2658 * Any active bits not saved are completed within the restrictions
2659 * imposed by the caller.
2661 ci_masked = ~ci_saved & *active;
2663 slot = ffs(ci_masked) - 1;
2664 ccb = &ap->ap_ccbs[slot];
2665 ci_masked &= ~(1 << slot);
2667 DPRINTF(AHCI_D_INTR, "%s: slot %d is complete%s\n",
2668 PORTNAME(ap), slot, ccb->ccb_xa.state == ATA_S_ERROR ?
2671 bus_dmamap_sync(sc->sc_tag_cmdh,
2672 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
2673 BUS_DMASYNC_POSTWRITE);
2675 bus_dmamap_sync(sc->sc_tag_cmdt,
2676 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
2677 BUS_DMASYNC_POSTWRITE);
2679 bus_dmamap_sync(sc->sc_tag_rfis,
2680 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
2681 BUS_DMASYNC_POSTREAD);
2683 *active &= ~(1 << ccb->ccb_slot);
2684 if (active == &ap->ap_active) {
2685 KKASSERT(ap->ap_active_cnt > 0);
2686 --ap->ap_active_cnt;
2690 * Complete the ccb. If the ccb was marked expired it
2691 * was probably already removed from the command processor,
2692 * so don't take the clear ci_saved bit as meaning the
2693 * command actually succeeded, it didn't.
2695 if (ap->ap_expired & (1 << ccb->ccb_slot)) {
2696 ap->ap_expired &= ~(1 << ccb->ccb_slot);
2697 ccb->ccb_xa.state = ATA_S_TIMEOUT;
2699 ccb->ccb_xa.complete(&ccb->ccb_xa);
2701 if (ccb->ccb_xa.state == ATA_S_ONCHIP)
2702 ccb->ccb_xa.state = ATA_S_COMPLETE;
2705 ahci_issue_pending_commands(ap, NULL);
2709 * Cleanup. Will not be set if non-blocking.
2714 * A recoverable error occured and we can restart outstanding
2715 * commands on the port.
2717 ahci_port_start(ap);
2720 ahci_issue_saved_commands(ap, ci_saved);
2723 case NEED_HOTPLUG_INSERT:
2725 * A hot-plug insertion event has occured and all
2726 * outstanding commands have already been revoked.
2728 * Don't recurse if this occurs while we are
2729 * resetting the port.
2731 if ((ap->ap_flags & AP_F_IN_RESET) == 0) {
2732 kprintf("%s: HOTPLUG - Device inserted\n",
2734 ap->ap_probe = ATA_PROBE_NEED_INIT;
2735 ahci_cam_changed(ap, NULL, -1);
2738 case NEED_HOTPLUG_REMOVE:
2740 * A hot-plug removal event has occured and all
2741 * outstanding commands have already been revoked.
2743 * Don't recurse if this occurs while we are
2744 * resetting the port.
2746 if ((ap->ap_flags & AP_F_IN_RESET) == 0) {
2747 kprintf("%s: HOTPLUG - Device removed\n",
2749 ahci_port_hardstop(ap);
2750 /* ap_probe set to failed */
2751 ahci_cam_changed(ap, NULL, -1);
2760 ahci_get_ccb(struct ahci_port *ap)
2762 struct ahci_ccb *ccb;
2764 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
2765 ccb = TAILQ_FIRST(&ap->ap_ccb_free);
2767 KKASSERT(ccb->ccb_xa.state == ATA_S_PUT);
2768 TAILQ_REMOVE(&ap->ap_ccb_free, ccb, ccb_entry);
2769 ccb->ccb_xa.state = ATA_S_SETUP;
2770 ccb->ccb_xa.at = NULL;
2772 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
2778 ahci_put_ccb(struct ahci_ccb *ccb)
2780 struct ahci_port *ap = ccb->ccb_port;
2782 ccb->ccb_xa.state = ATA_S_PUT;
2783 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
2784 TAILQ_INSERT_TAIL(&ap->ap_ccb_free, ccb, ccb_entry);
2785 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
2789 ahci_get_err_ccb(struct ahci_port *ap)
2791 struct ahci_ccb *err_ccb;
2794 /* No commands may be active on the chip. */
2795 sact = ahci_pread(ap, AHCI_PREG_SACT);
2797 kprintf("ahci_get_err_ccb but SACT %08x != 0?\n", sact);
2798 KKASSERT(ahci_pread(ap, AHCI_PREG_CI) == 0);
2799 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) == 0);
2800 ap->ap_flags |= AP_F_ERR_CCB_RESERVED;
2802 /* Save outstanding command state. */
2803 ap->ap_err_saved_active = ap->ap_active;
2804 ap->ap_err_saved_active_cnt = ap->ap_active_cnt;
2805 ap->ap_err_saved_sactive = ap->ap_sactive;
2808 * Pretend we have no commands outstanding, so that completions won't
2811 ap->ap_active = ap->ap_active_cnt = ap->ap_sactive = 0;
2814 * Grab a CCB to use for error recovery. This should never fail, as
2815 * we ask atascsi to reserve one for us at init time.
2817 err_ccb = ap->ap_err_ccb;
2818 KKASSERT(err_ccb != NULL);
2819 err_ccb->ccb_xa.flags = 0;
2820 err_ccb->ccb_done = ahci_empty_done;
2826 ahci_put_err_ccb(struct ahci_ccb *ccb)
2828 struct ahci_port *ap = ccb->ccb_port;
2832 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) != 0);
2835 * No commands may be active on the chip
2837 sact = ahci_pread(ap, AHCI_PREG_SACT);
2839 panic("ahci_port_err_ccb(%d) but SACT %08x != 0\n",
2840 ccb->ccb_slot, sact);
2842 ci = ahci_pread(ap, AHCI_PREG_CI);
2844 panic("ahci_put_err_ccb(%d) but CI %08x != 0 "
2845 "(act=%08x sact=%08x)\n",
2847 ap->ap_active, ap->ap_sactive);
2850 KKASSERT(ccb == ap->ap_err_ccb);
2852 /* Restore outstanding command state */
2853 ap->ap_sactive = ap->ap_err_saved_sactive;
2854 ap->ap_active_cnt = ap->ap_err_saved_active_cnt;
2855 ap->ap_active = ap->ap_err_saved_active;
2857 ap->ap_flags &= ~AP_F_ERR_CCB_RESERVED;
2861 * Read log page to get NCQ error.
2863 * NOTE: NCQ not currently supported on port multipliers. XXX
2866 ahci_port_read_ncq_error(struct ahci_port *ap, int *err_slotp)
2868 struct ahci_ccb *ccb;
2869 struct ahci_cmd_hdr *cmd_slot;
2871 struct ata_fis_h2d *fis;
2874 DPRINTF(AHCI_D_VERBOSE, "%s: read log page\n", PORTNAME(ap));
2876 /* Save command register state. */
2877 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
2879 /* Port should have been idled already. Start it. */
2880 KKASSERT((cmd & AHCI_PREG_CMD_CR) == 0);
2881 ahci_port_start(ap);
2883 /* Prep error CCB for READ LOG EXT, page 10h, 1 sector. */
2884 ccb = ahci_get_err_ccb(ap);
2885 ccb->ccb_xa.flags = ATA_F_NOWAIT | ATA_F_READ | ATA_F_POLL;
2886 ccb->ccb_xa.data = ap->ap_err_scratch;
2887 ccb->ccb_xa.datalen = 512;
2888 cmd_slot = ccb->ccb_cmd_hdr;
2889 bzero(ccb->ccb_cmd_table, sizeof(struct ahci_cmd_table));
2891 fis = (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
2892 fis->type = ATA_FIS_TYPE_H2D;
2893 fis->flags = ATA_H2D_FLAGS_CMD;
2894 fis->command = ATA_C_READ_LOG_EXT;
2895 fis->lba_low = 0x10; /* queued error log page (10h) */
2896 fis->sector_count = 1; /* number of sectors (1) */
2897 fis->sector_count_exp = 0;
2898 fis->lba_mid = 0; /* starting offset */
2899 fis->lba_mid_exp = 0;
2902 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
2904 if (ahci_load_prdt(ccb) != 0) {
2905 rc = ENOMEM; /* XXX caller must abort all commands */
2909 ccb->ccb_xa.state = ATA_S_PENDING;
2910 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != 0)
2915 /* Abort our command, if it failed, by stopping command DMA. */
2917 kprintf("%s: log page read failed, slot %d was still active.\n",
2918 PORTNAME(ap), ccb->ccb_slot);
2921 /* Done with the error CCB now. */
2922 ahci_unload_prdt(ccb);
2923 ahci_put_err_ccb(ccb);
2925 /* Extract failed register set and tags from the scratch space. */
2927 struct ata_log_page_10h *log;
2930 log = (struct ata_log_page_10h *)ap->ap_err_scratch;
2931 if (log->err_regs.type & ATA_LOG_10H_TYPE_NOTQUEUED) {
2932 /* Not queued bit was set - wasn't an NCQ error? */
2933 kprintf("%s: read NCQ error page, but not an NCQ "
2938 /* Copy back the log record as a D2H register FIS. */
2939 *err_slotp = err_slot = log->err_regs.type &
2940 ATA_LOG_10H_TYPE_TAG_MASK;
2942 ccb = &ap->ap_ccbs[err_slot];
2943 memcpy(&ccb->ccb_xa.rfis, &log->err_regs,
2944 sizeof(struct ata_fis_d2h));
2945 ccb->ccb_xa.rfis.type = ATA_FIS_TYPE_D2H;
2946 ccb->ccb_xa.rfis.flags = 0;
2950 /* Restore saved CMD register state */
2951 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
2957 * Allocate memory for various structures DMAd by hardware. The maximum
2958 * number of segments for these tags is 1 so the DMA memory will have a
2959 * single physical base address.
2961 struct ahci_dmamem *
2962 ahci_dmamem_alloc(struct ahci_softc *sc, bus_dma_tag_t tag)
2964 struct ahci_dmamem *adm;
2967 adm = kmalloc(sizeof(*adm), M_DEVBUF, M_INTWAIT | M_ZERO);
2969 error = bus_dmamem_alloc(tag, (void **)&adm->adm_kva,
2970 BUS_DMA_ZERO, &adm->adm_map);
2973 error = bus_dmamap_load(tag, adm->adm_map,
2975 bus_dma_tag_getmaxsize(tag),
2976 ahci_dmamem_saveseg, &adm->adm_busaddr,
2981 bus_dmamap_destroy(tag, adm->adm_map);
2982 adm->adm_map = NULL;
2983 adm->adm_tag = NULL;
2984 adm->adm_kva = NULL;
2986 kfree(adm, M_DEVBUF);
2994 ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error)
2996 KKASSERT(error == 0);
2997 KKASSERT(nsegs == 1);
2998 *(bus_addr_t *)info = segs->ds_addr;
3003 ahci_dmamem_free(struct ahci_softc *sc, struct ahci_dmamem *adm)
3006 bus_dmamap_unload(adm->adm_tag, adm->adm_map);
3007 bus_dmamap_destroy(adm->adm_tag, adm->adm_map);
3008 adm->adm_map = NULL;
3009 adm->adm_tag = NULL;
3010 adm->adm_kva = NULL;
3012 kfree(adm, M_DEVBUF);
3016 ahci_read(struct ahci_softc *sc, bus_size_t r)
3018 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
3019 BUS_SPACE_BARRIER_READ);
3020 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
3024 ahci_write(struct ahci_softc *sc, bus_size_t r, u_int32_t v)
3026 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
3027 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
3028 BUS_SPACE_BARRIER_WRITE);
3032 ahci_pread(struct ahci_port *ap, bus_size_t r)
3034 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
3035 BUS_SPACE_BARRIER_READ);
3036 return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
3040 ahci_pwrite(struct ahci_port *ap, bus_size_t r, u_int32_t v)
3042 bus_space_write_4(ap->ap_sc->sc_iot, ap->ap_ioh, r, v);
3043 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
3044 BUS_SPACE_BARRIER_WRITE);
3048 * Wait up to (timeout) milliseconds for the masked port register to
3051 * Timeout is in milliseconds.
3054 ahci_pwait_eq(struct ahci_port *ap, int timeout,
3055 bus_size_t r, u_int32_t mask, u_int32_t target)
3060 * Loop hard up to 100uS
3062 for (t = 0; t < 100; ++t) {
3063 if ((ahci_pread(ap, r) & mask) == target)
3065 ahci_os_hardsleep(1); /* us */
3069 timeout -= ahci_os_softsleep();
3070 if ((ahci_pread(ap, r) & mask) == target)
3072 } while (timeout > 0);
3077 ahci_wait_ne(struct ahci_softc *sc, bus_size_t r, u_int32_t mask,
3083 * Loop hard up to 100uS
3085 for (t = 0; t < 100; ++t) {
3086 if ((ahci_read(sc, r) & mask) != target)
3088 ahci_os_hardsleep(1); /* us */
3092 * And one millisecond the slow way
3096 t -= ahci_os_softsleep();
3097 if ((ahci_read(sc, r) & mask) != target)
3106 * Acquire an ata transfer.
3108 * Pass a NULL at for direct-attached transfers, and a non-NULL at for
3109 * targets that go through the port multiplier.
3112 ahci_ata_get_xfer(struct ahci_port *ap, struct ata_port *at)
3114 struct ahci_ccb *ccb;
3116 ccb = ahci_get_ccb(ap);
3118 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer: NULL ccb\n",
3123 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer got slot %d\n",
3124 PORTNAME(ap), ccb->ccb_slot);
3126 bzero(ccb->ccb_xa.fis, sizeof(*ccb->ccb_xa.fis));
3127 ccb->ccb_xa.at = at;
3128 ccb->ccb_xa.fis->type = ATA_FIS_TYPE_H2D;
3130 return (&ccb->ccb_xa);
3134 ahci_ata_put_xfer(struct ata_xfer *xa)
3136 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
3138 DPRINTF(AHCI_D_XFER, "ahci_ata_put_xfer slot %d\n", ccb->ccb_slot);
3144 ahci_ata_cmd(struct ata_xfer *xa)
3146 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
3147 struct ahci_cmd_hdr *cmd_slot;
3149 KKASSERT(xa->state == ATA_S_SETUP);
3151 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR)
3154 kprintf("%s: started std command %b ccb %d ccb_at %p %d\n",
3155 ATANAME(ccb->ccb_port, ccb->ccb_xa.at),
3156 ahci_pread(ccb->ccb_port, AHCI_PREG_CMD), AHCI_PFMT_CMD,
3159 ccb->ccb_xa.at ? ccb->ccb_xa.at->at_target : -1);
3162 ccb->ccb_done = ahci_ata_cmd_done;
3164 cmd_slot = ccb->ccb_cmd_hdr;
3165 cmd_slot->flags = htole16(5); /* FIS length (in DWORDs) */
3166 if (ccb->ccb_xa.at) {
3167 cmd_slot->flags |= htole16(ccb->ccb_xa.at->at_target <<
3168 AHCI_CMD_LIST_FLAG_PMP_SHIFT);
3171 if (xa->flags & ATA_F_WRITE)
3172 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
3174 if (xa->flags & ATA_F_PACKET)
3175 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_A);
3177 if (ahci_load_prdt(ccb) != 0)
3180 xa->state = ATA_S_PENDING;
3182 if (xa->flags & ATA_F_POLL)
3183 return (ahci_poll(ccb, xa->timeout, ahci_ata_cmd_timeout));
3186 KKASSERT((xa->flags & ATA_F_TIMEOUT_EXPIRED) == 0);
3187 xa->flags |= ATA_F_TIMEOUT_DESIRED;
3194 xa->state = ATA_S_ERROR;
3197 return (ATA_S_ERROR);
3201 ahci_ata_cmd_done(struct ahci_ccb *ccb)
3203 struct ata_xfer *xa = &ccb->ccb_xa;
3206 * NOTE: callout does not lock port and may race us modifying
3207 * the flags, so make sure its stopped.
3209 if (xa->flags & ATA_F_TIMEOUT_RUNNING) {
3210 callout_stop(&ccb->ccb_timeout);
3211 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
3213 xa->flags &= ~(ATA_F_TIMEOUT_DESIRED | ATA_F_TIMEOUT_EXPIRED);
3215 KKASSERT(xa->state != ATA_S_ONCHIP);
3216 ahci_unload_prdt(ccb);
3218 if (xa->state != ATA_S_TIMEOUT)
3223 * Timeout from callout, MPSAFE - nothing can mess with the CCB's flags
3224 * while the callout is runing.
3226 * We can't safely get the port lock here or delay, we could block
3227 * the callout thread.
3230 ahci_ata_cmd_timeout_unserialized(void *arg)
3232 struct ahci_ccb *ccb = arg;
3233 struct ahci_port *ap = ccb->ccb_port;
3235 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
3236 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_EXPIRED;
3237 ahci_os_signal_port_thread(ap, AP_SIGF_TIMEOUT);
3241 * Timeout code, typically called when the port command processor is running.
3243 * We have to be very very careful here. We cannot stop the port unless
3244 * CR is already clear or the only active commands remaining are timed-out
3245 * ones. Otherwise stopping the port will race the command processor and
3246 * we can lose events. While we can theoretically just restart everything
3247 * that could result in a double-issue which will not work for ATAPI commands.
3250 ahci_ata_cmd_timeout(struct ahci_ccb *ccb)
3252 struct ata_xfer *xa = &ccb->ccb_xa;
3253 struct ahci_port *ap = ccb->ccb_port;
3254 struct ata_port *at;
3258 at = ccb->ccb_xa.at;
3260 kprintf("%s: CMD TIMEOUT state=%d slot=%d\n"
3262 "\tsactive=%08x active=%08x expired=%08x\n"
3263 "\t sact=%08x ci=%08x\n"
3266 ccb->ccb_xa.state, ccb->ccb_slot,
3267 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
3268 ap->ap_sactive, ap->ap_active, ap->ap_expired,
3269 ahci_pread(ap, AHCI_PREG_SACT),
3270 ahci_pread(ap, AHCI_PREG_CI),
3271 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS
3276 * NOTE: Timeout will not be running if the command was polled.
3277 * If we got here at least one of these flags should be set.
3279 KKASSERT(xa->flags & (ATA_F_POLL | ATA_F_TIMEOUT_DESIRED |
3280 ATA_F_TIMEOUT_RUNNING));
3281 xa->flags &= ~(ATA_F_TIMEOUT_RUNNING | ATA_F_TIMEOUT_EXPIRED);
3283 if (ccb->ccb_xa.state == ATA_S_PENDING) {
3284 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
3285 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3288 ahci_issue_pending_commands(ap, NULL);
3291 if (ccb->ccb_xa.state != ATA_S_ONCHIP) {
3292 kprintf("%s: Unexpected state during timeout: %d\n",
3293 ATANAME(ap, at), ccb->ccb_xa.state);
3298 * Ok, we can only get this command off the chip if CR is inactive
3299 * or if the only commands running on the chip are all expired.
3300 * Otherwise we have to wait until the port is in a safe state.
3302 * Do not set state here, it will cause polls to return when the
3303 * ccb is not yet off the chip.
3305 ap->ap_expired |= 1 << ccb->ccb_slot;
3307 if ((ahci_pread(ap, AHCI_PREG_CMD) & AHCI_PREG_CMD_CR) &&
3308 (ap->ap_active | ap->ap_sactive) != ap->ap_expired) {
3310 * If using FBSS or NCQ we can't safely stop the port
3313 kprintf("%s: Deferred timeout until its safe, slot %d\n",
3314 ATANAME(ap, at), ccb->ccb_slot);
3319 * We can safely stop the port and process all expired ccb's,
3320 * which will include our current ccb.
3322 ci_saved = (ap->ap_sactive) ? ahci_pread(ap, AHCI_PREG_SACT) :
3323 ahci_pread(ap, AHCI_PREG_CI);
3324 ahci_port_stop(ap, 0);
3326 while (ap->ap_expired) {
3327 slot = ffs(ap->ap_expired) - 1;
3328 ap->ap_expired &= ~(1 << slot);
3329 ci_saved &= ~(1 << slot);
3330 ccb = &ap->ap_ccbs[slot];
3331 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3332 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
3333 KKASSERT(ap->ap_sactive & (1 << slot));
3334 ap->ap_sactive &= ~(1 << slot);
3336 KKASSERT(ap->ap_active & (1 << slot));
3337 ap->ap_active &= ~(1 << slot);
3338 --ap->ap_active_cnt;
3341 ccb->ccb_xa.complete(&ccb->ccb_xa);
3343 /* ccb invalid now */
3346 * We can safely CLO the port to clear any BSY/DRQ, a case which
3347 * can occur with port multipliers. This will unbrick the port
3348 * and allow commands to other targets behind the PM continue.
3351 * Finally, once the port has been restarted we can issue any
3352 * previously saved pending commands, and run the port interrupt
3353 * code to handle any completions which may have occured when
3356 if (ahci_pread(ap, AHCI_PREG_TFD) &
3357 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
3358 kprintf("%s: Warning, issuing CLO after timeout\n",
3362 ahci_port_start(ap);
3363 ahci_issue_saved_commands(ap, ci_saved & ~ap->ap_expired);
3364 ahci_issue_pending_commands(ap, NULL);
3365 ahci_port_intr(ap, 0);
3369 * Issue a previously saved set of commands
3372 ahci_issue_saved_commands(struct ahci_port *ap, u_int32_t ci_saved)
3375 KKASSERT(!((ap->ap_active & ci_saved) &&
3376 (ap->ap_sactive & ci_saved)));
3377 KKASSERT((ci_saved & ap->ap_expired) == 0);
3378 if (ap->ap_sactive & ci_saved)
3379 ahci_pwrite(ap, AHCI_PREG_SACT, ci_saved);
3380 ahci_pwrite(ap, AHCI_PREG_CI, ci_saved);
3385 * Used by the softreset, pmprobe, and read_ncq_error only, in very
3386 * specialized, controlled circumstances.
3388 * Only one command may be pending.
3391 ahci_quick_timeout(struct ahci_ccb *ccb)
3393 struct ahci_port *ap = ccb->ccb_port;
3395 switch (ccb->ccb_xa.state) {
3397 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
3398 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3401 KKASSERT(ap->ap_active == (1 << ccb->ccb_slot) &&
3402 ap->ap_sactive == 0);
3403 ahci_port_stop(ap, 0);
3404 ahci_port_start(ap);
3406 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3407 ap->ap_active &= ~(1 << ccb->ccb_slot);
3408 KKASSERT(ap->ap_active_cnt > 0);
3409 --ap->ap_active_cnt;
3412 panic("%s: ahci_quick_timeout: ccb in bad state %d",
3413 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_xa.state);
3418 ahci_empty_done(struct ahci_ccb *ccb)