df38511e4e8b1715f144fd5416774e4cd08c13f9
[dragonfly.git] / sys / bus / usb / ohci_pci.c
1 /*
2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to The NetBSD Foundation
6  * by Lennart Augustsson (augustss@carlstedt.se) at
7  * Carlstedt Research & Technology.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *        This product includes software developed by the NetBSD
20  *        Foundation, Inc. and its contributors.
21  * 4. Neither the name of The NetBSD Foundation nor the names of its
22  *    contributors may be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  *
37  * $FreeBSD: src/sys/dev/usb/ohci_pci.c,v 1.44.2.1 2006/01/29 01:26:46 iedowse Exp $
38  * $DragonFly: src/sys/bus/usb/ohci_pci.c,v 1.9 2007/08/24 16:02:47 dillon Exp $
39  */
40
41 /*
42  * USB Open Host Controller driver.
43  *
44  * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
45  */
46
47 /* The low level controller code for OHCI has been split into
48  * PCI probes and OHCI specific code. This was done to facilitate the
49  * sharing of code between *BSD's
50  */
51
52 #include "opt_bus.h"
53
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/kernel.h>
57 #include <sys/module.h>
58 #include <sys/bus.h>
59 #include <sys/queue.h>
60 #include <sys/rman.h>
61 #include <sys/thread2.h>
62
63 #include <bus/pci/pcivar.h>
64 #include <bus/pci/pcireg.h>
65
66 #include <bus/usb/usb.h>
67 #include <bus/usb/usbdi.h>
68 #include <bus/usb/usbdivar.h>
69 #include <bus/usb/usb_mem.h>
70
71 #include <bus/usb/ohcireg.h>
72 #include <bus/usb/ohcivar.h>
73
74 #define PCI_OHCI_VENDORID_ACERLABS      0x10b9
75 #define PCI_OHCI_VENDORID_AMD           0x1022
76 #define PCI_OHCI_VENDORID_APPLE         0x106b
77 #define PCI_OHCI_VENDORID_ATI           0x1002
78 #define PCI_OHCI_VENDORID_CMDTECH       0x1095
79 #define PCI_OHCI_VENDORID_NEC           0x1033
80 #define PCI_OHCI_VENDORID_NVIDIA        0x12D2
81 #define PCI_OHCI_VENDORID_NVIDIA2       0x10DE
82 #define PCI_OHCI_VENDORID_OPTI          0x1045
83 #define PCI_OHCI_VENDORID_SIS           0x1039
84 #define PCI_OHCI_VENDORID_SUN           0x108e
85
86 #define PCI_OHCI_DEVICEID_ALADDIN_V     0x523710b9
87 static const char *ohci_device_aladdin_v = "AcerLabs M5237 (Aladdin-V) USB controller";
88
89 #define PCI_OHCI_DEVICEID_AMD756        0x740c1022
90 static const char *ohci_device_amd756 = "AMD-756 USB Controller";
91
92 #define PCI_OHCI_DEVICEID_CS5536        0x20941022
93 static const char *ohci_device_cs5536 = "AMD CS5536 [geode companion] USB Controller";
94
95 #define PCI_OHCI_DEVICEID_AMD766        0x74141022
96 static const char *ohci_device_amd766 = "AMD-766 USB Controller";
97
98 #define PCI_OHCI_DEVICEID_SB400_1       0x43741002
99 #define PCI_OHCI_DEVICEID_SB400_2       0x43751002
100 static const char *ohci_device_sb400 = "ATI SB400 USB Controller";
101
102 #define PCI_OHCI_DEVICEID_FIRELINK      0xc8611045
103 static const char *ohci_device_firelink = "OPTi 82C861 (FireLink) USB controller";
104
105 #define PCI_OHCI_DEVICEID_NEC           0x00351033
106 static const char *ohci_device_nec = "NEC uPD 9210 USB controller";
107
108 #define PCI_OHCI_DEVICEID_NFORCE3       0x00d710de
109 static const char *ohci_device_nforce3 = "nVidia nForce3 USB Controller";
110
111 #define PCI_OHCI_DEVICEID_USB0670       0x06701095
112 static const char *ohci_device_usb0670 = "CMD Tech 670 (USB0670) USB controller";
113
114 #define PCI_OHCI_DEVICEID_USB0673       0x06731095
115 static const char *ohci_device_usb0673 = "CMD Tech 673 (USB0673) USB controller";
116
117 #define PCI_OHCI_DEVICEID_SIS5571       0x70011039
118 static const char *ohci_device_sis5571 = "SiS 5571 USB controller";
119
120 #define PCI_OHCI_DEVICEID_KEYLARGO      0x0019106b
121 static const char *ohci_device_keylargo = "Apple KeyLargo USB controller";
122
123 #define PCI_OHCI_DEVICEID_PCIO2USB      0x1103108e
124 static const char *ohci_device_pcio2usb = "Sun PCIO-2 USB controller";
125
126 static const char *ohci_device_generic = "OHCI (generic) USB controller";
127
128 #define PCI_OHCI_BASE_REG       0x10
129
130
131 static int ohci_pci_attach(device_t self);
132 static int ohci_pci_detach(device_t self);
133 static int ohci_pci_suspend(device_t self);
134 static int ohci_pci_resume(device_t self);
135
136 static int
137 ohci_pci_suspend(device_t self)
138 {
139         ohci_softc_t *sc = device_get_softc(self);
140         int err;
141
142         err = bus_generic_suspend(self);
143         if (err)
144                 return err;
145         ohci_power(PWR_SUSPEND, sc);
146
147         return 0;
148 }
149
150 static int
151 ohci_pci_resume(device_t self)
152 {
153         ohci_softc_t *sc = device_get_softc(self);
154
155 #ifndef BURN_BRIDGES
156         uint32_t reg, int_line;
157
158         if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) {
159                 device_printf(self, "chip is in D%d mode "
160                         "-- setting to D0\n", pci_get_powerstate(self));
161                 reg = pci_read_config(self, PCI_CBMEM, 4);
162                 int_line = pci_read_config(self, PCIR_INTLINE, 4);
163                 pci_set_powerstate(self, PCI_POWERSTATE_D0);
164                 pci_write_config(self, PCI_CBMEM, reg, 4);
165                 pci_write_config(self, PCIR_INTLINE, int_line, 4);
166         }
167 #endif  /* !BURN_BRIDGES */
168
169         ohci_power(PWR_RESUME, sc);
170         bus_generic_resume(self);
171
172         return 0;
173 }
174
175 static const char *
176 ohci_pci_match(device_t self)
177 {
178         u_int32_t device_id = pci_get_devid(self);
179
180         switch (device_id) {
181         case PCI_OHCI_DEVICEID_ALADDIN_V:
182                 return (ohci_device_aladdin_v);
183         case PCI_OHCI_DEVICEID_AMD756:
184                 return (ohci_device_amd756);
185         case PCI_OHCI_DEVICEID_AMD766:
186                 return (ohci_device_amd766);
187         case PCI_OHCI_DEVICEID_CS5536:
188                 return (ohci_device_cs5536);
189         case PCI_OHCI_DEVICEID_SB400_1:
190         case PCI_OHCI_DEVICEID_SB400_2:
191                 return (ohci_device_sb400);
192         case PCI_OHCI_DEVICEID_USB0670:
193                 return (ohci_device_usb0670);
194         case PCI_OHCI_DEVICEID_USB0673:
195                 return (ohci_device_usb0673);
196         case PCI_OHCI_DEVICEID_FIRELINK:
197                 return (ohci_device_firelink);
198         case PCI_OHCI_DEVICEID_NEC:
199                 return (ohci_device_nec);
200         case PCI_OHCI_DEVICEID_NFORCE3:
201                 return (ohci_device_nforce3);
202         case PCI_OHCI_DEVICEID_SIS5571:
203                 return (ohci_device_sis5571);
204         case PCI_OHCI_DEVICEID_KEYLARGO:
205                 return (ohci_device_keylargo);
206         case PCI_OHCI_DEVICEID_PCIO2USB:
207                 return (ohci_device_pcio2usb);
208         default:
209                 if (pci_get_class(self) == PCIC_SERIALBUS
210                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
211                     && pci_get_progif(self) == PCI_INTERFACE_OHCI) {
212                         return (ohci_device_generic);
213                 }
214         }
215
216         return NULL;            /* dunno */
217 }
218
219 static int
220 ohci_pci_probe(device_t self)
221 {
222         const char *desc = ohci_pci_match(self);
223
224         if (desc) {
225                 device_set_desc(self, desc);
226                 device_set_async_attach(self, TRUE);
227                 return 0;
228         } else {
229                 return ENXIO;
230         }
231 }
232
233 static int
234 ohci_pci_attach(device_t self)
235 {
236         ohci_softc_t *sc = device_get_softc(self);
237         int err;
238         int rid;
239
240         /* XXX where does it say so in the spec? */
241         sc->sc_bus.usbrev = USBREV_1_0;
242
243         pci_enable_busmaster(self);
244
245         /*
246          * Some Sun PCIO-2 USB controllers have their intpin register
247          * bogusly set to 0, although it should be 4. Correct that.
248          */
249         if (pci_get_devid(self) == PCI_OHCI_DEVICEID_PCIO2USB &&
250             pci_get_intpin(self) == 0)
251                 pci_set_intpin(self, 4);
252
253         rid = PCI_CBMEM;
254         sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
255             RF_ACTIVE);
256         if (!sc->io_res) {
257                 device_printf(self, "Could not map memory\n");
258                 return ENXIO;
259         }
260         sc->iot = rman_get_bustag(sc->io_res);
261         sc->ioh = rman_get_bushandle(sc->io_res);
262
263         rid = 0;
264         sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
265             RF_SHAREABLE | RF_ACTIVE);
266         if (sc->irq_res == NULL) {
267                 device_printf(self, "Could not allocate irq\n");
268                 ohci_pci_detach(self);
269                 return ENXIO;
270         }
271         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
272         if (!sc->sc_bus.bdev) {
273                 device_printf(self, "Could not add USB device\n");
274                 ohci_pci_detach(self);
275                 return ENOMEM;
276         }
277         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
278
279         /* ohci_pci_match will never return NULL if ohci_pci_probe succeeded */
280         device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
281         switch (pci_get_vendor(self)) {
282         case PCI_OHCI_VENDORID_ACERLABS:
283                 ksprintf(sc->sc_vendor, "AcerLabs");
284                 break;
285         case PCI_OHCI_VENDORID_AMD:
286                 ksprintf(sc->sc_vendor, "AMD");
287                 break;
288         case PCI_OHCI_VENDORID_APPLE:
289                 ksprintf(sc->sc_vendor, "Apple");
290                 break;
291         case PCI_OHCI_VENDORID_ATI:
292                 ksprintf(sc->sc_vendor, "ATI");
293                 break;
294         case PCI_OHCI_VENDORID_CMDTECH:
295                 ksprintf(sc->sc_vendor, "CMDTECH");
296                 break;
297         case PCI_OHCI_VENDORID_NEC:
298                 ksprintf(sc->sc_vendor, "NEC");
299                 break;
300         case PCI_OHCI_VENDORID_NVIDIA:
301         case PCI_OHCI_VENDORID_NVIDIA2:
302                 ksprintf(sc->sc_vendor, "nVidia");
303                 break;
304         case PCI_OHCI_VENDORID_OPTI:
305                 ksprintf(sc->sc_vendor, "OPTi");
306                 break;
307         case PCI_OHCI_VENDORID_SIS:
308                 ksprintf(sc->sc_vendor, "SiS");
309                 break;
310         default:
311                 if (bootverbose)
312                         device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
313                             pci_get_devid(self));
314                 ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
315         }
316
317         err = bus_setup_intr(self, sc->irq_res, 0,
318             (driver_intr_t *) ohci_intr, sc, &sc->ih, NULL);
319         if (err) {
320                 device_printf(self, "Could not setup irq, %d\n", err);
321                 sc->ih = NULL;
322                 ohci_pci_detach(self);
323                 return ENXIO;
324         }
325
326         /*
327          * OHCI interrupts which occur early will leave them disabled,
328          * so run the interrupt manually once we're done with the init.
329          */
330         err = ohci_init(sc);
331         if (err == 0)
332                 err = device_probe_and_attach(sc->sc_bus.bdev);
333
334         if (err) {
335                 device_printf(self, "USB init failed\n");
336                 ohci_pci_detach(self);
337                 return EIO;
338         }
339         return 0;
340 }
341
342 static int
343 ohci_pci_detach(device_t self)
344 {
345         ohci_softc_t *sc = device_get_softc(self);
346
347         if (sc->sc_flags & OHCI_SCFLG_DONEINIT) {
348                 ohci_detach(sc, 0);
349                 sc->sc_flags &= ~OHCI_SCFLG_DONEINIT;
350         }
351
352         if (sc->irq_res && sc->ih) {
353                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
354
355                 if (err)
356                         /* XXX or should we panic? */
357                         device_printf(self, "Could not tear down irq, %d\n",
358                             err);
359                 sc->ih = NULL;
360         }
361         if (sc->sc_bus.bdev) {
362                 device_delete_child(self, sc->sc_bus.bdev);
363                 sc->sc_bus.bdev = NULL;
364         }
365         if (sc->irq_res) {
366                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
367                 sc->irq_res = NULL;
368         }
369         if (sc->io_res) {
370                 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
371                 sc->io_res = NULL;
372                 sc->iot = 0;
373                 sc->ioh = 0;
374         }
375         return 0;
376 }
377
378 static device_method_t ohci_methods[] = {
379         /* Device interface */
380         DEVMETHOD(device_probe, ohci_pci_probe),
381         DEVMETHOD(device_attach, ohci_pci_attach),
382         DEVMETHOD(device_detach, ohci_pci_detach),
383         DEVMETHOD(device_suspend, ohci_pci_suspend),
384         DEVMETHOD(device_resume, ohci_pci_resume),
385         DEVMETHOD(device_shutdown, bus_generic_shutdown),
386
387         /* Bus interface */
388         DEVMETHOD(bus_print_child, bus_generic_print_child),
389
390         {0, 0}
391 };
392
393 static driver_t ohci_driver = {
394         "ohci",
395         ohci_methods,
396         sizeof(ohci_softc_t),
397 };
398
399 static devclass_t ohci_devclass;
400
401 DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, 0, 0);
402 DRIVER_MODULE(ohci, cardbus, ohci_driver, ohci_devclass, 0, 0);