2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/i386/i386/Attic/machdep.c,v 1.28 2003/07/24 23:52:36 dillon Exp $
45 #include "opt_atalk.h"
46 #include "opt_compat.h"
49 #include "opt_directio.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
54 #include "opt_perfmon.h"
56 #include "opt_user_ldt.h"
57 #include "opt_userconfig.h"
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/sysproto.h>
62 #include <sys/signalvar.h>
63 #include <sys/kernel.h>
64 #include <sys/linker.h>
65 #include <sys/malloc.h>
68 #include <sys/reboot.h>
69 #include <sys/callout.h>
71 #include <sys/msgbuf.h>
72 #include <sys/sysent.h>
73 #include <sys/sysctl.h>
74 #include <sys/vmmeter.h>
78 #include <vm/vm_param.h>
80 #include <vm/vm_kern.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_map.h>
84 #include <vm/vm_pager.h>
85 #include <vm/vm_extern.h>
87 #include <sys/thread2.h>
95 #include <machine/cpu.h>
96 #include <machine/reg.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
100 #include <machine/ipl.h>
101 #include <machine/md_var.h>
102 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
108 #include <machine/perfmon.h>
110 #include <machine/cputypes.h>
113 #include <i386/isa/isa_device.h>
115 #include <i386/isa/intr_machdep.h>
117 #include <machine/vm86.h>
118 #include <sys/random.h>
119 #include <sys/ptrace.h>
120 #include <machine/sigframe.h>
122 extern void init386 __P((int first));
123 extern void dblfault_handler __P((void));
125 extern void printcpuinfo(void); /* XXX header file */
126 extern void finishidentcpu(void);
127 extern void panicifcpuunsupported(void);
128 extern void initializecpu(void);
130 static void cpu_startup __P((void *));
131 #ifdef CPU_ENABLE_SSE
132 static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
133 static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
134 #endif /* CPU_ENABLE_SSE */
136 extern void ffs_rawread_setup(void);
137 #endif /* DIRECTIO */
138 static void init_locks(void);
140 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142 static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
144 int _udatasel, _ucodesel;
147 #if defined(SWTCH_OPTIM_STATS)
148 extern int swtch_optim_stats;
149 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
150 CTLFLAG_RD, &swtch_optim_stats, 0, "");
151 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
152 CTLFLAG_RD, &tlb_flush_count, 0, "");
156 static int ispc98 = 1;
158 static int ispc98 = 0;
160 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
166 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
172 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
173 0, 0, sysctl_hw_physmem, "IU", "");
176 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178 int error = sysctl_handle_int(oidp, 0,
179 ctob(physmem - vmstats.v_wire_count), req);
183 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
184 0, 0, sysctl_hw_usermem, "IU", "");
187 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189 int error = sysctl_handle_int(oidp, 0,
190 i386_btop(avail_end - avail_start), req);
194 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
195 0, 0, sysctl_hw_availpages, "I", "");
198 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
202 /* Unwind the buffer, so that it's linear (possibly starting with
203 * some initial nulls).
205 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
206 msgbufp->msg_size-msgbufp->msg_bufr,req);
207 if(error) return(error);
208 if(msgbufp->msg_bufr>0) {
209 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
210 msgbufp->msg_bufr,req);
215 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
216 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
218 static int msgbuf_clear;
221 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
224 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
226 if (!error && req->newptr) {
227 /* Clear the buffer and reset write pointer */
228 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
229 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
235 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
236 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
237 "Clear kernel message buffer");
239 int bootverbose = 0, Maxmem = 0;
242 vm_offset_t phys_avail[10];
244 /* must be 2 less so 0 0 can signal end of chunks */
245 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
247 static vm_offset_t buffer_sva, buffer_eva;
248 vm_offset_t clean_sva, clean_eva;
249 static vm_offset_t pager_sva, pager_eva;
250 static struct trapframe proc0_tf;
263 if (boothowto & RB_VERBOSE)
267 * Good {morning,afternoon,evening,night}.
269 printf("%s", version);
272 panicifcpuunsupported();
276 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
278 * Display any holes after the first chunk of extended memory.
283 printf("Physical memory chunk(s):\n");
284 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
285 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
287 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
288 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
294 * Calculate callout wheel size
296 for (callwheelsize = 1, callwheelbits = 0;
297 callwheelsize < ncallout;
298 callwheelsize <<= 1, ++callwheelbits)
300 callwheelmask = callwheelsize - 1;
303 * Allocate space for system data structures.
304 * The first available kernel virtual address is in "v".
305 * As pages of kernel virtual memory are allocated, "v" is incremented.
306 * As pages of memory are allocated and cleared,
307 * "firstaddr" is incremented.
308 * An index into the kernel page table corresponding to the
309 * virtual memory address maintained in "v" is kept in "mapaddr".
313 * Make two passes. The first pass calculates how much memory is
314 * needed and allocates it. The second pass assigns virtual
315 * addresses to the various data structures.
319 v = (caddr_t)firstaddr;
321 #define valloc(name, type, num) \
322 (name) = (type *)v; v = (caddr_t)((name)+(num))
323 #define valloclim(name, type, num, lim) \
324 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
326 valloc(callout, struct callout, ncallout);
327 valloc(callwheel, struct callout_tailq, callwheelsize);
330 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
331 * For the first 64MB of ram nominally allocate sufficient buffers to
332 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
333 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
334 * the buffer cache we limit the eventual kva reservation to
337 * factor represents the 1/4 x ram conversion.
340 int factor = 4 * BKVASIZE / 1024;
341 int kbytes = physmem * (PAGE_SIZE / 1024);
345 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
347 nbuf += (kbytes - 65536) * 2 / (factor * 5);
348 if (maxbcache && nbuf > maxbcache / BKVASIZE)
349 nbuf = maxbcache / BKVASIZE;
353 * Do not allow the buffer_map to be more then 1/2 the size of the
356 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
358 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
360 printf("Warning: nbufs capped at %d\n", nbuf);
363 nswbuf = max(min(nbuf/4, 256), 16);
365 if (nswbuf < NSWBUF_MIN)
372 valloc(swbuf, struct buf, nswbuf);
373 valloc(buf, struct buf, nbuf);
377 * End of first pass, size has been calculated so allocate memory
379 if (firstaddr == 0) {
380 size = (vm_size_t)(v - firstaddr);
381 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
383 panic("startup: no room for tables");
388 * End of second pass, addresses have been assigned
390 if ((vm_size_t)(v - firstaddr) != size)
391 panic("startup: table size inconsistency");
393 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
394 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
395 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
397 buffer_map->system_map = 1;
398 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
399 (nswbuf*MAXPHYS) + pager_map_size);
400 pager_map->system_map = 1;
401 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
402 (16*(ARG_MAX+(PAGE_SIZE*3))));
405 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
406 * we use the more space efficient malloc in place of kmem_alloc.
409 vm_offset_t mb_map_size;
411 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
412 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
413 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
414 bzero(mclrefcnt, mb_map_size / MCLBYTES);
415 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr,
417 mb_map->system_map = 1;
421 * Initialize callouts
423 SLIST_INIT(&callfree);
424 for (i = 0; i < ncallout; i++) {
425 callout_init(&callout[i]);
426 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
427 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
430 for (i = 0; i < callwheelsize; i++) {
431 TAILQ_INIT(&callwheel[i]);
434 #if defined(USERCONFIG)
436 cninit(); /* the preferred console may have changed */
439 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
440 ptoa(vmstats.v_free_count) / 1024);
443 * Set up buffers, so they can be used to read disk labels.
446 vm_pager_bufferinit();
450 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
452 mp_start(); /* fire up the APs and APICs */
459 * Send an interrupt to process.
461 * Stack is set up to allow sigcode stored
462 * at top to call routine, followed by kcall
463 * to sigreturn routine below. After sigreturn
464 * resets the signal mask, the stack, and the
465 * frame pointer, it returns to the user
469 osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
471 register struct proc *p = curproc;
472 register struct trapframe *regs;
473 register struct osigframe *fp;
475 struct sigacts *psp = p->p_sigacts;
478 regs = p->p_md.md_regs;
479 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
481 /* Allocate and validate space for the signal handler context. */
482 if ((p->p_flag & P_ALTSTACK) && !oonstack &&
483 SIGISMEMBER(psp->ps_sigonstack, sig)) {
484 fp = (struct osigframe *)(p->p_sigstk.ss_sp +
485 p->p_sigstk.ss_size - sizeof(struct osigframe));
486 p->p_sigstk.ss_flags |= SS_ONSTACK;
489 fp = (struct osigframe *)regs->tf_esp - 1;
491 /* Translate the signal if appropriate */
492 if (p->p_sysent->sv_sigtbl) {
493 if (sig <= p->p_sysent->sv_sigsize)
494 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
497 /* Build the argument list for the signal handler. */
499 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
500 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
501 /* Signal handler installed with SA_SIGINFO. */
502 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
503 sf.sf_siginfo.si_signo = sig;
504 sf.sf_siginfo.si_code = code;
505 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
508 /* Old FreeBSD-style arguments. */
510 sf.sf_addr = regs->tf_err;
511 sf.sf_ahu.sf_handler = catcher;
514 /* save scratch registers */
515 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
516 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
517 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
518 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
519 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
520 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
521 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
522 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
523 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
524 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
525 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
526 sf.sf_siginfo.si_sc.sc_gs = rgs();
527 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
529 /* Build the signal context to be used by sigreturn. */
530 sf.sf_siginfo.si_sc.sc_onstack = oonstack;
531 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
532 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
533 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
534 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
535 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
536 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
537 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
540 * If we're a vm86 process, we want to save the segment registers.
541 * We also change eflags to be our emulated eflags, not the actual
544 if (regs->tf_eflags & PSL_VM) {
545 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
546 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
548 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
549 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
550 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
551 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
553 if (vm86->vm86_has_vme == 0)
554 sf.sf_siginfo.si_sc.sc_ps =
555 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP))
556 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
557 /* see sendsig for comment */
558 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
561 /* Copy the sigframe out to the user's stack. */
562 if (copyout(&sf, fp, sizeof(struct osigframe)) != 0) {
564 * Something is wrong with the stack pointer.
565 * ...Kill the process.
570 regs->tf_esp = (int)fp;
571 regs->tf_eip = PS_STRINGS - szosigcode;
572 regs->tf_eflags &= ~PSL_T;
573 regs->tf_cs = _ucodesel;
574 regs->tf_ds = _udatasel;
575 regs->tf_es = _udatasel;
576 regs->tf_fs = _udatasel;
578 regs->tf_ss = _udatasel;
582 sendsig(catcher, sig, mask, code)
588 struct proc *p = curproc;
589 struct trapframe *regs;
590 struct sigacts *psp = p->p_sigacts;
591 struct sigframe sf, *sfp;
594 if (SIGISMEMBER(psp->ps_osigset, sig)) {
595 osendsig(catcher, sig, mask, code);
599 regs = p->p_md.md_regs;
600 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
602 /* save user context */
603 bzero(&sf, sizeof(struct sigframe));
604 sf.sf_uc.uc_sigmask = *mask;
605 sf.sf_uc.uc_stack = p->p_sigstk;
606 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
607 sf.sf_uc.uc_mcontext.mc_gs = rgs();
608 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
610 /* Allocate and validate space for the signal handler context. */
611 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
612 SIGISMEMBER(psp->ps_sigonstack, sig)) {
613 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
614 p->p_sigstk.ss_size - sizeof(struct sigframe));
615 p->p_sigstk.ss_flags |= SS_ONSTACK;
618 sfp = (struct sigframe *)regs->tf_esp - 1;
620 /* Translate the signal is appropriate */
621 if (p->p_sysent->sv_sigtbl) {
622 if (sig <= p->p_sysent->sv_sigsize)
623 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
626 /* Build the argument list for the signal handler. */
628 sf.sf_ucontext = (register_t)&sfp->sf_uc;
629 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
630 /* Signal handler installed with SA_SIGINFO. */
631 sf.sf_siginfo = (register_t)&sfp->sf_si;
632 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
634 /* fill siginfo structure */
635 sf.sf_si.si_signo = sig;
636 sf.sf_si.si_code = code;
637 sf.sf_si.si_addr = (void*)regs->tf_err;
640 /* Old FreeBSD-style arguments. */
641 sf.sf_siginfo = code;
642 sf.sf_addr = regs->tf_err;
643 sf.sf_ahu.sf_handler = catcher;
647 * If we're a vm86 process, we want to save the segment registers.
648 * We also change eflags to be our emulated eflags, not the actual
651 if (regs->tf_eflags & PSL_VM) {
652 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
653 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
655 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
656 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
657 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
658 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
660 if (vm86->vm86_has_vme == 0)
661 sf.sf_uc.uc_mcontext.mc_eflags =
662 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
663 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
666 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
667 * syscalls made by the signal handler. This just avoids
668 * wasting time for our lazy fixup of such faults. PSL_NT
669 * does nothing in vm86 mode, but vm86 programs can set it
670 * almost legitimately in probes for old cpu types.
672 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
676 * Copy the sigframe out to the user's stack.
678 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
680 * Something is wrong with the stack pointer.
681 * ...Kill the process.
686 regs->tf_esp = (int)sfp;
687 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
688 regs->tf_eflags &= ~PSL_T;
689 regs->tf_cs = _ucodesel;
690 regs->tf_ds = _udatasel;
691 regs->tf_es = _udatasel;
692 regs->tf_fs = _udatasel;
694 regs->tf_ss = _udatasel;
698 * osigreturn_args(struct osigcontext *sigcntxp)
700 * System call to cleanup state after a signal
701 * has been taken. Reset signal mask and
702 * stack state from context left by sendsig (above).
703 * Return to previous pc and psl as specified by
704 * context left by sendsig. Check carefully to
705 * make sure that the user has not modified the
706 * state to gain improper privileges.
708 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
709 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
712 osigreturn(struct osigreturn_args *uap)
714 struct proc *p = curproc;
715 struct osigcontext *scp;
716 struct trapframe *regs = p->p_md.md_regs;
721 if (!useracc((caddr_t)scp, sizeof (struct osigcontext), VM_PROT_READ))
725 if (eflags & PSL_VM) {
726 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
727 struct vm86_kernel *vm86;
730 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
731 * set up the vm86 area, and we can't enter vm86 mode.
733 if (p->p_thread->td_pcb->pcb_ext == 0)
735 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
736 if (vm86->vm86_inited == 0)
739 /* go back to user mode if both flags are set */
740 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
741 trapsignal(p, SIGBUS, 0);
743 if (vm86->vm86_has_vme) {
744 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
745 (eflags & VME_USERCHANGE) | PSL_VM;
747 vm86->vm86_eflags = eflags; /* save VIF, VIP */
748 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
750 tf->tf_vm86_ds = scp->sc_ds;
751 tf->tf_vm86_es = scp->sc_es;
752 tf->tf_vm86_fs = scp->sc_fs;
753 tf->tf_vm86_gs = scp->sc_gs;
754 tf->tf_ds = _udatasel;
755 tf->tf_es = _udatasel;
756 tf->tf_fs = _udatasel;
759 * Don't allow users to change privileged or reserved flags.
762 * XXX do allow users to change the privileged flag PSL_RF.
763 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
764 * should sometimes set it there too. tf_eflags is kept in
765 * the signal context during signal handling and there is no
766 * other place to remember it, so the PSL_RF bit may be
767 * corrupted by the signal handler without us knowing.
768 * Corruption of the PSL_RF bit at worst causes one more or
769 * one less debugger trap, so allowing it is fairly harmless.
771 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
776 * Don't allow users to load a valid privileged %cs. Let the
777 * hardware check for invalid selectors, excess privilege in
778 * other selectors, invalid %eip's and invalid %esp's.
780 if (!CS_SECURE(scp->sc_cs)) {
781 trapsignal(p, SIGBUS, T_PROTFLT);
784 regs->tf_ds = scp->sc_ds;
785 regs->tf_es = scp->sc_es;
786 regs->tf_fs = scp->sc_fs;
789 /* restore scratch registers */
790 regs->tf_eax = scp->sc_eax;
791 regs->tf_ebx = scp->sc_ebx;
792 regs->tf_ecx = scp->sc_ecx;
793 regs->tf_edx = scp->sc_edx;
794 regs->tf_esi = scp->sc_esi;
795 regs->tf_edi = scp->sc_edi;
796 regs->tf_cs = scp->sc_cs;
797 regs->tf_ss = scp->sc_ss;
798 regs->tf_isp = scp->sc_isp;
800 if (scp->sc_onstack & 01)
801 p->p_sigstk.ss_flags |= SS_ONSTACK;
803 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
805 SIGSETOLD(p->p_sigmask, scp->sc_mask);
806 SIG_CANTMASK(p->p_sigmask);
807 regs->tf_ebp = scp->sc_fp;
808 regs->tf_esp = scp->sc_sp;
809 regs->tf_eip = scp->sc_pc;
810 regs->tf_eflags = eflags;
815 * sigreturn(ucontext_t *sigcntxp)
818 sigreturn(struct sigreturn_args *uap)
820 struct proc *p = curproc;
821 struct trapframe *regs;
827 if (!useracc((caddr_t)ucp, sizeof(struct osigcontext), VM_PROT_READ))
829 if (((struct osigcontext *)ucp)->sc_trapno == 0x01d516)
830 return (osigreturn((struct osigreturn_args *)uap));
833 * Since ucp is not an osigcontext but a ucontext_t, we have to
834 * check again if all of it is accessible. A ucontext_t is
835 * much larger, so instead of just checking for the pointer
836 * being valid for the size of an osigcontext, now check for
837 * it being valid for a whole, new-style ucontext_t.
839 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
842 regs = p->p_md.md_regs;
843 eflags = ucp->uc_mcontext.mc_eflags;
845 if (eflags & PSL_VM) {
846 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
847 struct vm86_kernel *vm86;
850 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
851 * set up the vm86 area, and we can't enter vm86 mode.
853 if (p->p_thread->td_pcb->pcb_ext == 0)
855 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
856 if (vm86->vm86_inited == 0)
859 /* go back to user mode if both flags are set */
860 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
861 trapsignal(p, SIGBUS, 0);
863 if (vm86->vm86_has_vme) {
864 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
865 (eflags & VME_USERCHANGE) | PSL_VM;
867 vm86->vm86_eflags = eflags; /* save VIF, VIP */
868 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
870 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
871 tf->tf_eflags = eflags;
872 tf->tf_vm86_ds = tf->tf_ds;
873 tf->tf_vm86_es = tf->tf_es;
874 tf->tf_vm86_fs = tf->tf_fs;
875 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
876 tf->tf_ds = _udatasel;
877 tf->tf_es = _udatasel;
878 tf->tf_fs = _udatasel;
881 * Don't allow users to change privileged or reserved flags.
884 * XXX do allow users to change the privileged flag PSL_RF.
885 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
886 * should sometimes set it there too. tf_eflags is kept in
887 * the signal context during signal handling and there is no
888 * other place to remember it, so the PSL_RF bit may be
889 * corrupted by the signal handler without us knowing.
890 * Corruption of the PSL_RF bit at worst causes one more or
891 * one less debugger trap, so allowing it is fairly harmless.
893 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
894 printf("sigreturn: eflags = 0x%x\n", eflags);
899 * Don't allow users to load a valid privileged %cs. Let the
900 * hardware check for invalid selectors, excess privilege in
901 * other selectors, invalid %eip's and invalid %esp's.
903 cs = ucp->uc_mcontext.mc_cs;
904 if (!CS_SECURE(cs)) {
905 printf("sigreturn: cs = 0x%x\n", cs);
906 trapsignal(p, SIGBUS, T_PROTFLT);
909 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
912 if (ucp->uc_mcontext.mc_onstack & 1)
913 p->p_sigstk.ss_flags |= SS_ONSTACK;
915 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
917 p->p_sigmask = ucp->uc_sigmask;
918 SIG_CANTMASK(p->p_sigmask);
923 * Machine dependent boot() routine
925 * I haven't seen anything to put here yet
926 * Possibly some stuff might be grafted back here from boot()
934 * Shutdown the CPU as much as possible
944 * cpu_idle() represents the idle LWKT. You cannot return from this function
945 * (unless you want to blow things up!). Instead we look for runnable threads
946 * and loop or halt as appropriate. Giant is not held on entry to the thread.
948 * The main loop is entered with a critical section held, we must release
949 * the critical section before doing anything else. lwkt_switch() will
950 * check for pending interrupts due to entering and exiting its own
953 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
954 * to wake a HLTed cpu up. However, there are cases where the idlethread
955 * will be entered with the possibility that no IPI will occur and in such
956 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
958 static int cpu_idle_hlt = 1;
959 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
960 &cpu_idle_hlt, 0, "Idle loop HLT enable");
965 struct thread *td = curthread;
968 KKASSERT(td->td_pri < TDPRI_CRIT);
971 * See if there are any LWKTs ready to go.
976 * If we are going to halt call splz unconditionally after
977 * CLIing to catch any interrupt races. Note that we are
978 * at SPL0 and interrupts are enabled.
980 if (cpu_idle_hlt && !lwkt_runnable() &&
981 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
983 * We must guarentee that hlt is exactly the instruction
986 __asm __volatile("cli");
988 __asm __volatile("sti; hlt");
990 td->td_flags &= ~TDF_IDLE_NOHLT;
991 __asm __volatile("sti");
997 * Clear registers on exec
1000 setregs(p, entry, stack, ps_strings)
1006 struct trapframe *regs = p->p_md.md_regs;
1007 struct pcb *pcb = p->p_thread->td_pcb;
1009 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1010 pcb->pcb_gs = _udatasel;
1014 /* was i386_user_cleanup() in NetBSD */
1018 bzero((char *)regs, sizeof(struct trapframe));
1019 regs->tf_eip = entry;
1020 regs->tf_esp = stack;
1021 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1022 regs->tf_ss = _udatasel;
1023 regs->tf_ds = _udatasel;
1024 regs->tf_es = _udatasel;
1025 regs->tf_fs = _udatasel;
1026 regs->tf_cs = _ucodesel;
1028 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1029 regs->tf_ebx = ps_strings;
1032 * Reset the hardware debug registers if they were in use.
1033 * They won't have any meaning for the newly exec'd process.
1035 if (pcb->pcb_flags & PCB_DBREGS) {
1042 if (pcb == curthread->td_pcb) {
1044 * Clear the debug registers on the running
1045 * CPU, otherwise they will end up affecting
1046 * the next process we switch to.
1050 pcb->pcb_flags &= ~PCB_DBREGS;
1054 * Initialize the math emulator (if any) for the current process.
1055 * Actually, just clear the bit that says that the emulator has
1056 * been initialized. Initialization is delayed until the process
1057 * traps to the emulator (if it is done at all) mainly because
1058 * emulators don't provide an entry point for initialization.
1060 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
1063 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1064 * for why fwait must be trapped at least if there is an npx or an
1065 * emulator). This is mainly to handle the case where npx0 is not
1066 * configured, since the npx routines normally set up the trap
1067 * otherwise. It should be done only at boot time, but doing it
1068 * here allows modifying `npx_exists' for testing the emulator on
1069 * systems with an npx.
1071 load_cr0(rcr0() | CR0_MP | CR0_TS);
1074 /* Initialize the npx (if any) for the current process. */
1075 npxinit(__INITIAL_NPXCW__);
1079 * XXX - Linux emulator
1080 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1092 cr0 |= CR0_NE; /* Done by npxinit() */
1093 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1095 if (cpu_class != CPUCLASS_386)
1097 cr0 |= CR0_WP | CR0_AM;
1103 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1106 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1108 if (!error && req->newptr)
1113 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1114 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1116 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1117 CTLFLAG_RW, &disable_rtc_set, 0, "");
1119 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1120 CTLFLAG_RD, &bootinfo, bootinfo, "");
1122 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1123 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1125 extern u_long bootdev; /* not a dev_t - encoding is different */
1126 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1127 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1130 * Initialize 386 and configure to run kernel
1134 * Initialize segments & interrupt table
1138 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1139 static struct gate_descriptor idt0[NIDT];
1140 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1141 union descriptor ldt[NLDT]; /* local descriptor table */
1143 /* table descriptors - used to load tables by cpu */
1144 struct region_descriptor r_gdt, r_idt;
1146 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1147 extern int has_f00f_bug;
1150 static struct i386tss dblfault_tss;
1151 static char dblfault_stack[PAGE_SIZE];
1153 extern struct user *proc0paddr;
1156 /* software prototypes -- in more palatable form */
1157 struct soft_segment_descriptor gdt_segs[] = {
1158 /* GNULL_SEL 0 Null Descriptor */
1159 { 0x0, /* segment base address */
1161 0, /* segment type */
1162 0, /* segment descriptor priority level */
1163 0, /* segment descriptor present */
1165 0, /* default 32 vs 16 bit size */
1166 0 /* limit granularity (byte/page units)*/ },
1167 /* GCODE_SEL 1 Code Descriptor for kernel */
1168 { 0x0, /* segment base address */
1169 0xfffff, /* length - all address space */
1170 SDT_MEMERA, /* segment type */
1171 0, /* segment descriptor priority level */
1172 1, /* segment descriptor present */
1174 1, /* default 32 vs 16 bit size */
1175 1 /* limit granularity (byte/page units)*/ },
1176 /* GDATA_SEL 2 Data Descriptor for kernel */
1177 { 0x0, /* segment base address */
1178 0xfffff, /* length - all address space */
1179 SDT_MEMRWA, /* segment type */
1180 0, /* segment descriptor priority level */
1181 1, /* segment descriptor present */
1183 1, /* default 32 vs 16 bit size */
1184 1 /* limit granularity (byte/page units)*/ },
1185 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1186 { 0x0, /* segment base address */
1187 0xfffff, /* length - all address space */
1188 SDT_MEMRWA, /* segment type */
1189 0, /* segment descriptor priority level */
1190 1, /* segment descriptor present */
1192 1, /* default 32 vs 16 bit size */
1193 1 /* limit granularity (byte/page units)*/ },
1194 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1196 0x0, /* segment base address */
1197 sizeof(struct i386tss)-1,/* length - all address space */
1198 SDT_SYS386TSS, /* segment type */
1199 0, /* segment descriptor priority level */
1200 1, /* segment descriptor present */
1202 0, /* unused - default 32 vs 16 bit size */
1203 0 /* limit granularity (byte/page units)*/ },
1204 /* GLDT_SEL 5 LDT Descriptor */
1205 { (int) ldt, /* segment base address */
1206 sizeof(ldt)-1, /* length - all address space */
1207 SDT_SYSLDT, /* segment type */
1208 SEL_UPL, /* segment descriptor priority level */
1209 1, /* segment descriptor present */
1211 0, /* unused - default 32 vs 16 bit size */
1212 0 /* limit granularity (byte/page units)*/ },
1213 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1214 { (int) ldt, /* segment base address */
1215 (512 * sizeof(union descriptor)-1), /* length */
1216 SDT_SYSLDT, /* segment type */
1217 0, /* segment descriptor priority level */
1218 1, /* segment descriptor present */
1220 0, /* unused - default 32 vs 16 bit size */
1221 0 /* limit granularity (byte/page units)*/ },
1222 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1223 { 0x0, /* segment base address */
1224 0x0, /* length - all address space */
1225 0, /* segment type */
1226 0, /* segment descriptor priority level */
1227 0, /* segment descriptor present */
1229 0, /* default 32 vs 16 bit size */
1230 0 /* limit granularity (byte/page units)*/ },
1231 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1232 { 0x400, /* segment base address */
1233 0xfffff, /* length */
1234 SDT_MEMRWA, /* segment type */
1235 0, /* segment descriptor priority level */
1236 1, /* segment descriptor present */
1238 1, /* default 32 vs 16 bit size */
1239 1 /* limit granularity (byte/page units)*/ },
1240 /* GPANIC_SEL 9 Panic Tss Descriptor */
1241 { (int) &dblfault_tss, /* segment base address */
1242 sizeof(struct i386tss)-1,/* length - all address space */
1243 SDT_SYS386TSS, /* segment type */
1244 0, /* segment descriptor priority level */
1245 1, /* segment descriptor present */
1247 0, /* unused - default 32 vs 16 bit size */
1248 0 /* limit granularity (byte/page units)*/ },
1249 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1250 { 0, /* segment base address (overwritten) */
1251 0xfffff, /* length */
1252 SDT_MEMERA, /* segment type */
1253 0, /* segment descriptor priority level */
1254 1, /* segment descriptor present */
1256 0, /* default 32 vs 16 bit size */
1257 1 /* limit granularity (byte/page units)*/ },
1258 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1259 { 0, /* segment base address (overwritten) */
1260 0xfffff, /* length */
1261 SDT_MEMERA, /* segment type */
1262 0, /* segment descriptor priority level */
1263 1, /* segment descriptor present */
1265 0, /* default 32 vs 16 bit size */
1266 1 /* limit granularity (byte/page units)*/ },
1267 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1268 { 0, /* segment base address (overwritten) */
1269 0xfffff, /* length */
1270 SDT_MEMRWA, /* segment type */
1271 0, /* segment descriptor priority level */
1272 1, /* segment descriptor present */
1274 1, /* default 32 vs 16 bit size */
1275 1 /* limit granularity (byte/page units)*/ },
1276 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1277 { 0, /* segment base address (overwritten) */
1278 0xfffff, /* length */
1279 SDT_MEMRWA, /* segment type */
1280 0, /* segment descriptor priority level */
1281 1, /* segment descriptor present */
1283 0, /* default 32 vs 16 bit size */
1284 1 /* limit granularity (byte/page units)*/ },
1285 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1286 { 0, /* segment base address (overwritten) */
1287 0xfffff, /* length */
1288 SDT_MEMRWA, /* segment type */
1289 0, /* segment descriptor priority level */
1290 1, /* segment descriptor present */
1292 0, /* default 32 vs 16 bit size */
1293 1 /* limit granularity (byte/page units)*/ },
1296 static struct soft_segment_descriptor ldt_segs[] = {
1297 /* Null Descriptor - overwritten by call gate */
1298 { 0x0, /* segment base address */
1299 0x0, /* length - all address space */
1300 0, /* segment type */
1301 0, /* segment descriptor priority level */
1302 0, /* segment descriptor present */
1304 0, /* default 32 vs 16 bit size */
1305 0 /* limit granularity (byte/page units)*/ },
1306 /* Null Descriptor - overwritten by call gate */
1307 { 0x0, /* segment base address */
1308 0x0, /* length - all address space */
1309 0, /* segment type */
1310 0, /* segment descriptor priority level */
1311 0, /* segment descriptor present */
1313 0, /* default 32 vs 16 bit size */
1314 0 /* limit granularity (byte/page units)*/ },
1315 /* Null Descriptor - overwritten by call gate */
1316 { 0x0, /* segment base address */
1317 0x0, /* length - all address space */
1318 0, /* segment type */
1319 0, /* segment descriptor priority level */
1320 0, /* segment descriptor present */
1322 0, /* default 32 vs 16 bit size */
1323 0 /* limit granularity (byte/page units)*/ },
1324 /* Code Descriptor for user */
1325 { 0x0, /* segment base address */
1326 0xfffff, /* length - all address space */
1327 SDT_MEMERA, /* segment type */
1328 SEL_UPL, /* segment descriptor priority level */
1329 1, /* segment descriptor present */
1331 1, /* default 32 vs 16 bit size */
1332 1 /* limit granularity (byte/page units)*/ },
1333 /* Null Descriptor - overwritten by call gate */
1334 { 0x0, /* segment base address */
1335 0x0, /* length - all address space */
1336 0, /* segment type */
1337 0, /* segment descriptor priority level */
1338 0, /* segment descriptor present */
1340 0, /* default 32 vs 16 bit size */
1341 0 /* limit granularity (byte/page units)*/ },
1342 /* Data Descriptor for user */
1343 { 0x0, /* segment base address */
1344 0xfffff, /* length - all address space */
1345 SDT_MEMRWA, /* segment type */
1346 SEL_UPL, /* segment descriptor priority level */
1347 1, /* segment descriptor present */
1349 1, /* default 32 vs 16 bit size */
1350 1 /* limit granularity (byte/page units)*/ },
1354 setidt(idx, func, typ, dpl, selec)
1361 struct gate_descriptor *ip;
1364 ip->gd_looffset = (int)func;
1365 ip->gd_selector = selec;
1371 ip->gd_hioffset = ((int)func)>>16 ;
1374 #define IDTVEC(name) __CONCAT(X,name)
1377 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1378 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1379 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1380 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1381 IDTVEC(xmm), IDTVEC(syscall);
1383 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
1387 struct segment_descriptor *sd;
1388 struct soft_segment_descriptor *ssd;
1390 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1391 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1392 ssd->ssd_type = sd->sd_type;
1393 ssd->ssd_dpl = sd->sd_dpl;
1394 ssd->ssd_p = sd->sd_p;
1395 ssd->ssd_def32 = sd->sd_def32;
1396 ssd->ssd_gran = sd->sd_gran;
1399 #define PHYSMAP_SIZE (2 * 8)
1402 * Populate the (physmap) array with base/bound pairs describing the
1403 * available physical memory in the system, then test this memory and
1404 * build the phys_avail array describing the actually-available memory.
1406 * If we cannot accurately determine the physical memory map, then use
1407 * value from the 0xE801 call, and failing that, the RTC.
1409 * Total memory size may be set by the kernel environment variable
1410 * hw.physmem or the compile-time define MAXMEM.
1413 getmemsize(int first)
1415 int i, physmap_idx, pa_indx;
1417 u_int basemem, extmem;
1418 struct vm86frame vmf;
1419 struct vm86context vmc;
1420 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1430 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1431 bzero(&vmf, sizeof(struct vm86frame));
1432 bzero(physmap, sizeof(physmap));
1436 * Some newer BIOSes has broken INT 12H implementation which cause
1437 * kernel panic immediately. In this case, we need to scan SMAP
1438 * with INT 15:E820 first, then determine base memory size.
1440 if (hasbrokenint12) {
1445 * Perform "base memory" related probes & setup
1447 vm86_intcall(0x12, &vmf);
1448 basemem = vmf.vmf_ax;
1449 if (basemem > 640) {
1450 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1456 * XXX if biosbasemem is now < 640, there is a `hole'
1457 * between the end of base memory and the start of
1458 * ISA memory. The hole may be empty or it may
1459 * contain BIOS code or data. Map it read/write so
1460 * that the BIOS can write to it. (Memory from 0 to
1461 * the physical end of the kernel is mapped read-only
1462 * to begin with and then parts of it are remapped.
1463 * The parts that aren't remapped form holes that
1464 * remain read-only and are unused by the kernel.
1465 * The base memory area is below the physical end of
1466 * the kernel and right now forms a read-only hole.
1467 * The part of it from PAGE_SIZE to
1468 * (trunc_page(biosbasemem * 1024) - 1) will be
1469 * remapped and used by the kernel later.)
1471 * This code is similar to the code used in
1472 * pmap_mapdev, but since no memory needs to be
1473 * allocated we simply change the mapping.
1475 for (pa = trunc_page(basemem * 1024);
1476 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1477 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1478 *pte = pa | PG_RW | PG_V;
1482 * if basemem != 640, map pages r/w into vm86 page table so
1483 * that the bios can scribble on it.
1485 pte = (pt_entry_t)vm86paddr;
1486 for (i = basemem / 4; i < 160; i++)
1487 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1491 * map page 1 R/W into the kernel page table so we can use it
1492 * as a buffer. The kernel will unmap this page later.
1494 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1495 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1498 * get memory map with INT 15:E820
1500 #define SMAPSIZ sizeof(*smap)
1501 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1504 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1505 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1510 vmf.vmf_eax = 0xE820;
1511 vmf.vmf_edx = SMAP_SIG;
1512 vmf.vmf_ecx = SMAPSIZ;
1513 i = vm86_datacall(0x15, &vmf, &vmc);
1514 if (i || vmf.vmf_eax != SMAP_SIG)
1516 if (boothowto & RB_VERBOSE)
1517 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1519 *(u_int32_t *)((char *)&smap->base + 4),
1520 (u_int32_t)smap->base,
1521 *(u_int32_t *)((char *)&smap->length + 4),
1522 (u_int32_t)smap->length);
1524 if (smap->type != 0x01)
1527 if (smap->length == 0)
1530 if (smap->base >= 0xffffffff) {
1531 printf("%uK of memory above 4GB ignored\n",
1532 (u_int)(smap->length / 1024));
1536 for (i = 0; i <= physmap_idx; i += 2) {
1537 if (smap->base < physmap[i + 1]) {
1538 if (boothowto & RB_VERBOSE)
1540 "Overlapping or non-montonic memory region, ignoring second region\n");
1545 if (smap->base == physmap[physmap_idx + 1]) {
1546 physmap[physmap_idx + 1] += smap->length;
1551 if (physmap_idx == PHYSMAP_SIZE) {
1553 "Too many segments in the physical address map, giving up\n");
1556 physmap[physmap_idx] = smap->base;
1557 physmap[physmap_idx + 1] = smap->base + smap->length;
1559 } while (vmf.vmf_ebx != 0);
1562 * Perform "base memory" related probes & setup based on SMAP
1565 for (i = 0; i <= physmap_idx; i += 2) {
1566 if (physmap[i] == 0x00000000) {
1567 basemem = physmap[i + 1] / 1024;
1576 if (basemem > 640) {
1577 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1582 for (pa = trunc_page(basemem * 1024);
1583 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1584 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1585 *pte = pa | PG_RW | PG_V;
1588 pte = (pt_entry_t)vm86paddr;
1589 for (i = basemem / 4; i < 160; i++)
1590 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1593 if (physmap[1] != 0)
1597 * If we failed above, try memory map with INT 15:E801
1599 vmf.vmf_ax = 0xE801;
1600 if (vm86_intcall(0x15, &vmf) == 0) {
1601 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1605 vm86_intcall(0x15, &vmf);
1606 extmem = vmf.vmf_ax;
1609 * Prefer the RTC value for extended memory.
1611 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1616 * Special hack for chipsets that still remap the 384k hole when
1617 * there's 16MB of memory - this really confuses people that
1618 * are trying to use bus mastering ISA controllers with the
1619 * "16MB limit"; they only have 16MB, but the remapping puts
1620 * them beyond the limit.
1622 * If extended memory is between 15-16MB (16-17MB phys address range),
1625 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1629 physmap[1] = basemem * 1024;
1631 physmap[physmap_idx] = 0x100000;
1632 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1636 * Now, physmap contains a map of physical memory.
1640 /* make hole for AP bootstrap code YYY */
1641 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1643 /* look for the MP hardware - needed for apic addresses */
1648 * Maxmem isn't the "maximum memory", it's one larger than the
1649 * highest page of the physical address space. It should be
1650 * called something like "Maxphyspage". We may adjust this
1651 * based on ``hw.physmem'' and the results of the memory test.
1653 Maxmem = atop(physmap[physmap_idx + 1]);
1656 Maxmem = MAXMEM / 4;
1660 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes
1661 * for the appropriate modifiers. This overrides MAXMEM.
1663 if ((cp = getenv("hw.physmem")) != NULL) {
1664 u_int64_t AllowMem, sanity;
1667 sanity = AllowMem = strtouq(cp, &ep, 0);
1668 if ((ep != cp) && (*ep != 0)) {
1681 AllowMem = sanity = 0;
1683 if (AllowMem < sanity)
1687 printf("Ignoring invalid memory size of '%s'\n", cp);
1689 Maxmem = atop(AllowMem);
1692 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1693 (boothowto & RB_VERBOSE))
1694 printf("Physical memory use set to %uK\n", Maxmem * 4);
1697 * If Maxmem has been increased beyond what the system has detected,
1698 * extend the last memory segment to the new limit.
1700 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1701 physmap[physmap_idx + 1] = ptoa(Maxmem);
1703 /* call pmap initialization to make new kernel address space */
1704 pmap_bootstrap(first, 0);
1707 * Size up each available chunk of physical memory.
1709 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1711 phys_avail[pa_indx++] = physmap[0];
1712 phys_avail[pa_indx] = physmap[0];
1714 pte = (pt_entry_t)vtopte(KERNBASE);
1716 pte = (pt_entry_t)CMAP1;
1720 * physmap is in bytes, so when converting to page boundaries,
1721 * round up the start address and round down the end address.
1723 for (i = 0; i <= physmap_idx; i += 2) {
1727 if (physmap[i + 1] < end)
1728 end = trunc_page(physmap[i + 1]);
1729 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1734 int *ptr = (int *)CADDR1;
1738 * block out kernel memory as not available.
1740 if (pa >= 0x100000 && pa < first)
1746 * map page into kernel: valid, read/write,non-cacheable
1748 *pte = pa | PG_V | PG_RW | PG_N;
1753 * Test for alternating 1's and 0's
1755 *(volatile int *)ptr = 0xaaaaaaaa;
1756 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1760 * Test for alternating 0's and 1's
1762 *(volatile int *)ptr = 0x55555555;
1763 if (*(volatile int *)ptr != 0x55555555) {
1769 *(volatile int *)ptr = 0xffffffff;
1770 if (*(volatile int *)ptr != 0xffffffff) {
1776 *(volatile int *)ptr = 0x0;
1777 if (*(volatile int *)ptr != 0x0) {
1781 * Restore original value.
1786 * Adjust array of valid/good pages.
1788 if (page_bad == TRUE) {
1792 * If this good page is a continuation of the
1793 * previous set of good pages, then just increase
1794 * the end pointer. Otherwise start a new chunk.
1795 * Note that "end" points one higher than end,
1796 * making the range >= start and < end.
1797 * If we're also doing a speculative memory
1798 * test and we at or past the end, bump up Maxmem
1799 * so that we keep going. The first bad page
1800 * will terminate the loop.
1802 if (phys_avail[pa_indx] == pa) {
1803 phys_avail[pa_indx] += PAGE_SIZE;
1806 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1807 printf("Too many holes in the physical address space, giving up\n");
1811 phys_avail[pa_indx++] = pa; /* start */
1812 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1822 * The last chunk must contain at least one page plus the message
1823 * buffer to avoid complicating other code (message buffer address
1824 * calculation, etc.).
1826 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1827 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1828 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1829 phys_avail[pa_indx--] = 0;
1830 phys_avail[pa_indx--] = 0;
1833 Maxmem = atop(phys_avail[pa_indx]);
1835 /* Trim off space for the message buffer. */
1836 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1838 avail_end = phys_avail[pa_indx];
1844 struct gate_descriptor *gdp;
1845 int gsel_tss, metadata_missing, off, x;
1846 struct mdglobaldata *gd;
1849 * Prevent lowering of the ipl if we call tsleep() early.
1851 gd = &CPU_prvspace[0].mdglobaldata;
1852 bzero(gd, sizeof(*gd));
1854 gd->mi.gd_curthread = &thread0;
1856 atdevbase = ISA_HOLE_START + KERNBASE;
1858 metadata_missing = 0;
1859 if (bootinfo.bi_modulep) {
1860 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1861 preload_bootstrap_relocate(KERNBASE);
1863 metadata_missing = 1;
1865 if (bootinfo.bi_envp)
1866 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1868 /* start with one cpu */
1870 /* Init basic tunables, hz etc */
1874 * make gdt memory segments, the code segment goes up to end of the
1875 * page with etext in it, the data segment goes to the end of
1879 * XXX text protection is temporarily (?) disabled. The limit was
1880 * i386_btop(round_page(etext)) - 1.
1882 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1883 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1885 gdt_segs[GPRIV_SEL].ssd_limit =
1886 atop(sizeof(struct privatespace) - 1);
1887 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1888 gdt_segs[GPROC0_SEL].ssd_base =
1889 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1891 gd->mi.gd_prvspace = &CPU_prvspace[0];
1894 * Note: on both UP and SMP curthread must be set non-NULL
1895 * early in the boot sequence because the system assumes
1896 * that 'curthread' is never NULL.
1899 for (x = 0; x < NGDT; x++) {
1901 /* avoid overwriting db entries with APM ones */
1902 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1905 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1908 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1909 r_gdt.rd_base = (int) gdt;
1912 mi_gdinit(&gd->mi, 0);
1914 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1915 lwkt_set_comm(&thread0, "thread0");
1916 proc0.p_addr = (void *)thread0.td_kstack;
1917 proc0.p_thread = &thread0;
1918 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
1919 thread0.td_flags |= TDF_RUNNING;
1920 thread0.td_proc = &proc0;
1921 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1922 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1924 /* make ldt memory segments */
1926 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1927 * should be spelled ...MAX_USER...
1929 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1930 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1931 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1932 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1934 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1937 gd->gd_currentldt = _default_ldt;
1939 /* spinlocks and the BGL */
1943 for (x = 0; x < NIDT; x++)
1944 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1945 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1946 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1947 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1948 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1949 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1950 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1951 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1952 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1953 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1954 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1955 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1958 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1959 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1960 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1961 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1962 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1963 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1964 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1965 setidt(0x80, &IDTVEC(int0x80_syscall),
1966 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1967 setidt(0x81, &IDTVEC(int0x81_syscall),
1968 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1970 r_idt.rd_limit = sizeof(idt0) - 1;
1971 r_idt.rd_base = (int) idt;
1975 * Initialize the console before we print anything out.
1979 if (metadata_missing)
1980 printf("WARNING: loader(8) metadata is missing!\n");
1990 if (boothowto & RB_KDB)
1991 Debugger("Boot flags requested debugger");
1994 finishidentcpu(); /* Final stage of CPU initialization */
1995 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1996 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1997 initializecpu(); /* Initialize CPU registers */
2000 * make an initial tss so cpu can get interrupt stack on syscall!
2001 * The 16 bytes is to save room for a VM86 context.
2003 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2004 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2005 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2006 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2007 gd->gd_common_tssd = *gd->gd_tss_gdt;
2008 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2011 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2012 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2013 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2014 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2015 dblfault_tss.tss_cr3 = (int)IdlePTD;
2016 dblfault_tss.tss_eip = (int) dblfault_handler;
2017 dblfault_tss.tss_eflags = PSL_KERNEL;
2018 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2019 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2020 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2021 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2022 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2026 init_param2(physmem);
2028 /* now running on new page tables, configured,and u/iom is accessible */
2030 /* Map the message buffer. */
2031 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2032 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2034 msgbufinit(msgbufp, MSGBUF_SIZE);
2036 /* make a call gate to reenter kernel with */
2037 gdp = &ldt[LSYS5CALLS_SEL].gd;
2039 x = (int) &IDTVEC(syscall);
2040 gdp->gd_looffset = x++;
2041 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2043 gdp->gd_type = SDT_SYS386CGT;
2044 gdp->gd_dpl = SEL_UPL;
2046 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2048 /* XXX does this work? */
2049 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2050 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2052 /* transfer to user mode */
2054 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2055 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2057 /* setup proc 0's pcb */
2058 thread0.td_pcb->pcb_flags = 0;
2059 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2060 thread0.td_pcb->pcb_ext = 0;
2061 proc0.p_md.md_regs = &proc0_tf;
2065 * Initialize machine-dependant portions of the global data structure.
2066 * Note that the global data area and cpu0's idlestack in the private
2067 * data space were allocated in locore.
2069 * Note: the idlethread's cpl is 0
2071 * WARNING! Called from early boot, 'mycpu' may not work yet.
2074 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2079 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2081 sp = gd->mi.gd_prvspace->idlestack;
2082 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2083 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2084 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2085 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2086 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2090 globaldata_find(int cpu)
2092 KKASSERT(cpu >= 0 && cpu < ncpus);
2093 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2096 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2097 static void f00f_hack(void *unused);
2098 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2101 f00f_hack(void *unused)
2103 struct gate_descriptor *new_idt;
2109 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2111 r_idt.rd_limit = sizeof(idt0) - 1;
2113 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2115 panic("kmem_alloc returned 0");
2116 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2117 panic("kmem_alloc returned non-page-aligned memory");
2118 /* Put the first seven entries in the lower page */
2119 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2120 bcopy(idt, new_idt, sizeof(idt0));
2121 r_idt.rd_base = (int)new_idt;
2124 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2125 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2126 panic("vm_map_protect failed");
2129 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2132 ptrace_set_pc(p, addr)
2136 p->p_md.md_regs->tf_eip = addr;
2141 ptrace_single_step(p)
2144 p->p_md.md_regs->tf_eflags |= PSL_T;
2148 int ptrace_read_u_check(p, addr, len)
2155 if ((vm_offset_t) (addr + len) < addr)
2157 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2160 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2162 if ((vm_offset_t) addr < gap)
2164 if ((vm_offset_t) (addr + len) <=
2165 (vm_offset_t) (gap + sizeof(struct trapframe)))
2170 int ptrace_write_u(p, off, data)
2175 struct trapframe frame_copy;
2177 struct trapframe *tp;
2180 * Privileged kernel state is scattered all over the user area.
2181 * Only allow write access to parts of regs and to fpregs.
2183 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2184 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2185 tp = p->p_md.md_regs;
2187 *(int *)((char *)&frame_copy + (off - min)) = data;
2188 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2189 !CS_SECURE(frame_copy.tf_cs))
2191 *(int*)((char *)p->p_addr + off) = data;
2196 * The PCB is at the end of the user area YYY
2198 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2199 min += offsetof(struct pcb, pcb_save);
2200 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2201 *(int*)((char *)p->p_addr + off) = data;
2213 struct trapframe *tp;
2215 tp = p->p_md.md_regs;
2216 regs->r_fs = tp->tf_fs;
2217 regs->r_es = tp->tf_es;
2218 regs->r_ds = tp->tf_ds;
2219 regs->r_edi = tp->tf_edi;
2220 regs->r_esi = tp->tf_esi;
2221 regs->r_ebp = tp->tf_ebp;
2222 regs->r_ebx = tp->tf_ebx;
2223 regs->r_edx = tp->tf_edx;
2224 regs->r_ecx = tp->tf_ecx;
2225 regs->r_eax = tp->tf_eax;
2226 regs->r_eip = tp->tf_eip;
2227 regs->r_cs = tp->tf_cs;
2228 regs->r_eflags = tp->tf_eflags;
2229 regs->r_esp = tp->tf_esp;
2230 regs->r_ss = tp->tf_ss;
2231 pcb = p->p_thread->td_pcb;
2232 regs->r_gs = pcb->pcb_gs;
2242 struct trapframe *tp;
2244 tp = p->p_md.md_regs;
2245 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2246 !CS_SECURE(regs->r_cs))
2248 tp->tf_fs = regs->r_fs;
2249 tp->tf_es = regs->r_es;
2250 tp->tf_ds = regs->r_ds;
2251 tp->tf_edi = regs->r_edi;
2252 tp->tf_esi = regs->r_esi;
2253 tp->tf_ebp = regs->r_ebp;
2254 tp->tf_ebx = regs->r_ebx;
2255 tp->tf_edx = regs->r_edx;
2256 tp->tf_ecx = regs->r_ecx;
2257 tp->tf_eax = regs->r_eax;
2258 tp->tf_eip = regs->r_eip;
2259 tp->tf_cs = regs->r_cs;
2260 tp->tf_eflags = regs->r_eflags;
2261 tp->tf_esp = regs->r_esp;
2262 tp->tf_ss = regs->r_ss;
2263 pcb = p->p_thread->td_pcb;
2264 pcb->pcb_gs = regs->r_gs;
2268 #ifdef CPU_ENABLE_SSE
2270 fill_fpregs_xmm(sv_xmm, sv_87)
2271 struct savexmm *sv_xmm;
2272 struct save87 *sv_87;
2274 register struct env87 *penv_87 = &sv_87->sv_env;
2275 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2278 /* FPU control/status */
2279 penv_87->en_cw = penv_xmm->en_cw;
2280 penv_87->en_sw = penv_xmm->en_sw;
2281 penv_87->en_tw = penv_xmm->en_tw;
2282 penv_87->en_fip = penv_xmm->en_fip;
2283 penv_87->en_fcs = penv_xmm->en_fcs;
2284 penv_87->en_opcode = penv_xmm->en_opcode;
2285 penv_87->en_foo = penv_xmm->en_foo;
2286 penv_87->en_fos = penv_xmm->en_fos;
2289 for (i = 0; i < 8; ++i)
2290 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2292 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2296 set_fpregs_xmm(sv_87, sv_xmm)
2297 struct save87 *sv_87;
2298 struct savexmm *sv_xmm;
2300 register struct env87 *penv_87 = &sv_87->sv_env;
2301 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2304 /* FPU control/status */
2305 penv_xmm->en_cw = penv_87->en_cw;
2306 penv_xmm->en_sw = penv_87->en_sw;
2307 penv_xmm->en_tw = penv_87->en_tw;
2308 penv_xmm->en_fip = penv_87->en_fip;
2309 penv_xmm->en_fcs = penv_87->en_fcs;
2310 penv_xmm->en_opcode = penv_87->en_opcode;
2311 penv_xmm->en_foo = penv_87->en_foo;
2312 penv_xmm->en_fos = penv_87->en_fos;
2315 for (i = 0; i < 8; ++i)
2316 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2318 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2320 #endif /* CPU_ENABLE_SSE */
2323 fill_fpregs(p, fpregs)
2325 struct fpreg *fpregs;
2327 #ifdef CPU_ENABLE_SSE
2329 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
2330 (struct save87 *)fpregs);
2333 #endif /* CPU_ENABLE_SSE */
2334 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2339 set_fpregs(p, fpregs)
2341 struct fpreg *fpregs;
2343 #ifdef CPU_ENABLE_SSE
2345 set_fpregs_xmm((struct save87 *)fpregs,
2346 &p->p_thread->td_pcb->pcb_save.sv_xmm);
2349 #endif /* CPU_ENABLE_SSE */
2350 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2355 fill_dbregs(p, dbregs)
2357 struct dbreg *dbregs;
2362 dbregs->dr0 = rdr0();
2363 dbregs->dr1 = rdr1();
2364 dbregs->dr2 = rdr2();
2365 dbregs->dr3 = rdr3();
2366 dbregs->dr4 = rdr4();
2367 dbregs->dr5 = rdr5();
2368 dbregs->dr6 = rdr6();
2369 dbregs->dr7 = rdr7();
2372 pcb = p->p_thread->td_pcb;
2373 dbregs->dr0 = pcb->pcb_dr0;
2374 dbregs->dr1 = pcb->pcb_dr1;
2375 dbregs->dr2 = pcb->pcb_dr2;
2376 dbregs->dr3 = pcb->pcb_dr3;
2379 dbregs->dr6 = pcb->pcb_dr6;
2380 dbregs->dr7 = pcb->pcb_dr7;
2386 set_dbregs(p, dbregs)
2388 struct dbreg *dbregs;
2392 u_int32_t mask1, mask2;
2395 load_dr0(dbregs->dr0);
2396 load_dr1(dbregs->dr1);
2397 load_dr2(dbregs->dr2);
2398 load_dr3(dbregs->dr3);
2399 load_dr4(dbregs->dr4);
2400 load_dr5(dbregs->dr5);
2401 load_dr6(dbregs->dr6);
2402 load_dr7(dbregs->dr7);
2406 * Don't let an illegal value for dr7 get set. Specifically,
2407 * check for undefined settings. Setting these bit patterns
2408 * result in undefined behaviour and can lead to an unexpected
2411 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2412 i++, mask1 <<= 2, mask2 <<= 2)
2413 if ((dbregs->dr7 & mask1) == mask2)
2416 pcb = p->p_thread->td_pcb;
2419 * Don't let a process set a breakpoint that is not within the
2420 * process's address space. If a process could do this, it
2421 * could halt the system by setting a breakpoint in the kernel
2422 * (if ddb was enabled). Thus, we need to check to make sure
2423 * that no breakpoints are being enabled for addresses outside
2424 * process's address space, unless, perhaps, we were called by
2427 * XXX - what about when the watched area of the user's
2428 * address space is written into from within the kernel
2429 * ... wouldn't that still cause a breakpoint to be generated
2430 * from within kernel mode?
2433 if (suser_cred(p->p_ucred, 0) != 0) {
2434 if (dbregs->dr7 & 0x3) {
2435 /* dr0 is enabled */
2436 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2440 if (dbregs->dr7 & (0x3<<2)) {
2441 /* dr1 is enabled */
2442 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2446 if (dbregs->dr7 & (0x3<<4)) {
2447 /* dr2 is enabled */
2448 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2452 if (dbregs->dr7 & (0x3<<6)) {
2453 /* dr3 is enabled */
2454 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2459 pcb->pcb_dr0 = dbregs->dr0;
2460 pcb->pcb_dr1 = dbregs->dr1;
2461 pcb->pcb_dr2 = dbregs->dr2;
2462 pcb->pcb_dr3 = dbregs->dr3;
2463 pcb->pcb_dr6 = dbregs->dr6;
2464 pcb->pcb_dr7 = dbregs->dr7;
2466 pcb->pcb_flags |= PCB_DBREGS;
2473 * Return > 0 if a hardware breakpoint has been hit, and the
2474 * breakpoint was in user space. Return 0, otherwise.
2477 user_dbreg_trap(void)
2479 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2480 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2481 int nbp; /* number of breakpoints that triggered */
2482 caddr_t addr[4]; /* breakpoint addresses */
2486 if ((dr7 & 0x000000ff) == 0) {
2488 * all GE and LE bits in the dr7 register are zero,
2489 * thus the trap couldn't have been caused by the
2490 * hardware debug registers
2497 bp = dr6 & 0x0000000f;
2501 * None of the breakpoint bits are set meaning this
2502 * trap was not caused by any of the debug registers
2508 * at least one of the breakpoints were hit, check to see
2509 * which ones and if any of them are user space addresses
2513 addr[nbp++] = (caddr_t)rdr0();
2516 addr[nbp++] = (caddr_t)rdr1();
2519 addr[nbp++] = (caddr_t)rdr2();
2522 addr[nbp++] = (caddr_t)rdr3();
2525 for (i=0; i<nbp; i++) {
2527 (caddr_t)VM_MAXUSER_ADDRESS) {
2529 * addr[i] is in user space
2536 * None of the breakpoints are in user space.
2544 Debugger(const char *msg)
2546 printf("Debugger(\"%s\") called.\n", msg);
2550 #include <sys/disklabel.h>
2553 * Determine the size of the transfer, and make sure it is
2554 * within the boundaries of the partition. Adjust transfer
2555 * if needed, and signal errors or early completion.
2558 bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2560 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2561 int labelsect = lp->d_partitions[0].p_offset;
2562 int maxsz = p->p_size,
2563 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2565 /* overwriting disk label ? */
2566 /* XXX should also protect bootstrap in first 8K */
2567 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2568 #if LABELSECTOR != 0
2569 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2571 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2572 bp->b_error = EROFS;
2576 #if defined(DOSBBSECTOR) && defined(notyet)
2577 /* overwriting master boot record? */
2578 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2579 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2580 bp->b_error = EROFS;
2585 /* beyond partition? */
2586 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2587 /* if exactly at end of disk, return an EOF */
2588 if (bp->b_blkno == maxsz) {
2589 bp->b_resid = bp->b_bcount;
2592 /* or truncate if part of it fits */
2593 sz = maxsz - bp->b_blkno;
2595 bp->b_error = EINVAL;
2598 bp->b_bcount = sz << DEV_BSHIFT;
2601 bp->b_pblkno = bp->b_blkno + p->p_offset;
2605 bp->b_flags |= B_ERROR;
2612 * Provide inb() and outb() as functions. They are normally only
2613 * available as macros calling inlined functions, thus cannot be
2614 * called inside DDB.
2616 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2622 /* silence compiler warnings */
2624 void outb(u_int, u_char);
2631 * We use %%dx and not %1 here because i/o is done at %dx and not at
2632 * %edx, while gcc generates inferior code (movw instead of movl)
2633 * if we tell it to load (u_short) port.
2635 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2640 outb(u_int port, u_char data)
2644 * Use an unnecessary assignment to help gcc's register allocator.
2645 * This make a large difference for gcc-1.40 and a tiny difference
2646 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2647 * best results. gcc-2.6.0 can't handle this.
2650 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2657 #include "opt_cpu.h"
2658 #include "opt_htt.h"
2659 #include "opt_user_ldt.h"
2663 * initialize all the SMP locks
2666 /* critical region around IO APIC, apic_imen */
2667 struct spinlock imen_spinlock;
2669 /* Make FAST_INTR() routines sequential */
2670 struct spinlock fast_intr_spinlock;
2672 /* critical region for old style disable_intr/enable_intr */
2673 struct spinlock mpintr_spinlock;
2675 /* critical region around INTR() routines */
2676 struct spinlock intr_spinlock;
2678 /* lock region used by kernel profiling */
2679 struct spinlock mcount_spinlock;
2681 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2682 struct spinlock com_spinlock;
2684 /* locks kernel printfs */
2685 struct spinlock cons_spinlock;
2687 /* lock regions around the clock hardware */
2688 struct spinlock clock_spinlock;
2690 /* lock around the MP rendezvous */
2691 struct spinlock smp_rv_spinlock;
2697 * mp_lock = 0; BSP already owns the MP lock
2700 * Get the initial mp_lock with a count of 1 for the BSP.
2701 * This uses a LOGICAL cpu ID, ie BSP == 0.
2704 cpu_get_initial_mplock();
2706 spin_lock_init(&mcount_spinlock);
2707 spin_lock_init(&fast_intr_spinlock);
2708 spin_lock_init(&intr_spinlock);
2709 spin_lock_init(&mpintr_spinlock);
2710 spin_lock_init(&imen_spinlock);
2711 spin_lock_init(&smp_rv_spinlock);
2712 spin_lock_init(&com_spinlock);
2713 spin_lock_init(&clock_spinlock);
2714 spin_lock_init(&cons_spinlock);