2 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
19 * This code is derived from software contributed to The DragonFly Project
20 * by Matthew Dillon <dillon@backplane.com>
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in
30 * the documentation and/or other materials provided with the
32 * 3. Neither the name of The DragonFly Project nor the names of its
33 * contributors may be used to endorse or promote products derived
34 * from this software without specific, prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
39 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
40 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
41 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
42 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
44 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
46 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
49 * $OpenBSD: ahci.c,v 1.147 2009/02/16 21:19:07 miod Exp $
54 void ahci_port_interrupt_enable(struct ahci_port *ap);
56 int ahci_load_prdt(struct ahci_ccb *);
57 void ahci_unload_prdt(struct ahci_ccb *);
58 static void ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs,
59 int nsegs, int error);
60 void ahci_start(struct ahci_ccb *);
61 int ahci_port_softreset(struct ahci_port *ap);
62 int ahci_port_hardreset(struct ahci_port *ap, int hard);
63 void ahci_port_hardstop(struct ahci_port *ap);
65 static void ahci_ata_cmd_timeout_unserialized(void *);
66 void ahci_check_active_timeouts(struct ahci_port *ap);
68 void ahci_beg_exclusive_access(struct ahci_port *ap, struct ata_port *at);
69 void ahci_end_exclusive_access(struct ahci_port *ap, struct ata_port *at);
70 void ahci_issue_pending_commands(struct ahci_port *ap, struct ahci_ccb *ccb);
71 void ahci_issue_saved_commands(struct ahci_port *ap, u_int32_t mask);
73 int ahci_port_read_ncq_error(struct ahci_port *, int);
75 struct ahci_dmamem *ahci_dmamem_alloc(struct ahci_softc *, bus_dma_tag_t tag);
76 void ahci_dmamem_free(struct ahci_softc *, struct ahci_dmamem *);
77 static void ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error);
79 static void ahci_dummy_done(struct ata_xfer *xa);
80 static void ahci_empty_done(struct ahci_ccb *ccb);
81 static void ahci_ata_cmd_done(struct ahci_ccb *ccb);
84 * Initialize the global AHCI hardware. This code does not set up any of
88 ahci_init(struct ahci_softc *sc)
90 u_int32_t cap, pi, pleft;
94 DPRINTF(AHCI_D_VERBOSE, " GHC 0x%b",
95 ahci_read(sc, AHCI_REG_GHC), AHCI_FMT_GHC);
98 * save BIOS initialised parameters, enable staggered spin up
100 cap = ahci_read(sc, AHCI_REG_CAP);
101 cap &= AHCI_REG_CAP_SMPS;
102 cap |= AHCI_REG_CAP_SSS;
103 pi = ahci_read(sc, AHCI_REG_PI);
106 * Unconditionally reset the controller, do not conditionalize on
107 * trying to figure it if it was previously active or not.
109 * NOTE: On AE before HR. The AHCI-1.1 spec has a note in section
110 * 5.2.2.1 regarding this. HR should be set to 1 only after
111 * AE is set to 1. The reset sequence will clear HR when
112 * it completes, and will also clear AE if SAM is 0. AE must
113 * then be set again. When SAM is 1 the AE bit typically reads
114 * as 1 (and is read-only).
116 * NOTE: Avoid PCI[e] transaction burst by issuing dummy reads,
117 * otherwise the writes will only be separated by a few
122 * If you have a port multiplier and it does not have a device
123 * in target 0, and it probes normally, but a later operation
124 * mis-probes a target behind that PM, it is possible for the
125 * port to brick such that only (a) a power cycle of the host
126 * or (b) placing a device in target 0 will fix the problem.
127 * Power cycling the PM has no effect (it works fine on another
128 * host port). This issue is unrelated to CLO.
131 * Wait for any prior reset sequence to complete
133 if (ahci_wait_ne(sc, AHCI_REG_GHC,
134 AHCI_REG_GHC_HR, AHCI_REG_GHC_HR) != 0) {
135 device_printf(sc->sc_dev, "Controller is stuck in reset\n");
138 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
140 ahci_read(sc, AHCI_REG_GHC); /* flush */
141 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE | AHCI_REG_GHC_HR);
143 ahci_read(sc, AHCI_REG_GHC); /* flush */
144 if (ahci_wait_ne(sc, AHCI_REG_GHC,
145 AHCI_REG_GHC_HR, AHCI_REG_GHC_HR) != 0) {
146 device_printf(sc->sc_dev, "unable to reset controller\n");
149 if (ahci_read(sc, AHCI_REG_GHC) & AHCI_REG_GHC_AE) {
150 device_printf(sc->sc_dev, "AE did not auto-clear!\n");
151 ahci_write(sc, AHCI_REG_GHC, 0);
156 * Enable ahci (global interrupts disabled)
158 * Restore saved parameters. Avoid pci transaction burst write
159 * by issuing dummy reads.
162 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
165 ahci_read(sc, AHCI_REG_GHC); /* flush */
166 ahci_write(sc, AHCI_REG_CAP, cap);
167 ahci_write(sc, AHCI_REG_PI, pi);
168 ahci_read(sc, AHCI_REG_GHC); /* flush */
171 * Intel hocus pocus in case the BIOS has not set the chip up
172 * properly for AHCI operation.
174 if (pci_get_vendor(sc->sc_dev) == PCI_VENDOR_INTEL) {
175 if ((pci_read_config(sc->sc_dev, 0x92, 2) & 0x0F) != 0x0F)
176 device_printf(sc->sc_dev, "Intel hocus pocus\n");
177 pci_write_config(sc->sc_dev, 0x92,
178 pci_read_config(sc->sc_dev, 0x92, 2) | 0x0F, 2);
182 * This is a hack that currently does not appear to have
183 * a significant effect, but I noticed the port registers
184 * do not appear to be completely cleared after the host
185 * controller is reset.
187 * Use a temporary ap structure so we can call ahci_pwrite().
189 * We must be sure to stop the port
191 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
194 for (i = 0; i < AHCI_MAX_PORTS; ++i) {
197 if ((pi & (1 << i)) == 0)
199 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
200 AHCI_PORT_REGION(i), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
201 device_printf(sc->sc_dev, "can't map port\n");
205 * NOTE! Setting AHCI_PREG_SCTL_DET_DISABLE on AHCI1.0 or
206 * AHCI1.1 can brick the chipset. Not only brick it,
207 * but also crash the PC. The bit seems unreliable
208 * on AHCI1.2 as well.
210 ahci_port_stop(ap, 1);
211 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
212 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
213 ahci_pwrite(ap, AHCI_PREG_IE, 0);
214 ahci_write(ap->ap_sc, AHCI_REG_IS, 1 << i);
215 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
216 ahci_pwrite(ap, AHCI_PREG_IS, -1);
217 sc->sc_portmask |= (1 << i);
227 * Allocate and initialize an AHCI port.
230 ahci_port_alloc(struct ahci_softc *sc, u_int port)
232 struct ahci_port *ap;
234 struct ahci_ccb *ccb;
238 struct ahci_cmd_hdr *hdr;
239 struct ahci_cmd_table *table;
244 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
245 ap->ap_err_scratch = kmalloc(512, M_DEVBUF, M_WAITOK | M_ZERO);
247 ksnprintf(ap->ap_name, sizeof(ap->ap_name), "%s%d.%d",
248 device_get_name(sc->sc_dev),
249 device_get_unit(sc->sc_dev),
251 sc->sc_ports[port] = ap;
254 * Allocate enough so we never have to reallocate, it makes
257 * ap_pmcount will be reduced by the scan if we encounter the
258 * port multiplier port prior to target 15.
260 * kmalloc power-of-2 allocations are guaranteed not to cross
261 * a page boundary. Make sure the identify sub-structure in the
262 * at structure does not cross a page boundary, just in case the
263 * part is AHCI-1.1 and can't handle multiple DRQ blocks.
265 if (ap->ap_ata[0] == NULL) {
268 for (pw2 = 1; pw2 < sizeof(*at); pw2 <<= 1)
270 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) {
271 at = kmalloc(pw2, M_DEVBUF, M_INTWAIT | M_ZERO);
273 at->at_ahci_port = ap;
275 at->at_probe = ATA_PROBE_NEED_INIT;
276 at->at_features |= ATA_PORT_F_RESCAN;
277 ksnprintf(at->at_name, sizeof(at->at_name),
278 "%s.%d", ap->ap_name, i);
281 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
282 AHCI_PORT_REGION(port), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
283 device_printf(sc->sc_dev,
284 "unable to create register window for port %d\n",
291 ap->ap_probe = ATA_PROBE_NEED_INIT;
292 ap->link_pwr_mgmt = AHCI_LINK_PWR_MGMT_NONE;
293 ap->sysctl_tree = NULL;
294 TAILQ_INIT(&ap->ap_ccb_free);
295 TAILQ_INIT(&ap->ap_ccb_pending);
296 lockinit(&ap->ap_ccb_lock, "ahcipo", 0, 0);
298 /* Disable port interrupts */
299 ahci_pwrite(ap, AHCI_PREG_IE, 0);
300 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
303 * Sec 10.1.2 - deinitialise port if it is already running
305 cmd = ahci_pread(ap, AHCI_PREG_CMD);
306 kprintf("%s: Caps %b\n", PORTNAME(ap), cmd, AHCI_PFMT_CMD);
308 if ((cmd & (AHCI_PREG_CMD_ST | AHCI_PREG_CMD_CR |
309 AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_FR)) ||
310 (ahci_pread(ap, AHCI_PREG_SCTL) & AHCI_PREG_SCTL_DET)) {
313 r = ahci_port_stop(ap, 1);
315 device_printf(sc->sc_dev,
316 "unable to disable %s, ignoring port %d\n",
317 ((r == 2) ? "CR" : "FR"), port);
322 /* Write DET to zero */
323 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
327 ap->ap_dmamem_rfis = ahci_dmamem_alloc(sc, sc->sc_tag_rfis);
328 if (ap->ap_dmamem_rfis == NULL) {
329 kprintf("%s: NORFIS\n", PORTNAME(ap));
333 /* Setup RFIS base address */
334 ap->ap_rfis = (struct ahci_rfis *) AHCI_DMA_KVA(ap->ap_dmamem_rfis);
335 dva = AHCI_DMA_DVA(ap->ap_dmamem_rfis);
336 ahci_pwrite(ap, AHCI_PREG_FBU, (u_int32_t)(dva >> 32));
337 ahci_pwrite(ap, AHCI_PREG_FB, (u_int32_t)dva);
339 /* Clear SERR before starting FIS reception or ST or anything */
341 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
343 /* Enable FIS reception and activate port. */
344 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
345 cmd &= ~(AHCI_PREG_CMD_CLO | AHCI_PREG_CMD_PMA);
346 cmd |= AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_POD | AHCI_PREG_CMD_SUD;
347 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_ICC_ACTIVE);
349 /* Check whether port activated. Skip it if not. */
350 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
351 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
352 kprintf("%s: NOT-ACTIVATED\n", PORTNAME(ap));
357 /* Allocate a CCB for each command slot */
358 ap->ap_ccbs = kmalloc(sizeof(struct ahci_ccb) * sc->sc_ncmds, M_DEVBUF,
360 if (ap->ap_ccbs == NULL) {
361 device_printf(sc->sc_dev,
362 "unable to allocate command list for port %d\n",
367 /* Command List Structures and Command Tables */
368 ap->ap_dmamem_cmd_list = ahci_dmamem_alloc(sc, sc->sc_tag_cmdh);
369 ap->ap_dmamem_cmd_table = ahci_dmamem_alloc(sc, sc->sc_tag_cmdt);
370 if (ap->ap_dmamem_cmd_table == NULL ||
371 ap->ap_dmamem_cmd_list == NULL) {
373 device_printf(sc->sc_dev,
374 "unable to allocate DMA memory for port %d\n",
379 /* Setup command list base address */
380 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_list);
381 ahci_pwrite(ap, AHCI_PREG_CLBU, (u_int32_t)(dva >> 32));
382 ahci_pwrite(ap, AHCI_PREG_CLB, (u_int32_t)dva);
384 /* Split CCB allocation into CCBs and assign to command header/table */
385 hdr = AHCI_DMA_KVA(ap->ap_dmamem_cmd_list);
386 table = AHCI_DMA_KVA(ap->ap_dmamem_cmd_table);
387 for (i = 0; i < sc->sc_ncmds; i++) {
388 ccb = &ap->ap_ccbs[i];
390 error = bus_dmamap_create(sc->sc_tag_data, BUS_DMA_ALLOCNOW,
393 device_printf(sc->sc_dev,
394 "unable to create dmamap for port %d "
395 "ccb %d\n", port, i);
399 callout_init(&ccb->ccb_timeout);
402 ccb->ccb_cmd_hdr = &hdr[i];
403 ccb->ccb_cmd_table = &table[i];
404 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_table) +
405 ccb->ccb_slot * sizeof(struct ahci_cmd_table);
406 ccb->ccb_cmd_hdr->ctba_hi = htole32((u_int32_t)(dva >> 32));
407 ccb->ccb_cmd_hdr->ctba_lo = htole32((u_int32_t)dva);
410 (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
411 ccb->ccb_xa.packetcmd = ccb->ccb_cmd_table->acmd;
414 ccb->ccb_xa.state = ATA_S_COMPLETE;
417 * CCB[1] is the error CCB and is not get or put. It is
418 * also used for probing. Numerous HBAs only load the
419 * signature from CCB[1] so it MUST be used for the second
423 ap->ap_err_ccb = ccb;
429 * Wait for ICC change to complete
431 ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_ICC);
434 * Calculate the interrupt mask
436 data = AHCI_PREG_IE_TFEE | AHCI_PREG_IE_HBFE |
437 AHCI_PREG_IE_IFE | AHCI_PREG_IE_OFE |
438 AHCI_PREG_IE_DPE | AHCI_PREG_IE_UFE |
439 AHCI_PREG_IE_PCE | AHCI_PREG_IE_PRCE |
440 AHCI_PREG_IE_DHRE | AHCI_PREG_IE_SDBE;
441 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF)
442 data |= AHCI_PREG_IE_IPME;
444 if (sc->sc_ccc_ports & (1 << port)
445 data &= ~(AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE);
447 ap->ap_intmask = data;
450 * Start the port helper thread. The helper thread will call
451 * ahci_port_init() so the ports can all be started in parallel.
452 * A failure by ahci_port_init() does not deallocate the port
453 * since we still want hot-plug events.
455 ahci_os_start_port(ap);
458 ahci_port_free(sc, port);
463 * [re]initialize an idle port. No CCBs should be active.
465 * This function is called during the initial port allocation sequence
466 * and is also called on hot-plug insertion. We take no chances and
467 * use a portreset instead of a softreset.
469 * This function is the only way to move a failed port back to active
472 * Returns 0 if a device is successfully detected.
475 ahci_port_init(struct ahci_port *ap)
478 * Register [re]initialization
480 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF)
481 ahci_pwrite(ap, AHCI_PREG_SNTF, -1);
482 ap->ap_probe = ATA_PROBE_NEED_HARD_RESET;
486 * Flush the TFD and SERR and make sure the port is stopped before
487 * enabling its interrupt. We no longer cycle the port start as
488 * the port should not be started unless a device is present.
490 * XXX should we enable FIS reception? (FRE)?
493 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
494 ahci_port_stop(ap, 0);
495 ahci_port_interrupt_enable(ap);
500 * Enable or re-enable interrupts on a port.
502 * This routine is called from the port initialization code or from the
503 * helper thread as the real interrupt may be forced to turn off certain
507 ahci_port_interrupt_enable(struct ahci_port *ap)
509 ahci_pwrite(ap, AHCI_PREG_IE, ap->ap_intmask);
513 * Manage the agressive link power management capability.
516 ahci_port_link_pwr_mgmt(struct ahci_port *ap, int link_pwr_mgmt)
520 if (link_pwr_mgmt == ap->link_pwr_mgmt)
523 if ((ap->ap_sc->sc_cap & AHCI_REG_CAP_SALP) == 0) {
524 kprintf("%s: link power management not supported.\n",
529 ahci_os_lock_port(ap);
531 if (link_pwr_mgmt == AHCI_LINK_PWR_MGMT_AGGR &&
532 (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSC)) {
533 kprintf("%s: enabling aggressive link power management.\n",
536 ap->link_pwr_mgmt = link_pwr_mgmt;
538 ap->ap_intmask &= ~AHCI_PREG_IE_PRCE;
539 ahci_port_interrupt_enable(ap);
541 sctl = ahci_pread(ap, AHCI_PREG_SCTL);
542 sctl &= ~(AHCI_PREG_SCTL_IPM_DISABLED);
543 ahci_pwrite(ap, AHCI_PREG_SCTL, sctl);
546 * Enable device initiated link power management for
547 * directly attached devices that support it.
549 if (ap->ap_type != ATA_PORT_T_PM &&
550 ap->ap_ata[0]->at_identify.satafsup & (1 << 3)) {
551 if (ahci_set_feature(ap, NULL, ATA_SATAFT_DEVIPS, 1))
552 kprintf("%s: Could not enable device initiated "
553 "link power management.\n",
557 cmd = ahci_pread(ap, AHCI_PREG_CMD);
558 cmd |= AHCI_PREG_CMD_ASP;
559 cmd |= AHCI_PREG_CMD_ALPE;
560 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
562 } else if (link_pwr_mgmt == AHCI_LINK_PWR_MGMT_MEDIUM &&
563 (ap->ap_sc->sc_cap & AHCI_REG_CAP_PSC)) {
564 kprintf("%s: enabling medium link power management.\n",
567 ap->link_pwr_mgmt = link_pwr_mgmt;
569 ap->ap_intmask &= ~AHCI_PREG_IE_PRCE;
570 ahci_port_interrupt_enable(ap);
572 sctl = ahci_pread(ap, AHCI_PREG_SCTL);
573 sctl |= AHCI_PREG_SCTL_IPM_DISABLED;
574 sctl &= ~AHCI_PREG_SCTL_IPM_NOPARTIAL;
575 ahci_pwrite(ap, AHCI_PREG_SCTL, sctl);
577 cmd = ahci_pread(ap, AHCI_PREG_CMD);
578 cmd &= ~AHCI_PREG_CMD_ASP;
579 cmd |= AHCI_PREG_CMD_ALPE;
580 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
582 } else if (link_pwr_mgmt == AHCI_LINK_PWR_MGMT_NONE) {
583 kprintf("%s: disabling link power management.\n",
586 /* Disable device initiated link power management */
587 if (ap->ap_type != ATA_PORT_T_PM &&
588 ap->ap_ata[0]->at_identify.satafsup & (1 << 3))
589 ahci_set_feature(ap, NULL, ATA_SATAFT_DEVIPS, 0);
591 cmd = ahci_pread(ap, AHCI_PREG_CMD);
592 cmd &= ~(AHCI_PREG_CMD_ALPE | AHCI_PREG_CMD_ASP);
593 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
595 sctl = ahci_pread(ap, AHCI_PREG_SCTL);
596 sctl |= AHCI_PREG_SCTL_IPM_DISABLED;
597 ahci_pwrite(ap, AHCI_PREG_SCTL, sctl);
599 /* let the drive come back to avoid PRCS interrupts later */
600 ahci_os_unlock_port(ap);
602 ahci_os_lock_port(ap);
604 ahci_pwrite(ap, AHCI_PREG_SERR,
605 AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_W);
606 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_PRCS);
608 ap->ap_intmask |= AHCI_PREG_IE_PRCE;
609 ahci_port_interrupt_enable(ap);
611 ap->link_pwr_mgmt = link_pwr_mgmt;
613 kprintf("%s: unsupported link power management state %d.\n",
614 PORTNAME(ap), link_pwr_mgmt);
617 ahci_os_unlock_port(ap);
621 * Return current link power state.
624 ahci_port_link_pwr_state(struct ahci_port *ap)
628 r = ahci_pread(ap, AHCI_PREG_SSTS);
629 switch (r & SATA_PM_SSTS_IPM) {
630 case SATA_PM_SSTS_IPM_ACTIVE:
632 case SATA_PM_SSTS_IPM_PARTIAL:
634 case SATA_PM_SSTS_IPM_SLUMBER:
642 * Run the port / target state machine from a main context.
644 * The state machine for the port is always run.
646 * If atx is non-NULL run the state machine for a particular target.
647 * If atx is NULL run the state machine for all targets.
650 ahci_port_state_machine(struct ahci_port *ap, int initial)
659 * State machine for port. Note that CAM is not yet associated
660 * during the initial parallel probe and the port's probe state
661 * will not get past ATA_PROBE_NEED_IDENT.
664 if (initial == 0 && ap->ap_probe <= ATA_PROBE_NEED_HARD_RESET) {
665 kprintf("%s: Waiting 10 seconds on insertion\n",
667 ahci_os_sleep(10000);
670 if (ap->ap_probe == ATA_PROBE_NEED_INIT)
672 if (ap->ap_probe == ATA_PROBE_NEED_HARD_RESET)
673 ahci_port_reset(ap, NULL, 1);
674 if (ap->ap_probe == ATA_PROBE_NEED_SOFT_RESET)
675 ahci_port_reset(ap, NULL, 0);
676 if (ap->ap_probe == ATA_PROBE_NEED_IDENT)
677 ahci_cam_probe(ap, NULL);
679 if (ap->ap_type != ATA_PORT_T_PM) {
680 if (ap->ap_probe == ATA_PROBE_FAILED) {
681 ahci_cam_changed(ap, NULL, 0);
682 } else if (ap->ap_probe >= ATA_PROBE_NEED_IDENT) {
683 ahci_cam_changed(ap, NULL, 1);
689 * Port Multiplier state machine.
691 * Get a mask of changed targets and combine with any runnable
692 * states already present.
694 for (loop = 0; ;++loop) {
695 if (ahci_pm_read(ap, 15, SATA_PMREG_EINFO, &data)) {
696 kprintf("%s: PM unable to read hot-plug bitmap\n",
702 * Do at least one loop, then stop if no more state changes
703 * have occured. The PM might not generate a new
704 * notification until we clear the entire bitmap.
706 if (loop && data == 0)
710 * New devices showing up in the bitmap require some spin-up
711 * time before we start probing them. Reset didsleep. The
712 * first new device we detect will sleep before probing.
714 * This only applies to devices whos change bit is set in
715 * the data, and does not apply to the initial boot-time
720 for (target = 0; target < ap->ap_pmcount; ++target) {
721 at = ap->ap_ata[target];
724 * Check the target state for targets behind the PM
725 * which have changed state. This will adjust
726 * at_probe and set ATA_PORT_F_RESCAN
728 * We want to wait at least 10 seconds before probing
729 * a newly inserted device. If the check status
730 * indicates a device is present and in need of a
731 * hard reset, we make sure we have slept before
734 * We also need to wait at least 1 second for the
735 * PHY state to change after insertion, if we
736 * haven't already waited the 10 seconds.
738 * NOTE: When pm_check_good finds a good port it
739 * typically starts us in probe state
740 * NEED_HARD_RESET rather than INIT.
742 if (data & (1 << target)) {
743 if (initial == 0 && didsleep == 0)
745 ahci_pm_check_good(ap, target);
746 if (initial == 0 && didsleep == 0 &&
747 at->at_probe <= ATA_PROBE_NEED_HARD_RESET
750 kprintf("%s: Waiting 10 seconds on insertion\n", PORTNAME(ap));
751 ahci_os_sleep(10000);
756 * Report hot-plug events before the probe state
757 * really gets hot. Only actual events are reported
758 * here to reduce spew.
760 if (data & (1 << target)) {
761 kprintf("%s: HOTPLUG (PM) - ", ATANAME(ap, at));
762 switch(at->at_probe) {
763 case ATA_PROBE_NEED_INIT:
764 case ATA_PROBE_NEED_HARD_RESET:
765 kprintf("Device inserted\n");
767 case ATA_PROBE_FAILED:
768 kprintf("Device removed\n");
771 kprintf("Device probe in progress\n");
777 * Run through the state machine as necessary if
778 * the port is not marked failed.
780 * The state machine may stop at NEED_IDENT if
781 * CAM is not yet attached.
783 * Acquire exclusive access to the port while we
784 * are doing this. This prevents command-completion
785 * from queueing commands for non-polled targets
786 * inbetween our probe steps. We need to do this
787 * because the reset probes can generate severe PHY
788 * and protocol errors and soft-brick the port.
790 if (at->at_probe != ATA_PROBE_FAILED &&
791 at->at_probe != ATA_PROBE_GOOD) {
792 ahci_beg_exclusive_access(ap, at);
793 if (at->at_probe == ATA_PROBE_NEED_INIT)
794 ahci_pm_port_init(ap, at);
795 if (at->at_probe == ATA_PROBE_NEED_HARD_RESET)
796 ahci_port_reset(ap, at, 1);
797 if (at->at_probe == ATA_PROBE_NEED_SOFT_RESET)
798 ahci_port_reset(ap, at, 0);
799 if (at->at_probe == ATA_PROBE_NEED_IDENT)
800 ahci_cam_probe(ap, at);
801 ahci_end_exclusive_access(ap, at);
805 * Add or remove from CAM
807 if (at->at_features & ATA_PORT_F_RESCAN) {
808 at->at_features &= ~ATA_PORT_F_RESCAN;
809 if (at->at_probe == ATA_PROBE_FAILED) {
810 ahci_cam_changed(ap, at, 0);
811 } else if (at->at_probe >= ATA_PROBE_NEED_IDENT) {
812 ahci_cam_changed(ap, at, 1);
815 data &= ~(1 << target);
818 kprintf("%s: WARNING (PM): extra bits set in "
819 "EINFO: %08x\n", PORTNAME(ap), data);
820 while (target < AHCI_MAX_PMPORTS) {
821 ahci_pm_check_good(ap, target);
830 * De-initialize and detach a port.
833 ahci_port_free(struct ahci_softc *sc, u_int port)
835 struct ahci_port *ap = sc->sc_ports[port];
836 struct ahci_ccb *ccb;
840 * Ensure port is disabled and its interrupts are all flushed.
843 ahci_port_stop(ap, 1);
844 ahci_os_stop_port(ap);
845 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
846 ahci_pwrite(ap, AHCI_PREG_IE, 0);
847 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
848 ahci_write(sc, AHCI_REG_IS, 1 << port);
852 while ((ccb = ahci_get_ccb(ap)) != NULL) {
853 if (ccb->ccb_dmamap) {
854 bus_dmamap_destroy(sc->sc_tag_data,
856 ccb->ccb_dmamap = NULL;
859 if ((ccb = ap->ap_err_ccb) != NULL) {
860 if (ccb->ccb_dmamap) {
861 bus_dmamap_destroy(sc->sc_tag_data,
863 ccb->ccb_dmamap = NULL;
865 ap->ap_err_ccb = NULL;
867 kfree(ap->ap_ccbs, M_DEVBUF);
871 if (ap->ap_dmamem_cmd_list) {
872 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_list);
873 ap->ap_dmamem_cmd_list = NULL;
875 if (ap->ap_dmamem_rfis) {
876 ahci_dmamem_free(sc, ap->ap_dmamem_rfis);
877 ap->ap_dmamem_rfis = NULL;
879 if (ap->ap_dmamem_cmd_table) {
880 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_table);
881 ap->ap_dmamem_cmd_table = NULL;
884 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) {
886 kfree(ap->ap_ata[i], M_DEVBUF);
887 ap->ap_ata[i] = NULL;
891 if (ap->ap_err_scratch) {
892 kfree(ap->ap_err_scratch, M_DEVBUF);
893 ap->ap_err_scratch = NULL;
896 /* bus_space(9) says we dont free the subregions handle */
899 sc->sc_ports[port] = NULL;
903 * Start high-level command processing on the port
906 ahci_port_start(struct ahci_port *ap)
908 u_int32_t r, s, is, tfd;
911 * FRE must be turned on before ST. Wait for FR to go active
912 * before turning on ST. The spec doesn't seem to think this
913 * is necessary but waiting here avoids an on-off race in the
914 * ahci_port_stop() code.
916 r = ahci_pread(ap, AHCI_PREG_CMD);
917 if ((r & AHCI_PREG_CMD_FRE) == 0) {
918 r |= AHCI_PREG_CMD_FRE;
919 ahci_pwrite(ap, AHCI_PREG_CMD, r);
921 if ((ap->ap_sc->sc_flags & AHCI_F_IGN_FR) == 0) {
922 if (ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR)) {
923 kprintf("%s: Cannot start FIS reception\n",
932 * Turn on ST, wait for CR to come up.
934 r |= AHCI_PREG_CMD_ST;
935 ahci_pwrite(ap, AHCI_PREG_CMD, r);
936 if (ahci_pwait_set_to(ap, 2000, AHCI_PREG_CMD, AHCI_PREG_CMD_CR)) {
937 s = ahci_pread(ap, AHCI_PREG_SERR);
938 is = ahci_pread(ap, AHCI_PREG_IS);
939 tfd = ahci_pread(ap, AHCI_PREG_TFD);
940 kprintf("%s: Cannot start command DMA\n"
945 r, AHCI_PFMT_CMD, s, AHCI_PFMT_SERR,
947 tfd, AHCI_PFMT_TFD_STS);
953 * (Re-)enable coalescing on the port.
955 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
956 ap->ap_sc->sc_ccc_ports_cur |= (1 << ap->ap_num);
957 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
958 ap->ap_sc->sc_ccc_ports_cur);
966 * Stop high-level command processing on a port
968 * WARNING! If the port is stopped while CR is still active our saved
969 * CI/SACT will race any commands completed by the command
970 * processor prior to being able to stop. Thus we never call
971 * this function unless we intend to dispose of any remaining
972 * active commands. In particular, this complicates the timeout
976 ahci_port_stop(struct ahci_port *ap, int stop_fis_rx)
982 * Disable coalescing on the port while it is stopped.
984 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
985 ap->ap_sc->sc_ccc_ports_cur &= ~(1 << ap->ap_num);
986 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
987 ap->ap_sc->sc_ccc_ports_cur);
992 * Turn off ST, then wait for CR to go off.
994 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
995 r &= ~AHCI_PREG_CMD_ST;
996 ahci_pwrite(ap, AHCI_PREG_CMD, r);
998 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR)) {
999 kprintf("%s: Port bricked, unable to stop (ST)\n",
1006 * Turn off FRE, then wait for FR to go off. FRE cannot
1007 * be turned off until CR transitions to 0.
1009 if ((r & AHCI_PREG_CMD_FR) == 0) {
1010 kprintf("%s: FR stopped, clear FRE for next start\n",
1016 r &= ~AHCI_PREG_CMD_FRE;
1017 ahci_pwrite(ap, AHCI_PREG_CMD, r);
1018 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR)) {
1019 kprintf("%s: Port bricked, unable to stop (FRE)\n",
1029 * AHCI command list override -> forcibly clear TFD.STS.{BSY,DRQ}
1032 ahci_port_clo(struct ahci_port *ap)
1034 struct ahci_softc *sc = ap->ap_sc;
1037 /* Only attempt CLO if supported by controller */
1038 if ((ahci_read(sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO) == 0)
1042 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1043 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_CLO);
1045 /* Wait for completion */
1046 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CLO)) {
1047 kprintf("%s: CLO did not complete\n", PORTNAME(ap));
1057 * If hard is 0 perform a softreset of the port.
1058 * If hard is 1 perform a hard reset of the port.
1060 * If at is non-NULL an indirect port via a port-multiplier is being
1061 * reset, otherwise a direct port is being reset.
1063 * NOTE: Indirect ports can only be soft-reset.
1066 ahci_port_reset(struct ahci_port *ap, struct ata_port *at, int hard)
1072 rc = ahci_pm_hardreset(ap, at->at_target, hard);
1074 rc = ahci_port_hardreset(ap, hard);
1077 rc = ahci_pm_softreset(ap, at->at_target);
1079 rc = ahci_port_softreset(ap);
1085 * AHCI soft reset, Section 10.4.1
1087 * (at) will be NULL when soft-resetting a directly-attached device, and
1088 * non-NULL when soft-resetting a device through a port multiplier.
1090 * This function keeps port communications intact and attempts to generate
1091 * a reset to the connected device using device commands.
1094 ahci_port_softreset(struct ahci_port *ap)
1096 struct ahci_ccb *ccb = NULL;
1097 struct ahci_cmd_hdr *cmd_slot;
1104 kprintf("%s: START SOFTRESET %b\n", PORTNAME(ap),
1105 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD);
1108 DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap));
1111 ap->ap_flags |= AP_F_IN_RESET;
1112 ap->ap_state = AP_S_NORMAL;
1115 * Remember port state in cmd (main to restore start/stop)
1119 if (ahci_port_stop(ap, 0)) {
1120 kprintf("%s: failed to stop port, cannot softreset\n",
1126 * Request CLO if device appears hung.
1128 if (ahci_pread(ap, AHCI_PREG_TFD) &
1129 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1134 * This is an attempt to clear errors so a new signature will
1135 * be latched. It isn't working properly. XXX
1138 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1141 if (ahci_port_start(ap)) {
1142 kprintf("%s: failed to start port, cannot softreset\n",
1147 /* Check whether CLO worked */
1148 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1149 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1150 kprintf("%s: CLO %s, need port reset\n",
1152 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO)
1153 ? "failed" : "unsupported");
1159 * Prep first D2H command with SRST feature & clear busy/reset flags
1161 * It is unclear which other fields in the FIS are used. Just zero
1164 * NOTE! This CCB is used for both the first and second commands.
1165 * The second command must use CCB slot 1 to properly load
1168 ccb = ahci_get_err_ccb(ap);
1169 ccb->ccb_xa.complete = ahci_dummy_done;
1170 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_EXCLUSIVE;
1171 KKASSERT(ccb->ccb_slot == 1);
1172 ccb->ccb_xa.at = NULL;
1173 cmd_slot = ccb->ccb_cmd_hdr;
1175 fis = ccb->ccb_cmd_table->cfis;
1176 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1177 fis[0] = ATA_FIS_TYPE_H2D;
1178 fis[15] = ATA_FIS_CONTROL_SRST|ATA_FIS_CONTROL_4BIT;
1180 cmd_slot->prdtl = 0;
1181 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1182 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
1183 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
1185 ccb->ccb_xa.state = ATA_S_PENDING;
1187 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
1188 kprintf("%s: First FIS failed\n", PORTNAME(ap));
1193 * WARNING! TIME SENSITIVE SPACE! WARNING!
1195 * The two FISes are supposed to be back to back. Don't issue other
1196 * commands or even delay if we can help it.
1200 * Prep second D2H command to read status and complete reset sequence
1201 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA
1202 * Rev 2.6 and it is unclear how the second FIS should be set up
1203 * from the AHCI document.
1205 * Give the device 3ms before sending the second FIS.
1207 * It is unclear which other fields in the FIS are used. Just zero
1210 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_AUTOSENSE | ATA_F_EXCLUSIVE;
1212 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1213 fis[0] = ATA_FIS_TYPE_H2D;
1214 fis[15] = ATA_FIS_CONTROL_4BIT;
1216 cmd_slot->prdtl = 0;
1217 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1219 ccb->ccb_xa.state = ATA_S_PENDING;
1220 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
1221 kprintf("%s: Second FIS failed\n", PORTNAME(ap));
1225 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1226 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1227 kprintf("%s: device didn't come ready after reset, TFD: 0x%b\n",
1229 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
1236 * If the softreset is trying to clear a BSY condition after a
1237 * normal portreset we assign the port type.
1239 * If the softreset is being run first as part of the ccb error
1240 * processing code then report if the device signature changed
1243 if (ap->ap_type == ATA_PORT_T_NONE) {
1244 ap->ap_type = ahci_port_signature_detect(ap, NULL);
1246 if (ahci_port_signature_detect(ap, NULL) != ap->ap_type) {
1247 kprintf("%s: device signature unexpectedly "
1248 "changed\n", PORTNAME(ap));
1249 error = EBUSY; /* XXX */
1257 ahci_put_err_ccb(ccb);
1260 * If the target is busy use CLO to clear the busy
1261 * condition. The BSY should be cleared on the next
1264 if (ahci_pread(ap, AHCI_PREG_TFD) &
1265 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1271 * If we failed to softreset make the port quiescent, otherwise
1272 * make sure the port's start/stop state matches what it was on
1275 * Don't kill the port if the softreset is on a port multiplier
1276 * target, that would kill all the targets!
1279 ahci_port_hardstop(ap);
1280 /* ap_probe set to failed */
1282 ap->ap_probe = ATA_PROBE_NEED_IDENT;
1284 ahci_port_start(ap);
1286 ap->ap_flags &= ~AP_F_IN_RESET;
1290 kprintf("%s: END SOFTRESET\n", PORTNAME(ap));
1296 * AHCI port reset, Section 10.4.2
1298 * This function does a hard reset of the port. Note that the device
1299 * connected to the port could still end-up hung.
1302 ahci_port_hardreset(struct ahci_port *ap, int hard)
1310 kprintf("%s: START HARDRESET\n", PORTNAME(ap));
1311 ap->ap_flags |= AP_F_IN_RESET;
1316 ahci_port_stop(ap, 0);
1317 ap->ap_state = AP_S_NORMAL;
1320 * The port may have been quiescent with its SUD bit cleared, so
1321 * set the SUD (spin up device).
1323 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1324 cmd |= AHCI_PREG_CMD_SUD;
1325 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1328 * Perform device detection.
1330 * NOTE! AHCi_PREG_SCTL_DET_DISABLE seems to be highly unreliable
1331 * on multiple chipsets and can brick the chipset or even
1332 * the whole PC. Never use it.
1334 ap->ap_type = ATA_PORT_T_NONE;
1336 r = AHCI_PREG_SCTL_IPM_DISABLED;
1337 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1341 * Start transmitting COMRESET. COMRESET must be sent for at
1344 r = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT;
1345 if (AhciForceGen1 & (1 << ap->ap_num))
1346 r |= AHCI_PREG_SCTL_SPD_GEN1;
1348 r |= AHCI_PREG_SCTL_SPD_ANY;
1349 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1352 * Through trial and error it seems to take around 100ms
1353 * for the detect logic to settle down. If this is too
1354 * short the softreset code will fail.
1359 * Only SERR_DIAG_X needs to be cleared for TFD updates, but
1360 * since we are hard-resetting the port we might as well clear
1361 * the whole enchillada
1364 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1365 r &= ~AHCI_PREG_SCTL_DET_INIT;
1366 r |= AHCI_PREG_SCTL_DET_NONE;
1367 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1370 * Try to determine if there is a device on the port.
1372 * Give the device 3/10 second to at least be detected.
1373 * If we fail clear PRCS (phy detect) since we may cycled
1374 * the phy and probably caused another PRCS interrupt.
1378 r = ahci_pread(ap, AHCI_PREG_SSTS);
1379 if (r & AHCI_PREG_SSTS_DET)
1381 loop -= ahci_os_softsleep();
1384 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_PRCS);
1386 kprintf("%s: Port appears to be unplugged\n",
1394 * There is something on the port. Give the device 3 seconds
1395 * to fully negotiate.
1397 if (ahci_pwait_eq(ap, 3000, AHCI_PREG_SSTS,
1398 AHCI_PREG_SSTS_DET, AHCI_PREG_SSTS_DET_DEV)) {
1400 kprintf("%s: Device may be powered down\n",
1408 * We got something that definitely looks like a device. Give
1409 * the device time to send us its first D2H FIS. Waiting for
1410 * BSY to clear accomplishes this.
1412 * NOTE that a port multiplier may or may not clear BSY here,
1413 * depending on what is sitting in target 0 behind it.
1417 if (ahci_pwait_clr_to(ap, 3000, AHCI_PREG_TFD,
1418 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1426 * Do the PM port probe regardless of how things turned out on
1429 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SPM)
1430 error = ahci_pm_port_probe(ap, error);
1439 * All good, make sure the port is running and set the
1440 * probe state. Ignore the signature junk (it's unreliable)
1441 * until we get to the softreset code.
1443 if (ahci_port_start(ap)) {
1444 kprintf("%s: failed to start command DMA on port, "
1445 "disabling\n", PORTNAME(ap));
1449 if (ap->ap_type == ATA_PORT_T_PM)
1450 ap->ap_probe = ATA_PROBE_GOOD;
1452 ap->ap_probe = ATA_PROBE_NEED_SOFT_RESET;
1456 * Normal device probe failure
1458 data = ahci_pread(ap, AHCI_PREG_SSTS);
1460 switch(data & AHCI_PREG_SSTS_DET) {
1461 case AHCI_PREG_SSTS_DET_DEV_NE:
1462 kprintf("%s: Device not communicating\n",
1465 case AHCI_PREG_SSTS_DET_PHYOFFLINE:
1466 kprintf("%s: PHY offline\n",
1470 kprintf("%s: No device detected\n",
1474 ahci_port_hardstop(ap);
1478 * Abnormal probe (EBUSY)
1480 kprintf("%s: Device on port is bricked\n",
1482 ahci_port_hardstop(ap);
1484 rc = ahci_port_reset(ap, atx, 0);
1486 kprintf("%s: Unable unbrick device\n",
1489 kprintf("%s: Successfully unbricked\n",
1499 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1500 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS);
1502 ap->ap_flags &= ~AP_F_IN_RESET;
1505 kprintf("%s: END HARDRESET %d\n", PORTNAME(ap), error);
1510 * Hard-stop on hot-swap device removal. See 10.10.1
1512 * Place the port in a mode that will allow it to detect hot-swap insertions.
1513 * This is a bit imprecise because just setting-up SCTL to DET_INIT doesn't
1514 * seem to do the job.
1516 * FIS reception is left enabled but command processing is disabled.
1517 * Cycling FIS reception (FRE) can brick ports.
1520 ahci_port_hardstop(struct ahci_port *ap)
1522 struct ahci_ccb *ccb;
1523 struct ata_port *at;
1530 * Stop the port. We can't modify things like SUD if the port
1533 ap->ap_state = AP_S_FATAL_ERROR;
1534 ap->ap_probe = ATA_PROBE_FAILED;
1535 ap->ap_type = ATA_PORT_T_NONE;
1536 ahci_port_stop(ap, 0);
1537 cmd = ahci_pread(ap, AHCI_PREG_CMD);
1540 * Clean up AT sub-ports on SATA port.
1542 for (i = 0; ap->ap_ata && i < AHCI_MAX_PMPORTS; ++i) {
1544 at->at_type = ATA_PORT_T_NONE;
1545 at->at_probe = ATA_PROBE_FAILED;
1549 * Turn off port-multiplier control bit
1551 if (cmd & AHCI_PREG_CMD_PMA) {
1552 cmd &= ~AHCI_PREG_CMD_PMA;
1553 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1557 * Make sure FRE is active. There isn't anything we can do if it
1558 * fails so just ignore errors.
1560 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
1561 cmd |= AHCI_PREG_CMD_FRE;
1562 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1563 if ((ap->ap_sc->sc_flags & AHCI_F_IGN_FR) == 0)
1564 ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR);
1568 * 10.10.3 DET must be set to 0 before setting SUD to 0.
1569 * 10.10.1 place us in the Listen state.
1571 * Deactivating SUD only applies if the controller supports SUD.
1573 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
1575 if (cmd & AHCI_PREG_CMD_SUD) {
1576 cmd &= ~AHCI_PREG_CMD_SUD;
1577 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1582 * Transition su to the spin-up state. HVA shall send COMRESET and
1583 * begin initialization sequence (whatever that means).
1585 * This only applies if the controller supports SUD.
1586 * NEVER use AHCI_PREG_DET_DISABLE.
1588 cmd |= AHCI_PREG_CMD_SUD;
1589 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1593 * Transition us to the Reset state. Theoretically we send a
1594 * continuous stream of COMRESETs in this state.
1596 r = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT;
1597 if (AhciForceGen1 & (1 << ap->ap_num)) {
1598 kprintf("%s: Force 1.5Gbits\n", PORTNAME(ap));
1599 r |= AHCI_PREG_SCTL_SPD_GEN1;
1601 r |= AHCI_PREG_SCTL_SPD_ANY;
1603 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1607 * Flush SERR_DIAG_X so the TFD can update.
1612 * Clean out pending ccbs
1614 while (ap->ap_active) {
1615 slot = ffs(ap->ap_active) - 1;
1616 ap->ap_active &= ~(1 << slot);
1617 ap->ap_expired &= ~(1 << slot);
1618 --ap->ap_active_cnt;
1619 ccb = &ap->ap_ccbs[slot];
1620 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_RUNNING) {
1621 callout_stop(&ccb->ccb_timeout);
1622 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
1624 ccb->ccb_xa.flags &= ~(ATA_F_TIMEOUT_DESIRED |
1625 ATA_F_TIMEOUT_EXPIRED);
1626 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1628 ccb->ccb_xa.complete(&ccb->ccb_xa);
1630 while (ap->ap_sactive) {
1631 slot = ffs(ap->ap_sactive) - 1;
1632 ap->ap_sactive &= ~(1 << slot);
1633 ap->ap_expired &= ~(1 << slot);
1634 ccb = &ap->ap_ccbs[slot];
1635 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_RUNNING) {
1636 callout_stop(&ccb->ccb_timeout);
1637 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
1639 ccb->ccb_xa.flags &= ~(ATA_F_TIMEOUT_DESIRED |
1640 ATA_F_TIMEOUT_EXPIRED);
1641 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1643 ccb->ccb_xa.complete(&ccb->ccb_xa);
1645 KKASSERT(ap->ap_active_cnt == 0);
1647 while ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) != NULL) {
1648 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
1649 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1650 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_DESIRED;
1652 ccb->ccb_xa.complete(&ccb->ccb_xa);
1656 * Leave us in COMRESET (both SUD and INIT active), the HBA should
1657 * hopefully send us a DIAG_X-related interrupt if it receives
1658 * a COMINIT, and if not that then at least a Phy transition
1661 * If we transition INIT from 1->0 to begin the initalization
1662 * sequence it is unclear if that sequence will remain active
1663 * until the next device insertion.
1665 * If we go back to the listen state it is unclear if the
1666 * device will actually send us a COMINIT, since we aren't
1667 * sending any COMRESET's
1673 * We can't loop on the X bit, a continuous COMINIT received will make
1674 * it loop forever. Just assume one event has built up and clear X
1675 * so the task file descriptor can update.
1678 ahci_flush_tfd(struct ahci_port *ap)
1682 r = ahci_pread(ap, AHCI_PREG_SERR);
1683 if (r & AHCI_PREG_SERR_DIAG_X)
1684 ahci_pwrite(ap, AHCI_PREG_SERR, AHCI_PREG_SERR_DIAG_X);
1688 * Figure out what type of device is connected to the port, ATAPI or
1692 ahci_port_signature_detect(struct ahci_port *ap, struct ata_port *at)
1696 sig = ahci_pread(ap, AHCI_PREG_SIG);
1698 kprintf("%s: sig %08x\n", ATANAME(ap, at), sig);
1699 if ((sig & 0xffff0000) == (SATA_SIGNATURE_ATAPI & 0xffff0000)) {
1700 return(ATA_PORT_T_ATAPI);
1701 } else if ((sig & 0xffff0000) ==
1702 (SATA_SIGNATURE_PORT_MULTIPLIER & 0xffff0000)) {
1703 return(ATA_PORT_T_PM);
1705 return(ATA_PORT_T_DISK);
1710 * Load the DMA descriptor table for a CCB's buffer.
1713 ahci_load_prdt(struct ahci_ccb *ccb)
1715 struct ahci_port *ap = ccb->ccb_port;
1716 struct ahci_softc *sc = ap->ap_sc;
1717 struct ata_xfer *xa = &ccb->ccb_xa;
1718 struct ahci_prdt *prdt = ccb->ccb_cmd_table->prdt;
1719 bus_dmamap_t dmap = ccb->ccb_dmamap;
1720 struct ahci_cmd_hdr *cmd_slot = ccb->ccb_cmd_hdr;
1723 if (xa->datalen == 0) {
1724 ccb->ccb_cmd_hdr->prdtl = 0;
1728 error = bus_dmamap_load(sc->sc_tag_data, dmap,
1729 xa->data, xa->datalen,
1730 ahci_load_prdt_callback,
1732 ((xa->flags & ATA_F_NOWAIT) ?
1733 BUS_DMA_NOWAIT : BUS_DMA_WAITOK));
1735 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap), error);
1739 if (xa->flags & ATA_F_PIO)
1740 prdt->flags |= htole32(AHCI_PRDT_FLAG_INTR);
1743 cmd_slot->prdtl = htole16(prdt - ccb->ccb_cmd_table->prdt + 1);
1745 if (xa->flags & ATA_F_READ)
1746 bus_dmamap_sync(sc->sc_tag_data, dmap, BUS_DMASYNC_PREREAD);
1747 if (xa->flags & ATA_F_WRITE)
1748 bus_dmamap_sync(sc->sc_tag_data, dmap, BUS_DMASYNC_PREWRITE);
1754 * Callback from BUSDMA system to load the segment list. The passed segment
1755 * list is a temporary structure.
1759 ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs, int nsegs,
1762 struct ahci_prdt *prd = *(void **)info;
1765 KKASSERT(nsegs <= AHCI_MAX_PRDT);
1768 addr = segs->ds_addr;
1769 prd->dba_hi = htole32((u_int32_t)(addr >> 32));
1770 prd->dba_lo = htole32((u_int32_t)addr);
1771 prd->flags = htole32(segs->ds_len - 1);
1777 *(void **)info = prd; /* return last valid segment */
1781 ahci_unload_prdt(struct ahci_ccb *ccb)
1783 struct ahci_port *ap = ccb->ccb_port;
1784 struct ahci_softc *sc = ap->ap_sc;
1785 struct ata_xfer *xa = &ccb->ccb_xa;
1786 bus_dmamap_t dmap = ccb->ccb_dmamap;
1788 if (xa->datalen != 0) {
1789 if (xa->flags & ATA_F_READ) {
1790 bus_dmamap_sync(sc->sc_tag_data, dmap,
1791 BUS_DMASYNC_POSTREAD);
1793 if (xa->flags & ATA_F_WRITE) {
1794 bus_dmamap_sync(sc->sc_tag_data, dmap,
1795 BUS_DMASYNC_POSTWRITE);
1797 bus_dmamap_unload(sc->sc_tag_data, dmap);
1800 * prdbc is only updated by hardware for non-NCQ commands.
1802 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
1805 if (ccb->ccb_cmd_hdr->prdbc == 0 &&
1806 ccb->ccb_xa.state == ATA_S_COMPLETE) {
1807 kprintf("%s: WARNING! Unload prdbc resid "
1808 "was zero! tag=%d\n",
1809 ATANAME(ap, xa->at), ccb->ccb_slot);
1811 xa->resid = xa->datalen -
1812 le32toh(ccb->ccb_cmd_hdr->prdbc);
1818 * Start a command and poll for completion.
1820 * timeout is in ms and only counts once the command gets on-chip.
1822 * Returns ATA_S_* state, compare against ATA_S_COMPLETE to determine
1823 * that no error occured.
1825 * NOTE: If the caller specifies a NULL timeout function the caller is
1826 * responsible for clearing hardware state on failure, but we will
1827 * deal with removing the ccb from any pending queue.
1829 * NOTE: NCQ should never be used with this function.
1831 * NOTE: If the port is in a failed state and stopped we do not try
1832 * to activate the ccb.
1835 ahci_poll(struct ahci_ccb *ccb, int timeout,
1836 void (*timeout_fn)(struct ahci_ccb *))
1838 struct ahci_port *ap = ccb->ccb_port;
1840 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR) {
1841 ccb->ccb_xa.state = ATA_S_ERROR;
1842 return(ccb->ccb_xa.state);
1846 kprintf("%s: Start command %02x tag=%d\n",
1847 ATANAME(ccb->ccb_port, ccb->ccb_xa.at),
1848 ccb->ccb_xa.fis->command, ccb->ccb_slot);
1853 ahci_port_intr(ap, 1);
1854 switch(ccb->ccb_xa.state) {
1856 timeout -= ahci_os_softsleep();
1859 ahci_os_softsleep();
1860 ahci_check_active_timeouts(ap);
1864 return (ccb->ccb_xa.state);
1866 } while (timeout > 0);
1868 kprintf("%s: Poll timeout slot %d CMD: %b TFD: 0x%b SERR: %b\n",
1869 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_slot,
1870 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
1871 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS,
1872 ahci_pread(ap, AHCI_PREG_SERR), AHCI_PFMT_SERR);
1878 return(ccb->ccb_xa.state);
1882 * When polling we have to check if the currently active CCB(s)
1883 * have timed out as the callout will be deadlocked while we
1884 * hold the port lock.
1887 ahci_check_active_timeouts(struct ahci_port *ap)
1889 struct ahci_ccb *ccb;
1893 mask = ap->ap_active | ap->ap_sactive;
1895 tag = ffs(mask) - 1;
1896 mask &= ~(1 << tag);
1897 ccb = &ap->ap_ccbs[tag];
1898 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_EXPIRED) {
1899 ahci_ata_cmd_timeout(ccb);
1907 ahci_start_timeout(struct ahci_ccb *ccb)
1909 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_DESIRED) {
1910 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_RUNNING;
1911 callout_reset(&ccb->ccb_timeout,
1912 (ccb->ccb_xa.timeout * hz + 999) / 1000,
1913 ahci_ata_cmd_timeout_unserialized, ccb);
1918 ahci_start(struct ahci_ccb *ccb)
1920 struct ahci_port *ap = ccb->ccb_port;
1921 struct ahci_softc *sc = ap->ap_sc;
1923 KKASSERT(ccb->ccb_xa.state == ATA_S_PENDING);
1925 /* Zero transferred byte count before transfer */
1926 ccb->ccb_cmd_hdr->prdbc = 0;
1928 /* Sync command list entry and corresponding command table entry */
1929 bus_dmamap_sync(sc->sc_tag_cmdh,
1930 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
1931 BUS_DMASYNC_PREWRITE);
1932 bus_dmamap_sync(sc->sc_tag_cmdt,
1933 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
1934 BUS_DMASYNC_PREWRITE);
1936 /* Prepare RFIS area for write by controller */
1937 bus_dmamap_sync(sc->sc_tag_rfis,
1938 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
1939 BUS_DMASYNC_PREREAD);
1942 * There's no point trying to optimize this, it only shaves a few
1943 * nanoseconds so just queue the command and call our generic issue.
1945 ahci_issue_pending_commands(ap, ccb);
1949 * While holding the port lock acquire exclusive access to the port.
1951 * This is used when running the state machine to initialize and identify
1952 * targets over a port multiplier. Setting exclusive access prevents
1953 * ahci_port_intr() from activating any requests sitting on the pending
1957 ahci_beg_exclusive_access(struct ahci_port *ap, struct ata_port *at)
1959 KKASSERT((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) == 0);
1960 ap->ap_flags |= AP_F_EXCLUSIVE_ACCESS;
1961 while (ap->ap_active || ap->ap_sactive) {
1962 ahci_port_intr(ap, 1);
1963 ahci_os_softsleep();
1968 ahci_end_exclusive_access(struct ahci_port *ap, struct ata_port *at)
1970 KKASSERT((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) != 0);
1971 ap->ap_flags &= ~AP_F_EXCLUSIVE_ACCESS;
1972 ahci_issue_pending_commands(ap, NULL);
1978 fubar(struct ahci_ccb *ccb)
1980 struct ahci_port *ap = ccb->ccb_port;
1981 struct ahci_cmd_hdr *cmd;
1982 struct ahci_cmd_table *tab;
1983 struct ahci_prdt *prdt;
1986 kprintf("%s: ISSUE %02x\n",
1987 ATANAME(ap, ccb->ccb_xa.at),
1988 ccb->ccb_xa.fis->command);
1989 cmd = ccb->ccb_cmd_hdr;
1990 tab = ccb->ccb_cmd_table;
1991 prdt = ccb->ccb_cmd_table->prdt;
1992 kprintf("cmd flags=%04x prdtl=%d prdbc=%d ctba=%08x%08x\n",
1993 cmd->flags, cmd->prdtl, cmd->prdbc,
1994 cmd->ctba_hi, cmd->ctba_lo);
1995 for (i = 0; i < cmd->prdtl; ++i) {
1996 kprintf("\t%d dba=%08x%08x res=%08x flags=%08x\n",
1997 i, prdt->dba_hi, prdt->dba_lo, prdt->reserved,
2006 * If ccb is not NULL enqueue and/or issue it.
2008 * If ccb is NULL issue whatever we can from the queue. However, nothing
2009 * new is issued if the exclusive access flag is set or expired ccb's are
2012 * If existing commands are still active (ap_active/ap_sactive) we can only
2013 * issue matching new commands.
2016 ahci_issue_pending_commands(struct ahci_port *ap, struct ahci_ccb *ccb)
2024 * If just running the queue and in exclusive access mode we
2025 * just return. Also in this case if there are any expired ccb's
2026 * we want to clear the queue so the port can be safely stopped.
2029 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
2030 } else if ((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) || ap->ap_expired) {
2035 * Pull the next ccb off the queue and run it if possible.
2037 if ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) == NULL)
2041 * Handle exclusivity requirements.
2043 * ATA_F_EXCLUSIVE is used when we want to be the only command
2046 * ATA_F_AUTOSENSE is used when we want the D2H rfis loaded
2047 * back into the ccb on a normal (non-errored) command completion.
2048 * For example, for PM requests to target 15. Because the AHCI
2049 * spec does not stop the command processor and has only one rfis
2050 * area (for non-FBSS anyway), AUTOSENSE currently implies EXCLUSIVE.
2051 * Otherwise multiple completions can destroy the rfis data before
2052 * we have a chance to copy it.
2054 if (ap->ap_active & ~ap->ap_expired) {
2056 * There may be multiple ccb's already running,
2057 * if any are running and ap_run_flags sets
2058 * one of these flags then we know only one is
2061 * XXX Current AUTOSENSE code forces exclusivity
2062 * to simplify the code.
2064 if (ap->ap_run_flags &
2065 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) {
2069 if (ccb->ccb_xa.flags &
2070 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) {
2075 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
2077 * The next command is a NCQ command and can be issued as
2078 * long as currently active commands are not standard.
2080 if (ap->ap_active) {
2081 KKASSERT(ap->ap_active_cnt > 0);
2084 KKASSERT(ap->ap_active_cnt == 0);
2088 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
2089 mask |= 1 << ccb->ccb_slot;
2090 ccb->ccb_xa.state = ATA_S_ONCHIP;
2091 ahci_start_timeout(ccb);
2092 ap->ap_run_flags = ccb->ccb_xa.flags;
2093 ccb = TAILQ_FIRST(&ap->ap_ccb_pending);
2094 } while (ccb && (ccb->ccb_xa.flags & ATA_F_NCQ) &&
2096 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) == 0);
2098 ap->ap_sactive |= mask;
2099 ahci_pwrite(ap, AHCI_PREG_SACT, mask);
2100 ahci_pwrite(ap, AHCI_PREG_CI, mask);
2103 * The next command is a standard command and can be issued
2104 * as long as currently active commands are not NCQ.
2106 * We limit ourself to 1 command if we have a port multiplier,
2107 * (at least without FBSS support), otherwise timeouts on
2108 * one port can race completions on other ports (see
2109 * ahci_ata_cmd_timeout() for more information).
2111 * If not on a port multiplier generally allow up to 4
2112 * standard commands to be enqueued. Remember that the
2113 * command processor will still process them sequentially.
2117 if (ap->ap_type == ATA_PORT_T_PM)
2119 else if (ap->ap_sc->sc_ncmds > 4)
2124 while (ap->ap_active_cnt < limit && ccb &&
2125 (ccb->ccb_xa.flags & ATA_F_NCQ) == 0) {
2126 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
2130 ap->ap_active |= 1 << ccb->ccb_slot;
2131 ap->ap_active_cnt++;
2132 ap->ap_run_flags = ccb->ccb_xa.flags;
2133 ccb->ccb_xa.state = ATA_S_ONCHIP;
2134 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
2135 ahci_start_timeout(ccb);
2136 if ((ap->ap_run_flags &
2137 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) == 0) {
2140 ccb = TAILQ_FIRST(&ap->ap_ccb_pending);
2141 if (ccb && (ccb->ccb_xa.flags &
2142 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE))) {
2150 ahci_intr(void *arg)
2152 struct ahci_softc *sc = arg;
2153 struct ahci_port *ap;
2159 * Check if the master enable is up, and whether any interrupts are
2162 if ((sc->sc_flags & AHCI_F_INT_GOOD) == 0)
2164 is = ahci_read(sc, AHCI_REG_IS);
2165 if (is == 0 || is == 0xffffffff) {
2168 is &= sc->sc_portmask;
2170 #ifdef AHCI_COALESCE
2171 /* Check coalescing interrupt first */
2172 if (is & sc->sc_ccc_mask) {
2173 DPRINTF(AHCI_D_INTR, "%s: command coalescing interrupt\n",
2175 is &= ~sc->sc_ccc_mask;
2176 is |= sc->sc_ccc_ports_cur;
2181 * Process interrupts for each port in a non-blocking fashion.
2183 * The global IS bit is forced on if any unmasked port interrupts
2184 * are pending, even if we clear.
2186 for (ack = 0; is; is &= ~(1 << port)) {
2190 ap = sc->sc_ports[port];
2194 if (ahci_os_lock_port_nb(ap) == 0) {
2195 ahci_port_intr(ap, 0);
2196 ahci_os_unlock_port(ap);
2198 ahci_pwrite(ap, AHCI_PREG_IE, 0);
2199 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2202 ahci_write(sc, AHCI_REG_IS, ack);
2206 * Core called from helper thread.
2209 ahci_port_thread_core(struct ahci_port *ap, int mask)
2212 * Process any expired timedouts.
2214 ahci_os_lock_port(ap);
2215 if (mask & AP_SIGF_TIMEOUT) {
2216 ahci_check_active_timeouts(ap);
2220 * Process port interrupts which require a higher level of
2223 if (mask & AP_SIGF_PORTINT) {
2224 ahci_port_intr(ap, 1);
2225 ahci_port_interrupt_enable(ap);
2226 ahci_os_unlock_port(ap);
2227 } else if (ap->ap_probe != ATA_PROBE_FAILED) {
2228 ahci_port_intr(ap, 1);
2229 ahci_port_interrupt_enable(ap);
2230 ahci_os_unlock_port(ap);
2232 ahci_os_unlock_port(ap);
2237 * Core per-port interrupt handler.
2239 * If blockable is 0 we cannot call ahci_os_sleep() at all and we can only
2240 * deal with normal command completions which do not require blocking.
2243 ahci_port_intr(struct ahci_port *ap, int blockable)
2245 struct ahci_softc *sc = ap->ap_sc;
2246 u_int32_t is, ci_saved, ci_masked;
2248 struct ahci_ccb *ccb = NULL;
2249 struct ata_port *ccb_at = NULL;
2250 volatile u_int32_t *active;
2251 const u_int32_t blockable_mask = AHCI_PREG_IS_TFES |
2259 enum { NEED_NOTHING, NEED_RESTART, NEED_HOTPLUG_INSERT,
2260 NEED_HOTPLUG_REMOVE } need = NEED_NOTHING;
2263 * All basic command completions are always processed.
2265 is = ahci_pread(ap, AHCI_PREG_IS);
2266 if (is & AHCI_PREG_IS_DPS)
2267 ahci_pwrite(ap, AHCI_PREG_IS, is & AHCI_PREG_IS_DPS);
2270 * If we can't block then we can't handle these here. Disable
2271 * the interrupts in question so we don't live-lock, the helper
2272 * thread will re-enable them.
2274 * If the port is in a completely failed state we do not want
2275 * to drop through to failed-command-processing if blockable is 0,
2276 * just let the thread deal with it all.
2278 * Otherwise we fall through and still handle DHRS and any commands
2279 * which completed normally. Even if we are errored we haven't
2280 * stopped the port yet so CI/SACT are still good.
2282 if (blockable == 0) {
2283 if (ap->ap_state == AP_S_FATAL_ERROR) {
2284 ahci_pwrite(ap, AHCI_PREG_IE, 0);
2285 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2288 if (is & blockable_mask) {
2289 ahci_pwrite(ap, AHCI_PREG_IE, 0);
2290 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2296 * Either NCQ or non-NCQ commands will be active, never both.
2298 if (ap->ap_sactive) {
2299 KKASSERT(ap->ap_active == 0);
2300 KKASSERT(ap->ap_active_cnt == 0);
2301 ci_saved = ahci_pread(ap, AHCI_PREG_SACT);
2302 active = &ap->ap_sactive;
2304 ci_saved = ahci_pread(ap, AHCI_PREG_CI);
2305 active = &ap->ap_active;
2307 KKASSERT(!(ap->ap_sactive && ap->ap_active));
2309 kprintf("CHECK act=%08x/%08x sact=%08x/%08x\n",
2310 ap->ap_active, ahci_pread(ap, AHCI_PREG_CI),
2311 ap->ap_sactive, ahci_pread(ap, AHCI_PREG_SACT));
2314 /* ignore AHCI_PREG_IS_PRCS when link power management is on */
2315 if (ap->link_pwr_mgmt != AHCI_LINK_PWR_MGMT_NONE) {
2316 is &= ~AHCI_PREG_IS_PRCS;
2317 ahci_pwrite(ap, AHCI_PREG_SERR,
2318 AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_W);
2321 if (is & AHCI_PREG_IS_TFES) {
2323 * Command failed (blockable).
2325 * See AHCI 1.1 spec 6.2.2.1 and 6.2.2.2.
2327 * This stops command processing.
2329 u_int32_t tfd, serr;
2333 tfd = ahci_pread(ap, AHCI_PREG_TFD);
2334 serr = ahci_pread(ap, AHCI_PREG_SERR);
2337 * Load the error slot and restart command processing.
2338 * CLO if we need to. The error slot may not be valid.
2339 * MUST BE DONE BEFORE CLEARING ST!
2343 * It is unclear but we may have to clear SERR to reenable
2346 err_slot = AHCI_PREG_CMD_CCS(ahci_pread(ap, AHCI_PREG_CMD));
2347 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_TFES |
2351 is &= ~(AHCI_PREG_IS_TFES | AHCI_PREG_IS_PSS |
2352 AHCI_PREG_IS_DHRS | AHCI_PREG_IS_SDBS);
2353 ahci_pwrite(ap, AHCI_PREG_SERR, serr);
2354 ahci_port_stop(ap, 0);
2355 ahci_os_hardsleep(10);
2356 if (tfd & (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
2357 kprintf("%s: Issuing CLO\n", PORTNAME(ap));
2360 ahci_port_start(ap);
2361 need = NEED_RESTART;
2364 * ATAPI errors are fairly common from probing, just
2365 * report disk errors or if bootverbose is on.
2367 if (bootverbose || ap->ap_type != ATA_PORT_T_ATAPI) {
2368 kprintf("%s: TFES slot %d ci_saved = %08x\n",
2369 PORTNAME(ap), err_slot, ci_saved);
2373 * If we got an error on an error CCB just complete it
2374 * with an error. ci_saved has the mask to restart
2375 * (the err_ccb will be removed from it by finish_error).
2377 if (ap->ap_flags & AP_F_ERR_CCB_RESERVED) {
2378 err_slot = ap->ap_err_ccb->ccb_slot;
2383 * If NCQ commands were active get the error slot from
2384 * the log page. NCQ is not supported for PM's so this
2385 * is a direct-attached target.
2387 * Otherwise if no commands were active we have a problem.
2389 * Otherwise if the error slot is bad we have a problem.
2391 * Otherwise process the error for the slot.
2393 if (ap->ap_sactive) {
2394 err_slot = ahci_port_read_ncq_error(ap, 0);
2395 } else if (ap->ap_active == 0) {
2396 kprintf("%s: TFES with no commands pending\n",
2399 } else if (err_slot < 0 || err_slot >= ap->ap_sc->sc_ncmds) {
2400 kprintf("%s: bad error slot %d\n",
2401 PORTNAME(ap), err_slot);
2404 ccb = &ap->ap_ccbs[err_slot];
2407 * Validate the errored ccb. Note that ccb_at can
2408 * be NULL for direct-attached ccb's.
2410 * Copy received taskfile data from the RFIS.
2412 if (ccb->ccb_xa.state == ATA_S_ONCHIP) {
2413 ccb_at = ccb->ccb_xa.at;
2414 memcpy(&ccb->ccb_xa.rfis, ap->ap_rfis->rfis,
2415 sizeof(struct ata_fis_d2h));
2417 kprintf("%s: Copying rfis slot %d\n",
2418 ATANAME(ap, ccb_at), err_slot);
2421 kprintf("%s: Cannot copy rfis, CCB slot "
2422 "%d is not on-chip (state=%d)\n",
2423 ATANAME(ap, ccb->ccb_xa.at),
2424 err_slot, ccb->ccb_xa.state);
2430 * If we could not determine the errored slot then
2434 kprintf("%s: TFES: Unable to determine errored slot\n",
2436 if (ap->ap_flags & AP_F_IN_RESET)
2442 * Finish error on slot. We will restart ci_saved
2443 * commands except the errored slot which we generate
2447 ccb = &ap->ap_ccbs[err_slot];
2448 ci_saved &= ~(1 << err_slot);
2449 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
2450 ccb->ccb_xa.state = ATA_S_ERROR;
2451 } else if (is & AHCI_PREG_IS_DHRS) {
2453 * Command posted D2H register FIS to the rfis (non-blocking).
2455 * A normal completion with an error may set DHRS instead
2456 * of TFES. The CCS bits are only valid if ERR was set.
2457 * If ERR is set command processing was probably stopped.
2459 * If ERR was not set we can only copy-back data for
2460 * exclusive-mode commands because otherwise we won't know
2461 * which tag the rfis belonged to.
2463 * err_slot must be read from the CCS before any other port
2464 * action, such as stopping the port.
2466 * WARNING! This is not well documented in the AHCI spec.
2467 * It can be found in the state machine tables
2468 * but not in the explanations.
2474 tfd = ahci_pread(ap, AHCI_PREG_TFD);
2475 cmd = ahci_pread(ap, AHCI_PREG_CMD);
2477 if ((tfd & AHCI_PREG_TFD_STS_ERR) &&
2478 (cmd & AHCI_PREG_CMD_CR) == 0) {
2479 err_slot = AHCI_PREG_CMD_CCS(
2480 ahci_pread(ap, AHCI_PREG_CMD));
2481 ccb = &ap->ap_ccbs[err_slot];
2482 kprintf("%s: DHRS tfd=%b err_slot=%d cmd=%02x\n",
2484 tfd, AHCI_PFMT_TFD_STS,
2485 err_slot, ccb->ccb_xa.fis->command);
2489 * NO ELSE... copy back is in the normal command completion
2490 * code and only if no error occured and ATA_F_AUTOSENSE
2493 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_DHRS);
2497 * Device notification to us (non-blocking)
2499 * NOTE! On some parts notification bits can cause an IPMS
2500 * interrupt instead of a SDBS interrupt.
2502 * NOTE! On some parts (e.g. VBOX, probably intel ICHx),
2503 * SDBS notifies us of the completion of a NCQ command
2506 if (is & (AHCI_PREG_IS_SDBS | AHCI_PREG_IS_IPMS)) {
2509 ahci_pwrite(ap, AHCI_PREG_IS,
2510 AHCI_PREG_IS_SDBS | AHCI_PREG_IS_IPMS);
2511 if (sc->sc_cap & AHCI_REG_CAP_SSNTF) {
2512 data = ahci_pread(ap, AHCI_PREG_SNTF);
2514 ahci_pwrite(ap, AHCI_PREG_IS,
2516 kprintf("%s: NOTIFY %08x\n",
2517 PORTNAME(ap), data);
2518 ahci_pwrite(ap, AHCI_PREG_SERR,
2519 AHCI_PREG_SERR_DIAG_N);
2520 ahci_pwrite(ap, AHCI_PREG_SNTF, data);
2521 ahci_cam_changed(ap, NULL, -1);
2524 is &= ~(AHCI_PREG_IS_SDBS | AHCI_PREG_IS_IPMS);
2528 * Spurious IFS errors (blockable).
2530 * Spurious IFS errors can occur while we are doing a reset
2531 * sequence through a PM. Try to recover if we are being asked
2532 * to ignore IFS errors during these periods.
2534 if ((is & AHCI_PREG_IS_IFS) && (ap->ap_flags & AP_F_IGNORE_IFS)) {
2535 u_int32_t serr = ahci_pread(ap, AHCI_PREG_SERR);
2536 if ((ap->ap_flags & AP_F_IFS_IGNORED) == 0) {
2537 kprintf("%s: Ignoring IFS (XXX) (IS: %b, SERR: %b)\n",
2540 serr, AHCI_PFMT_SERR);
2541 ap->ap_flags |= AP_F_IFS_IGNORED;
2543 ap->ap_flags |= AP_F_IFS_OCCURED;
2544 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
2545 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS);
2546 is &= ~AHCI_PREG_IS_IFS;
2547 ahci_port_stop(ap, 0);
2548 ahci_port_start(ap);
2549 kprintf("%s: Spurious IFS error\n", PORTNAME(ap));
2551 /* need = NEED_RESTART; */
2555 * Port change (hot-plug) (blockable).
2557 * A PCS interrupt will occur on hot-plug once communication is
2560 * A PRCS interrupt will occur on hot-unplug (and possibly also
2563 * XXX We can then check the CPS (Cold Presence State) bit, if
2564 * supported, to determine if a device is plugged in or not and do
2567 * WARNING: A PCS interrupt is cleared by clearing DIAG_X, and
2568 * can also occur if an unsolicited COMINIT is received.
2569 * If this occurs command processing is automatically
2570 * stopped (CR goes inactive) and the port must be stopped
2574 if (is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS)) {
2575 kprintf("%s: Transient Errors: %b\n",
2576 PORTNAME(ap), is, AHCI_PFMT_IS);
2577 ahci_pwrite(ap, AHCI_PREG_SERR,
2578 (AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_X));
2579 ahci_pwrite(ap, AHCI_PREG_IS,
2580 is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS));
2581 is &= ~(AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS);
2582 ahci_port_stop(ap, 0);
2584 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
2585 case AHCI_PREG_SSTS_DET_DEV:
2586 if (ap->ap_probe == ATA_PROBE_FAILED) {
2587 need = NEED_HOTPLUG_INSERT;
2590 need = NEED_RESTART;
2593 if (ap->ap_probe != ATA_PROBE_FAILED) {
2594 need = NEED_HOTPLUG_REMOVE;
2597 need = NEED_RESTART;
2603 * Check for remaining errors - they are fatal. (blockable)
2605 if (is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS | AHCI_PREG_IS_IFS |
2606 AHCI_PREG_IS_OFS | AHCI_PREG_IS_UFS)) {
2609 ahci_pwrite(ap, AHCI_PREG_IS,
2610 is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2611 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2613 serr = ahci_pread(ap, AHCI_PREG_SERR);
2614 kprintf("%s: Unrecoverable errors (IS: %b, SERR: %b), "
2615 "disabling port.\n",
2618 serr, AHCI_PFMT_SERR
2620 is &= ~(AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2621 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2623 /* XXX try recovery first */
2628 * Fail all outstanding commands if we know the port won't recover.
2630 * We may have a ccb_at if the failed command is known and was
2631 * being sent to a device over a port multiplier (PM). In this
2632 * case if the port itself has not completely failed we fail just
2633 * the commands related to that target.
2635 * ci_saved contains the mask of active commands as of when the
2636 * error occured, prior to any port stops.
2638 if (ap->ap_state == AP_S_FATAL_ERROR) {
2640 ap->ap_state = AP_S_FATAL_ERROR;
2641 ahci_port_stop(ap, 0);
2643 kprintf("%s: Failing all commands\n", PORTNAME(ap));
2646 * Error all the active slots not already errored. If
2647 * running across a PM try to error out just the slots
2648 * related to the target.
2650 ci_masked = ci_saved & *active & ~ap->ap_expired;
2652 slot = ffs(ci_masked) - 1;
2653 ccb = &ap->ap_ccbs[slot];
2654 if (ccb_at == ccb->ccb_xa.at ||
2655 ap->ap_state == AP_S_FATAL_ERROR) {
2656 ccb->ccb_xa.state = ATA_S_TIMEOUT;
2657 ap->ap_expired |= 1 << slot;
2658 ci_saved &= ~(1 << slot);
2660 ci_masked &= ~(1 << slot);
2664 * Clear bits in ci_saved (cause completions to be run)
2665 * for all slots which are not active.
2667 ci_saved &= ~*active;
2670 * Don't restart the port if our problems were deemed fatal.
2672 * Also acknowlege all fatal interrupt sources to prevent
2675 if (ap->ap_state == AP_S_FATAL_ERROR) {
2676 if (need == NEED_RESTART)
2677 need = NEED_NOTHING;
2678 ahci_pwrite(ap, AHCI_PREG_IS,
2679 AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2680 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2686 * CCB completion (non blocking).
2688 * CCB completion is detected by noticing its slot's bit in CI has
2689 * changed to zero some time after we activated it.
2690 * If we are polling, we may only be interested in particular slot(s).
2692 * Any active bits not saved are completed within the restrictions
2693 * imposed by the caller.
2695 ci_masked = ~ci_saved & *active;
2697 slot = ffs(ci_masked) - 1;
2698 ccb = &ap->ap_ccbs[slot];
2699 ci_masked &= ~(1 << slot);
2701 DPRINTF(AHCI_D_INTR, "%s: slot %d is complete%s\n",
2702 PORTNAME(ap), slot, ccb->ccb_xa.state == ATA_S_ERROR ?
2705 bus_dmamap_sync(sc->sc_tag_cmdh,
2706 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
2707 BUS_DMASYNC_POSTWRITE);
2709 bus_dmamap_sync(sc->sc_tag_cmdt,
2710 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
2711 BUS_DMASYNC_POSTWRITE);
2713 bus_dmamap_sync(sc->sc_tag_rfis,
2714 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
2715 BUS_DMASYNC_POSTREAD);
2717 *active &= ~(1 << ccb->ccb_slot);
2718 if (active == &ap->ap_active) {
2719 KKASSERT(ap->ap_active_cnt > 0);
2720 --ap->ap_active_cnt;
2724 * Complete the ccb. If the ccb was marked expired it
2725 * was probably already removed from the command processor,
2726 * so don't take the clear ci_saved bit as meaning the
2727 * command actually succeeded, it didn't.
2729 if (ap->ap_expired & (1 << ccb->ccb_slot)) {
2730 ap->ap_expired &= ~(1 << ccb->ccb_slot);
2731 ccb->ccb_xa.state = ATA_S_TIMEOUT;
2733 ccb->ccb_xa.complete(&ccb->ccb_xa);
2735 if (ccb->ccb_xa.state == ATA_S_ONCHIP) {
2736 ccb->ccb_xa.state = ATA_S_COMPLETE;
2737 if (ccb->ccb_xa.flags & ATA_F_AUTOSENSE) {
2738 memcpy(&ccb->ccb_xa.rfis,
2740 sizeof(struct ata_fis_d2h));
2741 if (ccb->ccb_xa.state == ATA_S_TIMEOUT)
2742 ccb->ccb_xa.state = ATA_S_ERROR;
2748 ahci_issue_pending_commands(ap, NULL);
2751 * Cleanup. Will not be set if non-blocking.
2756 * A recoverable error occured and we can restart outstanding
2757 * commands on the port.
2759 ci_saved &= ~ap->ap_expired;
2761 kprintf("%s: Restart %08x\n", PORTNAME(ap), ci_saved);
2762 ahci_issue_saved_commands(ap, ci_saved);
2765 case NEED_HOTPLUG_INSERT:
2767 * A hot-plug insertion event has occured and all
2768 * outstanding commands have already been revoked.
2770 * Don't recurse if this occurs while we are
2771 * resetting the port.
2773 if ((ap->ap_flags & AP_F_IN_RESET) == 0) {
2774 kprintf("%s: HOTPLUG - Device inserted\n",
2776 ap->ap_probe = ATA_PROBE_NEED_INIT;
2777 ahci_cam_changed(ap, NULL, -1);
2780 case NEED_HOTPLUG_REMOVE:
2782 * A hot-plug removal event has occured and all
2783 * outstanding commands have already been revoked.
2785 * Don't recurse if this occurs while we are
2786 * resetting the port.
2788 if ((ap->ap_flags & AP_F_IN_RESET) == 0) {
2789 kprintf("%s: HOTPLUG - Device removed\n",
2791 ahci_port_hardstop(ap);
2792 /* ap_probe set to failed */
2793 ahci_cam_changed(ap, NULL, -1);
2802 ahci_get_ccb(struct ahci_port *ap)
2804 struct ahci_ccb *ccb;
2806 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
2807 ccb = TAILQ_FIRST(&ap->ap_ccb_free);
2809 KKASSERT(ccb->ccb_xa.state == ATA_S_PUT);
2810 TAILQ_REMOVE(&ap->ap_ccb_free, ccb, ccb_entry);
2811 ccb->ccb_xa.state = ATA_S_SETUP;
2812 ccb->ccb_xa.at = NULL;
2814 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
2820 ahci_put_ccb(struct ahci_ccb *ccb)
2822 struct ahci_port *ap = ccb->ccb_port;
2824 ccb->ccb_xa.state = ATA_S_PUT;
2825 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
2826 TAILQ_INSERT_TAIL(&ap->ap_ccb_free, ccb, ccb_entry);
2827 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
2831 ahci_get_err_ccb(struct ahci_port *ap)
2833 struct ahci_ccb *err_ccb;
2837 /* No commands may be active on the chip. */
2839 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SNCQ) {
2840 sact = ahci_pread(ap, AHCI_PREG_SACT);
2842 kprintf("%s: ahci_get_err_ccb but SACT %08x != 0?\n",
2843 PORTNAME(ap), sact);
2846 ci = ahci_pread(ap, AHCI_PREG_CI);
2848 kprintf("%s: ahci_get_err_ccb: ci not 0 (%08x)\n",
2852 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) == 0);
2853 ap->ap_flags |= AP_F_ERR_CCB_RESERVED;
2855 /* Save outstanding command state. */
2856 ap->ap_err_saved_active = ap->ap_active;
2857 ap->ap_err_saved_active_cnt = ap->ap_active_cnt;
2858 ap->ap_err_saved_sactive = ap->ap_sactive;
2861 * Pretend we have no commands outstanding, so that completions won't
2864 ap->ap_active = ap->ap_active_cnt = ap->ap_sactive = 0;
2867 * Grab a CCB to use for error recovery. This should never fail, as
2868 * we ask atascsi to reserve one for us at init time.
2870 err_ccb = ap->ap_err_ccb;
2871 KKASSERT(err_ccb != NULL);
2872 err_ccb->ccb_xa.flags = 0;
2873 err_ccb->ccb_done = ahci_empty_done;
2879 ahci_put_err_ccb(struct ahci_ccb *ccb)
2881 struct ahci_port *ap = ccb->ccb_port;
2885 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) != 0);
2888 * No commands may be active on the chip
2890 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SNCQ) {
2891 sact = ahci_pread(ap, AHCI_PREG_SACT);
2893 panic("ahci_port_err_ccb(%d) but SACT %08x != 0\n",
2894 ccb->ccb_slot, sact);
2897 ci = ahci_pread(ap, AHCI_PREG_CI);
2899 panic("ahci_put_err_ccb(%d) but CI %08x != 0 "
2900 "(act=%08x sact=%08x)\n",
2902 ap->ap_active, ap->ap_sactive);
2905 KKASSERT(ccb == ap->ap_err_ccb);
2907 /* Restore outstanding command state */
2908 ap->ap_sactive = ap->ap_err_saved_sactive;
2909 ap->ap_active_cnt = ap->ap_err_saved_active_cnt;
2910 ap->ap_active = ap->ap_err_saved_active;
2912 ap->ap_flags &= ~AP_F_ERR_CCB_RESERVED;
2916 * Read log page to get NCQ error.
2918 * NOTE: NCQ not currently supported on port multipliers. XXX
2921 ahci_port_read_ncq_error(struct ahci_port *ap, int target)
2923 struct ata_log_page_10h *log;
2924 struct ahci_ccb *ccb;
2925 struct ahci_ccb *ccb2;
2926 struct ahci_cmd_hdr *cmd_slot;
2927 struct ata_fis_h2d *fis;
2931 kprintf("%s: READ LOG PAGE target %d\n", PORTNAME(ap),
2936 * Prep error CCB for READ LOG EXT, page 10h, 1 sector.
2938 * Getting err_ccb clears active/sactive/active_cnt, putting
2939 * it back restores the fields.
2941 ccb = ahci_get_err_ccb(ap);
2942 ccb->ccb_xa.flags = ATA_F_READ | ATA_F_POLL;
2943 ccb->ccb_xa.data = ap->ap_err_scratch;
2944 ccb->ccb_xa.datalen = 512;
2945 ccb->ccb_xa.complete = ahci_dummy_done;
2946 ccb->ccb_xa.at = ap->ap_ata[target];
2948 fis = (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
2949 bzero(fis, sizeof(*fis));
2950 fis->type = ATA_FIS_TYPE_H2D;
2951 fis->flags = ATA_H2D_FLAGS_CMD | target;
2952 fis->command = ATA_C_READ_LOG_EXT;
2953 fis->lba_low = 0x10; /* queued error log page (10h) */
2954 fis->sector_count = 1; /* number of sectors (1) */
2955 fis->sector_count_exp = 0;
2956 fis->lba_mid = 0; /* starting offset */
2957 fis->lba_mid_exp = 0;
2960 cmd_slot = ccb->ccb_cmd_hdr;
2961 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
2963 if (ahci_load_prdt(ccb) != 0) {
2968 ccb->ccb_xa.state = ATA_S_PENDING;
2969 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
2971 ahci_unload_prdt(ccb);
2974 ahci_unload_prdt(ccb);
2977 * Success, extract failed register set and tags from the scratch
2980 log = (struct ata_log_page_10h *)ap->ap_err_scratch;
2981 if (log->err_regs.type & ATA_LOG_10H_TYPE_NOTQUEUED) {
2982 /* Not queued bit was set - wasn't an NCQ error? */
2983 kprintf("%s: read NCQ error page, but not an NCQ error?\n",
2987 /* Copy back the log record as a D2H register FIS. */
2988 err_slot = log->err_regs.type & ATA_LOG_10H_TYPE_TAG_MASK;
2990 ccb2 = &ap->ap_ccbs[err_slot];
2991 if (ccb2->ccb_xa.state == ATA_S_ONCHIP) {
2992 kprintf("%s: read NCQ error page slot=%d\n",
2993 ATANAME(ap, ccb2->ccb_xa.at),
2995 memcpy(&ccb2->ccb_xa.rfis, &log->err_regs,
2996 sizeof(struct ata_fis_d2h));
2997 ccb2->ccb_xa.rfis.type = ATA_FIS_TYPE_D2H;
2998 ccb2->ccb_xa.rfis.flags = 0;
3000 kprintf("%s: read NCQ error page slot=%d, "
3001 "slot does not match any cmds\n",
3002 ATANAME(ccb2->ccb_port, ccb2->ccb_xa.at),
3008 ahci_put_err_ccb(ccb);
3009 kprintf("%s: DONE log page target %d err_slot=%d\n",
3010 PORTNAME(ap), target, err_slot);
3015 * Allocate memory for various structures DMAd by hardware. The maximum
3016 * number of segments for these tags is 1 so the DMA memory will have a
3017 * single physical base address.
3019 struct ahci_dmamem *
3020 ahci_dmamem_alloc(struct ahci_softc *sc, bus_dma_tag_t tag)
3022 struct ahci_dmamem *adm;
3025 adm = kmalloc(sizeof(*adm), M_DEVBUF, M_INTWAIT | M_ZERO);
3027 error = bus_dmamem_alloc(tag, (void **)&adm->adm_kva,
3028 BUS_DMA_ZERO, &adm->adm_map);
3031 error = bus_dmamap_load(tag, adm->adm_map,
3033 bus_dma_tag_getmaxsize(tag),
3034 ahci_dmamem_saveseg, &adm->adm_busaddr,
3039 bus_dmamap_destroy(tag, adm->adm_map);
3040 adm->adm_map = NULL;
3041 adm->adm_tag = NULL;
3042 adm->adm_kva = NULL;
3044 kfree(adm, M_DEVBUF);
3052 ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error)
3054 KKASSERT(error == 0);
3055 KKASSERT(nsegs == 1);
3056 *(bus_addr_t *)info = segs->ds_addr;
3061 ahci_dmamem_free(struct ahci_softc *sc, struct ahci_dmamem *adm)
3064 bus_dmamap_unload(adm->adm_tag, adm->adm_map);
3065 bus_dmamap_destroy(adm->adm_tag, adm->adm_map);
3066 adm->adm_map = NULL;
3067 adm->adm_tag = NULL;
3068 adm->adm_kva = NULL;
3070 kfree(adm, M_DEVBUF);
3074 ahci_read(struct ahci_softc *sc, bus_size_t r)
3076 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
3077 BUS_SPACE_BARRIER_READ);
3078 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
3082 ahci_write(struct ahci_softc *sc, bus_size_t r, u_int32_t v)
3084 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
3085 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
3086 BUS_SPACE_BARRIER_WRITE);
3090 ahci_pread(struct ahci_port *ap, bus_size_t r)
3092 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
3093 BUS_SPACE_BARRIER_READ);
3094 return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
3098 ahci_pwrite(struct ahci_port *ap, bus_size_t r, u_int32_t v)
3100 bus_space_write_4(ap->ap_sc->sc_iot, ap->ap_ioh, r, v);
3101 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
3102 BUS_SPACE_BARRIER_WRITE);
3106 * Wait up to (timeout) milliseconds for the masked port register to
3109 * Timeout is in milliseconds.
3112 ahci_pwait_eq(struct ahci_port *ap, int timeout,
3113 bus_size_t r, u_int32_t mask, u_int32_t target)
3118 * Loop hard up to 100uS
3120 for (t = 0; t < 100; ++t) {
3121 if ((ahci_pread(ap, r) & mask) == target)
3123 ahci_os_hardsleep(1); /* us */
3127 timeout -= ahci_os_softsleep();
3128 if ((ahci_pread(ap, r) & mask) == target)
3130 } while (timeout > 0);
3135 ahci_wait_ne(struct ahci_softc *sc, bus_size_t r, u_int32_t mask,
3141 * Loop hard up to 100uS
3143 for (t = 0; t < 100; ++t) {
3144 if ((ahci_read(sc, r) & mask) != target)
3146 ahci_os_hardsleep(1); /* us */
3150 * And one millisecond the slow way
3154 t -= ahci_os_softsleep();
3155 if ((ahci_read(sc, r) & mask) != target)
3164 * Acquire an ata transfer.
3166 * Pass a NULL at for direct-attached transfers, and a non-NULL at for
3167 * targets that go through the port multiplier.
3170 ahci_ata_get_xfer(struct ahci_port *ap, struct ata_port *at)
3172 struct ahci_ccb *ccb;
3174 ccb = ahci_get_ccb(ap);
3176 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer: NULL ccb\n",
3181 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer got slot %d\n",
3182 PORTNAME(ap), ccb->ccb_slot);
3184 bzero(ccb->ccb_xa.fis, sizeof(*ccb->ccb_xa.fis));
3185 ccb->ccb_xa.at = at;
3186 ccb->ccb_xa.fis->type = ATA_FIS_TYPE_H2D;
3188 return (&ccb->ccb_xa);
3192 ahci_ata_put_xfer(struct ata_xfer *xa)
3194 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
3196 DPRINTF(AHCI_D_XFER, "ahci_ata_put_xfer slot %d\n", ccb->ccb_slot);
3202 ahci_ata_cmd(struct ata_xfer *xa)
3204 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
3205 struct ahci_cmd_hdr *cmd_slot;
3207 KKASSERT(xa->state == ATA_S_SETUP);
3209 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR)
3211 ccb->ccb_done = ahci_ata_cmd_done;
3213 cmd_slot = ccb->ccb_cmd_hdr;
3214 cmd_slot->flags = htole16(5); /* FIS length (in DWORDs) */
3215 if (ccb->ccb_xa.at) {
3216 cmd_slot->flags |= htole16(ccb->ccb_xa.at->at_target <<
3217 AHCI_CMD_LIST_FLAG_PMP_SHIFT);
3220 if (xa->flags & ATA_F_WRITE)
3221 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
3223 if (xa->flags & ATA_F_PACKET)
3224 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_A);
3226 if (ahci_load_prdt(ccb) != 0)
3229 xa->state = ATA_S_PENDING;
3231 if (xa->flags & ATA_F_POLL)
3232 return (ahci_poll(ccb, xa->timeout, ahci_ata_cmd_timeout));
3235 KKASSERT((xa->flags & ATA_F_TIMEOUT_EXPIRED) == 0);
3236 xa->flags |= ATA_F_TIMEOUT_DESIRED;
3243 xa->state = ATA_S_ERROR;
3246 return (ATA_S_ERROR);
3250 ahci_ata_cmd_done(struct ahci_ccb *ccb)
3252 struct ata_xfer *xa = &ccb->ccb_xa;
3255 * NOTE: callout does not lock port and may race us modifying
3256 * the flags, so make sure its stopped.
3258 if (xa->flags & ATA_F_TIMEOUT_RUNNING) {
3259 callout_stop(&ccb->ccb_timeout);
3260 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
3262 xa->flags &= ~(ATA_F_TIMEOUT_DESIRED | ATA_F_TIMEOUT_EXPIRED);
3264 KKASSERT(xa->state != ATA_S_ONCHIP);
3265 ahci_unload_prdt(ccb);
3267 if (xa->state != ATA_S_TIMEOUT)
3272 * Timeout from callout, MPSAFE - nothing can mess with the CCB's flags
3273 * while the callout is runing.
3275 * We can't safely get the port lock here or delay, we could block
3276 * the callout thread.
3279 ahci_ata_cmd_timeout_unserialized(void *arg)
3281 struct ahci_ccb *ccb = arg;
3282 struct ahci_port *ap = ccb->ccb_port;
3284 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
3285 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_EXPIRED;
3286 ahci_os_signal_port_thread(ap, AP_SIGF_TIMEOUT);
3290 * Timeout code, typically called when the port command processor is running.
3292 * We have to be very very careful here. We cannot stop the port unless
3293 * CR is already clear or the only active commands remaining are timed-out
3294 * ones. Otherwise stopping the port will race the command processor and
3295 * we can lose events. While we can theoretically just restart everything
3296 * that could result in a double-issue which will not work for ATAPI commands.
3299 ahci_ata_cmd_timeout(struct ahci_ccb *ccb)
3301 struct ata_xfer *xa = &ccb->ccb_xa;
3302 struct ahci_port *ap = ccb->ccb_port;
3303 struct ata_port *at;
3307 at = ccb->ccb_xa.at;
3309 kprintf("%s: CMD TIMEOUT state=%d slot=%d\n"
3311 "\tsactive=%08x active=%08x expired=%08x\n"
3312 "\t sact=%08x ci=%08x\n"
3315 ccb->ccb_xa.state, ccb->ccb_slot,
3316 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
3317 ap->ap_sactive, ap->ap_active, ap->ap_expired,
3318 ahci_pread(ap, AHCI_PREG_SACT),
3319 ahci_pread(ap, AHCI_PREG_CI),
3320 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS
3325 * NOTE: Timeout will not be running if the command was polled.
3326 * If we got here at least one of these flags should be set.
3328 KKASSERT(xa->flags & (ATA_F_POLL | ATA_F_TIMEOUT_DESIRED |
3329 ATA_F_TIMEOUT_RUNNING));
3330 xa->flags &= ~(ATA_F_TIMEOUT_RUNNING | ATA_F_TIMEOUT_EXPIRED);
3332 if (ccb->ccb_xa.state == ATA_S_PENDING) {
3333 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
3334 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3337 ahci_issue_pending_commands(ap, NULL);
3340 if (ccb->ccb_xa.state != ATA_S_ONCHIP) {
3341 kprintf("%s: Unexpected state during timeout: %d\n",
3342 ATANAME(ap, at), ccb->ccb_xa.state);
3347 * Ok, we can only get this command off the chip if CR is inactive
3348 * or if the only commands running on the chip are all expired.
3349 * Otherwise we have to wait until the port is in a safe state.
3351 * Do not set state here, it will cause polls to return when the
3352 * ccb is not yet off the chip.
3354 ap->ap_expired |= 1 << ccb->ccb_slot;
3356 if ((ahci_pread(ap, AHCI_PREG_CMD) & AHCI_PREG_CMD_CR) &&
3357 (ap->ap_active | ap->ap_sactive) != ap->ap_expired) {
3359 * If using FBSS or NCQ we can't safely stop the port
3362 kprintf("%s: Deferred timeout until its safe, slot %d\n",
3363 ATANAME(ap, at), ccb->ccb_slot);
3368 * We can safely stop the port and process all expired ccb's,
3369 * which will include our current ccb.
3371 ci_saved = (ap->ap_sactive) ? ahci_pread(ap, AHCI_PREG_SACT) :
3372 ahci_pread(ap, AHCI_PREG_CI);
3373 ahci_port_stop(ap, 0);
3375 while (ap->ap_expired) {
3376 slot = ffs(ap->ap_expired) - 1;
3377 ap->ap_expired &= ~(1 << slot);
3378 ci_saved &= ~(1 << slot);
3379 ccb = &ap->ap_ccbs[slot];
3380 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3381 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
3382 KKASSERT(ap->ap_sactive & (1 << slot));
3383 ap->ap_sactive &= ~(1 << slot);
3385 KKASSERT(ap->ap_active & (1 << slot));
3386 ap->ap_active &= ~(1 << slot);
3387 --ap->ap_active_cnt;
3390 ccb->ccb_xa.complete(&ccb->ccb_xa);
3392 /* ccb invalid now */
3395 * We can safely CLO the port to clear any BSY/DRQ, a case which
3396 * can occur with port multipliers. This will unbrick the port
3397 * and allow commands to other targets behind the PM continue.
3400 * Finally, once the port has been restarted we can issue any
3401 * previously saved pending commands, and run the port interrupt
3402 * code to handle any completions which may have occured when
3405 if (ahci_pread(ap, AHCI_PREG_TFD) &
3406 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
3407 kprintf("%s: Warning, issuing CLO after timeout\n",
3411 ahci_port_start(ap);
3412 ahci_issue_saved_commands(ap, ci_saved & ~ap->ap_expired);
3413 ahci_issue_pending_commands(ap, NULL);
3414 ahci_port_intr(ap, 0);
3418 * Issue a previously saved set of commands
3421 ahci_issue_saved_commands(struct ahci_port *ap, u_int32_t ci_saved)
3424 KKASSERT(!((ap->ap_active & ci_saved) &&
3425 (ap->ap_sactive & ci_saved)));
3426 KKASSERT((ci_saved & ap->ap_expired) == 0);
3427 if (ap->ap_sactive & ci_saved)
3428 ahci_pwrite(ap, AHCI_PREG_SACT, ci_saved);
3429 ahci_pwrite(ap, AHCI_PREG_CI, ci_saved);
3434 * Used by the softreset, pmprobe, and read_ncq_error only, in very
3435 * specialized, controlled circumstances.
3437 * Only one command may be pending.
3440 ahci_quick_timeout(struct ahci_ccb *ccb)
3442 struct ahci_port *ap = ccb->ccb_port;
3444 switch (ccb->ccb_xa.state) {
3446 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
3447 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3450 KKASSERT(ap->ap_active == (1 << ccb->ccb_slot) &&
3451 ap->ap_sactive == 0);
3452 ahci_port_stop(ap, 0);
3453 ahci_port_start(ap);
3455 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3456 ap->ap_active &= ~(1 << ccb->ccb_slot);
3457 KKASSERT(ap->ap_active_cnt > 0);
3458 --ap->ap_active_cnt;
3461 panic("%s: ahci_quick_timeout: ccb in bad state %d",
3462 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_xa.state);
3467 ahci_dummy_done(struct ata_xfer *xa)
3472 ahci_empty_done(struct ahci_ccb *ccb)
3477 ahci_set_feature(struct ahci_port *ap, struct ata_port *atx, int feature, int enable)
3479 struct ata_port *at;
3480 struct ata_xfer *xa;
3483 at = atx ? atx : ap->ap_ata[0];
3485 xa = ahci_ata_get_xfer(ap, atx);
3487 xa->fis->type = ATA_FIS_TYPE_H2D;
3488 xa->fis->flags = ATA_H2D_FLAGS_CMD | at->at_target;
3489 xa->fis->command = ATA_C_SET_FEATURES;
3490 xa->fis->features = enable ? ATA_C_SATA_FEATURE_ENA :
3491 ATA_C_SATA_FEATURE_DIS;
3492 xa->fis->sector_count = feature;
3493 xa->fis->control = ATA_FIS_CONTROL_4BIT;
3495 xa->complete = ahci_dummy_done;
3497 xa->flags = ATA_F_POLL;
3500 if (ahci_ata_cmd(xa) == ATA_S_COMPLETE)
3504 ahci_ata_put_xfer(xa);