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nrelease - fix/improve livecd
[dragonfly.git] / sys / dev / disk / mpt / mpilib / mpi_targ.h
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f582582c 1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_targ.h 233425 2012-03-24 16:23:21Z marius $ */
d751f32e 2/*-
4c42baf4 3 * Copyright (c) 2000-2010, LSI Logic Corporation and its contributors.
d751f32e 4 * All rights reserved.
984263bc
MD		 5 *
6 * Redistribution and use in source and binary forms, with or without
d751f32e
MD		 7 * modification, are permitted provided that the following conditions are
8 * met:
984263bc 9 * 1. Redistributions of source code must retain the above copyright
d751f32e
MD		 10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * substantially similar to the "NO WARRANTY" disclaimer below
13 * ("Disclaimer") and any redistribution must be conditioned upon including
14 * a substantially similar Disclaimer requirement for further binary
15 * redistribution.
16 * 3. Neither the name of the LSI Logic Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
984263bc 19 *
d751f32e
MD		 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
984263bc 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
d751f32e
MD		 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
984263bc 31 *
d751f32e 32 * Name: mpi_targ.h
984263bc
MD		 33 * Title: MPI Target mode messages and structures
34 * Creation Date: June 22, 2000
35 *
d751f32e 36 * mpi_targ.h Version: 01.05.06
984263bc
MD		 37 *
38 * Version History
39 * ---------------
40 *
41 * Date Version Description
42 * -------- -------- ------------------------------------------------------
43 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
44 * 06-06-00 01.00.01 Update version number for 1.0 release.
45 * 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure.
46 * Corrected DECSRIPTOR typo to DESCRIPTOR.
47 * 11-02-00 01.01.01 Original release for post 1.0 work
48 * Modified target mode to use IoIndex instead of
49 * HostIndex and IocIndex. Added Alias.
50 * 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER
51 * and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER.
52 * 02-20-01 01.01.03 Started using MPI_POINTER.
53 * Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and
54 * MPI_TARGET_FCP_CMD_BUFFER.
55 * 03-27-01 01.01.04 Added structure offset comments.
56 * 08-08-01 01.02.01 Original release for v1.2 work.
57 * 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU.
58 * Added PriorityReason field to some replies and
59 * defined more PriorityReason codes.
60 * Added some defines for to support previous version
61 * of MPI.
62 * 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY.
63 * 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY.
d751f32e
MD		 64 * 03-14-02 01.02.05 Modified MPI_TARGET_FCP_RSP_BUFFER to get the proper
65 * byte ordering.
66 * 05-31-02 01.02.06 Modified TARGET_MODE_REPLY_ALIAS_MASK to only include
67 * one bit.
68 * Added AliasIndex field to MPI_TARGET_FCP_CMD_BUFFER.
69 * 09-16-02 01.02.07 Added flags for confirmed completion.
70 * Added PRIORITY_REASON_TARGET_BUSY.
71 * 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER.
72 * 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER.
73 * 05-11-04 01.03.01 Original release for MPI v1.3.
74 * 08-19-04 01.05.01 Added new request message structures for
75 * MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
76 * MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, and
77 * MSG_TARGET_ASSIST_EXT_REQUEST.
78 * Added new structures for SAS SSP Command buffer, SSP
79 * Task buffer, and SSP Status IU.
80 * 10-05-04 01.05.02 MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY added.
81 * 02-22-05 01.05.03 Changed a comment.
82 * 03-11-05 01.05.04 Removed TargetAssistExtended Request.
83 * 06-24-05 01.05.05 Added TargetAssistExtended structures and defines.
84 * 03-27-06 01.05.06 Added a comment.
984263bc
MD		 85 * --------------------------------------------------------------------------
86 */
87
88#ifndef MPI_TARG_H
89#define MPI_TARG_H
90
91
92/******************************************************************************
93*
94* S C S I T a r g e t M e s s a g e s
95*
96*******************************************************************************/
97
98typedef struct _CMD_BUFFER_DESCRIPTOR
99{
100 U16 IoIndex; /* 00h */
101 U16 Reserved; /* 02h */
102 union /* 04h */
103 {
104 U32 PhysicalAddress32;
105 U64 PhysicalAddress64;
d751f32e 106 } u;
984263bc
MD		 107} CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR,
108 CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t;
109
110
111/****************************************************************************/
112/* Target Command Buffer Post Request */
113/****************************************************************************/
114
115typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST
116{
117 U8 BufferPostFlags; /* 00h */
118 U8 BufferCount; /* 01h */
119 U8 ChainOffset; /* 02h */
120 U8 Function; /* 03h */
121 U8 BufferLength; /* 04h */
122 U8 Reserved; /* 05h */
123 U8 Reserved1; /* 06h */
124 U8 MsgFlags; /* 07h */
125 U32 MsgContext; /* 08h */
126 CMD_BUFFER_DESCRIPTOR Buffer[1]; /* 0Ch */
127} MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST,
128 TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t;
129
130#define CMD_BUFFER_POST_FLAGS_PORT_MASK (0x01)
131#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK (0x80)
132#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32 (0)
133#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64 (1)
134#define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR (0x80)
135
136#define CMD_BUFFER_POST_IO_INDEX_MASK (0x00003FFF)
137#define CMD_BUFFER_POST_IO_INDEX_MASK_0100 (0x000003FF) /* obsolete */
138
139
140typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY
141{
142 U8 BufferPostFlags; /* 00h */
143 U8 BufferCount; /* 01h */
144 U8 MsgLength; /* 02h */
145 U8 Function; /* 03h */
146 U8 BufferLength; /* 04h */
147 U8 Reserved; /* 05h */
148 U8 Reserved1; /* 06h */
149 U8 MsgFlags; /* 07h */
150 U32 MsgContext; /* 08h */
151 U16 Reserved2; /* 0Ch */
152 U16 IOCStatus; /* 0Eh */
153 U32 IOCLogInfo; /* 10h */
154} MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY,
155 TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t;
156
157/* the following structure is obsolete as of MPI v1.2 */
158typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY
159{
160 U16 Reserved; /* 00h */
161 U8 MsgLength; /* 02h */
162 U8 Function; /* 03h */
163 U16 Reserved1; /* 04h */
164 U8 Reserved2; /* 06h */
165 U8 MsgFlags; /* 07h */
166 U32 MsgContext; /* 08h */
167 U8 PriorityReason; /* 0Ch */
168 U8 Reserved3; /* 0Dh */
169 U16 IOCStatus; /* 0Eh */
170 U32 IOCLogInfo; /* 10h */
171 U32 ReplyWord; /* 14h */
172} MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY,
173 PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t;
174
d751f32e
MD		 175
176typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
177{
178 U16 Reserved; /* 00h */
179 U8 MsgLength; /* 02h */
180 U8 Function; /* 03h */
181 U16 Reserved1; /* 04h */
182 U8 Reserved2; /* 06h */
183 U8 MsgFlags; /* 07h */
184 U32 MsgContext; /* 08h */
185 U8 PriorityReason; /* 0Ch */
186 U8 Reserved3; /* 0Dh */
187 U16 IOCStatus; /* 0Eh */
188 U32 IOCLogInfo; /* 10h */
189 U32 ReplyWord; /* 14h */
190} MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
191 MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
192 TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
193
984263bc
MD		 194#define PRIORITY_REASON_NO_DISCONNECT (0x00)
195#define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01)
196#define PRIORITY_REASON_CMD_PARITY_ERR (0x02)
197#define PRIORITY_REASON_MSG_OUT_PARITY_ERR (0x03)
198#define PRIORITY_REASON_LQ_CRC_ERR (0x04)
199#define PRIORITY_REASON_CMD_CRC_ERR (0x05)
200#define PRIORITY_REASON_PROTOCOL_ERR (0x06)
201#define PRIORITY_REASON_DATA_OUT_PARITY_ERR (0x07)
202#define PRIORITY_REASON_DATA_OUT_CRC_ERR (0x08)
d751f32e 203#define PRIORITY_REASON_TARGET_BUSY (0x09)
984263bc
MD		 204#define PRIORITY_REASON_UNKNOWN (0xFF)
205
206
d751f32e
MD		 207/****************************************************************************/
208/* Target Command Buffer Post Base Request */
209/****************************************************************************/
210
211typedef struct _MSG_TARGET_CMD_BUF_POST_BASE_REQUEST
212{
213 U8 BufferPostFlags; /* 00h */
214 U8 PortNumber; /* 01h */
215 U8 ChainOffset; /* 02h */
216 U8 Function; /* 03h */
217 U16 TotalCmdBuffers; /* 04h */
218 U8 Reserved; /* 06h */
219 U8 MsgFlags; /* 07h */
220 U32 MsgContext; /* 08h */
221 U32 Reserved1; /* 0Ch */
222 U16 CmdBufferLength; /* 10h */
223 U16 NextCmdBufferOffset; /* 12h */
224 U32 BaseAddressLow; /* 14h */
225 U32 BaseAddressHigh; /* 18h */
226} MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
227 MPI_POINTER PTR__MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
228 TargetCmdBufferPostBaseRequest_t,
229 MPI_POINTER pTargetCmdBufferPostBaseRequest_t;
230
231#define CMD_BUFFER_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
232
233
234typedef struct _MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY
984263bc
MD		 235{
236 U16 Reserved; /* 00h */
237 U8 MsgLength; /* 02h */
238 U8 Function; /* 03h */
239 U16 Reserved1; /* 04h */
240 U8 Reserved2; /* 06h */
241 U8 MsgFlags; /* 07h */
242 U32 MsgContext; /* 08h */
d751f32e 243 U16 Reserved3; /* 0Ch */
984263bc
MD		 244 U16 IOCStatus; /* 0Eh */
245 U32 IOCLogInfo; /* 10h */
d751f32e
MD		 246} MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
247 MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
248 TargetCmdBufferPostBaseListReply_t,
249 MPI_POINTER pTargetCmdBufferPostBaseListReply_t;
250
251
252/****************************************************************************/
253/* Target Command Buffer Post List Request */
254/****************************************************************************/
255
256typedef struct _MSG_TARGET_CMD_BUF_POST_LIST_REQUEST
257{
258 U8 Reserved; /* 00h */
259 U8 PortNumber; /* 01h */
260 U8 ChainOffset; /* 02h */
261 U8 Function; /* 03h */
262 U16 CmdBufferCount; /* 04h */
263 U8 Reserved1; /* 06h */
264 U8 MsgFlags; /* 07h */
265 U32 MsgContext; /* 08h */
266 U32 Reserved2; /* 0Ch */
267 U16 IoIndex[2]; /* 10h */
268} MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
269 MPI_POINTER PTR_MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
270 TargetCmdBufferPostListRequest_t,
271 MPI_POINTER pTargetCmdBufferPostListRequest_t;
984263bc
MD		 272
273
d751f32e
MD		 274/****************************************************************************/
275/* Command Buffer Formats (with 16 byte CDB) */
276/****************************************************************************/
277
984263bc
MD		 278typedef struct _MPI_TARGET_FCP_CMD_BUFFER
279{
280 U8 FcpLun[8]; /* 00h */
281 U8 FcpCntl[4]; /* 08h */
282 U8 FcpCdb[16]; /* 0Ch */
283 U32 FcpDl; /* 1Ch */
d751f32e
MD		 284 U8 AliasIndex; /* 20h */
285 U8 Reserved1; /* 21h */
286 U16 OptionalOxid; /* 22h */
984263bc
MD		 287} MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER,
288 MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer;
289
290
291typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER
292{
293 /* SPI L_Q information unit */
294 U8 L_QType; /* 00h */
295 U8 Reserved; /* 01h */
296 U16 Tag; /* 02h */
297 U8 LogicalUnitNumber[8]; /* 04h */
298 U32 DataLength; /* 0Ch */
299 /* SPI command information unit */
300 U8 ReservedFirstByteOfCommandIU; /* 10h */
301 U8 TaskAttribute; /* 11h */
302 U8 TaskManagementFlags; /* 12h */
303 U8 AdditionalCDBLength; /* 13h */
304 U8 CDB[16]; /* 14h */
d751f32e
MD		 305 /* Alias ID */
306 U8 AliasID; /* 24h */
307 U8 Reserved1; /* 25h */
308 U16 Reserved2; /* 26h */
984263bc
MD		 309} MPI_TARGET_SCSI_SPI_CMD_BUFFER,
310 MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER,
311 MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer;
312
313
d751f32e
MD		 314typedef struct _MPI_TARGET_SSP_CMD_BUFFER
315{
316 U8 FrameType; /* 00h */
317 U8 Reserved1; /* 01h */
318 U16 Reserved2; /* 02h */
319 U16 InitiatorTag; /* 04h */
320 U16 DevHandle; /* 06h */
321 /* COMMAND information unit starts here */
322 U8 LogicalUnitNumber[8]; /* 08h */
323 U8 Reserved3; /* 10h */
324 U8 TaskAttribute; /* lower 3 bits */ /* 11h */
325 U8 Reserved4; /* 12h */
326 U8 AdditionalCDBLength; /* upper 5 bits */ /* 13h */
327 U8 CDB[16]; /* 14h */
328 /* Additional CDB bytes extend past the CDB field */
329} MPI_TARGET_SSP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_CMD_BUFFER,
330 MpiTargetSspCmdBuffer, MPI_POINTER pMpiTargetSspCmdBuffer;
331
332typedef struct _MPI_TARGET_SSP_TASK_BUFFER
333{
334 U8 FrameType; /* 00h */
335 U8 Reserved1; /* 01h */
336 U16 Reserved2; /* 02h */
337 U16 InitiatorTag; /* 04h */
338 U16 DevHandle; /* 06h */
339 /* TASK information unit starts here */
340 U8 LogicalUnitNumber[8]; /* 08h */
341 U8 Reserved3; /* 10h */
342 U8 Reserved4; /* 11h */
343 U8 TaskManagementFunction; /* 12h */
344 U8 Reserved5; /* 13h */
345 U16 ManagedTaskTag; /* 14h */
346 U16 Reserved6; /* 16h */
347 U32 Reserved7; /* 18h */
348 U32 Reserved8; /* 1Ch */
349 U32 Reserved9; /* 20h */
350} MPI_TARGET_SSP_TASK_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_TASK_BUFFER,
351 MpiTargetSspTaskBuffer, MPI_POINTER pMpiTargetSspTaskBuffer;
352
353
984263bc
MD		 354/****************************************************************************/
355/* Target Assist Request */
356/****************************************************************************/
357
358typedef struct _MSG_TARGET_ASSIST_REQUEST
359{
360 U8 StatusCode; /* 00h */
361 U8 TargetAssistFlags; /* 01h */
362 U8 ChainOffset; /* 02h */
363 U8 Function; /* 03h */
364 U16 QueueTag; /* 04h */
365 U8 Reserved; /* 06h */
366 U8 MsgFlags; /* 07h */
367 U32 MsgContext; /* 08h */
368 U32 ReplyWord; /* 0Ch */
369 U8 LUN[8]; /* 10h */
370 U32 RelativeOffset; /* 18h */
371 U32 DataLength; /* 1Ch */
372 SGE_IO_UNION SGL[1]; /* 20h */
373} MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST,
374 TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t;
375
376#define TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
377#define TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
378#define TARGET_ASSIST_FLAGS_HIGH_PRIORITY (0x04)
d751f32e 379#define TARGET_ASSIST_FLAGS_CONFIRMED (0x08)
984263bc
MD		 380#define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
381
d751f32e 382/* Standard Target Mode Reply message */
984263bc
MD		 383typedef struct _MSG_TARGET_ERROR_REPLY
384{
385 U16 Reserved; /* 00h */
386 U8 MsgLength; /* 02h */
387 U8 Function; /* 03h */
388 U16 Reserved1; /* 04h */
389 U8 Reserved2; /* 06h */
390 U8 MsgFlags; /* 07h */
391 U32 MsgContext; /* 08h */
392 U8 PriorityReason; /* 0Ch */
393 U8 Reserved3; /* 0Dh */
394 U16 IOCStatus; /* 0Eh */
395 U32 IOCLogInfo; /* 10h */
396 U32 ReplyWord; /* 14h */
397 U32 TransferCount; /* 18h */
398} MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY,
399 TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t;
400
401
d751f32e
MD		 402/****************************************************************************/
403/* Target Assist Extended Request */
404/****************************************************************************/
405
406typedef struct _MSG_TARGET_ASSIST_EXT_REQUEST
407{
408 U8 StatusCode; /* 00h */
409 U8 TargetAssistFlags; /* 01h */
410 U8 ChainOffset; /* 02h */
411 U8 Function; /* 03h */
412 U16 QueueTag; /* 04h */
413 U8 Reserved1; /* 06h */
414 U8 MsgFlags; /* 07h */
415 U32 MsgContext; /* 08h */
416 U32 ReplyWord; /* 0Ch */
417 U8 LUN[8]; /* 10h */
418 U32 RelativeOffset; /* 18h */
419 U32 Reserved2; /* 1Ch */
420 U32 Reserved3; /* 20h */
421 U32 PrimaryReferenceTag; /* 24h */
422 U16 PrimaryApplicationTag; /* 28h */
423 U16 PrimaryApplicationTagMask; /* 2Ah */
424 U32 Reserved4; /* 2Ch */
425 U32 DataLength; /* 30h */
426 U32 BidirectionalDataLength; /* 34h */
427 U32 SecondaryReferenceTag; /* 38h */
428 U16 SecondaryApplicationTag; /* 3Ch */
429 U16 Reserved5; /* 3Eh */
430 U16 EEDPFlags; /* 40h */
431 U16 ApplicationTagTranslationMask; /* 42h */
432 U32 EEDPBlockSize; /* 44h */
433 U8 SGLOffset0; /* 48h */
434 U8 SGLOffset1; /* 49h */
435 U8 SGLOffset2; /* 4Ah */
436 U8 SGLOffset3; /* 4Bh */
437 U32 Reserved6; /* 4Ch */
438 SGE_IO_UNION SGL[1]; /* 50h */
439} MSG_TARGET_ASSIST_EXT_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_EXT_REQUEST,
440 TargetAssistExtRequest_t, MPI_POINTER pTargetAssistExtRequest_t;
441
442/* see the defines after MSG_TARGET_ASSIST_REQUEST for TargetAssistFlags */
443
444/* defines for the MsgFlags field */
445#define TARGET_ASSIST_EXT_MSGFLAGS_BIDIRECTIONAL (0x20)
446#define TARGET_ASSIST_EXT_MSGFLAGS_MULTICAST (0x10)
447#define TARGET_ASSIST_EXT_MSGFLAGS_SGL_OFFSET_CHAINS (0x08)
448
449/* defines for the EEDPFlags field */
450#define TARGET_ASSIST_EXT_EEDP_MASK_OP (0x0007)
451#define TARGET_ASSIST_EXT_EEDP_NOOP_OP (0x0000)
452#define TARGET_ASSIST_EXT_EEDP_CHK_OP (0x0001)
453#define TARGET_ASSIST_EXT_EEDP_STRIP_OP (0x0002)
454#define TARGET_ASSIST_EXT_EEDP_CHKRM_OP (0x0003)
455#define TARGET_ASSIST_EXT_EEDP_INSERT_OP (0x0004)
456#define TARGET_ASSIST_EXT_EEDP_REPLACE_OP (0x0006)
457#define TARGET_ASSIST_EXT_EEDP_CHKREGEN_OP (0x0007)
458
459#define TARGET_ASSIST_EXT_EEDP_PASS_REF_TAG (0x0008)
460
461#define TARGET_ASSIST_EXT_EEDP_T10_CHK_MASK (0x0700)
462#define TARGET_ASSIST_EXT_EEDP_T10_CHK_GUARD (0x0100)
463#define TARGET_ASSIST_EXT_EEDP_T10_CHK_APPTAG (0x0200)
464#define TARGET_ASSIST_EXT_EEDP_T10_CHK_REFTAG (0x0400)
465#define TARGET_ASSIST_EXT_EEDP_T10_CHK_SHIFT (8)
466
467#define TARGET_ASSIST_EXT_EEDP_INC_SEC_APPTAG (0x1000)
468#define TARGET_ASSIST_EXT_EEDP_INC_PRI_APPTAG (0x2000)
469#define TARGET_ASSIST_EXT_EEDP_INC_SEC_REFTAG (0x4000)
470#define TARGET_ASSIST_EXT_EEDP_INC_PRI_REFTAG (0x8000)
471
472
984263bc
MD		 473/****************************************************************************/
474/* Target Status Send Request */
475/****************************************************************************/
476
477typedef struct _MSG_TARGET_STATUS_SEND_REQUEST
478{
479 U8 StatusCode; /* 00h */
480 U8 StatusFlags; /* 01h */
481 U8 ChainOffset; /* 02h */
482 U8 Function; /* 03h */
483 U16 QueueTag; /* 04h */
484 U8 Reserved; /* 06h */
485 U8 MsgFlags; /* 07h */
486 U32 MsgContext; /* 08h */
487 U32 ReplyWord; /* 0Ch */
488 U8 LUN[8]; /* 10h */
489 SGE_SIMPLE_UNION StatusDataSGE; /* 18h */
490} MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST,
491 TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t;
492
493#define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01)
494#define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04)
d751f32e 495#define TARGET_STATUS_SEND_FLAGS_CONFIRMED (0x08)
984263bc
MD		 496#define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80)
497
d751f32e
MD		 498/*
499 * NOTE: FCP_RSP data is big-endian. When used on a little-endian system, this
500 * structure properly orders the bytes.
501 */
984263bc
MD		 502typedef struct _MPI_TARGET_FCP_RSP_BUFFER
503{
504 U8 Reserved0[8]; /* 00h */
d751f32e
MD		 505 U8 Reserved1[2]; /* 08h */
506 U8 FcpFlags; /* 0Ah */
507 U8 FcpStatus; /* 0Bh */
984263bc
MD		 508 U32 FcpResid; /* 0Ch */
509 U32 FcpSenseLength; /* 10h */
510 U32 FcpResponseLength; /* 14h */
511 U8 FcpResponseData[8]; /* 18h */
512 U8 FcpSenseData[32]; /* Pad to 64 bytes */ /* 20h */
513} MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER,
514 MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer;
515
d751f32e
MD		 516/*
517 * NOTE: The SPI status IU is big-endian. When used on a little-endian system,
518 * this structure properly orders the bytes.
519 */
984263bc
MD		 520typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU
521{
522 U8 Reserved0; /* 00h */
523 U8 Reserved1; /* 01h */
524 U8 Valid; /* 02h */
525 U8 Status; /* 03h */
526 U32 SenseDataListLength; /* 04h */
527 U32 PktFailuresListLength; /* 08h */
528 U8 SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */
529} MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU,
530 TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;
531
d751f32e
MD		 532/*
533 * NOTE: The SSP status IU is big-endian. When used on a little-endian system,
534 * this structure properly orders the bytes.
535 */
536typedef struct _MPI_TARGET_SSP_RSP_IU
537{
538 U32 Reserved0[6]; /* reserved for SSP header */ /* 00h */
539 /* start of RESPONSE information unit */
540 U32 Reserved1; /* 18h */
541 U32 Reserved2; /* 1Ch */
542 U16 Reserved3; /* 20h */
543 U8 DataPres; /* lower 2 bits */ /* 22h */
544 U8 Status; /* 23h */
545 U32 Reserved4; /* 24h */
546 U32 SenseDataLength; /* 28h */
547 U32 ResponseDataLength; /* 2Ch */
548 U8 ResponseSenseData[4]; /* 30h */
549} MPI_TARGET_SSP_RSP_IU, MPI_POINTER PTR_MPI_TARGET_SSP_RSP_IU,
550 MpiTargetSspRspIu_t, MPI_POINTER pMpiTargetSspRspIu_t;
551
552
984263bc
MD		 553/****************************************************************************/
554/* Target Mode Abort Request */
555/****************************************************************************/
556
557typedef struct _MSG_TARGET_MODE_ABORT_REQUEST
558{
559 U8 AbortType; /* 00h */
560 U8 Reserved; /* 01h */
561 U8 ChainOffset; /* 02h */
562 U8 Function; /* 03h */
563 U16 Reserved1; /* 04h */
564 U8 Reserved2; /* 06h */
565 U8 MsgFlags; /* 07h */
566 U32 MsgContext; /* 08h */
567 U32 ReplyWord; /* 0Ch */
568 U32 MsgContextToAbort; /* 10h */
569} MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT,
570 TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t;
571
572#define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00)
573#define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01)
574#define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02)
575#define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03)
576
577/* Target Mode Abort Reply */
578
579typedef struct _MSG_TARGET_MODE_ABORT_REPLY
580{
581 U16 Reserved; /* 00h */
582 U8 MsgLength; /* 02h */
583 U8 Function; /* 03h */
584 U16 Reserved1; /* 04h */
585 U8 Reserved2; /* 06h */
586 U8 MsgFlags; /* 07h */
587 U32 MsgContext; /* 08h */
588 U16 Reserved3; /* 0Ch */
589 U16 IOCStatus; /* 0Eh */
590 U32 IOCLogInfo; /* 10h */
591 U32 AbortCount; /* 14h */
592} MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY,
593 TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t;
594
595
596/****************************************************************************/
597/* Target Mode Context Reply */
598/****************************************************************************/
599
600#define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF)
601#define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0)
602#define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000)
603#define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14)
d751f32e 604#define TARGET_MODE_REPLY_ALIAS_MASK (0x04000000)
984263bc
MD		 605#define TARGET_MODE_REPLY_ALIAS_SHIFT (26)
606#define TARGET_MODE_REPLY_PORT_MASK (0x10000000)
607#define TARGET_MODE_REPLY_PORT_SHIFT (28)
608
609
610#define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \
611 >> TARGET_MODE_REPLY_IO_INDEX_SHIFT)
612
613#define SET_IO_INDEX(t, i) \
614 ((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \
615 (((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \
616 TARGET_MODE_REPLY_IO_INDEX_MASK))
617
618#define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \
619 >> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT)
620
621#define SET_INITIATOR_INDEX(t, ii) \
622 ((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \
623 (((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \
624 TARGET_MODE_REPLY_INITIATOR_INDEX_MASK))
625
626#define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \
627 >> TARGET_MODE_REPLY_ALIAS_SHIFT)
628
629#define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \
630 (((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \
631 TARGET_MODE_REPLY_ALIAS_MASK))
632
633#define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \
634 >> TARGET_MODE_REPLY_PORT_SHIFT)
635
636#define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \
637 (((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \
638 TARGET_MODE_REPLY_PORT_MASK))
639
640/* the following obsolete values are for MPI v1.0 support */
641#define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF)
642#define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0)
643#define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800)
644#define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11)
645#define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000)
646#define TARGET_MODE_REPLY_0100_PORT_SHIFT (22)
647#define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000)
648#define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23)
649
650#define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \
651 >> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX)
652
653#define SET_HOST_INDEX_0100(t, hi) \
654 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \
655 (((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \
656 TARGET_MODE_REPLY_0100_MASK_HOST_INDEX))
657
658#define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \
659 >> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX)
660
661#define SET_IOC_INDEX_0100(t, ii) \
662 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \
663 (((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \
664 TARGET_MODE_REPLY_0100_MASK_IOC_INDEX))
665
666#define GET_INITIATOR_INDEX_0100(x) \
667 (((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \
668 >> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX)
669
670#define SET_INITIATOR_INDEX_0100(t, ii) \
671 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \
672 (((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \
673 TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX))
674
675
676#endif
677
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