em(4): On TX path, make sure that ether header and ip.ip_hl are contiguous.
[dragonfly.git] / sys / dev / netif / em / if_em.c
1 /*
2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
3  *
4  * Copyright (c) 2001-2008, Intel Corporation
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are met:
9  *
10  *  1. Redistributions of source code must retain the above copyright notice,
11  *     this list of conditions and the following disclaimer.
12  *
13  *  2. Redistributions in binary form must reproduce the above copyright
14  *     notice, this list of conditions and the following disclaimer in the
15  *     documentation and/or other materials provided with the distribution.
16  *
17  *  3. Neither the name of the Intel Corporation nor the names of its
18  *     contributors may be used to endorse or promote products derived from
19  *     this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  *
33  *
34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
35  *
36  * This code is derived from software contributed to The DragonFly Project
37  * by Matthew Dillon <dillon@backplane.com>
38  *
39  * Redistribution and use in source and binary forms, with or without
40  * modification, are permitted provided that the following conditions
41  * are met:
42  *
43  * 1. Redistributions of source code must retain the above copyright
44  *    notice, this list of conditions and the following disclaimer.
45  * 2. Redistributions in binary form must reproduce the above copyright
46  *    notice, this list of conditions and the following disclaimer in
47  *    the documentation and/or other materials provided with the
48  *    distribution.
49  * 3. Neither the name of The DragonFly Project nor the names of its
50  *    contributors may be used to endorse or promote products derived
51  *    from this software without specific, prior written permission.
52  *
53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64  * SUCH DAMAGE.
65  *
66  * $DragonFly: src/sys/dev/netif/em/if_em.c,v 1.80 2008/09/17 08:51:29 sephe Exp $
67  */
68 /*
69  * SERIALIZATION API RULES:
70  *
71  * - If the driver uses the same serializer for the interrupt as for the
72  *   ifnet, most of the serialization will be done automatically for the
73  *   driver.
74  *
75  * - ifmedia entry points will be serialized by the ifmedia code using the
76  *   ifnet serializer.
77  *
78  * - if_* entry points except for if_input will be serialized by the IF
79  *   and protocol layers.
80  *
81  * - The device driver must be sure to serialize access from timeout code
82  *   installed by the device driver.
83  *
84  * - The device driver typically holds the serializer at the time it wishes
85  *   to call if_input.
86  *
87  * - We must call lwkt_serialize_handler_enable() prior to enabling the
88  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
89  *   the hardware interrupt in order to avoid handler execution races from
90  *   scheduled interrupt threads.
91  *
92  *   NOTE!  Since callers into the device driver hold the ifnet serializer,
93  *   the device driver may be holding a serializer at the time it calls
94  *   if_input even if it is not serializer-aware.
95  */
96
97 #include "opt_polling.h"
98 #include "opt_serializer.h"
99
100 #include <sys/param.h>
101 #include <sys/bus.h>
102 #include <sys/endian.h>
103 #include <sys/interrupt.h>
104 #include <sys/kernel.h>
105 #include <sys/ktr.h>
106 #include <sys/malloc.h>
107 #include <sys/mbuf.h>
108 #include <sys/proc.h>
109 #include <sys/rman.h>
110 #include <sys/serialize.h>
111 #include <sys/socket.h>
112 #include <sys/sockio.h>
113 #include <sys/sysctl.h>
114 #include <sys/systm.h>
115
116 #include <net/bpf.h>
117 #include <net/ethernet.h>
118 #include <net/if.h>
119 #include <net/if_arp.h>
120 #include <net/if_dl.h>
121 #include <net/if_media.h>
122 #include <net/ifq_var.h>
123 #include <net/vlan/if_vlan_var.h>
124 #include <net/vlan/if_vlan_ether.h>
125
126 #include <netinet/in_systm.h>
127 #include <netinet/in.h>
128 #include <netinet/ip.h>
129 #include <netinet/tcp.h>
130 #include <netinet/udp.h>
131
132 #include <bus/pci/pcivar.h>
133 #include <bus/pci/pcireg.h>
134
135 #include <dev/netif/ig_hal/e1000_api.h>
136 #include <dev/netif/ig_hal/e1000_82571.h>
137 #include <dev/netif/em/if_em.h>
138
139 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
140 #define EM_VER  " 6.9.6"
141
142 #define EM_DEVICE(id)   \
143         { EM_VENDOR_ID, E1000_DEV_ID_##id, EM_NAME #id EM_VER }
144 #define EM_DEVICE_NULL  { 0, 0, NULL }
145
146 static const struct em_vendor_info em_vendor_info_array[] = {
147         EM_DEVICE(82540EM),
148         EM_DEVICE(82540EM_LOM),
149         EM_DEVICE(82540EP),
150         EM_DEVICE(82540EP_LOM),
151         EM_DEVICE(82540EP_LP),
152
153         EM_DEVICE(82541EI),
154         EM_DEVICE(82541ER),
155         EM_DEVICE(82541ER_LOM),
156         EM_DEVICE(82541EI_MOBILE),
157         EM_DEVICE(82541GI),
158         EM_DEVICE(82541GI_LF),
159         EM_DEVICE(82541GI_MOBILE),
160
161         EM_DEVICE(82542),
162
163         EM_DEVICE(82543GC_FIBER),
164         EM_DEVICE(82543GC_COPPER),
165
166         EM_DEVICE(82544EI_COPPER),
167         EM_DEVICE(82544EI_FIBER),
168         EM_DEVICE(82544GC_COPPER),
169         EM_DEVICE(82544GC_LOM),
170
171         EM_DEVICE(82545EM_COPPER),
172         EM_DEVICE(82545EM_FIBER),
173         EM_DEVICE(82545GM_COPPER),
174         EM_DEVICE(82545GM_FIBER),
175         EM_DEVICE(82545GM_SERDES),
176
177         EM_DEVICE(82546EB_COPPER),
178         EM_DEVICE(82546EB_FIBER),
179         EM_DEVICE(82546EB_QUAD_COPPER),
180         EM_DEVICE(82546GB_COPPER),
181         EM_DEVICE(82546GB_FIBER),
182         EM_DEVICE(82546GB_SERDES),
183         EM_DEVICE(82546GB_PCIE),
184         EM_DEVICE(82546GB_QUAD_COPPER),
185         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
186
187         EM_DEVICE(82547EI),
188         EM_DEVICE(82547EI_MOBILE),
189         EM_DEVICE(82547GI),
190
191         EM_DEVICE(82571EB_COPPER),
192         EM_DEVICE(82571EB_FIBER),
193         EM_DEVICE(82571EB_SERDES),
194         EM_DEVICE(82571EB_SERDES_DUAL),
195         EM_DEVICE(82571EB_SERDES_QUAD),
196         EM_DEVICE(82571EB_QUAD_COPPER),
197         EM_DEVICE(82571EB_QUAD_COPPER_LP),
198         EM_DEVICE(82571EB_QUAD_FIBER),
199         EM_DEVICE(82571PT_QUAD_COPPER),
200
201         EM_DEVICE(82572EI_COPPER),
202         EM_DEVICE(82572EI_FIBER),
203         EM_DEVICE(82572EI_SERDES),
204         EM_DEVICE(82572EI),
205
206         EM_DEVICE(82573E),
207         EM_DEVICE(82573E_IAMT),
208         EM_DEVICE(82573L),
209
210         EM_DEVICE(80003ES2LAN_COPPER_SPT),
211         EM_DEVICE(80003ES2LAN_SERDES_SPT),
212         EM_DEVICE(80003ES2LAN_COPPER_DPT),
213         EM_DEVICE(80003ES2LAN_SERDES_DPT),
214
215         EM_DEVICE(ICH8_IGP_M_AMT),
216         EM_DEVICE(ICH8_IGP_AMT),
217         EM_DEVICE(ICH8_IGP_C),
218         EM_DEVICE(ICH8_IFE),
219         EM_DEVICE(ICH8_IFE_GT),
220         EM_DEVICE(ICH8_IFE_G),
221         EM_DEVICE(ICH8_IGP_M),
222
223         EM_DEVICE(ICH9_IGP_M_AMT),
224         EM_DEVICE(ICH9_IGP_AMT),
225         EM_DEVICE(ICH9_IGP_C),
226         EM_DEVICE(ICH9_IGP_M),
227         EM_DEVICE(ICH9_IGP_M_V),
228         EM_DEVICE(ICH9_IFE),
229         EM_DEVICE(ICH9_IFE_GT),
230         EM_DEVICE(ICH9_IFE_G),
231         EM_DEVICE(ICH9_BM),
232
233         EM_DEVICE(82574L),
234
235         EM_DEVICE(ICH10_R_BM_LM),
236         EM_DEVICE(ICH10_R_BM_LF),
237         EM_DEVICE(ICH10_R_BM_V),
238         EM_DEVICE(ICH10_D_BM_LM),
239         EM_DEVICE(ICH10_D_BM_LF),
240
241         /* required last entry */
242         EM_DEVICE_NULL
243 };
244
245 static int      em_probe(device_t);
246 static int      em_attach(device_t);
247 static int      em_detach(device_t);
248 static int      em_shutdown(device_t);
249 static int      em_suspend(device_t);
250 static int      em_resume(device_t);
251
252 static void     em_init(void *);
253 static void     em_stop(struct adapter *);
254 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
255 static void     em_start(struct ifnet *);
256 #ifdef DEVICE_POLLING
257 static void     em_poll(struct ifnet *, enum poll_cmd, int);
258 #endif
259 static void     em_watchdog(struct ifnet *);
260 static void     em_media_status(struct ifnet *, struct ifmediareq *);
261 static int      em_media_change(struct ifnet *);
262 static void     em_timer(void *);
263
264 static void     em_intr(void *);
265 static void     em_rxeof(struct adapter *, int);
266 static void     em_txeof(struct adapter *);
267 static void     em_tx_purge(struct adapter *);
268 static void     em_enable_intr(struct adapter *);
269 static void     em_disable_intr(struct adapter *);
270
271 static int      em_dma_malloc(struct adapter *, bus_size_t,
272                     struct em_dma_alloc *);
273 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
274 static void     em_init_tx_ring(struct adapter *);
275 static int      em_init_rx_ring(struct adapter *);
276 static int      em_create_tx_ring(struct adapter *);
277 static int      em_create_rx_ring(struct adapter *);
278 static void     em_destroy_tx_ring(struct adapter *, int);
279 static void     em_destroy_rx_ring(struct adapter *, int);
280 static int      em_newbuf(struct adapter *, int, int);
281 static int      em_encap(struct adapter *, struct mbuf **);
282 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
283                     struct mbuf *);
284 static int      em_txcsum_pullup(struct adapter *, struct mbuf **);
285 static void     em_txcsum(struct adapter *, struct mbuf *,
286                     uint32_t *, uint32_t *);
287
288 static int      em_get_hw_info(struct adapter *);
289 static int      em_is_valid_eaddr(const uint8_t *);
290 static int      em_alloc_pci_res(struct adapter *);
291 static void     em_free_pci_res(struct adapter *);
292 static int      em_hw_init(struct adapter *);
293 static void     em_setup_ifp(struct adapter *);
294 static void     em_init_tx_unit(struct adapter *);
295 static void     em_init_rx_unit(struct adapter *);
296 static void     em_update_stats(struct adapter *);
297 static void     em_set_promisc(struct adapter *);
298 static void     em_disable_promisc(struct adapter *);
299 static void     em_set_multi(struct adapter *);
300 static void     em_update_link_status(struct adapter *);
301 static void     em_smartspeed(struct adapter *);
302
303 /* Hardware workarounds */
304 static int      em_82547_fifo_workaround(struct adapter *, int);
305 static void     em_82547_update_fifo_head(struct adapter *, int);
306 static int      em_82547_tx_fifo_reset(struct adapter *);
307 static void     em_82547_move_tail(void *);
308 static void     em_82547_move_tail_serialized(struct adapter *);
309 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
310
311 static void     em_print_debug_info(struct adapter *);
312 static void     em_print_nvm_info(struct adapter *);
313 static void     em_print_hw_stats(struct adapter *);
314
315 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
316 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
317 static int      em_sysctl_int_delay(SYSCTL_HANDLER_ARGS);
318 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
319 static void     em_add_sysctl(struct adapter *adapter);
320 static void     em_add_int_delay_sysctl(struct adapter *, const char *,
321                     const char *, struct em_int_delay_info *, int, int);
322
323 /* Management and WOL Support */
324 static void     em_get_mgmt(struct adapter *);
325 static void     em_rel_mgmt(struct adapter *);
326 static void     em_get_hw_control(struct adapter *);
327 static void     em_rel_hw_control(struct adapter *);
328 static void     em_enable_wol(device_t);
329
330 static device_method_t em_methods[] = {
331         /* Device interface */
332         DEVMETHOD(device_probe,         em_probe),
333         DEVMETHOD(device_attach,        em_attach),
334         DEVMETHOD(device_detach,        em_detach),
335         DEVMETHOD(device_shutdown,      em_shutdown),
336         DEVMETHOD(device_suspend,       em_suspend),
337         DEVMETHOD(device_resume,        em_resume),
338         { 0, 0 }
339 };
340
341 static driver_t em_driver = {
342         "em",
343         em_methods,
344         sizeof(struct adapter),
345 };
346
347 static devclass_t em_devclass;
348
349 DECLARE_DUMMY_MODULE(if_em);
350 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
351 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, 0, 0);
352
353 /*********************************************************************
354  *  Tunable default values.
355  *********************************************************************/
356
357 #define EM_TICKS_TO_USECS(ticks)        ((1024 * (ticks) + 500) / 1000)
358 #define EM_USECS_TO_TICKS(usecs)        ((1000 * (usecs) + 512) / 1024)
359
360 static int      em_tx_int_delay_dflt = EM_TICKS_TO_USECS(EM_TIDV);
361 static int      em_rx_int_delay_dflt = EM_TICKS_TO_USECS(EM_RDTR);
362 static int      em_tx_abs_int_delay_dflt = EM_TICKS_TO_USECS(EM_TADV);
363 static int      em_rx_abs_int_delay_dflt = EM_TICKS_TO_USECS(EM_RADV);
364 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
365 static int      em_rxd = EM_DEFAULT_RXD;
366 static int      em_txd = EM_DEFAULT_TXD;
367 static int      em_smart_pwr_down = FALSE;
368
369 /* Controls whether promiscuous also shows bad packets */
370 static int      em_debug_sbp = FALSE;
371
372 TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt);
373 TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt);
374 TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt);
375 TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt);
376 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
377 TUNABLE_INT("hw.em.rxd", &em_rxd);
378 TUNABLE_INT("hw.em.txd", &em_txd);
379 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
380 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
381
382 /* Global used in WOL setup with multiport cards */
383 static int      em_global_quad_port_a = 0;
384
385 /* Set this to one to display debug statistics */
386 static int      em_display_debug_stats = 0;
387
388 #if !defined(KTR_IF_EM)
389 #define KTR_IF_EM       KTR_ALL
390 #endif
391 KTR_INFO_MASTER(if_em);
392 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin", 0);
393 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end", 0);
394 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet", 0);
395 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet", 0);
396 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean", 0);
397 #define logif(name)     KTR_LOG(if_em_ ## name)
398
399 static int
400 em_probe(device_t dev)
401 {
402         const struct em_vendor_info *ent;
403         uint16_t vid, did;
404
405         vid = pci_get_vendor(dev);
406         did = pci_get_device(dev);
407
408         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
409                 if (vid == ent->vendor_id && did == ent->device_id) {
410                         device_set_desc(dev, ent->desc);
411                         device_set_async_attach(dev, TRUE);
412                         return (0);
413                 }
414         }
415         return (ENXIO);
416 }
417
418 static int
419 em_attach(device_t dev)
420 {
421         struct adapter *adapter = device_get_softc(dev);
422         struct ifnet *ifp = &adapter->arpcom.ac_if;
423         int tsize, rsize;
424         int error = 0;
425         uint16_t eeprom_data, device_id;
426
427         adapter->dev = adapter->osdep.dev = dev;
428
429         callout_init(&adapter->timer);
430         callout_init(&adapter->tx_fifo_timer);
431
432         /* Determine hardware and mac info */
433         error = em_get_hw_info(adapter);
434         if (error) {
435                 device_printf(dev, "Identify hardware failed\n");
436                 goto fail;
437         }
438
439         /* Setup PCI resources */
440         error = em_alloc_pci_res(adapter);
441         if (error) {
442                 device_printf(dev, "Allocation of PCI resources failed\n");
443                 goto fail;
444         }
445
446         /*
447          * For ICH8 and family we need to map the flash memory,
448          * and this must happen after the MAC is identified.
449          */
450         if (adapter->hw.mac.type == e1000_ich8lan ||
451             adapter->hw.mac.type == e1000_ich10lan ||
452             adapter->hw.mac.type == e1000_ich9lan) {
453                 adapter->flash_rid = EM_BAR_FLASH;
454
455                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
456                                         &adapter->flash_rid, RF_ACTIVE);
457                 if (adapter->flash == NULL) {
458                         device_printf(dev, "Mapping of Flash failed\n");
459                         error = ENXIO;
460                         goto fail;
461                 }
462                 adapter->osdep.flash_bus_space_tag =
463                     rman_get_bustag(adapter->flash);
464                 adapter->osdep.flash_bus_space_handle =
465                     rman_get_bushandle(adapter->flash);
466
467                 /*
468                  * This is used in the shared code
469                  * XXX this goof is actually not used.
470                  */
471                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
472         }
473
474         /* Do Shared Code initialization */
475         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
476                 device_printf(dev, "Setup of Shared code failed\n");
477                 error = ENXIO;
478                 goto fail;
479         }
480
481         e1000_get_bus_info(&adapter->hw);
482
483         /*
484          * Validate number of transmit and receive descriptors.  It
485          * must not exceed hardware maximum, and must be multiple
486          * of E1000_DBA_ALIGN.
487          */
488         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
489             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
490             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
491             em_txd < EM_MIN_TXD) {
492                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
493                     EM_DEFAULT_TXD, em_txd);
494                 adapter->num_tx_desc = EM_DEFAULT_TXD;
495         } else {
496                 adapter->num_tx_desc = em_txd;
497         }
498         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
499             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
500             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
501             em_rxd < EM_MIN_RXD) {
502                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
503                     EM_DEFAULT_RXD, em_rxd);
504                 adapter->num_rx_desc = EM_DEFAULT_RXD;
505         } else {
506                 adapter->num_rx_desc = em_rxd;
507         }
508
509         adapter->hw.mac.autoneg = DO_AUTO_NEG;
510         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
511         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
512         adapter->rx_buffer_len = MCLBYTES;
513
514         /*
515          * Interrupt throttle rate
516          */
517         if (em_int_throttle_ceil == 0) {
518                 adapter->int_throttle_ceil = 0;
519         } else {
520                 int throttle = em_int_throttle_ceil;
521
522                 if (throttle < 0)
523                         throttle = EM_DEFAULT_ITR;
524
525                 /* Recalculate the tunable value to get the exact frequency. */
526                 throttle = 1000000000 / 256 / throttle;
527                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
528         }
529
530         e1000_init_script_state_82541(&adapter->hw, TRUE);
531         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
532
533         /* Copper options */
534         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
535                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
536                 adapter->hw.phy.disable_polarity_correction = FALSE;
537                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
538         }
539
540         /* Set the frame limits assuming standard ethernet sized frames. */
541         adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
542         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
543
544         /* This controls when hardware reports transmit completion status. */
545         adapter->hw.mac.report_tx_early = 1;
546
547         /*
548          * Create top level busdma tag
549          */
550         error = bus_dma_tag_create(NULL, 1, 0,
551                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
552                         NULL, NULL,
553                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
554                         0, &adapter->parent_dtag);
555         if (error) {
556                 device_printf(dev, "could not create top level DMA tag\n");
557                 goto fail;
558         }
559
560         /*
561          * Allocate Transmit Descriptor ring
562          */
563         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
564                          EM_DBA_ALIGN);
565         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
566         if (error) {
567                 device_printf(dev, "Unable to allocate tx_desc memory\n");
568                 goto fail;
569         }
570         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
571
572         /*
573          * Allocate Receive Descriptor ring
574          */
575         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
576                          EM_DBA_ALIGN);
577         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
578         if (error) {
579                 device_printf(dev, "Unable to allocate rx_desc memory\n");
580                 goto fail;
581         }
582         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
583
584         /* Make sure we have a good EEPROM before we read from it */
585         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
586                 /*
587                  * Some PCI-E parts fail the first check due to
588                  * the link being in sleep state, call it again,
589                  * if it fails a second time its a real issue.
590                  */
591                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
592                         device_printf(dev,
593                             "The EEPROM Checksum Is Not Valid\n");
594                         error = EIO;
595                         goto fail;
596                 }
597         }
598
599         /* Initialize the hardware */
600         error = em_hw_init(adapter);
601         if (error) {
602                 device_printf(dev, "Unable to initialize the hardware\n");
603                 goto fail;
604         }
605
606         /* Copy the permanent MAC address out of the EEPROM */
607         if (e1000_read_mac_addr(&adapter->hw) < 0) {
608                 device_printf(dev, "EEPROM read error while reading MAC"
609                     " address\n");
610                 error = EIO;
611                 goto fail;
612         }
613         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
614                 device_printf(dev, "Invalid MAC address\n");
615                 error = EIO;
616                 goto fail;
617         }
618
619         /* Allocate transmit descriptors and buffers */
620         error = em_create_tx_ring(adapter);
621         if (error) {
622                 device_printf(dev, "Could not setup transmit structures\n");
623                 goto fail;
624         }
625
626         /* Allocate receive descriptors and buffers */
627         error = em_create_rx_ring(adapter);
628         if (error) {
629                 device_printf(dev, "Could not setup receive structures\n");
630                 goto fail;
631         }
632
633         /* Manually turn off all interrupts */
634         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
635
636         /* Setup OS specific network interface */
637         em_setup_ifp(adapter);
638
639         /* Add sysctl tree, must after em_setup_ifp() */
640         em_add_sysctl(adapter);
641
642         /* Initialize statistics */
643         em_update_stats(adapter);
644
645         adapter->hw.mac.get_link_status = 1;
646         em_update_link_status(adapter);
647
648         /* Indicate SOL/IDER usage */
649         if (e1000_check_reset_block(&adapter->hw)) {
650                 device_printf(dev,
651                     "PHY reset is blocked due to SOL/IDER session.\n");
652         }
653
654         /* Determine if we have to control management hardware */
655         adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw);
656
657         /*
658          * Setup Wake-on-Lan
659          */
660         switch (adapter->hw.mac.type) {
661         case e1000_82542:
662         case e1000_82543:
663                 break;
664
665         case e1000_82546:
666         case e1000_82546_rev_3:
667         case e1000_82571:
668         case e1000_80003es2lan:
669                 if (adapter->hw.bus.func == 1) {
670                         e1000_read_nvm(&adapter->hw,
671                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
672                 } else {
673                         e1000_read_nvm(&adapter->hw,
674                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
675                 }
676                 eeprom_data &= EM_EEPROM_APME;
677                 break;
678
679         default:
680                 /* APME bit in EEPROM is mapped to WUC.APME */
681                 eeprom_data =
682                     E1000_READ_REG(&adapter->hw, E1000_WUC) & E1000_WUC_APME;
683                 break;
684         }
685         if (eeprom_data)
686                 adapter->wol = E1000_WUFC_MAG;
687         /*
688          * We have the eeprom settings, now apply the special cases
689          * where the eeprom may be wrong or the board won't support
690          * wake on lan on a particular port
691          */
692         device_id = pci_get_device(dev);
693         switch (device_id) {
694         case E1000_DEV_ID_82546GB_PCIE:
695                 adapter->wol = 0;
696                 break;
697
698         case E1000_DEV_ID_82546EB_FIBER:
699         case E1000_DEV_ID_82546GB_FIBER:
700         case E1000_DEV_ID_82571EB_FIBER:
701                 /*
702                  * Wake events only supported on port A for dual fiber
703                  * regardless of eeprom setting
704                  */
705                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
706                     E1000_STATUS_FUNC_1)
707                         adapter->wol = 0;
708                 break;
709
710         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
711         case E1000_DEV_ID_82571EB_QUAD_COPPER:
712         case E1000_DEV_ID_82571EB_QUAD_FIBER:
713         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
714                 /* if quad port adapter, disable WoL on all but port A */
715                 if (em_global_quad_port_a != 0)
716                         adapter->wol = 0;
717                 /* Reset for multiple quad port adapters */
718                 if (++em_global_quad_port_a == 4)
719                         em_global_quad_port_a = 0;
720                 break;
721         }
722
723         /* XXX disable wol */
724         adapter->wol = 0;
725
726         /* Do we need workaround for 82544 PCI-X adapter? */
727         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
728             adapter->hw.mac.type == e1000_82544)
729                 adapter->pcix_82544 = TRUE;
730         else
731                 adapter->pcix_82544 = FALSE;
732
733         if (adapter->pcix_82544) {
734                 /*
735                  * 82544 on PCI-X may split one TX segment
736                  * into two TX descs, so we double its number
737                  * of spare TX desc here.
738                  */
739                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
740         } else {
741                 adapter->spare_tx_desc = EM_TX_SPARE;
742         }
743
744         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
745                                em_intr, adapter, &adapter->intr_tag,
746                                ifp->if_serializer);
747         if (error) {
748                 device_printf(dev, "Failed to register interrupt handler");
749                 ether_ifdetach(&adapter->arpcom.ac_if);
750                 goto fail;
751         }
752
753         ifp->if_cpuid = ithread_cpuid(rman_get_start(adapter->intr_res));
754         KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus);
755         return (0);
756 fail:
757         em_detach(dev);
758         return (error);
759 }
760
761 static int
762 em_detach(device_t dev)
763 {
764         struct adapter *adapter = device_get_softc(dev);
765
766         if (device_is_attached(dev)) {
767                 struct ifnet *ifp = &adapter->arpcom.ac_if;
768
769                 lwkt_serialize_enter(ifp->if_serializer);
770
771                 adapter->in_detach = 1;
772                 em_stop(adapter);
773
774                 e1000_phy_hw_reset(&adapter->hw);
775
776                 em_rel_mgmt(adapter);
777
778                 if ((adapter->hw.mac.type == e1000_82573 ||
779                      adapter->hw.mac.type == e1000_ich8lan ||
780                      adapter->hw.mac.type == e1000_ich10lan ||
781                      adapter->hw.mac.type == e1000_ich9lan) &&
782                     e1000_check_mng_mode(&adapter->hw))
783                         em_rel_hw_control(adapter);
784
785                 if (adapter->wol) {
786                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
787                                         E1000_WUC_PME_EN);
788                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
789                         em_enable_wol(dev);
790                 }
791
792                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
793
794                 lwkt_serialize_exit(ifp->if_serializer);
795
796                 ether_ifdetach(ifp);
797         }
798         bus_generic_detach(dev);
799
800         em_free_pci_res(adapter);
801
802         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
803         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
804
805         /* Free Transmit Descriptor ring */
806         if (adapter->tx_desc_base)
807                 em_dma_free(adapter, &adapter->txdma);
808
809         /* Free Receive Descriptor ring */
810         if (adapter->rx_desc_base)
811                 em_dma_free(adapter, &adapter->rxdma);
812
813         /* Free top level busdma tag */
814         if (adapter->parent_dtag != NULL)
815                 bus_dma_tag_destroy(adapter->parent_dtag);
816
817         /* Free sysctl tree */
818         if (adapter->sysctl_tree != NULL)
819                 sysctl_ctx_free(&adapter->sysctl_ctx);
820
821         return (0);
822 }
823
824 static int
825 em_shutdown(device_t dev)
826 {
827         return em_suspend(dev);
828 }
829
830 static int
831 em_suspend(device_t dev)
832 {
833         struct adapter *adapter = device_get_softc(dev);
834         struct ifnet *ifp = &adapter->arpcom.ac_if;
835
836         lwkt_serialize_enter(ifp->if_serializer);
837
838         em_stop(adapter);
839
840         em_rel_mgmt(adapter);
841
842         if ((adapter->hw.mac.type == e1000_82573 ||
843              adapter->hw.mac.type == e1000_ich8lan ||
844              adapter->hw.mac.type == e1000_ich10lan ||
845              adapter->hw.mac.type == e1000_ich9lan) &&
846             e1000_check_mng_mode(&adapter->hw))
847                 em_rel_hw_control(adapter);
848
849         if (adapter->wol) {
850                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
851                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
852                 em_enable_wol(dev);
853         }
854
855         lwkt_serialize_exit(ifp->if_serializer);
856
857         return bus_generic_suspend(dev);
858 }
859
860 static int
861 em_resume(device_t dev)
862 {
863         struct adapter *adapter = device_get_softc(dev);
864         struct ifnet *ifp = &adapter->arpcom.ac_if;
865
866         lwkt_serialize_enter(ifp->if_serializer);
867
868         em_init(adapter);
869         em_get_mgmt(adapter);
870         if_devstart(ifp);
871
872         lwkt_serialize_exit(ifp->if_serializer);
873
874         return bus_generic_resume(dev);
875 }
876
877 static void
878 em_start(struct ifnet *ifp)
879 {
880         struct adapter *adapter = ifp->if_softc;
881         struct mbuf *m_head;
882
883         ASSERT_SERIALIZED(ifp->if_serializer);
884
885         if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
886                 return;
887
888         if (!adapter->link_active) {
889                 ifq_purge(&ifp->if_snd);
890                 return;
891         }
892
893         while (!ifq_is_empty(&ifp->if_snd)) {
894                 /*
895                  * Force a cleanup if number of TX descriptors
896                  * available hits the threshold
897                  */
898                 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
899                         em_txeof(adapter);
900
901                         /* Now do we at least have a minimal? */
902                         if (EM_IS_OACTIVE(adapter)) {
903                                 adapter->no_tx_desc_avail1++;
904                                 ifp->if_flags |= IFF_OACTIVE;
905                                 break;
906                         }
907                 }
908
909                 logif(pkt_txqueue);
910                 m_head = ifq_dequeue(&ifp->if_snd, NULL);
911                 if (m_head == NULL)
912                         break;
913
914                 if (em_encap(adapter, &m_head)) {
915                         ifp->if_oerrors++;
916                         if (adapter->num_tx_desc_avail ==
917                             adapter->num_tx_desc) {
918                                 continue;
919                         } else {
920                                 ifp->if_flags |= IFF_OACTIVE;
921                                 break;
922                         }
923                 }
924
925                 /* Send a copy of the frame to the BPF listener */
926                 ETHER_BPF_MTAP(ifp, m_head);
927
928                 /* Set timeout in case hardware has problems transmitting. */
929                 ifp->if_timer = EM_TX_TIMEOUT;
930         }
931 }
932
933 static int
934 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
935 {
936         struct adapter *adapter = ifp->if_softc;
937         struct ifreq *ifr = (struct ifreq *)data;
938         uint16_t eeprom_data = 0;
939         int max_frame_size, mask, reinit;
940         int error = 0;
941
942         if (adapter->in_detach)
943                 return (error);
944
945         ASSERT_SERIALIZED(ifp->if_serializer);
946
947         switch (command) {
948         case SIOCSIFMTU:
949                 switch (adapter->hw.mac.type) {
950                 case e1000_82573:
951                         /*
952                          * 82573 only supports jumbo frames
953                          * if ASPM is disabled.
954                          */
955                         e1000_read_nvm(&adapter->hw,
956                             NVM_INIT_3GIO_3, 1, &eeprom_data);
957                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
958                                 max_frame_size = ETHER_MAX_LEN;
959                                 break;
960                         }
961                         /* FALL THROUGH */
962
963                 /* Limit Jumbo Frame size */
964                 case e1000_82571:
965                 case e1000_82572:
966                 case e1000_ich9lan:
967                 case e1000_ich10lan:
968                 case e1000_82574:
969                 case e1000_80003es2lan:
970                         max_frame_size = 9234;
971                         break;
972
973                 /* Adapters that do not support jumbo frames */
974                 case e1000_82542:
975                 case e1000_ich8lan:
976                         max_frame_size = ETHER_MAX_LEN;
977                         break;
978
979                 default:
980                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
981                         break;
982                 }
983                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
984                     ETHER_CRC_LEN) {
985                         error = EINVAL;
986                         break;
987                 }
988
989                 ifp->if_mtu = ifr->ifr_mtu;
990                 adapter->max_frame_size =
991                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
992
993                 if (ifp->if_flags & IFF_RUNNING)
994                         em_init(adapter);
995                 break;
996
997         case SIOCSIFFLAGS:
998                 if (ifp->if_flags & IFF_UP) {
999                         if ((ifp->if_flags & IFF_RUNNING)) {
1000                                 if ((ifp->if_flags ^ adapter->if_flags) &
1001                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1002                                         em_disable_promisc(adapter);
1003                                         em_set_promisc(adapter);
1004                                 }
1005                         } else {
1006                                 em_init(adapter);
1007                         }
1008                 } else if (ifp->if_flags & IFF_RUNNING) {
1009                         em_stop(adapter);
1010                 }
1011                 adapter->if_flags = ifp->if_flags;
1012                 break;
1013
1014         case SIOCADDMULTI:
1015         case SIOCDELMULTI:
1016                 if (ifp->if_flags & IFF_RUNNING) {
1017                         em_disable_intr(adapter);
1018                         em_set_multi(adapter);
1019                         if (adapter->hw.mac.type == e1000_82542 &&
1020                             adapter->hw.revision_id == E1000_REVISION_2)
1021                                 em_init_rx_unit(adapter);
1022 #ifdef DEVICE_POLLING
1023                         if (!(ifp->if_flags & IFF_POLLING))
1024 #endif
1025                                 em_enable_intr(adapter);
1026                 }
1027                 break;
1028
1029         case SIOCSIFMEDIA:
1030                 /* Check SOL/IDER usage */
1031                 if (e1000_check_reset_block(&adapter->hw)) {
1032                         device_printf(adapter->dev, "Media change is"
1033                             " blocked due to SOL/IDER session.\n");
1034                         break;
1035                 }
1036                 /* FALL THROUGH */
1037
1038         case SIOCGIFMEDIA:
1039                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1040                 break;
1041
1042         case SIOCSIFCAP:
1043                 reinit = 0;
1044                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1045                 if (mask & IFCAP_HWCSUM) {
1046                         ifp->if_capenable ^= (mask & IFCAP_HWCSUM);
1047                         reinit = 1;
1048                 }
1049                 if (mask & IFCAP_VLAN_HWTAGGING) {
1050                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1051                         reinit = 1;
1052                 }
1053                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1054                         em_init(adapter);
1055                 break;
1056
1057         default:
1058                 error = ether_ioctl(ifp, command, data);
1059                 break;
1060         }
1061         return (error);
1062 }
1063
1064 static void
1065 em_watchdog(struct ifnet *ifp)
1066 {
1067         struct adapter *adapter = ifp->if_softc;
1068
1069         ASSERT_SERIALIZED(ifp->if_serializer);
1070
1071         /*
1072          * The timer is set to 5 every time start queues a packet.
1073          * Then txeof keeps resetting it as long as it cleans at
1074          * least one descriptor.
1075          * Finally, anytime all descriptors are clean the timer is
1076          * set to 0.
1077          */
1078
1079         /*
1080          * If we are in this routine because of pause frames, then
1081          * don't reset the hardware.
1082          */
1083         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1084             E1000_STATUS_TXOFF) {
1085                 ifp->if_timer = EM_TX_TIMEOUT;
1086                 return;
1087         }
1088
1089         if (e1000_check_for_link(&adapter->hw) == 0)
1090                 if_printf(ifp, "watchdog timeout -- resetting\n");
1091
1092         ifp->if_oerrors++;
1093         adapter->watchdog_events++;
1094
1095         em_init(adapter);
1096
1097         if (!ifq_is_empty(&ifp->if_snd))
1098                 if_devstart(ifp);
1099 }
1100
1101 static void
1102 em_init(void *xsc)
1103 {
1104         struct adapter *adapter = xsc;
1105         struct ifnet *ifp = &adapter->arpcom.ac_if;
1106         device_t dev = adapter->dev;
1107         uint32_t pba;
1108
1109         ASSERT_SERIALIZED(ifp->if_serializer);
1110
1111         em_stop(adapter);
1112
1113         /*
1114          * Packet Buffer Allocation (PBA)
1115          * Writing PBA sets the receive portion of the buffer
1116          * the remainder is used for the transmit buffer.
1117          *
1118          * Devices before the 82547 had a Packet Buffer of 64K.
1119          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1120          * After the 82547 the buffer was reduced to 40K.
1121          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1122          *   Note: default does not leave enough room for Jumbo Frame >10k.
1123          */
1124         switch (adapter->hw.mac.type) {
1125         case e1000_82547:
1126         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1127                 if (adapter->max_frame_size > 8192)
1128                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1129                 else
1130                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1131                 adapter->tx_fifo_head = 0;
1132                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1133                 adapter->tx_fifo_size =
1134                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1135                 break;
1136
1137         /* Total Packet Buffer on these is 48K */
1138         case e1000_82571:
1139         case e1000_82572:
1140         case e1000_80003es2lan:
1141                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1142                 break;
1143
1144         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1145                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1146                 break;
1147
1148         case e1000_82574:
1149                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1150                 break;
1151
1152         case e1000_ich9lan:
1153         case e1000_ich10lan:
1154 #define E1000_PBA_10K   0x000A
1155                 pba = E1000_PBA_10K;
1156                 break;
1157
1158         case e1000_ich8lan:
1159                 pba = E1000_PBA_8K;
1160                 break;
1161
1162         default:
1163                 /* Devices before 82547 had a Packet Buffer of 64K.   */
1164                 if (adapter->max_frame_size > 8192)
1165                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1166                 else
1167                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1168         }
1169
1170         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1171         
1172         /* Get the latest mac address, User can use a LAA */
1173         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1174
1175         /* Put the address into the Receive Address Array */
1176         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1177
1178         /*
1179          * With the 82571 adapter, RAR[0] may be overwritten
1180          * when the other port is reset, we make a duplicate
1181          * in RAR[14] for that eventuality, this assures
1182          * the interface continues to function.
1183          */
1184         if (adapter->hw.mac.type == e1000_82571) {
1185                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1186                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1187                     E1000_RAR_ENTRIES - 1);
1188         }
1189
1190         /* Initialize the hardware */
1191         if (em_hw_init(adapter)) {
1192                 device_printf(dev, "Unable to initialize the hardware\n");
1193                 /* XXX em_stop()? */
1194                 return;
1195         }
1196         em_update_link_status(adapter);
1197
1198         /* Setup VLAN support, basic and offload if available */
1199         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1200
1201         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1202                 uint32_t ctrl;
1203
1204                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1205                 ctrl |= E1000_CTRL_VME;
1206                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1207         }
1208
1209         /* Set hardware offload abilities */
1210         if (ifp->if_capenable & IFCAP_TXCSUM)
1211                 ifp->if_hwassist = EM_CSUM_FEATURES;
1212         else
1213                 ifp->if_hwassist = 0;
1214
1215         /* Configure for OS presence */
1216         em_get_mgmt(adapter);
1217
1218         /* Prepare transmit descriptors and buffers */
1219         em_init_tx_ring(adapter);
1220         em_init_tx_unit(adapter);
1221
1222         /* Setup Multicast table */
1223         em_set_multi(adapter);
1224
1225         /* Prepare receive descriptors and buffers */
1226         if (em_init_rx_ring(adapter)) {
1227                 device_printf(dev, "Could not setup receive structures\n");
1228                 em_stop(adapter);
1229                 return;
1230         }
1231         em_init_rx_unit(adapter);
1232
1233         /* Don't lose promiscuous settings */
1234         em_set_promisc(adapter);
1235
1236         ifp->if_flags |= IFF_RUNNING;
1237         ifp->if_flags &= ~IFF_OACTIVE;
1238
1239         callout_reset(&adapter->timer, hz, em_timer, adapter);
1240         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1241
1242         /* MSI/X configuration for 82574 */
1243         if (adapter->hw.mac.type == e1000_82574) {
1244                 int tmp;
1245
1246                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1247                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1248                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1249                 /*
1250                  * Set the IVAR - interrupt vector routing.
1251                  * Each nibble represents a vector, high bit
1252                  * is enable, other 3 bits are the MSIX table
1253                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1254                  * Link (other) to 2, hence the magic number.
1255                  */
1256                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1257         }
1258
1259 #ifdef DEVICE_POLLING
1260         /*
1261          * Only enable interrupts if we are not polling, make sure
1262          * they are off otherwise.
1263          */
1264         if (ifp->if_flags & IFF_POLLING)
1265                 em_disable_intr(adapter);
1266         else
1267 #endif /* DEVICE_POLLING */
1268                 em_enable_intr(adapter);
1269
1270         /* Don't reset the phy next time init gets called */
1271         adapter->hw.phy.reset_disable = TRUE;
1272 }
1273
1274 #ifdef DEVICE_POLLING
1275
1276 static void
1277 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1278 {
1279         struct adapter *adapter = ifp->if_softc;
1280         uint32_t reg_icr;
1281
1282         ASSERT_SERIALIZED(ifp->if_serializer);
1283
1284         switch (cmd) {
1285         case POLL_REGISTER:
1286                 em_disable_intr(adapter);
1287                 break;
1288
1289         case POLL_DEREGISTER:
1290                 em_enable_intr(adapter);
1291                 break;
1292
1293         case POLL_AND_CHECK_STATUS:
1294                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1295                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1296                         callout_stop(&adapter->timer);
1297                         adapter->hw.mac.get_link_status = 1;
1298                         em_update_link_status(adapter);
1299                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1300                 }
1301                 /* FALL THROUGH */
1302         case POLL_ONLY:
1303                 if (ifp->if_flags & IFF_RUNNING) {
1304                         em_rxeof(adapter, count);
1305                         em_txeof(adapter);
1306
1307                         if (!ifq_is_empty(&ifp->if_snd))
1308                                 if_devstart(ifp);
1309                 }
1310                 break;
1311         }
1312 }
1313
1314 #endif /* DEVICE_POLLING */
1315
1316 static void
1317 em_intr(void *xsc)
1318 {
1319         struct adapter *adapter = xsc;
1320         struct ifnet *ifp = &adapter->arpcom.ac_if;
1321         uint32_t reg_icr;
1322
1323         logif(intr_beg);
1324         ASSERT_SERIALIZED(ifp->if_serializer);
1325
1326         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1327
1328         if ((adapter->hw.mac.type >= e1000_82571 &&
1329              (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1330             reg_icr == 0) {
1331                 logif(intr_end);
1332                 return;
1333         }
1334
1335         /*
1336          * XXX: some laptops trigger several spurious interrupts
1337          * on em(4) when in the resume cycle. The ICR register
1338          * reports all-ones value in this case. Processing such
1339          * interrupts would lead to a freeze. I don't know why.
1340          */
1341         if (reg_icr == 0xffffffff) {
1342                 logif(intr_end);
1343                 return;
1344         }
1345
1346         if (ifp->if_flags & IFF_RUNNING) {
1347                 em_rxeof(adapter, -1);
1348                 em_txeof(adapter);
1349         }
1350
1351         /* Link status change */
1352         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1353                 callout_stop(&adapter->timer);
1354                 adapter->hw.mac.get_link_status = 1;
1355                 em_update_link_status(adapter);
1356
1357                 /* Deal with TX cruft when link lost */
1358                 em_tx_purge(adapter);
1359
1360                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1361         }
1362
1363         if (reg_icr & E1000_ICR_RXO)
1364                 adapter->rx_overruns++;
1365
1366         if ((ifp->if_flags & IFF_RUNNING) && !ifq_is_empty(&ifp->if_snd))
1367                 if_devstart(ifp);
1368
1369         logif(intr_end);
1370 }
1371
1372 static void
1373 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1374 {
1375         struct adapter *adapter = ifp->if_softc;
1376         u_char fiber_type = IFM_1000_SX;
1377
1378         ASSERT_SERIALIZED(ifp->if_serializer);
1379
1380         em_update_link_status(adapter);
1381
1382         ifmr->ifm_status = IFM_AVALID;
1383         ifmr->ifm_active = IFM_ETHER;
1384
1385         if (!adapter->link_active)
1386                 return;
1387
1388         ifmr->ifm_status |= IFM_ACTIVE;
1389
1390         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1391             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1392                 if (adapter->hw.mac.type == e1000_82545)
1393                         fiber_type = IFM_1000_LX;
1394                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1395         } else {
1396                 switch (adapter->link_speed) {
1397                 case 10:
1398                         ifmr->ifm_active |= IFM_10_T;
1399                         break;
1400                 case 100:
1401                         ifmr->ifm_active |= IFM_100_TX;
1402                         break;
1403
1404                 case 1000:
1405                         ifmr->ifm_active |= IFM_1000_T;
1406                         break;
1407                 }
1408                 if (adapter->link_duplex == FULL_DUPLEX)
1409                         ifmr->ifm_active |= IFM_FDX;
1410                 else
1411                         ifmr->ifm_active |= IFM_HDX;
1412         }
1413 }
1414
1415 static int
1416 em_media_change(struct ifnet *ifp)
1417 {
1418         struct adapter *adapter = ifp->if_softc;
1419         struct ifmedia *ifm = &adapter->media;
1420
1421         ASSERT_SERIALIZED(ifp->if_serializer);
1422
1423         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1424                 return (EINVAL);
1425
1426         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1427         case IFM_AUTO:
1428                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1429                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1430                 break;
1431
1432         case IFM_1000_LX:
1433         case IFM_1000_SX:
1434         case IFM_1000_T:
1435                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1436                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1437                 break;
1438
1439         case IFM_100_TX:
1440                 adapter->hw.mac.autoneg = FALSE;
1441                 adapter->hw.phy.autoneg_advertised = 0;
1442                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1443                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1444                 else
1445                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1446                 break;
1447
1448         case IFM_10_T:
1449                 adapter->hw.mac.autoneg = FALSE;
1450                 adapter->hw.phy.autoneg_advertised = 0;
1451                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1452                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1453                 else
1454                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1455                 break;
1456
1457         default:
1458                 if_printf(ifp, "Unsupported media type\n");
1459                 break;
1460         }
1461
1462         /*
1463          * As the speed/duplex settings my have changed we need to
1464          * reset the PHY.
1465          */
1466         adapter->hw.phy.reset_disable = FALSE;
1467
1468         em_init(adapter);
1469
1470         return (0);
1471 }
1472
1473 static int
1474 em_encap(struct adapter *adapter, struct mbuf **m_headp)
1475 {
1476         bus_dma_segment_t segs[EM_MAX_SCATTER];
1477         bus_dmamap_t map;
1478         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1479         struct e1000_tx_desc *ctxd = NULL;
1480         struct mbuf *m_head = *m_headp;
1481         uint32_t txd_upper, txd_lower, txd_used;
1482         int maxsegs, nsegs, i, j, first, last = 0, error;
1483
1484         if (__predict_false(m_head->m_len < EM_TXCSUM_MINHL) &&
1485             (m_head->m_flags & EM_CSUM_FEATURES)) {
1486                 /*
1487                  * Make sure that ethernet header and ip.ip_hl are in
1488                  * contiguous memory, since if TXCSUM is enabled, later
1489                  * TX context descriptor's setup need to access ip.ip_hl.
1490                  */
1491                 error = em_txcsum_pullup(adapter, m_headp);
1492                 if (error) {
1493                         KKASSERT(*m_headp == NULL);
1494                         return error;
1495                 }
1496                 m_head = *m_headp;
1497         }
1498
1499         txd_upper = txd_lower = 0;
1500         txd_used = 0;
1501
1502         /*
1503          * Capture the first descriptor index, this descriptor
1504          * will have the index of the EOP which is the only one
1505          * that now gets a DONE bit writeback.
1506          */
1507         first = adapter->next_avail_tx_desc;
1508         tx_buffer = &adapter->tx_buffer_area[first];
1509         tx_buffer_mapped = tx_buffer;
1510         map = tx_buffer->map;
1511
1512         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1513         KASSERT(maxsegs >= adapter->spare_tx_desc,
1514                 ("not enough spare TX desc\n"));
1515         if (adapter->pcix_82544) {
1516                 /* Half it; see the comment in em_attach() */
1517                 maxsegs >>= 1;
1518         }
1519         if (maxsegs > EM_MAX_SCATTER)
1520                 maxsegs = EM_MAX_SCATTER;
1521
1522         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1523                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1524         if (error) {
1525                 if (error == ENOBUFS)
1526                         adapter->mbuf_alloc_failed++;
1527                 else
1528                         adapter->no_tx_dma_setup++;
1529
1530                 m_freem(*m_headp);
1531                 *m_headp = NULL;
1532                 return error;
1533         }
1534         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1535
1536         m_head = *m_headp;
1537
1538         if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1539                 /* TX csum offloading will consume one TX desc */
1540                 em_txcsum(adapter, m_head, &txd_upper, &txd_lower);
1541         }
1542         i = adapter->next_avail_tx_desc;
1543
1544         /* Set up our transmit descriptors */
1545         for (j = 0; j < nsegs; j++) {
1546                 /* If adapter is 82544 and on PCIX bus */
1547                 if(adapter->pcix_82544) {
1548                         DESC_ARRAY desc_array;
1549                         uint32_t array_elements, counter;
1550
1551                         /*
1552                          * Check the Address and Length combination and
1553                          * split the data accordingly
1554                          */
1555                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1556                                                 segs[j].ds_len, &desc_array);
1557                         for (counter = 0; counter < array_elements; counter++) {
1558                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1559
1560                                 tx_buffer = &adapter->tx_buffer_area[i];
1561                                 ctxd = &adapter->tx_desc_base[i];
1562
1563                                 ctxd->buffer_addr = htole64(
1564                                     desc_array.descriptor[counter].address);
1565                                 ctxd->lower.data = htole32(
1566                                     adapter->txd_cmd | txd_lower |
1567                                     desc_array.descriptor[counter].length);
1568                                 ctxd->upper.data = htole32(txd_upper);
1569
1570                                 last = i;
1571                                 if (++i == adapter->num_tx_desc)
1572                                         i = 0;
1573
1574                                 tx_buffer->m_head = NULL;
1575                                 tx_buffer->next_eop = -1;
1576                                 txd_used++;
1577                         }
1578                 } else {
1579                         tx_buffer = &adapter->tx_buffer_area[i];
1580                         ctxd = &adapter->tx_desc_base[i];
1581
1582                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1583                         ctxd->lower.data = htole32(adapter->txd_cmd |
1584                                                    txd_lower | segs[j].ds_len);
1585                         ctxd->upper.data = htole32(txd_upper);
1586
1587                         last = i;
1588                         if (++i == adapter->num_tx_desc)
1589                                 i = 0;
1590
1591                         tx_buffer->m_head = NULL;
1592                         tx_buffer->next_eop = -1;
1593                 }
1594         }
1595
1596         adapter->next_avail_tx_desc = i;
1597         if (adapter->pcix_82544) {
1598                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1599                 adapter->num_tx_desc_avail -= txd_used;
1600         } else {
1601                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1602                 adapter->num_tx_desc_avail -= nsegs;
1603         }
1604
1605         /* Handle VLAN tag */
1606         if (m_head->m_flags & M_VLANTAG) {
1607                 /* Set the vlan id. */
1608                 ctxd->upper.fields.special =
1609                     htole16(m_head->m_pkthdr.ether_vlantag);
1610
1611                 /* Tell hardware to add tag */
1612                 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1613         }
1614
1615         tx_buffer->m_head = m_head;
1616         tx_buffer_mapped->map = tx_buffer->map;
1617         tx_buffer->map = map;
1618
1619         /*
1620          * Last Descriptor of Packet needs End Of Packet (EOP)
1621          * and Report Status (RS)
1622          */
1623         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS);
1624
1625         /*
1626          * Keep track in the first buffer which descriptor will be
1627          * written back
1628          */
1629         tx_buffer = &adapter->tx_buffer_area[first];
1630         tx_buffer->next_eop = last;
1631
1632         /*
1633          * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1634          * that this frame is available to transmit.
1635          */
1636         if (adapter->hw.mac.type == e1000_82547 &&
1637             adapter->link_duplex == HALF_DUPLEX) {
1638                 em_82547_move_tail_serialized(adapter);
1639         } else {
1640                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1641                 if (adapter->hw.mac.type == e1000_82547) {
1642                         em_82547_update_fifo_head(adapter,
1643                             m_head->m_pkthdr.len);
1644                 }
1645         }
1646         return (0);
1647 }
1648
1649 /*
1650  * 82547 workaround to avoid controller hang in half-duplex environment.
1651  * The workaround is to avoid queuing a large packet that would span
1652  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1653  * in this case.  We do that only when FIFO is quiescent.
1654  */
1655 static void
1656 em_82547_move_tail_serialized(struct adapter *adapter)
1657 {
1658         struct e1000_tx_desc *tx_desc;
1659         uint16_t hw_tdt, sw_tdt, length = 0;
1660         bool eop = 0;
1661
1662         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1663
1664         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1665         sw_tdt = adapter->next_avail_tx_desc;
1666
1667         while (hw_tdt != sw_tdt) {
1668                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1669                 length += tx_desc->lower.flags.length;
1670                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1671                 if (++hw_tdt == adapter->num_tx_desc)
1672                         hw_tdt = 0;
1673
1674                 if (eop) {
1675                         if (em_82547_fifo_workaround(adapter, length)) {
1676                                 adapter->tx_fifo_wrk_cnt++;
1677                                 callout_reset(&adapter->tx_fifo_timer, 1,
1678                                         em_82547_move_tail, adapter);
1679                                 break;
1680                         }
1681                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1682                         em_82547_update_fifo_head(adapter, length);
1683                         length = 0;
1684                 }
1685         }
1686 }
1687
1688 static void
1689 em_82547_move_tail(void *xsc)
1690 {
1691         struct adapter *adapter = xsc;
1692         struct ifnet *ifp = &adapter->arpcom.ac_if;
1693
1694         lwkt_serialize_enter(ifp->if_serializer);
1695         em_82547_move_tail_serialized(adapter);
1696         lwkt_serialize_exit(ifp->if_serializer);
1697 }
1698
1699 static int
1700 em_82547_fifo_workaround(struct adapter *adapter, int len)
1701 {       
1702         int fifo_space, fifo_pkt_len;
1703
1704         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1705
1706         if (adapter->link_duplex == HALF_DUPLEX) {
1707                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1708
1709                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1710                         if (em_82547_tx_fifo_reset(adapter))
1711                                 return (0);
1712                         else
1713                                 return (1);
1714                 }
1715         }
1716         return (0);
1717 }
1718
1719 static void
1720 em_82547_update_fifo_head(struct adapter *adapter, int len)
1721 {
1722         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1723
1724         /* tx_fifo_head is always 16 byte aligned */
1725         adapter->tx_fifo_head += fifo_pkt_len;
1726         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1727                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1728 }
1729
1730 static int
1731 em_82547_tx_fifo_reset(struct adapter *adapter)
1732 {
1733         uint32_t tctl;
1734
1735         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1736              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1737             (E1000_READ_REG(&adapter->hw, E1000_TDFT) == 
1738              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1739             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1740              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1741             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1742                 /* Disable TX unit */
1743                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1744                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1745                     tctl & ~E1000_TCTL_EN);
1746
1747                 /* Reset FIFO pointers */
1748                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1749                     adapter->tx_head_addr);
1750                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1751                     adapter->tx_head_addr);
1752                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1753                     adapter->tx_head_addr);
1754                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1755                     adapter->tx_head_addr);
1756
1757                 /* Re-enable TX unit */
1758                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1759                 E1000_WRITE_FLUSH(&adapter->hw);
1760
1761                 adapter->tx_fifo_head = 0;
1762                 adapter->tx_fifo_reset_cnt++;
1763
1764                 return (TRUE);
1765         } else {
1766                 return (FALSE);
1767         }
1768 }
1769
1770 static void
1771 em_set_promisc(struct adapter *adapter)
1772 {
1773         struct ifnet *ifp = &adapter->arpcom.ac_if;
1774         uint32_t reg_rctl;
1775
1776         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1777
1778         if (ifp->if_flags & IFF_PROMISC) {
1779                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1780                 /* Turn this on if you want to see bad packets */
1781                 if (em_debug_sbp)
1782                         reg_rctl |= E1000_RCTL_SBP;
1783                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1784         } else if (ifp->if_flags & IFF_ALLMULTI) {
1785                 reg_rctl |= E1000_RCTL_MPE;
1786                 reg_rctl &= ~E1000_RCTL_UPE;
1787                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1788         }
1789 }
1790
1791 static void
1792 em_disable_promisc(struct adapter *adapter)
1793 {
1794         uint32_t reg_rctl;
1795
1796         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1797
1798         reg_rctl &= ~E1000_RCTL_UPE;
1799         reg_rctl &= ~E1000_RCTL_MPE;
1800         reg_rctl &= ~E1000_RCTL_SBP;
1801         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1802 }
1803
1804 static void
1805 em_set_multi(struct adapter *adapter)
1806 {
1807         struct ifnet *ifp = &adapter->arpcom.ac_if;
1808         struct ifmultiaddr *ifma;
1809         uint32_t reg_rctl = 0;
1810         uint8_t  mta[512]; /* Largest MTS is 4096 bits */
1811         int mcnt = 0;
1812
1813         if (adapter->hw.mac.type == e1000_82542 && 
1814             adapter->hw.revision_id == E1000_REVISION_2) {
1815                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1816                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1817                         e1000_pci_clear_mwi(&adapter->hw);
1818                 reg_rctl |= E1000_RCTL_RST;
1819                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1820                 msec_delay(5);
1821         }
1822
1823         LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1824                 if (ifma->ifma_addr->sa_family != AF_LINK)
1825                         continue;
1826
1827                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1828                         break;
1829
1830                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1831                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1832                 mcnt++;
1833         }
1834
1835         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1836                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1837                 reg_rctl |= E1000_RCTL_MPE;
1838                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1839         } else {
1840                 e1000_update_mc_addr_list(&adapter->hw, mta,
1841                     mcnt, 1, adapter->hw.mac.rar_entry_count);
1842         }
1843
1844         if (adapter->hw.mac.type == e1000_82542 && 
1845             adapter->hw.revision_id == E1000_REVISION_2) {
1846                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1847                 reg_rctl &= ~E1000_RCTL_RST;
1848                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1849                 msec_delay(5);
1850                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1851                         e1000_pci_set_mwi(&adapter->hw);
1852         }
1853 }
1854
1855 /*
1856  * This routine checks for link status and updates statistics.
1857  */
1858 static void
1859 em_timer(void *xsc)
1860 {
1861         struct adapter *adapter = xsc;
1862         struct ifnet *ifp = &adapter->arpcom.ac_if;
1863
1864         lwkt_serialize_enter(ifp->if_serializer);
1865
1866         em_update_link_status(adapter);
1867         em_update_stats(adapter);
1868
1869         /* Reset LAA into RAR[0] on 82571 */
1870         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
1871                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1872
1873         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
1874                 em_print_hw_stats(adapter);
1875
1876         em_smartspeed(adapter);
1877
1878         callout_reset(&adapter->timer, hz, em_timer, adapter);
1879
1880         lwkt_serialize_exit(ifp->if_serializer);
1881 }
1882
1883 static void
1884 em_update_link_status(struct adapter *adapter)
1885 {
1886         struct e1000_hw *hw = &adapter->hw;
1887         struct ifnet *ifp = &adapter->arpcom.ac_if;
1888         device_t dev = adapter->dev;
1889         uint32_t link_check = 0;
1890
1891         /* Get the cached link value or read phy for real */
1892         switch (hw->phy.media_type) {
1893         case e1000_media_type_copper:
1894                 if (hw->mac.get_link_status) {
1895                         /* Do the work to read phy */
1896                         e1000_check_for_link(hw);
1897                         link_check = !hw->mac.get_link_status;
1898                         if (link_check) /* ESB2 fix */
1899                                 e1000_cfg_on_link_up(hw);
1900                 } else {
1901                         link_check = TRUE;
1902                 }
1903                 break;
1904
1905         case e1000_media_type_fiber:
1906                 e1000_check_for_link(hw);
1907                 link_check =
1908                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
1909                 break;
1910
1911         case e1000_media_type_internal_serdes:
1912                 e1000_check_for_link(hw);
1913                 link_check = adapter->hw.mac.serdes_has_link;
1914                 break;
1915
1916         case e1000_media_type_unknown:
1917         default:
1918                 break;
1919         }
1920
1921         /* Now check for a transition */
1922         if (link_check && adapter->link_active == 0) {
1923                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
1924                     &adapter->link_duplex);
1925                 /* Check if we must disable SPEED_MODE bit on PCI-E */
1926                 if (adapter->link_speed != SPEED_1000 &&
1927                     (hw->mac.type == e1000_82571 ||
1928                      hw->mac.type == e1000_82572)) {
1929                         int tarc0;
1930
1931                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
1932                         tarc0 &= ~SPEED_MODE_BIT;
1933                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
1934                 }
1935                 if (bootverbose) {
1936                         device_printf(dev, "Link is up %d Mbps %s\n",
1937                             adapter->link_speed,
1938                             ((adapter->link_duplex == FULL_DUPLEX) ?
1939                             "Full Duplex" : "Half Duplex"));
1940                 }
1941                 adapter->link_active = 1;
1942                 adapter->smartspeed = 0;
1943                 ifp->if_baudrate = adapter->link_speed * 1000000;
1944                 ifp->if_link_state = LINK_STATE_UP;
1945                 if_link_state_change(ifp);
1946         } else if (!link_check && adapter->link_active == 1) {
1947                 ifp->if_baudrate = adapter->link_speed = 0;
1948                 adapter->link_duplex = 0;
1949                 if (bootverbose)
1950                         device_printf(dev, "Link is Down\n");
1951                 adapter->link_active = 0;
1952 #if 0
1953                 /* Link down, disable watchdog */
1954                 if->if_timer = 0;
1955 #endif
1956                 ifp->if_link_state = LINK_STATE_DOWN;
1957                 if_link_state_change(ifp);
1958         }
1959 }
1960
1961 static void
1962 em_stop(struct adapter *adapter)
1963 {
1964         struct ifnet *ifp = &adapter->arpcom.ac_if;
1965         int i;
1966
1967         ASSERT_SERIALIZED(ifp->if_serializer);
1968
1969         em_disable_intr(adapter);
1970
1971         callout_stop(&adapter->timer);
1972         callout_stop(&adapter->tx_fifo_timer);
1973
1974         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1975         ifp->if_timer = 0;
1976
1977         e1000_reset_hw(&adapter->hw);
1978         if (adapter->hw.mac.type >= e1000_82544)
1979                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
1980
1981         for (i = 0; i < adapter->num_tx_desc; i++) {
1982                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
1983
1984                 if (tx_buffer->m_head != NULL) {
1985                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
1986                         m_freem(tx_buffer->m_head);
1987                         tx_buffer->m_head = NULL;
1988                 }
1989                 tx_buffer->next_eop = -1;
1990         }
1991
1992         for (i = 0; i < adapter->num_rx_desc; i++) {
1993                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
1994
1995                 if (rx_buffer->m_head != NULL) {
1996                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
1997                         m_freem(rx_buffer->m_head);
1998                         rx_buffer->m_head = NULL;
1999                 }
2000         }
2001 }
2002
2003 static int
2004 em_get_hw_info(struct adapter *adapter)
2005 {
2006         device_t dev = adapter->dev;
2007
2008         /* Save off the information about this board */
2009         adapter->hw.vendor_id = pci_get_vendor(dev);
2010         adapter->hw.device_id = pci_get_device(dev);
2011         adapter->hw.revision_id = pci_get_revid(dev);
2012         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2013         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2014
2015         /* Do Shared Code Init and Setup */
2016         if (e1000_set_mac_type(&adapter->hw))
2017                 return ENXIO;
2018         return 0;
2019 }
2020
2021 static int
2022 em_alloc_pci_res(struct adapter *adapter)
2023 {
2024         device_t dev = adapter->dev;
2025         int val, rid, error = E1000_SUCCESS;
2026
2027         /* Enable bus mastering */
2028         pci_enable_busmaster(dev);
2029
2030         adapter->memory_rid = EM_BAR_MEM;
2031         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2032                                 &adapter->memory_rid, RF_ACTIVE);
2033         if (adapter->memory == NULL) {
2034                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2035                 return (ENXIO);
2036         }
2037         adapter->osdep.mem_bus_space_tag =
2038             rman_get_bustag(adapter->memory);
2039         adapter->osdep.mem_bus_space_handle =
2040             rman_get_bushandle(adapter->memory);
2041
2042         /* XXX This is quite goofy, it is not actually used */
2043         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2044
2045         /* Only older adapters use IO mapping */
2046         if (adapter->hw.mac.type > e1000_82543 &&
2047             adapter->hw.mac.type < e1000_82571) {
2048                 /* Figure our where our IO BAR is ? */
2049                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2050                         val = pci_read_config(dev, rid, 4);
2051                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2052                                 adapter->io_rid = rid;
2053                                 break;
2054                         }
2055                         rid += 4;
2056                         /* check for 64bit BAR */
2057                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2058                                 rid += 4;
2059                 }
2060                 if (rid >= PCIR_CARDBUSCIS) {
2061                         device_printf(dev, "Unable to locate IO BAR\n");
2062                         return (ENXIO);
2063                 }
2064                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2065                                         &adapter->io_rid, RF_ACTIVE);
2066                 if (adapter->ioport == NULL) {
2067                         device_printf(dev, "Unable to allocate bus resource: "
2068                             "ioport\n");
2069                         return (ENXIO);
2070                 }
2071                 adapter->hw.io_base = 0;
2072                 adapter->osdep.io_bus_space_tag =
2073                     rman_get_bustag(adapter->ioport);
2074                 adapter->osdep.io_bus_space_handle =
2075                     rman_get_bushandle(adapter->ioport);
2076         }
2077
2078         adapter->intr_rid = 0;
2079         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2080                                 &adapter->intr_rid,
2081                                 RF_SHAREABLE | RF_ACTIVE);
2082         if (adapter->intr_res == NULL) {
2083                 device_printf(dev, "Unable to allocate bus resource: "
2084                     "interrupt\n");
2085                 return (ENXIO);
2086         }
2087
2088         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2089         adapter->hw.back = &adapter->osdep;
2090         return (error);
2091 }
2092
2093 static void
2094 em_free_pci_res(struct adapter *adapter)
2095 {
2096         device_t dev = adapter->dev;
2097
2098         if (adapter->intr_res != NULL) {
2099                 bus_release_resource(dev, SYS_RES_IRQ,
2100                     adapter->intr_rid, adapter->intr_res);
2101         }
2102
2103         if (adapter->memory != NULL) {
2104                 bus_release_resource(dev, SYS_RES_MEMORY,
2105                     adapter->memory_rid, adapter->memory);
2106         }
2107
2108         if (adapter->flash != NULL) {
2109                 bus_release_resource(dev, SYS_RES_MEMORY,
2110                     adapter->flash_rid, adapter->flash);
2111         }
2112
2113         if (adapter->ioport != NULL) {
2114                 bus_release_resource(dev, SYS_RES_IOPORT,
2115                     adapter->io_rid, adapter->ioport);
2116         }
2117 }
2118
2119 static int
2120 em_hw_init(struct adapter *adapter)
2121 {
2122         device_t dev = adapter->dev;
2123         uint16_t rx_buffer_size;
2124
2125         /* Issue a global reset */
2126         e1000_reset_hw(&adapter->hw);
2127
2128         /* Get control from any management/hw control */
2129         if ((adapter->hw.mac.type == e1000_82573 ||
2130              adapter->hw.mac.type == e1000_ich8lan ||
2131              adapter->hw.mac.type == e1000_ich10lan ||
2132              adapter->hw.mac.type == e1000_ich9lan) &&
2133             e1000_check_mng_mode(&adapter->hw))
2134                 em_get_hw_control(adapter);
2135
2136         /* When hardware is reset, fifo_head is also reset */
2137         adapter->tx_fifo_head = 0;
2138
2139         /* Set up smart power down as default off on newer adapters. */
2140         if (!em_smart_pwr_down &&
2141             (adapter->hw.mac.type == e1000_82571 ||
2142              adapter->hw.mac.type == e1000_82572)) {
2143                 uint16_t phy_tmp = 0;
2144
2145                 /* Speed up time to link by disabling smart power down. */
2146                 e1000_read_phy_reg(&adapter->hw,
2147                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2148                 phy_tmp &= ~IGP02E1000_PM_SPD;
2149                 e1000_write_phy_reg(&adapter->hw,
2150                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2151         }
2152
2153         /*
2154          * These parameters control the automatic generation (Tx) and
2155          * response (Rx) to Ethernet PAUSE frames.
2156          * - High water mark should allow for at least two frames to be
2157          *   received after sending an XOFF.
2158          * - Low water mark works best when it is very near the high water mark.
2159          *   This allows the receiver to restart by sending XON when it has
2160          *   drained a bit. Here we use an arbitary value of 1500 which will
2161          *   restart after one full frame is pulled from the buffer. There
2162          *   could be several smaller frames in the buffer and if so they will
2163          *   not trigger the XON until their total number reduces the buffer
2164          *   by 1500.
2165          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2166          */
2167         rx_buffer_size =
2168                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2169
2170         adapter->hw.fc.high_water = rx_buffer_size -
2171                                     roundup2(adapter->max_frame_size, 1024);
2172         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2173
2174         if (adapter->hw.mac.type == e1000_80003es2lan)
2175                 adapter->hw.fc.pause_time = 0xFFFF;
2176         else
2177                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2178         adapter->hw.fc.send_xon = TRUE;
2179         adapter->hw.fc.requested_mode = e1000_fc_full;
2180
2181         if (e1000_init_hw(&adapter->hw) < 0) {
2182                 device_printf(dev, "Hardware Initialization Failed\n");
2183                 return (EIO);
2184         }
2185
2186         e1000_check_for_link(&adapter->hw);
2187
2188         return (0);
2189 }
2190
2191 static void
2192 em_setup_ifp(struct adapter *adapter)
2193 {
2194         struct ifnet *ifp = &adapter->arpcom.ac_if;
2195
2196         if_initname(ifp, device_get_name(adapter->dev),
2197                     device_get_unit(adapter->dev));
2198         ifp->if_softc = adapter;
2199         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2200         ifp->if_init =  em_init;
2201         ifp->if_ioctl = em_ioctl;
2202         ifp->if_start = em_start;
2203 #ifdef DEVICE_POLLING
2204         ifp->if_poll = em_poll;
2205 #endif
2206         ifp->if_watchdog = em_watchdog;
2207         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2208         ifq_set_ready(&ifp->if_snd);
2209
2210         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2211
2212         if (adapter->hw.mac.type >= e1000_82543)
2213                 ifp->if_capabilities = IFCAP_HWCSUM;
2214
2215         ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2216         ifp->if_capenable = ifp->if_capabilities;
2217
2218         if (ifp->if_capenable & IFCAP_TXCSUM)
2219                 ifp->if_hwassist = EM_CSUM_FEATURES;
2220
2221         /*
2222          * Tell the upper layer(s) we support long frames.
2223          */
2224         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2225
2226         /*
2227          * Specify the media types supported by this adapter and register
2228          * callbacks to update media and link information
2229          */
2230         ifmedia_init(&adapter->media, IFM_IMASK,
2231                      em_media_change, em_media_status);
2232         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2233             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2234                 u_char fiber_type = IFM_1000_SX; /* default type */
2235
2236                 if (adapter->hw.mac.type == e1000_82545)
2237                         fiber_type = IFM_1000_LX;
2238                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX, 
2239                             0, NULL);
2240                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2241         } else {
2242                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2243                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2244                             0, NULL);
2245                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2246                             0, NULL);
2247                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2248                             0, NULL);
2249                 if (adapter->hw.phy.type != e1000_phy_ife) {
2250                         ifmedia_add(&adapter->media,
2251                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2252                         ifmedia_add(&adapter->media,
2253                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2254                 }
2255         }
2256         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2257         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2258 }
2259
2260
2261 /*
2262  * Workaround for SmartSpeed on 82541 and 82547 controllers
2263  */
2264 static void
2265 em_smartspeed(struct adapter *adapter)
2266 {
2267         uint16_t phy_tmp;
2268
2269         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2270             adapter->hw.mac.autoneg == 0 ||
2271             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2272                 return;
2273
2274         if (adapter->smartspeed == 0) {
2275                 /*
2276                  * If Master/Slave config fault is asserted twice,
2277                  * we assume back-to-back
2278                  */
2279                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2280                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2281                         return;
2282                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2283                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2284                         e1000_read_phy_reg(&adapter->hw,
2285                             PHY_1000T_CTRL, &phy_tmp);
2286                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2287                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2288                                 e1000_write_phy_reg(&adapter->hw,
2289                                     PHY_1000T_CTRL, phy_tmp);
2290                                 adapter->smartspeed++;
2291                                 if (adapter->hw.mac.autoneg &&
2292                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2293                                     !e1000_read_phy_reg(&adapter->hw,
2294                                      PHY_CONTROL, &phy_tmp)) {
2295                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2296                                                    MII_CR_RESTART_AUTO_NEG;
2297                                         e1000_write_phy_reg(&adapter->hw,
2298                                             PHY_CONTROL, phy_tmp);
2299                                 }
2300                         }
2301                 }
2302                 return;
2303         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2304                 /* If still no link, perhaps using 2/3 pair cable */
2305                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2306                 phy_tmp |= CR_1000T_MS_ENABLE;
2307                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2308                 if (adapter->hw.mac.autoneg &&
2309                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2310                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2311                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2312                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2313                 }
2314         }
2315
2316         /* Restart process after EM_SMARTSPEED_MAX iterations */
2317         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2318                 adapter->smartspeed = 0;
2319 }
2320
2321 static int
2322 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2323               struct em_dma_alloc *dma)
2324 {
2325         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2326                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2327                                 &dma->dma_tag, &dma->dma_map,
2328                                 &dma->dma_paddr);
2329         if (dma->dma_vaddr == NULL)
2330                 return ENOMEM;
2331         else
2332                 return 0;
2333 }
2334
2335 static void
2336 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2337 {
2338         if (dma->dma_tag == NULL)
2339                 return;
2340         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2341         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2342         bus_dma_tag_destroy(dma->dma_tag);
2343 }
2344
2345 static int
2346 em_create_tx_ring(struct adapter *adapter)
2347 {
2348         device_t dev = adapter->dev;
2349         struct em_buffer *tx_buffer;
2350         int error, i;
2351
2352         adapter->tx_buffer_area =
2353                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2354                         M_DEVBUF, M_WAITOK | M_ZERO);
2355
2356         /*
2357          * Create DMA tags for tx buffers
2358          */
2359         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2360                         1, 0,                   /* alignment, bounds */
2361                         BUS_SPACE_MAXADDR,      /* lowaddr */
2362                         BUS_SPACE_MAXADDR,      /* highaddr */
2363                         NULL, NULL,             /* filter, filterarg */
2364                         EM_TSO_SIZE,            /* maxsize */
2365                         EM_MAX_SCATTER,         /* nsegments */
2366                         EM_MAX_SEGSIZE,         /* maxsegsize */
2367                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2368                         BUS_DMA_ONEBPAGE,       /* flags */
2369                         &adapter->txtag);
2370         if (error) {
2371                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2372                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2373                 adapter->tx_buffer_area = NULL;
2374                 return error;
2375         }
2376
2377         /*
2378          * Create DMA maps for tx buffers
2379          */
2380         for (i = 0; i < adapter->num_tx_desc; i++) {
2381                 tx_buffer = &adapter->tx_buffer_area[i];
2382
2383                 error = bus_dmamap_create(adapter->txtag,
2384                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2385                                           &tx_buffer->map);
2386                 if (error) {
2387                         device_printf(dev, "Unable to create TX DMA map\n");
2388                         em_destroy_tx_ring(adapter, i);
2389                         return error;
2390                 }
2391                 tx_buffer->next_eop = -1;
2392         }
2393         return (0);
2394 }
2395
2396 static void
2397 em_init_tx_ring(struct adapter *adapter)
2398 {
2399         /* Clear the old ring contents */
2400         bzero(adapter->tx_desc_base,
2401             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2402
2403         /* Reset state */
2404         adapter->next_avail_tx_desc = 0;
2405         adapter->next_tx_to_clean = 0;
2406         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2407 }
2408
2409 static void
2410 em_init_tx_unit(struct adapter *adapter)
2411 {
2412         uint32_t tctl, tarc, tipg = 0;
2413         uint64_t bus_addr;
2414
2415         /* Setup the Base and Length of the Tx Descriptor Ring */
2416         bus_addr = adapter->txdma.dma_paddr;
2417         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2418             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2419         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2420             (uint32_t)(bus_addr >> 32));
2421         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2422             (uint32_t)bus_addr);
2423         /* Setup the HW Tx Head and Tail descriptor pointers */
2424         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2425         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2426
2427         /* Set the default values for the Tx Inter Packet Gap timer */
2428         switch (adapter->hw.mac.type) {
2429         case e1000_82542:
2430                 tipg = DEFAULT_82542_TIPG_IPGT;
2431                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2432                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2433                 break;
2434
2435         case e1000_80003es2lan:
2436                 tipg = DEFAULT_82543_TIPG_IPGR1;
2437                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2438                     E1000_TIPG_IPGR2_SHIFT;
2439                 break;
2440
2441         default:
2442                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2443                     adapter->hw.phy.media_type ==
2444                     e1000_media_type_internal_serdes)
2445                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2446                 else
2447                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2448                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2449                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2450                 break;
2451         }
2452
2453         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2454         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, adapter->tx_int_delay.value);
2455         if(adapter->hw.mac.type >= e1000_82540) {
2456                 E1000_WRITE_REG(&adapter->hw, E1000_TADV,
2457                     adapter->tx_abs_int_delay.value);
2458         }
2459
2460         if (adapter->hw.mac.type == e1000_82571 ||
2461             adapter->hw.mac.type == e1000_82572) {
2462                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2463                 tarc |= SPEED_MODE_BIT;
2464                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2465         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2466                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2467                 tarc |= 1;
2468                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2469                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2470                 tarc |= 1;
2471                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2472         }
2473
2474         /* Program the Transmit Control Register */
2475         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2476         tctl &= ~E1000_TCTL_CT;
2477         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2478                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2479
2480         if (adapter->hw.mac.type >= e1000_82571)
2481                 tctl |= E1000_TCTL_MULR;
2482
2483         /* This write will effectively turn on the transmit unit. */
2484         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2485
2486         /* Setup Transmit Descriptor Base Settings */   
2487         adapter->txd_cmd = E1000_TXD_CMD_IFCS;
2488
2489         if (adapter->tx_int_delay.value > 0)
2490                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2491 }
2492
2493 static void
2494 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2495 {
2496         struct em_buffer *tx_buffer;
2497         int i;
2498
2499         if (adapter->tx_buffer_area == NULL)
2500                 return;
2501
2502         for (i = 0; i < ndesc; i++) {
2503                 tx_buffer = &adapter->tx_buffer_area[i];
2504
2505                 KKASSERT(tx_buffer->m_head == NULL);
2506                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2507         }
2508         bus_dma_tag_destroy(adapter->txtag);
2509
2510         kfree(adapter->tx_buffer_area, M_DEVBUF);
2511         adapter->tx_buffer_area = NULL;
2512 }
2513
2514 /*
2515  * The offload context needs to be set when we transfer the first
2516  * packet of a particular protocol (TCP/UDP).  This routine has been
2517  * enhanced to deal with inserted VLAN headers.
2518  */
2519 static void
2520 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2521           uint32_t *txd_upper, uint32_t *txd_lower)
2522 {
2523         struct e1000_context_desc *TXD;
2524         struct em_buffer *tx_buffer;
2525         struct ether_vlan_header *eh;
2526         struct ip *ip = NULL;
2527         int curr_txd, ehdrlen;
2528         uint32_t cmd, hdr_len, ip_hlen;
2529         uint16_t etype;
2530
2531         cmd = hdr_len = 0;
2532
2533         /* Setup checksum offload context. */
2534         curr_txd = adapter->next_avail_tx_desc;
2535         tx_buffer = &adapter->tx_buffer_area[curr_txd];
2536         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2537
2538         /*
2539          * Determine where frame payload starts.
2540          * Jump over vlan headers if already present,
2541          * helpful for QinQ too.
2542          */
2543         eh = mtod(mp, struct ether_vlan_header *);
2544         if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2545                 etype = ntohs(eh->evl_proto);
2546                 ehdrlen = ETHER_HDR_LEN + EVL_ENCAPLEN;
2547         } else {
2548                 etype = ntohs(eh->evl_encap_proto);
2549                 ehdrlen = ETHER_HDR_LEN;
2550         }
2551
2552         /*
2553          * We only support TCP/UDP for IPv4 for the moment.
2554          * TODO: Support SCTP too when it hits the tree.
2555          */
2556         switch (etype) {
2557         case ETHERTYPE_IP:
2558                 KASSERT(mp->m_len >= ehdrlen + EM_IPVHL_SIZE,
2559                         ("em_txcsum_pullup is not called?\n"));
2560
2561                 /* NOTE: We could only safely access ip.ip_vhl part */
2562                 ip = (struct ip *)(mp->m_data + ehdrlen);
2563                 ip_hlen = ip->ip_hl << 2;
2564
2565                 /* Setup of IP header checksum. */
2566                 if (mp->m_pkthdr.csum_flags & CSUM_IP) {
2567                         /*
2568                          * Start offset for header checksum calculation.
2569                          * End offset for header checksum calculation.
2570                          * Offset of place to put the checksum.
2571                          */
2572                         TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2573                         TXD->lower_setup.ip_fields.ipcse =
2574                             htole16(ehdrlen + ip_hlen - 1);
2575                         TXD->lower_setup.ip_fields.ipcso =
2576                             ehdrlen + offsetof(struct ip, ip_sum);
2577                         cmd |= E1000_TXD_CMD_IP;
2578                         *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2579                 }
2580                 hdr_len = ehdrlen + ip_hlen;
2581                 break;
2582
2583         default:
2584                 *txd_upper = 0;
2585                 *txd_lower = 0;
2586                 return;
2587         }
2588
2589         if (mp->m_pkthdr.csum_flags & CSUM_TCP) {
2590                 /*
2591                  * Start offset for payload checksum calculation.
2592                  * End offset for payload checksum calculation.
2593                  * Offset of place to put the checksum.
2594                  */
2595                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2596                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2597                 TXD->upper_setup.tcp_fields.tucso =
2598                     hdr_len + offsetof(struct tcphdr, th_sum);
2599                 cmd |= E1000_TXD_CMD_TCP;
2600                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2601         } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) {
2602                 /*
2603                  * Start offset for header checksum calculation.
2604                  * End offset for header checksum calculation.
2605                  * Offset of place to put the checksum.
2606                  */
2607                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2608                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2609                 TXD->upper_setup.tcp_fields.tucso =
2610                     hdr_len + offsetof(struct udphdr, uh_sum);
2611                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2612         }
2613
2614         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2615                      E1000_TXD_DTYP_D;          /* Data descr */
2616         TXD->tcp_seg_setup.data = htole32(0);
2617         TXD->cmd_and_length =
2618             htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT | cmd);
2619         tx_buffer->m_head = NULL;
2620         tx_buffer->next_eop = -1;
2621
2622         if (++curr_txd == adapter->num_tx_desc)
2623                 curr_txd = 0;
2624
2625         KKASSERT(adapter->num_tx_desc_avail > 0);
2626         adapter->num_tx_desc_avail--;
2627
2628         adapter->next_avail_tx_desc = curr_txd;
2629 }
2630
2631 static int
2632 em_txcsum_pullup(struct adapter *adapter, struct mbuf **m0)
2633 {
2634         struct mbuf *m = *m0;
2635         struct ether_header *eh;
2636         int len;
2637
2638         adapter->tx_csum_try_pullup++;
2639
2640         len = ETHER_HDR_LEN + EM_IPVHL_SIZE;
2641
2642         if (__predict_false(!M_WRITABLE(m))) {
2643                 if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2644                         adapter->tx_csum_drop1++;
2645                         m_freem(m);
2646                         *m0 = NULL;
2647                         return ENOBUFS;
2648                 }
2649                 eh = mtod(m, struct ether_header *);
2650
2651                 if (eh->ether_type == htons(ETHERTYPE_VLAN))
2652                         len += EVL_ENCAPLEN;
2653
2654                 if (__predict_false(m->m_len < len)) {
2655                         adapter->tx_csum_drop2++;
2656                         m_freem(m);
2657                         *m0 = NULL;
2658                         return ENOBUFS;
2659                 }
2660                 return 0;
2661         }
2662
2663         if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2664                 adapter->tx_csum_pullup1++;
2665                 m = m_pullup(m, ETHER_HDR_LEN);
2666                 if (m == NULL) {
2667                         adapter->tx_csum_pullup1_failed++;
2668                         *m0 = NULL;
2669                         return ENOBUFS;
2670                 }
2671                 *m0 = m;
2672         }
2673         eh = mtod(m, struct ether_header *);
2674
2675         if (eh->ether_type == htons(ETHERTYPE_VLAN))
2676                 len += EVL_ENCAPLEN;
2677
2678         if (__predict_false(m->m_len < len)) {
2679                 adapter->tx_csum_pullup2++;
2680                 m = m_pullup(m, len);
2681                 if (m == NULL) {
2682                         adapter->tx_csum_pullup2_failed++;
2683                         *m0 = NULL;
2684                         return ENOBUFS;
2685                 }
2686                 *m0 = m;
2687         }
2688         return 0;
2689 }
2690
2691 static void
2692 em_txeof(struct adapter *adapter)
2693 {
2694         int first, last, done, num_avail;
2695         struct em_buffer *tx_buffer;
2696         struct e1000_tx_desc *tx_desc, *eop_desc;
2697         struct ifnet *ifp = &adapter->arpcom.ac_if;
2698
2699         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2700                 return;
2701
2702         num_avail = adapter->num_tx_desc_avail;
2703         first = adapter->next_tx_to_clean;
2704
2705         tx_desc = &adapter->tx_desc_base[first];
2706         tx_buffer = &adapter->tx_buffer_area[first];
2707         last = tx_buffer->next_eop;
2708         eop_desc = &adapter->tx_desc_base[last];
2709
2710         /*
2711          * What this does is get the index of the
2712          * first descriptor AFTER the EOP of the
2713          * first packet, that way we can do the
2714          * simple comparison on the inner while loop.
2715          */
2716         if (++last == adapter->num_tx_desc)
2717                 last = 0;
2718         done = last;
2719
2720         while (eop_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2721                 /* We clean the range of the packet */
2722                 while (first != done) {
2723                         logif(pkt_txclean);
2724
2725                         tx_desc->upper.data = 0;
2726                         tx_desc->lower.data = 0;
2727                         tx_desc->buffer_addr = 0;
2728                         num_avail++;
2729
2730                         if (tx_buffer->m_head) {
2731                                 ifp->if_opackets++;
2732                                 bus_dmamap_unload(adapter->txtag,
2733                                                   tx_buffer->map);
2734                                 m_freem(tx_buffer->m_head);
2735                                 tx_buffer->m_head = NULL;
2736                         }
2737                         tx_buffer->next_eop = -1;
2738
2739                         if (++first == adapter->num_tx_desc)
2740                                 first = 0;
2741
2742                         tx_buffer = &adapter->tx_buffer_area[first];
2743                         tx_desc = &adapter->tx_desc_base[first];
2744                 }
2745
2746                 /* See if we can continue to the next packet */
2747                 last = tx_buffer->next_eop;
2748                 if (last != -1) {
2749                         eop_desc = &adapter->tx_desc_base[last];
2750
2751                         /* Get new done point */
2752                         if (++last == adapter->num_tx_desc)
2753                                 last = 0;
2754                         done = last;
2755                 } else {
2756                         break;
2757                 }
2758         }
2759         adapter->next_tx_to_clean = first;
2760         adapter->num_tx_desc_avail = num_avail;
2761
2762         if (adapter->num_tx_desc_avail > EM_TX_CLEANUP_THRESHOLD) {
2763                 ifp->if_flags &= ~IFF_OACTIVE;
2764
2765                 /* All clean, turn off the timer */
2766                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2767                         ifp->if_timer = 0;
2768         }
2769 }
2770
2771 /*
2772  * When Link is lost sometimes there is work still in the TX ring
2773  * which will result in a watchdog, rather than allow that do an
2774  * attempted cleanup and then reinit here.  Note that this has been
2775  * seens mostly with fiber adapters.
2776  */
2777 static void
2778 em_tx_purge(struct adapter *adapter)
2779 {
2780         struct ifnet *ifp = &adapter->arpcom.ac_if;
2781
2782         if (!adapter->link_active && ifp->if_timer) {
2783                 em_txeof(adapter);
2784                 if (ifp->if_timer) {
2785                         if_printf(ifp, "Link lost, TX pending, reinit\n");
2786                         ifp->if_timer = 0;
2787                         em_init(adapter);
2788                 }
2789         }
2790 }
2791
2792 static int
2793 em_newbuf(struct adapter *adapter, int i, int init)
2794 {
2795         struct mbuf *m;
2796         bus_dma_segment_t seg;
2797         bus_dmamap_t map;
2798         struct em_buffer *rx_buffer;
2799         int error, nseg;
2800
2801         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2802         if (m == NULL) {
2803                 adapter->mbuf_cluster_failed++;
2804                 if (init) {
2805                         if_printf(&adapter->arpcom.ac_if,
2806                                   "Unable to allocate RX mbuf\n");
2807                 }
2808                 return (ENOBUFS);
2809         }
2810         m->m_len = m->m_pkthdr.len = MCLBYTES;
2811
2812         if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
2813                 m_adj(m, ETHER_ALIGN);
2814
2815         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
2816                         adapter->rx_sparemap, m,
2817                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
2818         if (error) {
2819                 m_freem(m);
2820                 if (init) {
2821                         if_printf(&adapter->arpcom.ac_if,
2822                                   "Unable to load RX mbuf\n");
2823                 }
2824                 return (error);
2825         }
2826
2827         rx_buffer = &adapter->rx_buffer_area[i];
2828         if (rx_buffer->m_head != NULL)
2829                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2830
2831         map = rx_buffer->map;
2832         rx_buffer->map = adapter->rx_sparemap;
2833         adapter->rx_sparemap = map;
2834
2835         rx_buffer->m_head = m;
2836
2837         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
2838         return (0);
2839 }
2840
2841 static int
2842 em_create_rx_ring(struct adapter *adapter)
2843 {
2844         device_t dev = adapter->dev;
2845         struct em_buffer *rx_buffer;
2846         int i, error;
2847
2848         adapter->rx_buffer_area =
2849                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
2850                         M_DEVBUF, M_WAITOK | M_ZERO);
2851
2852         /*
2853          * Create DMA tag for rx buffers
2854          */
2855         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2856                         1, 0,                   /* alignment, bounds */
2857                         BUS_SPACE_MAXADDR,      /* lowaddr */
2858                         BUS_SPACE_MAXADDR,      /* highaddr */
2859                         NULL, NULL,             /* filter, filterarg */
2860                         MCLBYTES,               /* maxsize */
2861                         1,                      /* nsegments */
2862                         MCLBYTES,               /* maxsegsize */
2863                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
2864                         &adapter->rxtag);
2865         if (error) {
2866                 device_printf(dev, "Unable to allocate RX DMA tag\n");
2867                 kfree(adapter->rx_buffer_area, M_DEVBUF);
2868                 adapter->rx_buffer_area = NULL;
2869                 return error;
2870         }
2871
2872         /*
2873          * Create spare DMA map for rx buffers
2874          */
2875         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
2876                                   &adapter->rx_sparemap);
2877         if (error) {
2878                 device_printf(dev, "Unable to create spare RX DMA map\n");
2879                 bus_dma_tag_destroy(adapter->rxtag);
2880                 kfree(adapter->rx_buffer_area, M_DEVBUF);
2881                 adapter->rx_buffer_area = NULL;
2882                 return error;
2883         }
2884
2885         /*
2886          * Create DMA maps for rx buffers
2887          */
2888         for (i = 0; i < adapter->num_rx_desc; i++) {
2889                 rx_buffer = &adapter->rx_buffer_area[i];
2890
2891                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
2892                                           &rx_buffer->map);
2893                 if (error) {
2894                         device_printf(dev, "Unable to create RX DMA map\n");
2895                         em_destroy_rx_ring(adapter, i);
2896                         return error;
2897                 }
2898         }
2899         return (0);
2900 }
2901
2902 static int
2903 em_init_rx_ring(struct adapter *adapter)
2904 {
2905         int i, error;
2906
2907         /* Reset descriptor ring */
2908         bzero(adapter->rx_desc_base,
2909             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
2910
2911         /* Allocate new ones. */
2912         for (i = 0; i < adapter->num_rx_desc; i++) {
2913                 error = em_newbuf(adapter, i, 1);
2914                 if (error)
2915                         return (error);
2916         }
2917
2918         /* Setup our descriptor pointers */
2919         adapter->next_rx_desc_to_check = 0;
2920
2921         return (0);
2922 }
2923
2924 static void
2925 em_init_rx_unit(struct adapter *adapter)
2926 {
2927         struct ifnet *ifp = &adapter->arpcom.ac_if;
2928         uint64_t bus_addr;
2929         uint32_t rctl, rxcsum;
2930
2931         /*
2932          * Make sure receives are disabled while setting
2933          * up the descriptor ring
2934          */
2935         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2936         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
2937
2938         if (adapter->hw.mac.type >= e1000_82540) {
2939                 E1000_WRITE_REG(&adapter->hw, E1000_RADV,
2940                     adapter->rx_abs_int_delay.value);
2941
2942                 /*
2943                  * Set the interrupt throttling rate. Value is calculated
2944                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
2945                  */
2946                 if (adapter->int_throttle_ceil) {
2947                         E1000_WRITE_REG(&adapter->hw, E1000_ITR,
2948                                 1000000000 / 256 / adapter->int_throttle_ceil);
2949                 } else {
2950                         E1000_WRITE_REG(&adapter->hw, E1000_ITR, 0);
2951                 }
2952         }
2953
2954         /* Disable accelerated ackknowledge */
2955         if (adapter->hw.mac.type == e1000_82574) {
2956                 E1000_WRITE_REG(&adapter->hw,
2957                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
2958         }
2959
2960         /* Setup the Base and Length of the Rx Descriptor Ring */
2961         bus_addr = adapter->rxdma.dma_paddr;
2962         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
2963             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
2964         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
2965             (uint32_t)(bus_addr >> 32));
2966         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
2967             (uint32_t)bus_addr);
2968
2969         /* Setup the Receive Control Register */
2970         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2971         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
2972                 E1000_RCTL_RDMTS_HALF |
2973                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2974
2975         /* Make sure VLAN Filters are off */
2976         rctl &= ~E1000_RCTL_VFE;
2977
2978         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
2979                 rctl |= E1000_RCTL_SBP;
2980         else
2981                 rctl &= ~E1000_RCTL_SBP;
2982
2983         switch (adapter->rx_buffer_len) {
2984         default:
2985         case 2048:
2986                 rctl |= E1000_RCTL_SZ_2048;
2987                 break;
2988
2989         case 4096:
2990                 rctl |= E1000_RCTL_SZ_4096 |
2991                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
2992                 break;
2993
2994         case 8192:
2995                 rctl |= E1000_RCTL_SZ_8192 |
2996                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
2997                 break;
2998
2999         case 16384:
3000                 rctl |= E1000_RCTL_SZ_16384 |
3001                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3002                 break;
3003         }
3004
3005         if (ifp->if_mtu > ETHERMTU)
3006                 rctl |= E1000_RCTL_LPE;
3007         else
3008                 rctl &= ~E1000_RCTL_LPE;
3009
3010         /* Receive Checksum Offload for TCP and UDP */
3011         if (ifp->if_capenable & IFCAP_RXCSUM) {
3012                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3013                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3014                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3015         }
3016
3017         /*
3018          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3019          * long latencies are observed, like Lenovo X60. This
3020          * change eliminates the problem, but since having positive
3021          * values in RDTR is a known source of problems on other
3022          * platforms another solution is being sought.
3023          */
3024         if (adapter->hw.mac.type == e1000_82573)
3025                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, 0x20);
3026
3027         /* Enable Receives */
3028         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3029
3030         /*
3031          * Setup the HW Rx Head and Tail Descriptor Pointers
3032          */
3033         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3034         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3035 }
3036
3037 static void
3038 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3039 {
3040         struct em_buffer *rx_buffer;
3041         int i;
3042
3043         if (adapter->rx_buffer_area == NULL)
3044                 return;
3045
3046         for (i = 0; i < ndesc; i++) {
3047                 rx_buffer = &adapter->rx_buffer_area[i];
3048
3049                 KKASSERT(rx_buffer->m_head == NULL);
3050                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3051         }
3052         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3053         bus_dma_tag_destroy(adapter->rxtag);
3054
3055         kfree(adapter->rx_buffer_area, M_DEVBUF);
3056         adapter->rx_buffer_area = NULL;
3057 }
3058
3059 static void
3060 em_rxeof(struct adapter *adapter, int count)
3061 {
3062         struct ifnet *ifp = &adapter->arpcom.ac_if;
3063         uint8_t status, accept_frame = 0, eop = 0;
3064         uint16_t len, desc_len, prev_len_adj;
3065         struct e1000_rx_desc *current_desc;
3066         struct mbuf *mp;
3067         int i;
3068         struct mbuf_chain chain[MAXCPU];
3069
3070         i = adapter->next_rx_desc_to_check;
3071         current_desc = &adapter->rx_desc_base[i];
3072
3073         if (!(current_desc->status & E1000_RXD_STAT_DD))
3074                 return;
3075
3076         ether_input_chain_init(chain);
3077
3078         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3079                 struct mbuf *m = NULL;
3080
3081                 logif(pkt_receive);
3082
3083                 mp = adapter->rx_buffer_area[i].m_head;
3084
3085                 /*
3086                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3087                  * needs to access the last received byte in the mbuf.
3088                  */
3089                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3090                                 BUS_DMASYNC_POSTREAD);
3091
3092                 accept_frame = 1;
3093                 prev_len_adj = 0;
3094                 desc_len = le16toh(current_desc->length);
3095                 status = current_desc->status;
3096                 if (status & E1000_RXD_STAT_EOP) {
3097                         count--;
3098                         eop = 1;
3099                         if (desc_len < ETHER_CRC_LEN) {
3100                                 len = 0;
3101                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3102                         } else {
3103                                 len = desc_len - ETHER_CRC_LEN;
3104                         }
3105                 } else {
3106                         eop = 0;
3107                         len = desc_len;
3108                 }
3109
3110                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3111                         uint8_t last_byte;
3112                         uint32_t pkt_len = desc_len;
3113
3114                         if (adapter->fmp != NULL)
3115                                 pkt_len += adapter->fmp->m_pkthdr.len;
3116
3117                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3118                         if (TBI_ACCEPT(&adapter->hw, status,
3119                             current_desc->errors, pkt_len, last_byte,
3120                             adapter->min_frame_size, adapter->max_frame_size)) {
3121                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3122                                     &adapter->stats, pkt_len,
3123                                     adapter->hw.mac.addr,
3124                                     adapter->max_frame_size);
3125                                 if (len > 0)
3126                                         len--;
3127                         } else {
3128                                 accept_frame = 0;
3129                         }
3130                 }
3131
3132                 if (accept_frame) {
3133                         if (em_newbuf(adapter, i, 0) != 0) {
3134                                 ifp->if_iqdrops++;
3135                                 goto discard;
3136                         }
3137
3138                         /* Assign correct length to the current fragment */
3139                         mp->m_len = len;
3140
3141                         if (adapter->fmp == NULL) {
3142                                 mp->m_pkthdr.len = len;
3143                                 adapter->fmp = mp; /* Store the first mbuf */
3144                                 adapter->lmp = mp;
3145                         } else {
3146                                 /*
3147                                  * Chain mbuf's together
3148                                  */
3149
3150                                 /*
3151                                  * Adjust length of previous mbuf in chain if
3152                                  * we received less than 4 bytes in the last
3153                                  * descriptor.
3154                                  */
3155                                 if (prev_len_adj > 0) {
3156                                         adapter->lmp->m_len -= prev_len_adj;
3157                                         adapter->fmp->m_pkthdr.len -=
3158                                             prev_len_adj;
3159                                 }
3160                                 adapter->lmp->m_next = mp;
3161                                 adapter->lmp = adapter->lmp->m_next;
3162                                 adapter->fmp->m_pkthdr.len += len;
3163                         }
3164
3165                         if (eop) {
3166                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3167                                 ifp->if_ipackets++;
3168
3169                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3170                                         em_rxcsum(adapter, current_desc,
3171                                                   adapter->fmp);
3172                                 }
3173
3174                                 if (status & E1000_RXD_STAT_VP) {
3175                                         adapter->fmp->m_pkthdr.ether_vlantag =
3176                                             (le16toh(current_desc->special) &
3177                                             E1000_RXD_SPC_VLAN_MASK);
3178                                         adapter->fmp->m_flags |= M_VLANTAG;
3179                                 }
3180                                 m = adapter->fmp;
3181                                 adapter->fmp = NULL;
3182                                 adapter->lmp = NULL;
3183                         }
3184                 } else {
3185                         ifp->if_ierrors++;
3186 discard:
3187 #ifdef foo
3188                         /* Reuse loaded DMA map and just update mbuf chain */
3189                         mp = adapter->rx_buffer_area[i].m_head;
3190                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3191                         mp->m_data = mp->m_ext.ext_buf;
3192                         mp->m_next = NULL;
3193                         if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3194                                 m_adj(mp, ETHER_ALIGN);
3195 #endif
3196                         if (adapter->fmp != NULL) {
3197                                 m_freem(adapter->fmp);
3198                                 adapter->fmp = NULL;
3199                                 adapter->lmp = NULL;
3200                         }
3201                         m = NULL;
3202                 }
3203
3204                 /* Zero out the receive descriptors status. */
3205                 current_desc->status = 0;
3206
3207                 if (m != NULL)
3208                         ether_input_chain(ifp, m, chain);
3209
3210                 /* Advance our pointers to the next descriptor. */
3211                 if (++i == adapter->num_rx_desc)
3212                         i = 0;
3213                 current_desc = &adapter->rx_desc_base[i];
3214         }
3215         adapter->next_rx_desc_to_check = i;
3216
3217         ether_input_dispatch(chain);
3218
3219         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3220         if (--i < 0)
3221                 i = adapter->num_rx_desc - 1;
3222         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3223 }
3224
3225 static void
3226 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3227           struct mbuf *mp)
3228 {
3229         /* 82543 or newer only */
3230         if (adapter->hw.mac.type < e1000_82543 ||
3231             /* Ignore Checksum bit is set */
3232             (rx_desc->status & E1000_RXD_STAT_IXSM))
3233                 return;
3234
3235         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3236             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3237                 /* IP Checksum Good */
3238                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3239         }
3240
3241         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3242             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3243                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3244                                            CSUM_PSEUDO_HDR |
3245                                            CSUM_FRAG_NOT_CHECKED;
3246                 mp->m_pkthdr.csum_data = htons(0xffff);
3247         }
3248 }
3249
3250 static void
3251 em_enable_intr(struct adapter *adapter)
3252 {
3253         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3254         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
3255 }
3256
3257 static void
3258 em_disable_intr(struct adapter *adapter)
3259 {
3260         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
3261         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3262 }
3263
3264 /*
3265  * Bit of a misnomer, what this really means is
3266  * to enable OS management of the system... aka
3267  * to disable special hardware management features 
3268  */
3269 static void
3270 em_get_mgmt(struct adapter *adapter)
3271 {
3272         /* A shared code workaround */
3273 #define E1000_82542_MANC2H E1000_MANC2H
3274         if (adapter->has_manage) {
3275                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3276                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3277
3278                 /* disable hardware interception of ARP */
3279                 manc &= ~(E1000_MANC_ARP_EN);
3280
3281                 /* enable receiving management packets to the host */
3282                 if (adapter->hw.mac.type >= e1000_82571) {
3283                         manc |= E1000_MANC_EN_MNG2HOST;
3284 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3285 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3286                         manc2h |= E1000_MNG2HOST_PORT_623;
3287                         manc2h |= E1000_MNG2HOST_PORT_664;
3288                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3289                 }
3290
3291                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3292         }
3293 }
3294
3295 /*
3296  * Give control back to hardware management
3297  * controller if there is one.
3298  */
3299 static void
3300 em_rel_mgmt(struct adapter *adapter)
3301 {
3302         if (adapter->has_manage) {
3303                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3304
3305                 /* re-enable hardware interception of ARP */
3306                 manc |= E1000_MANC_ARP_EN;
3307
3308                 if (adapter->hw.mac.type >= e1000_82571)
3309                         manc &= ~E1000_MANC_EN_MNG2HOST;
3310
3311                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3312         }
3313 }
3314
3315 /*
3316  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3317  * For ASF and Pass Through versions of f/w this means that
3318  * the driver is loaded.  For AMT version (only with 82573)
3319  * of the f/w this means that the network i/f is open.
3320  */
3321 static void
3322 em_get_hw_control(struct adapter *adapter)
3323 {
3324         uint32_t ctrl_ext, swsm;
3325
3326         /* Let firmware know the driver has taken over */
3327         switch (adapter->hw.mac.type) {
3328         case e1000_82573:
3329                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3330                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3331                     swsm | E1000_SWSM_DRV_LOAD);
3332                 break;
3333         case e1000_82571:
3334         case e1000_82572:
3335         case e1000_80003es2lan:
3336         case e1000_ich8lan:
3337         case e1000_ich9lan:
3338         case e1000_ich10lan:
3339                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3340                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3341                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3342                 break;
3343         default:
3344                 break;
3345         }
3346 }
3347
3348 /*
3349  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3350  * For ASF and Pass Through versions of f/w this means that the
3351  * driver is no longer loaded.  For AMT version (only with 82573)
3352  * of the f/w this means that the network i/f is closed.
3353  */
3354 static void
3355 em_rel_hw_control(struct adapter *adapter)
3356 {
3357         uint32_t ctrl_ext, swsm;
3358
3359         /* Let firmware taken over control of h/w */
3360         switch (adapter->hw.mac.type) {
3361         case e1000_82573:
3362                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3363                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3364                     swsm & ~E1000_SWSM_DRV_LOAD);
3365                 break;
3366
3367         case e1000_82571:
3368         case e1000_82572:
3369         case e1000_80003es2lan:
3370         case e1000_ich8lan:
3371         case e1000_ich9lan:
3372         case e1000_ich10lan:
3373                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3374                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3375                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3376                 break;
3377
3378         default:
3379                 break;
3380         }
3381 }
3382
3383 static int
3384 em_is_valid_eaddr(const uint8_t *addr)
3385 {
3386         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3387
3388         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3389                 return (FALSE);
3390
3391         return (TRUE);
3392 }
3393
3394 /*
3395  * Enable PCI Wake On Lan capability
3396  */
3397 void
3398 em_enable_wol(device_t dev)
3399 {
3400         uint16_t cap, status;
3401         uint8_t id;
3402
3403         /* First find the capabilities pointer*/
3404         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3405
3406         /* Read the PM Capabilities */
3407         id = pci_read_config(dev, cap, 1);
3408         if (id != PCIY_PMG)     /* Something wrong */
3409                 return;
3410
3411         /*
3412          * OK, we have the power capabilities,
3413          * so now get the status register
3414          */
3415         cap += PCIR_POWER_STATUS;
3416         status = pci_read_config(dev, cap, 2);
3417         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3418         pci_write_config(dev, cap, status, 2);
3419 }
3420
3421
3422 /*
3423  * 82544 Coexistence issue workaround.
3424  *    There are 2 issues.
3425  *       1. Transmit Hang issue.
3426  *    To detect this issue, following equation can be used...
3427  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3428  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3429  *
3430  *       2. DAC issue.
3431  *    To detect this issue, following equation can be used...
3432  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3433  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3434  *
3435  *    WORKAROUND:
3436  *        Make sure we do not have ending address
3437  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3438  */
3439 static uint32_t
3440 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3441 {
3442         uint32_t safe_terminator;
3443
3444         /*
3445          * Since issue is sensitive to length and address.
3446          * Let us first check the address...
3447          */
3448         if (length <= 4) {
3449                 desc_array->descriptor[0].address = address;
3450                 desc_array->descriptor[0].length = length;
3451                 desc_array->elements = 1;
3452                 return (desc_array->elements);
3453         }
3454
3455         safe_terminator =
3456         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3457
3458         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3459         if (safe_terminator == 0 ||
3460             (safe_terminator > 4 && safe_terminator < 9) ||
3461             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3462                 desc_array->descriptor[0].address = address;
3463                 desc_array->descriptor[0].length = length;
3464                 desc_array->elements = 1;
3465                 return (desc_array->elements);
3466         }
3467
3468         desc_array->descriptor[0].address = address;
3469         desc_array->descriptor[0].length = length - 4;
3470         desc_array->descriptor[1].address = address + (length - 4);
3471         desc_array->descriptor[1].length = 4;
3472         desc_array->elements = 2;
3473         return (desc_array->elements);
3474 }
3475
3476 static void
3477 em_update_stats(struct adapter *adapter)
3478 {
3479         struct ifnet *ifp = &adapter->arpcom.ac_if;
3480
3481         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3482             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3483                 adapter->stats.symerrs +=
3484                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3485                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3486         }
3487         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3488         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3489         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3490         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3491
3492         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3493         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3494         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3495         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3496         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3497         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3498         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3499         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3500         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3501         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3502         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3503         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3504         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3505         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3506         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3507         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3508         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3509         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3510         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3511         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3512
3513         /* For the 64-bit byte counters the low dword must be read first. */
3514         /* Both registers clear on the read of the high dword */
3515
3516         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3517         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3518
3519         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3520         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3521         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3522         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3523         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3524
3525         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3526         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3527
3528         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3529         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3530         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3531         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3532         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3533         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3534         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3535         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3536         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3537         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3538
3539         if (adapter->hw.mac.type >= e1000_82543) {
3540                 adapter->stats.algnerrc += 
3541                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3542                 adapter->stats.rxerrc += 
3543                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3544                 adapter->stats.tncrs += 
3545                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3546                 adapter->stats.cexterr += 
3547                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3548                 adapter->stats.tsctc += 
3549                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3550                 adapter->stats.tsctfc += 
3551                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3552         }
3553
3554         ifp->if_collisions = adapter->stats.colc;
3555
3556         /* Rx Errors */
3557         ifp->if_ierrors =
3558             adapter->dropped_pkts + adapter->stats.rxerrc +
3559             adapter->stats.crcerrs + adapter->stats.algnerrc +
3560             adapter->stats.ruc + adapter->stats.roc +
3561             adapter->stats.mpc + adapter->stats.cexterr;
3562
3563         /* Tx Errors */
3564         ifp->if_oerrors =
3565             adapter->stats.ecol + adapter->stats.latecol +
3566             adapter->watchdog_events;
3567 }
3568
3569 static void
3570 em_print_debug_info(struct adapter *adapter)
3571 {
3572         device_t dev = adapter->dev;
3573         uint8_t *hw_addr = adapter->hw.hw_addr;
3574
3575         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3576         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3577             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3578             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3579         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3580             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3581             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3582         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3583             adapter->hw.fc.high_water,
3584             adapter->hw.fc.low_water);
3585         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3586             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3587             E1000_READ_REG(&adapter->hw, E1000_TADV));
3588         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3589             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3590             E1000_READ_REG(&adapter->hw, E1000_RADV));
3591         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3592             (long long)adapter->tx_fifo_wrk_cnt,
3593             (long long)adapter->tx_fifo_reset_cnt);
3594         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3595             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3596             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3597         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3598             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3599             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3600         device_printf(dev, "Num Tx descriptors avail = %d\n",
3601             adapter->num_tx_desc_avail);
3602         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3603             adapter->no_tx_desc_avail1);
3604         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3605             adapter->no_tx_desc_avail2);
3606         device_printf(dev, "Std mbuf failed = %ld\n",
3607             adapter->mbuf_alloc_failed);
3608         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3609             adapter->mbuf_cluster_failed);
3610         device_printf(dev, "Driver dropped packets = %ld\n",
3611             adapter->dropped_pkts);
3612         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3613             adapter->no_tx_dma_setup);
3614
3615         device_printf(dev, "TXCSUM try pullup = %lu\n",
3616             adapter->tx_csum_try_pullup);
3617         device_printf(dev, "TXCSUM m_pullup(eh) called = %lu\n",
3618             adapter->tx_csum_pullup1);
3619         device_printf(dev, "TXCSUM m_pullup(eh) failed = %lu\n",
3620             adapter->tx_csum_pullup1_failed);
3621         device_printf(dev, "TXCSUM m_pullup(eh+ip) called = %lu\n",
3622             adapter->tx_csum_pullup2);
3623         device_printf(dev, "TXCSUM m_pullup(eh+ip) failed = %lu\n",
3624             adapter->tx_csum_pullup2_failed);
3625         device_printf(dev, "TXCSUM non-writable(eh) droped = %lu\n",
3626             adapter->tx_csum_drop1);
3627         device_printf(dev, "TXCSUM non-writable(eh+ip) droped = %lu\n",
3628             adapter->tx_csum_drop2);
3629 }
3630
3631 static void
3632 em_print_hw_stats(struct adapter *adapter)
3633 {
3634         device_t dev = adapter->dev;
3635
3636         device_printf(dev, "Excessive collisions = %lld\n",
3637             (long long)adapter->stats.ecol);
3638 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3639         device_printf(dev, "Symbol errors = %lld\n",
3640             (long long)adapter->stats.symerrs);
3641 #endif
3642         device_printf(dev, "Sequence errors = %lld\n",
3643             (long long)adapter->stats.sec);
3644         device_printf(dev, "Defer count = %lld\n",
3645             (long long)adapter->stats.dc);
3646         device_printf(dev, "Missed Packets = %lld\n",
3647             (long long)adapter->stats.mpc);
3648         device_printf(dev, "Receive No Buffers = %lld\n",
3649             (long long)adapter->stats.rnbc);
3650         /* RLEC is inaccurate on some hardware, calculate our own. */
3651         device_printf(dev, "Receive Length Errors = %lld\n",
3652             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3653         device_printf(dev, "Receive errors = %lld\n",
3654             (long long)adapter->stats.rxerrc);
3655         device_printf(dev, "Crc errors = %lld\n",
3656             (long long)adapter->stats.crcerrs);
3657         device_printf(dev, "Alignment errors = %lld\n",
3658             (long long)adapter->stats.algnerrc);
3659         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3660             (long long)adapter->stats.cexterr);
3661         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3662         device_printf(dev, "watchdog timeouts = %ld\n",
3663             adapter->watchdog_events);
3664         device_printf(dev, "XON Rcvd = %lld\n",
3665             (long long)adapter->stats.xonrxc);
3666         device_printf(dev, "XON Xmtd = %lld\n",
3667             (long long)adapter->stats.xontxc);
3668         device_printf(dev, "XOFF Rcvd = %lld\n",
3669             (long long)adapter->stats.xoffrxc);
3670         device_printf(dev, "XOFF Xmtd = %lld\n",
3671             (long long)adapter->stats.xofftxc);
3672         device_printf(dev, "Good Packets Rcvd = %lld\n",
3673             (long long)adapter->stats.gprc);
3674         device_printf(dev, "Good Packets Xmtd = %lld\n",
3675             (long long)adapter->stats.gptc);
3676 }
3677
3678 static void
3679 em_print_nvm_info(struct adapter *adapter)
3680 {
3681         uint16_t        eeprom_data;
3682         int     i, j, row = 0;
3683
3684         /* Its a bit crude, but it gets the job done */
3685         kprintf("\nInterface EEPROM Dump:\n");
3686         kprintf("Offset\n0x0000  ");
3687         for (i = 0, j = 0; i < 32; i++, j++) {
3688                 if (j == 8) { /* Make the offset block */
3689                         j = 0; ++row;
3690                         kprintf("\n0x00%x0  ",row);
3691                 }
3692                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3693                 kprintf("%04x ", eeprom_data);
3694         }
3695         kprintf("\n");
3696 }
3697
3698 static int
3699 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3700 {
3701         struct adapter *adapter;
3702         struct ifnet *ifp;
3703         int error, result;
3704
3705         result = -1;
3706         error = sysctl_handle_int(oidp, &result, 0, req);
3707         if (error || !req->newptr)
3708                 return (error);
3709
3710         adapter = (struct adapter *)arg1;
3711         ifp = &adapter->arpcom.ac_if;
3712
3713         lwkt_serialize_enter(ifp->if_serializer);
3714
3715         if (result == 1)
3716                 em_print_debug_info(adapter);
3717
3718         /*
3719          * This value will cause a hex dump of the
3720          * first 32 16-bit words of the EEPROM to
3721          * the screen.
3722          */
3723         if (result == 2)
3724                 em_print_nvm_info(adapter);
3725
3726         lwkt_serialize_exit(ifp->if_serializer);
3727
3728         return (error);
3729 }
3730
3731 static int
3732 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3733 {
3734         int error, result;
3735
3736         result = -1;
3737         error = sysctl_handle_int(oidp, &result, 0, req);
3738         if (error || !req->newptr)
3739                 return (error);
3740
3741         if (result == 1) {
3742                 struct adapter *adapter = (struct adapter *)arg1;
3743                 struct ifnet *ifp = &adapter->arpcom.ac_if;
3744
3745                 lwkt_serialize_enter(ifp->if_serializer);
3746                 em_print_hw_stats(adapter);
3747                 lwkt_serialize_exit(ifp->if_serializer);
3748         }
3749         return (error);
3750 }
3751
3752 static int
3753 em_sysctl_int_delay(SYSCTL_HANDLER_ARGS)
3754 {
3755         struct em_int_delay_info *info;
3756         struct adapter *adapter;
3757         struct ifnet *ifp;
3758         uint32_t regval;
3759         int error, usecs, ticks;
3760
3761         info = (struct em_int_delay_info *)arg1;
3762         usecs = info->value;
3763         error = sysctl_handle_int(oidp, &usecs, 0, req);
3764         if (error != 0 || req->newptr == NULL)
3765                 return (error);
3766         if (usecs < 0 || usecs > EM_TICKS_TO_USECS(65535))
3767                 return (EINVAL);
3768         info->value = usecs;
3769         ticks = EM_USECS_TO_TICKS(usecs);
3770
3771         adapter = info->adapter;
3772         ifp = &adapter->arpcom.ac_if;
3773
3774         lwkt_serialize_enter(ifp->if_serializer);
3775
3776         regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
3777         regval = (regval & ~0xffff) | (ticks & 0xffff);
3778         /* Handle a few special cases. */
3779         switch (info->offset) {
3780         case E1000_RDTR:
3781                 break;
3782
3783         case E1000_TIDV:
3784                 if (ticks == 0) {
3785                         adapter->txd_cmd &= ~E1000_TXD_CMD_IDE;
3786                         /* Don't write 0 into the TIDV register. */
3787                         regval++;
3788                 } else {
3789                         adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3790                 }
3791                 break;
3792         }
3793         E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
3794
3795         lwkt_serialize_exit(ifp->if_serializer);
3796         return (0);
3797 }
3798
3799 static void
3800 em_add_int_delay_sysctl(struct adapter *adapter, const char *name,
3801         const char *description, struct em_int_delay_info *info,
3802         int offset, int value)
3803 {
3804         info->adapter = adapter;
3805         info->offset = offset;
3806         info->value = value;
3807
3808         if (adapter->sysctl_tree != NULL) {
3809                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3810                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3811                     OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW,
3812                     info, 0, em_sysctl_int_delay, "I", description);
3813         }
3814 }
3815
3816 static void
3817 em_add_sysctl(struct adapter *adapter)
3818 {
3819 #ifdef PROFILE_SERIALIZER
3820         struct ifnet *ifp = &adapter->arpcom.ac_if;
3821 #endif
3822
3823         sysctl_ctx_init(&adapter->sysctl_ctx);
3824         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
3825                                         SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
3826                                         device_get_nameunit(adapter->dev),
3827                                         CTLFLAG_RD, 0, "");
3828         if (adapter->sysctl_tree == NULL) {
3829                 device_printf(adapter->dev, "can't add sysctl node\n");
3830         } else {
3831                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3832                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3833                     OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3834                     em_sysctl_debug_info, "I", "Debug Information");
3835
3836                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3837                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3838                     OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3839                     em_sysctl_stats, "I", "Statistics");
3840
3841                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3842                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3843                     OID_AUTO, "rxd", CTLFLAG_RD,
3844                     &adapter->num_rx_desc, 0, NULL);
3845                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3846                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3847                     OID_AUTO, "txd", CTLFLAG_RD,
3848                     &adapter->num_tx_desc, 0, NULL);
3849
3850 #ifdef PROFILE_SERIALIZER
3851                 SYSCTL_ADD_UINT(&adapter->sysctl_ctx,
3852                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3853                     OID_AUTO, "serializer_sleep", CTLFLAG_RW,
3854                     &ifp->if_serializer->sleep_cnt, 0, NULL);
3855                 SYSCTL_ADD_UINT(&adapter->sysctl_ctx,
3856                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3857                     OID_AUTO, "serializer_tryfail", CTLFLAG_RW,
3858                     &ifp->if_serializer->tryfail_cnt, 0, NULL);
3859                 SYSCTL_ADD_UINT(&adapter->sysctl_ctx,
3860                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3861                     OID_AUTO, "serializer_enter", CTLFLAG_RW,
3862                     &ifp->if_serializer->enter_cnt, 0, NULL);
3863                 SYSCTL_ADD_UINT(&adapter->sysctl_ctx,
3864                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3865                     OID_AUTO, "serializer_try", CTLFLAG_RW,
3866                     &ifp->if_serializer->try_cnt, 0, NULL);
3867 #endif
3868                 if (adapter->hw.mac.type >= e1000_82540) {
3869                         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3870                             SYSCTL_CHILDREN(adapter->sysctl_tree),
3871                             OID_AUTO, "int_throttle_ceil",
3872                             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3873                             em_sysctl_int_throttle, "I",
3874                             "interrupt throttling rate");
3875                 }
3876         }
3877
3878         /* Set up some sysctls for the tunable interrupt delays */
3879         em_add_int_delay_sysctl(adapter, "rx_int_delay",
3880             "receive interrupt delay in usecs", &adapter->rx_int_delay,
3881             E1000_REGISTER(&adapter->hw, E1000_RDTR), em_rx_int_delay_dflt);
3882         em_add_int_delay_sysctl(adapter, "tx_int_delay",
3883             "transmit interrupt delay in usecs", &adapter->tx_int_delay,
3884             E1000_REGISTER(&adapter->hw, E1000_TIDV), em_tx_int_delay_dflt);
3885         if (adapter->hw.mac.type >= e1000_82540) {
3886                 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay",
3887                     "receive interrupt delay limit in usecs",
3888                     &adapter->rx_abs_int_delay,
3889                     E1000_REGISTER(&adapter->hw, E1000_RADV),
3890                     em_rx_abs_int_delay_dflt);
3891                 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay",
3892                     "transmit interrupt delay limit in usecs",
3893                     &adapter->tx_abs_int_delay,
3894                     E1000_REGISTER(&adapter->hw, E1000_TADV),
3895                     em_tx_abs_int_delay_dflt);
3896         }
3897 }
3898
3899 static int
3900 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
3901 {
3902         struct adapter *adapter = (void *)arg1;
3903         struct ifnet *ifp = &adapter->arpcom.ac_if;
3904         int error, throttle;
3905
3906         throttle = adapter->int_throttle_ceil;
3907         error = sysctl_handle_int(oidp, &throttle, 0, req);
3908         if (error || req->newptr == NULL)
3909                 return error;
3910         if (throttle < 0 || throttle > 1000000000 / 256)
3911                 return EINVAL;
3912
3913         lwkt_serialize_enter(ifp->if_serializer);
3914
3915         if (throttle) {
3916                 /*
3917                  * Set the interrupt throttling rate in 256ns increments,
3918                  * recalculate sysctl value assignment to get exact frequency.
3919                  */
3920                 throttle = 1000000000 / 256 / throttle;
3921                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
3922         } else {
3923                 adapter->int_throttle_ceil = 0;
3924         }
3925         E1000_WRITE_REG(&adapter->hw, E1000_ITR, throttle);
3926
3927         lwkt_serialize_exit(ifp->if_serializer);
3928
3929         if (bootverbose) {
3930                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
3931                           adapter->int_throttle_ceil);
3932         }
3933         return 0;
3934 }