usb4bsd: Bring in FreeBSD's libusbhid, usbhidctl and USB kernel code.
[dragonfly.git] / sys / bus / u4b / controller / ohci.c
1 /*-
2  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3  * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
4  * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 /*
32  * USB Open Host Controller driver.
33  *
34  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35  * USB spec:  http://www.usb.org/developers/docs/usbspec.zip
36  */
37
38 #include <sys/stdint.h>
39 #include <sys/stddef.h>
40 #include <sys/param.h>
41 #include <sys/queue.h>
42 #include <sys/types.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/bus.h>
46 #include <sys/module.h>
47 #include <sys/lock.h>
48 #include <sys/mutex.h>
49 #include <sys/condvar.h>
50 #include <sys/sysctl.h>
51 #include <sys/sx.h>
52 #include <sys/unistd.h>
53 #include <sys/callout.h>
54 #include <sys/malloc.h>
55 #include <sys/priv.h>
56
57 #include <dev/usb/usb.h>
58 #include <dev/usb/usbdi.h>
59
60 #define USB_DEBUG_VAR ohcidebug
61
62 #include <dev/usb/usb_core.h>
63 #include <dev/usb/usb_debug.h>
64 #include <dev/usb/usb_busdma.h>
65 #include <dev/usb/usb_process.h>
66 #include <dev/usb/usb_transfer.h>
67 #include <dev/usb/usb_device.h>
68 #include <dev/usb/usb_hub.h>
69 #include <dev/usb/usb_util.h>
70
71 #include <dev/usb/usb_controller.h>
72 #include <dev/usb/usb_bus.h>
73 #include <dev/usb/controller/ohci.h>
74 #include <dev/usb/controller/ohcireg.h>
75
76 #define OHCI_BUS2SC(bus) \
77    ((ohci_softc_t *)(((uint8_t *)(bus)) - \
78     ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
79
80 #ifdef USB_DEBUG
81 static int ohcidebug = 0;
82
83 static SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
84 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
85     &ohcidebug, 0, "ohci debug level");
86
87 TUNABLE_INT("hw.usb.ohci.debug", &ohcidebug);
88
89 static void ohci_dumpregs(ohci_softc_t *);
90 static void ohci_dump_tds(ohci_td_t *);
91 static uint8_t ohci_dump_td(ohci_td_t *);
92 static void ohci_dump_ed(ohci_ed_t *);
93 static uint8_t ohci_dump_itd(ohci_itd_t *);
94 static void ohci_dump_itds(ohci_itd_t *);
95
96 #endif
97
98 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
99                         BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
100 #define OWRITE1(sc, r, x) \
101  do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
102 #define OWRITE2(sc, r, x) \
103  do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
104 #define OWRITE4(sc, r, x) \
105  do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
106 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
107 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
108 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
109
110 #define OHCI_INTR_ENDPT 1
111
112 extern struct usb_bus_methods ohci_bus_methods;
113 extern struct usb_pipe_methods ohci_device_bulk_methods;
114 extern struct usb_pipe_methods ohci_device_ctrl_methods;
115 extern struct usb_pipe_methods ohci_device_intr_methods;
116 extern struct usb_pipe_methods ohci_device_isoc_methods;
117
118 static void ohci_do_poll(struct usb_bus *bus);
119 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
120 static void ohci_timeout(void *arg);
121 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
122 static void ohci_root_intr(ohci_softc_t *sc);
123
124 struct ohci_std_temp {
125         struct usb_page_cache *pc;
126         ohci_td_t *td;
127         ohci_td_t *td_next;
128         uint32_t average;
129         uint32_t td_flags;
130         uint32_t len;
131         uint16_t max_frame_size;
132         uint8_t shortpkt;
133         uint8_t setup_alt_next;
134         uint8_t last_frame;
135 };
136
137 static struct ohci_hcca *
138 ohci_get_hcca(ohci_softc_t *sc)
139 {
140         usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
141         return (sc->sc_hcca_p);
142 }
143
144 void
145 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
146 {
147         struct ohci_softc *sc = OHCI_BUS2SC(bus);
148         uint32_t i;
149
150         cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
151             sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
152
153         cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
154             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
155
156         cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
157             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
158
159         cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
160             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
161
162         for (i = 0; i != OHCI_NO_EDS; i++) {
163                 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
164                     sizeof(ohci_ed_t), OHCI_ED_ALIGN);
165         }
166 }
167
168 static usb_error_t
169 ohci_controller_init(ohci_softc_t *sc, int do_suspend)
170 {
171         struct usb_page_search buf_res;
172         uint32_t i;
173         uint32_t ctl;
174         uint32_t ival;
175         uint32_t hcr;
176         uint32_t fm;
177         uint32_t per;
178         uint32_t desca;
179
180         /* Determine in what context we are running. */
181         ctl = OREAD4(sc, OHCI_CONTROL);
182         if (ctl & OHCI_IR) {
183                 /* SMM active, request change */
184                 DPRINTF("SMM active, request owner change\n");
185                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
186                 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
187                         usb_pause_mtx(NULL, hz / 1000);
188                         ctl = OREAD4(sc, OHCI_CONTROL);
189                 }
190                 if (ctl & OHCI_IR) {
191                         device_printf(sc->sc_bus.bdev,
192                             "SMM does not respond, resetting\n");
193                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
194                         goto reset;
195                 }
196         } else {
197                 DPRINTF("cold started\n");
198 reset:
199                 /* controller was cold started */
200                 usb_pause_mtx(NULL,
201                     USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
202         }
203
204         /*
205          * This reset should not be necessary according to the OHCI spec, but
206          * without it some controllers do not start.
207          */
208         DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
209         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
210
211         usb_pause_mtx(NULL,
212             USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
213
214         /* we now own the host controller and the bus has been reset */
215         ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
216
217         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR);     /* Reset HC */
218         /* nominal time for a reset is 10 us */
219         for (i = 0; i < 10; i++) {
220                 DELAY(10);
221                 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
222                 if (!hcr) {
223                         break;
224                 }
225         }
226         if (hcr) {
227                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
228                 return (USB_ERR_IOERROR);
229         }
230 #ifdef USB_DEBUG
231         if (ohcidebug > 15) {
232                 ohci_dumpregs(sc);
233         }
234 #endif
235
236         if (do_suspend) {
237                 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND);
238                 return (USB_ERR_NORMAL_COMPLETION);
239         }
240
241         /* The controller is now in SUSPEND state, we have 2ms to finish. */
242
243         /* set up HC registers */
244         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
245         OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
246
247         usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
248         OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
249
250         usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
251         OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
252
253         /* disable all interrupts and then switch on all desired interrupts */
254         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
255         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
256         /* switch on desired functional features */
257         ctl = OREAD4(sc, OHCI_CONTROL);
258         ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
259         ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
260             OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
261         /* And finally start it! */
262         OWRITE4(sc, OHCI_CONTROL, ctl);
263
264         /*
265          * The controller is now OPERATIONAL.  Set a some final
266          * registers that should be set earlier, but that the
267          * controller ignores when in the SUSPEND state.
268          */
269         fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
270         fm |= OHCI_FSMPS(ival) | ival;
271         OWRITE4(sc, OHCI_FM_INTERVAL, fm);
272         per = OHCI_PERIODIC(ival);      /* 90% periodic */
273         OWRITE4(sc, OHCI_PERIODIC_START, per);
274
275         /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
276         desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
277         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
278         OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
279         usb_pause_mtx(NULL,
280             USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
281         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
282
283         /*
284          * The AMD756 requires a delay before re-reading the register,
285          * otherwise it will occasionally report 0 ports.
286          */
287         sc->sc_noport = 0;
288         for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
289                 usb_pause_mtx(NULL,
290                     USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
291                 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
292         }
293
294 #ifdef USB_DEBUG
295         if (ohcidebug > 5) {
296                 ohci_dumpregs(sc);
297         }
298 #endif
299         return (USB_ERR_NORMAL_COMPLETION);
300 }
301
302 static struct ohci_ed *
303 ohci_init_ed(struct usb_page_cache *pc)
304 {
305         struct usb_page_search buf_res;
306         struct ohci_ed *ed;
307
308         usbd_get_page(pc, 0, &buf_res);
309
310         ed = buf_res.buffer;
311
312         ed->ed_self = htole32(buf_res.physaddr);
313         ed->ed_flags = htole32(OHCI_ED_SKIP);
314         ed->page_cache = pc;
315
316         return (ed);
317 }
318
319 usb_error_t
320 ohci_init(ohci_softc_t *sc)
321 {
322         struct usb_page_search buf_res;
323         uint16_t i;
324         uint16_t bit;
325         uint16_t x;
326         uint16_t y;
327
328         DPRINTF("start\n");
329
330         sc->sc_eintrs = OHCI_NORMAL_INTRS;
331
332         /*
333          * Setup all ED's
334          */
335
336         sc->sc_ctrl_p_last =
337             ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
338
339         sc->sc_bulk_p_last =
340             ohci_init_ed(&sc->sc_hw.bulk_start_pc);
341
342         sc->sc_isoc_p_last =
343             ohci_init_ed(&sc->sc_hw.isoc_start_pc);
344
345         for (i = 0; i != OHCI_NO_EDS; i++) {
346                 sc->sc_intr_p_last[i] =
347                     ohci_init_ed(sc->sc_hw.intr_start_pc + i);
348         }
349
350         /*
351          * the QHs are arranged to give poll intervals that are
352          * powers of 2 times 1ms
353          */
354         bit = OHCI_NO_EDS / 2;
355         while (bit) {
356                 x = bit;
357                 while (x & bit) {
358                         ohci_ed_t *ed_x;
359                         ohci_ed_t *ed_y;
360
361                         y = (x ^ bit) | (bit / 2);
362
363                         /*
364                          * the next QH has half the poll interval
365                          */
366                         ed_x = sc->sc_intr_p_last[x];
367                         ed_y = sc->sc_intr_p_last[y];
368
369                         ed_x->next = NULL;
370                         ed_x->ed_next = ed_y->ed_self;
371
372                         x++;
373                 }
374                 bit >>= 1;
375         }
376
377         if (1) {
378
379                 ohci_ed_t *ed_int;
380                 ohci_ed_t *ed_isc;
381
382                 ed_int = sc->sc_intr_p_last[0];
383                 ed_isc = sc->sc_isoc_p_last;
384
385                 /* the last (1ms) QH */
386                 ed_int->next = ed_isc;
387                 ed_int->ed_next = ed_isc->ed_self;
388         }
389         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
390
391         sc->sc_hcca_p = buf_res.buffer;
392
393         /*
394          * Fill HCCA interrupt table.  The bit reversal is to get
395          * the tree set up properly to spread the interrupts.
396          */
397         for (i = 0; i != OHCI_NO_INTRS; i++) {
398                 sc->sc_hcca_p->hcca_interrupt_table[i] =
399                     sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
400         }
401         /* flush all cache into memory */
402
403         usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
404
405         /* set up the bus struct */
406         sc->sc_bus.methods = &ohci_bus_methods;
407
408         usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
409
410 #ifdef USB_DEBUG
411         if (ohcidebug > 15) {
412                 for (i = 0; i != OHCI_NO_EDS; i++) {
413                         printf("ed#%d ", i);
414                         ohci_dump_ed(sc->sc_intr_p_last[i]);
415                 }
416                 printf("iso ");
417                 ohci_dump_ed(sc->sc_isoc_p_last);
418         }
419 #endif
420
421         sc->sc_bus.usbrev = USB_REV_1_0;
422
423         if (ohci_controller_init(sc, 0) != 0)
424                 return (USB_ERR_INVAL);
425
426         /* catch any lost interrupts */
427         ohci_do_poll(&sc->sc_bus);
428         return (USB_ERR_NORMAL_COMPLETION);
429 }
430
431 /*
432  * shut down the controller when the system is going down
433  */
434 void
435 ohci_detach(struct ohci_softc *sc)
436 {
437         USB_BUS_LOCK(&sc->sc_bus);
438
439         usb_callout_stop(&sc->sc_tmo_rhsc);
440
441         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
442         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
443
444         USB_BUS_UNLOCK(&sc->sc_bus);
445
446         /* XXX let stray task complete */
447         usb_pause_mtx(NULL, hz / 20);
448
449         usb_callout_drain(&sc->sc_tmo_rhsc);
450 }
451
452 static void
453 ohci_suspend(ohci_softc_t *sc)
454 {
455         DPRINTF("\n");
456
457 #ifdef USB_DEBUG
458         if (ohcidebug > 2)
459                 ohci_dumpregs(sc);
460 #endif
461
462         /* reset HC and leave it suspended */
463         ohci_controller_init(sc, 1);
464 }
465
466 static void
467 ohci_resume(ohci_softc_t *sc)
468 {
469         DPRINTF("\n");
470
471 #ifdef USB_DEBUG
472         if (ohcidebug > 2)
473                 ohci_dumpregs(sc);
474 #endif
475
476         /* some broken BIOSes never initialize the Controller chip */
477         ohci_controller_init(sc, 0);
478
479         /* catch any lost interrupts */
480         ohci_do_poll(&sc->sc_bus);
481 }
482
483 #ifdef USB_DEBUG
484 static void
485 ohci_dumpregs(ohci_softc_t *sc)
486 {
487         struct ohci_hcca *hcca;
488
489         DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
490             OREAD4(sc, OHCI_REVISION),
491             OREAD4(sc, OHCI_CONTROL),
492             OREAD4(sc, OHCI_COMMAND_STATUS));
493         DPRINTF("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
494             OREAD4(sc, OHCI_INTERRUPT_STATUS),
495             OREAD4(sc, OHCI_INTERRUPT_ENABLE),
496             OREAD4(sc, OHCI_INTERRUPT_DISABLE));
497         DPRINTF("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
498             OREAD4(sc, OHCI_HCCA),
499             OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
500             OREAD4(sc, OHCI_CONTROL_HEAD_ED));
501         DPRINTF("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
502             OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
503             OREAD4(sc, OHCI_BULK_HEAD_ED),
504             OREAD4(sc, OHCI_BULK_CURRENT_ED));
505         DPRINTF("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
506             OREAD4(sc, OHCI_DONE_HEAD),
507             OREAD4(sc, OHCI_FM_INTERVAL),
508             OREAD4(sc, OHCI_FM_REMAINING));
509         DPRINTF("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
510             OREAD4(sc, OHCI_FM_NUMBER),
511             OREAD4(sc, OHCI_PERIODIC_START),
512             OREAD4(sc, OHCI_LS_THRESHOLD));
513         DPRINTF("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
514             OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
515             OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
516             OREAD4(sc, OHCI_RH_STATUS));
517         DPRINTF("               port1=0x%08x port2=0x%08x\n",
518             OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
519             OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
520
521         hcca = ohci_get_hcca(sc);
522
523         DPRINTF("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
524             le32toh(hcca->hcca_frame_number),
525             le32toh(hcca->hcca_done_head));
526 }
527 static void
528 ohci_dump_tds(ohci_td_t *std)
529 {
530         for (; std; std = std->obj_next) {
531                 if (ohci_dump_td(std)) {
532                         break;
533                 }
534         }
535 }
536
537 static uint8_t
538 ohci_dump_td(ohci_td_t *std)
539 {
540         uint32_t td_flags;
541         uint8_t temp;
542
543         usb_pc_cpu_invalidate(std->page_cache);
544
545         td_flags = le32toh(std->td_flags);
546         temp = (std->td_next == 0);
547
548         printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
549             "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
550             std, le32toh(std->td_self),
551             (td_flags & OHCI_TD_R) ? "-R" : "",
552             (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
553             (td_flags & OHCI_TD_IN) ? "-IN" : "",
554             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
555             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
556             OHCI_TD_GET_DI(td_flags),
557             OHCI_TD_GET_EC(td_flags),
558             OHCI_TD_GET_CC(td_flags),
559             le32toh(std->td_cbp),
560             le32toh(std->td_next),
561             le32toh(std->td_be));
562
563         return (temp);
564 }
565
566 static uint8_t
567 ohci_dump_itd(ohci_itd_t *sitd)
568 {
569         uint32_t itd_flags;
570         uint16_t i;
571         uint8_t temp;
572
573         usb_pc_cpu_invalidate(sitd->page_cache);
574
575         itd_flags = le32toh(sitd->itd_flags);
576         temp = (sitd->itd_next == 0);
577
578         printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
579             "bp0=0x%08x next=0x%08x be=0x%08x\n",
580             sitd, le32toh(sitd->itd_self),
581             OHCI_ITD_GET_SF(itd_flags),
582             OHCI_ITD_GET_DI(itd_flags),
583             OHCI_ITD_GET_FC(itd_flags),
584             OHCI_ITD_GET_CC(itd_flags),
585             le32toh(sitd->itd_bp0),
586             le32toh(sitd->itd_next),
587             le32toh(sitd->itd_be));
588         for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
589                 printf("offs[%d]=0x%04x ", i,
590                     (uint32_t)le16toh(sitd->itd_offset[i]));
591         }
592         printf("\n");
593
594         return (temp);
595 }
596
597 static void
598 ohci_dump_itds(ohci_itd_t *sitd)
599 {
600         for (; sitd; sitd = sitd->obj_next) {
601                 if (ohci_dump_itd(sitd)) {
602                         break;
603                 }
604         }
605 }
606
607 static void
608 ohci_dump_ed(ohci_ed_t *sed)
609 {
610         uint32_t ed_flags;
611         uint32_t ed_headp;
612
613         usb_pc_cpu_invalidate(sed->page_cache);
614
615         ed_flags = le32toh(sed->ed_flags);
616         ed_headp = le32toh(sed->ed_headp);
617
618         printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
619             "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
620             sed, le32toh(sed->ed_self),
621             OHCI_ED_GET_FA(ed_flags),
622             OHCI_ED_GET_EN(ed_flags),
623             OHCI_ED_GET_MAXP(ed_flags),
624             (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
625             (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
626             (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
627             (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
628             (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
629             le32toh(sed->ed_tailp),
630             (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
631             (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
632             le32toh(sed->ed_headp),
633             le32toh(sed->ed_next));
634 }
635
636 #endif
637
638 static void
639 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
640 {
641         /* check for early completion */
642         if (ohci_check_transfer(xfer)) {
643                 return;
644         }
645         /* put transfer on interrupt queue */
646         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
647
648         /* start timeout, if any */
649         if (xfer->timeout != 0) {
650                 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
651         }
652 }
653
654 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
655 static ohci_ed_t *
656 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
657 {
658         DPRINTFN(11, "%p to %p\n", sed, last);
659
660         if (sed->prev != NULL) {
661                 /* should not happen */
662                 DPRINTFN(0, "ED already linked!\n");
663                 return (last);
664         }
665         /* (sc->sc_bus.bus_mtx) must be locked */
666
667         sed->next = last->next;
668         sed->ed_next = last->ed_next;
669         sed->ed_tailp = 0;
670
671         sed->prev = last;
672
673         usb_pc_cpu_flush(sed->page_cache);
674
675         /*
676          * the last->next->prev is never followed: sed->next->prev = sed;
677          */
678
679         last->next = sed;
680         last->ed_next = sed->ed_self;
681
682         usb_pc_cpu_flush(last->page_cache);
683
684         return (sed);
685 }
686
687 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
688 static ohci_ed_t *
689 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
690 {
691         DPRINTFN(11, "%p from %p\n", sed, last);
692
693         /* (sc->sc_bus.bus_mtx) must be locked */
694
695         /* only remove if not removed from a queue */
696         if (sed->prev) {
697
698                 sed->prev->next = sed->next;
699                 sed->prev->ed_next = sed->ed_next;
700
701                 usb_pc_cpu_flush(sed->prev->page_cache);
702
703                 if (sed->next) {
704                         sed->next->prev = sed->prev;
705                         usb_pc_cpu_flush(sed->next->page_cache);
706                 }
707                 last = ((last == sed) ? sed->prev : last);
708
709                 sed->prev = 0;
710
711                 usb_pc_cpu_flush(sed->page_cache);
712         }
713         return (last);
714 }
715
716 static void
717 ohci_isoc_done(struct usb_xfer *xfer)
718 {
719         uint8_t nframes;
720         uint32_t *plen = xfer->frlengths;
721         volatile uint16_t *olen;
722         uint16_t len = 0;
723         ohci_itd_t *td = xfer->td_transfer_first;
724
725         while (1) {
726                 if (td == NULL) {
727                         panic("%s:%d: out of TD's\n",
728                             __FUNCTION__, __LINE__);
729                 }
730 #ifdef USB_DEBUG
731                 if (ohcidebug > 5) {
732                         DPRINTF("isoc TD\n");
733                         ohci_dump_itd(td);
734                 }
735 #endif
736                 usb_pc_cpu_invalidate(td->page_cache);
737
738                 nframes = td->frames;
739                 olen = &td->itd_offset[0];
740
741                 if (nframes > 8) {
742                         nframes = 8;
743                 }
744                 while (nframes--) {
745                         len = le16toh(*olen);
746
747                         if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
748                                 len = 0;
749                         } else {
750                                 len &= ((1 << 12) - 1);
751                         }
752
753                         if (len > *plen) {
754                                 len = 0;/* invalid length */
755                         }
756                         *plen = len;
757                         plen++;
758                         olen++;
759                 }
760
761                 if (((void *)td) == xfer->td_transfer_last) {
762                         break;
763                 }
764                 td = td->obj_next;
765         }
766
767         xfer->aframes = xfer->nframes;
768         ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
769 }
770
771 #ifdef USB_DEBUG
772 static const char *const
773         ohci_cc_strs[] =
774 {
775         "NO_ERROR",
776         "CRC",
777         "BIT_STUFFING",
778         "DATA_TOGGLE_MISMATCH",
779
780         "STALL",
781         "DEVICE_NOT_RESPONDING",
782         "PID_CHECK_FAILURE",
783         "UNEXPECTED_PID",
784
785         "DATA_OVERRUN",
786         "DATA_UNDERRUN",
787         "BUFFER_OVERRUN",
788         "BUFFER_UNDERRUN",
789
790         "reserved",
791         "reserved",
792         "NOT_ACCESSED",
793         "NOT_ACCESSED"
794 };
795
796 #endif
797
798 static usb_error_t
799 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
800 {
801         ohci_td_t *td;
802         ohci_td_t *td_alt_next;
803         uint32_t temp;
804         uint32_t phy_start;
805         uint32_t phy_end;
806         uint32_t td_flags;
807         uint16_t cc;
808
809         td = xfer->td_transfer_cache;
810         td_alt_next = td->alt_next;
811         td_flags = 0;
812
813         if (xfer->aframes != xfer->nframes) {
814                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
815         }
816         while (1) {
817
818                 usb_pc_cpu_invalidate(td->page_cache);
819                 phy_start = le32toh(td->td_cbp);
820                 td_flags = le32toh(td->td_flags);
821                 cc = OHCI_TD_GET_CC(td_flags);
822
823                 if (phy_start) {
824                         /*
825                          * short transfer - compute the number of remaining
826                          * bytes in the hardware buffer:
827                          */
828                         phy_end = le32toh(td->td_be);
829                         temp = (OHCI_PAGE(phy_start ^ phy_end) ?
830                             (OHCI_PAGE_SIZE + 1) : 0x0001);
831                         temp += OHCI_PAGE_OFFSET(phy_end);
832                         temp -= OHCI_PAGE_OFFSET(phy_start);
833
834                         if (temp > td->len) {
835                                 /* guard against corruption */
836                                 cc = OHCI_CC_STALL;
837                         } else if (xfer->aframes != xfer->nframes) {
838                                 /*
839                                  * Sum up total transfer length
840                                  * in "frlengths[]":
841                                  */
842                                 xfer->frlengths[xfer->aframes] += td->len - temp;
843                         }
844                 } else {
845                         if (xfer->aframes != xfer->nframes) {
846                                 /* transfer was complete */
847                                 xfer->frlengths[xfer->aframes] += td->len;
848                         }
849                 }
850                 /* Check for last transfer */
851                 if (((void *)td) == xfer->td_transfer_last) {
852                         td = NULL;
853                         break;
854                 }
855                 /* Check transfer status */
856                 if (cc) {
857                         /* the transfer is finished */
858                         td = NULL;
859                         break;
860                 }
861                 /* Check for short transfer */
862                 if (phy_start) {
863                         if (xfer->flags_int.short_frames_ok) {
864                                 /* follow alt next */
865                                 td = td->alt_next;
866                         } else {
867                                 /* the transfer is finished */
868                                 td = NULL;
869                         }
870                         break;
871                 }
872                 td = td->obj_next;
873
874                 if (td->alt_next != td_alt_next) {
875                         /* this USB frame is complete */
876                         break;
877                 }
878         }
879
880         /* update transfer cache */
881
882         xfer->td_transfer_cache = td;
883
884         DPRINTFN(16, "error cc=%d (%s)\n",
885             cc, ohci_cc_strs[cc]);
886
887         return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
888             (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
889 }
890
891 static void
892 ohci_non_isoc_done(struct usb_xfer *xfer)
893 {
894         usb_error_t err = 0;
895
896         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
897             xfer, xfer->endpoint);
898
899 #ifdef USB_DEBUG
900         if (ohcidebug > 10) {
901                 ohci_dump_tds(xfer->td_transfer_first);
902         }
903 #endif
904
905         /* reset scanner */
906
907         xfer->td_transfer_cache = xfer->td_transfer_first;
908
909         if (xfer->flags_int.control_xfr) {
910
911                 if (xfer->flags_int.control_hdr) {
912
913                         err = ohci_non_isoc_done_sub(xfer);
914                 }
915                 xfer->aframes = 1;
916
917                 if (xfer->td_transfer_cache == NULL) {
918                         goto done;
919                 }
920         }
921         while (xfer->aframes != xfer->nframes) {
922
923                 err = ohci_non_isoc_done_sub(xfer);
924                 xfer->aframes++;
925
926                 if (xfer->td_transfer_cache == NULL) {
927                         goto done;
928                 }
929         }
930
931         if (xfer->flags_int.control_xfr &&
932             !xfer->flags_int.control_act) {
933
934                 err = ohci_non_isoc_done_sub(xfer);
935         }
936 done:
937         ohci_device_done(xfer, err);
938 }
939
940 /*------------------------------------------------------------------------*
941  *      ohci_check_transfer_sub
942  *------------------------------------------------------------------------*/
943 static void
944 ohci_check_transfer_sub(struct usb_xfer *xfer)
945 {
946         ohci_td_t *td;
947         ohci_ed_t *ed;
948         uint32_t phy_start;
949         uint32_t td_flags;
950         uint32_t td_next;
951         uint16_t cc;
952
953         td = xfer->td_transfer_cache;
954
955         while (1) {
956
957                 usb_pc_cpu_invalidate(td->page_cache);
958                 phy_start = le32toh(td->td_cbp);
959                 td_flags = le32toh(td->td_flags);
960                 td_next = le32toh(td->td_next);
961
962                 /* Check for last transfer */
963                 if (((void *)td) == xfer->td_transfer_last) {
964                         /* the transfer is finished */
965                         td = NULL;
966                         break;
967                 }
968                 /* Check transfer status */
969                 cc = OHCI_TD_GET_CC(td_flags);
970                 if (cc) {
971                         /* the transfer is finished */
972                         td = NULL;
973                         break;
974                 }
975                 /*
976                  * Check if we reached the last packet
977                  * or if there is a short packet:
978                  */
979
980                 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
981                         /* follow alt next */
982                         td = td->alt_next;
983                         break;
984                 }
985                 td = td->obj_next;
986         }
987
988         /* update transfer cache */
989
990         xfer->td_transfer_cache = td;
991
992         if (td) {
993
994                 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
995
996                 ed->ed_headp = td->td_self;
997                 usb_pc_cpu_flush(ed->page_cache);
998
999                 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
1000
1001                 /*
1002                  * Make sure that the OHCI re-scans the schedule by
1003                  * writing the BLF and CLF bits:
1004                  */
1005
1006                 if (xfer->xroot->udev->flags.self_suspended) {
1007                         /* nothing to do */
1008                 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1009                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1010
1011                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1012                 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1013                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1014
1015                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1016                 }
1017         }
1018 }
1019
1020 /*------------------------------------------------------------------------*
1021  *      ohci_check_transfer
1022  *
1023  * Return values:
1024  *    0: USB transfer is not finished
1025  * Else: USB transfer is finished
1026  *------------------------------------------------------------------------*/
1027 static uint8_t
1028 ohci_check_transfer(struct usb_xfer *xfer)
1029 {
1030         ohci_ed_t *ed;
1031         uint32_t ed_headp;
1032         uint32_t ed_tailp;
1033
1034         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1035
1036         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1037
1038         usb_pc_cpu_invalidate(ed->page_cache);
1039         ed_headp = le32toh(ed->ed_headp);
1040         ed_tailp = le32toh(ed->ed_tailp);
1041
1042         if ((ed_headp & OHCI_HALTED) ||
1043             (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1044                 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1045                         /* isochronous transfer */
1046                         ohci_isoc_done(xfer);
1047                 } else {
1048                         if (xfer->flags_int.short_frames_ok) {
1049                                 ohci_check_transfer_sub(xfer);
1050                                 if (xfer->td_transfer_cache) {
1051                                         /* not finished yet */
1052                                         return (0);
1053                                 }
1054                         }
1055                         /* store data-toggle */
1056                         if (ed_headp & OHCI_TOGGLECARRY) {
1057                                 xfer->endpoint->toggle_next = 1;
1058                         } else {
1059                                 xfer->endpoint->toggle_next = 0;
1060                         }
1061
1062                         /* non-isochronous transfer */
1063                         ohci_non_isoc_done(xfer);
1064                 }
1065                 return (1);
1066         }
1067         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1068         return (0);
1069 }
1070
1071 static void
1072 ohci_rhsc_enable(ohci_softc_t *sc)
1073 {
1074         DPRINTFN(5, "\n");
1075
1076         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1077
1078         sc->sc_eintrs |= OHCI_RHSC;
1079         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1080
1081         /* acknowledge any RHSC interrupt */
1082         OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1083
1084         ohci_root_intr(sc);
1085 }
1086
1087 static void
1088 ohci_interrupt_poll(ohci_softc_t *sc)
1089 {
1090         struct usb_xfer *xfer;
1091
1092 repeat:
1093         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1094                 /*
1095                  * check if transfer is transferred
1096                  */
1097                 if (ohci_check_transfer(xfer)) {
1098                         /* queue has been modified */
1099                         goto repeat;
1100                 }
1101         }
1102 }
1103
1104 /*------------------------------------------------------------------------*
1105  *      ohci_interrupt - OHCI interrupt handler
1106  *
1107  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1108  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1109  * is present !
1110  *------------------------------------------------------------------------*/
1111 void
1112 ohci_interrupt(ohci_softc_t *sc)
1113 {
1114         struct ohci_hcca *hcca;
1115         uint32_t status;
1116         uint32_t done;
1117
1118         USB_BUS_LOCK(&sc->sc_bus);
1119
1120         hcca = ohci_get_hcca(sc);
1121
1122         DPRINTFN(16, "real interrupt\n");
1123
1124 #ifdef USB_DEBUG
1125         if (ohcidebug > 15) {
1126                 ohci_dumpregs(sc);
1127         }
1128 #endif
1129
1130         done = le32toh(hcca->hcca_done_head);
1131
1132         /*
1133          * The LSb of done is used to inform the HC Driver that an interrupt
1134          * condition exists for both the Done list and for another event
1135          * recorded in HcInterruptStatus. On an interrupt from the HC, the
1136          * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1137          * the interrupt was caused by other than the HccaDoneHead update
1138          * and the HcInterruptStatus register needs to be accessed to
1139          * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1140          * then a Done list update interrupt is indicated and if the LSb of
1141          * done is nonzero, then an additional interrupt event is indicated
1142          * and HcInterruptStatus should be checked to determine its cause.
1143          */
1144         if (done != 0) {
1145                 status = 0;
1146
1147                 if (done & ~OHCI_DONE_INTRS) {
1148                         status |= OHCI_WDH;
1149                 }
1150                 if (done & OHCI_DONE_INTRS) {
1151                         status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1152                 }
1153                 hcca->hcca_done_head = 0;
1154
1155                 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1156         } else {
1157                 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1158         }
1159
1160         status &= ~OHCI_MIE;
1161         if (status == 0) {
1162                 /*
1163                  * nothing to be done (PCI shared
1164                  * interrupt)
1165                  */
1166                 goto done;
1167         }
1168         OWRITE4(sc, OHCI_INTERRUPT_STATUS, status);     /* Acknowledge */
1169
1170         status &= sc->sc_eintrs;
1171         if (status == 0) {
1172                 goto done;
1173         }
1174         if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1175 #if 0
1176                 if (status & OHCI_SO) {
1177                         /* XXX do what */
1178                 }
1179 #endif
1180                 if (status & OHCI_RD) {
1181                         printf("%s: resume detect\n", __FUNCTION__);
1182                         /* XXX process resume detect */
1183                 }
1184                 if (status & OHCI_UE) {
1185                         printf("%s: unrecoverable error, "
1186                             "controller halted\n", __FUNCTION__);
1187                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1188                         /* XXX what else */
1189                 }
1190                 if (status & OHCI_RHSC) {
1191                         /*
1192                          * Disable RHSC interrupt for now, because it will be
1193                          * on until the port has been reset.
1194                          */
1195                         sc->sc_eintrs &= ~OHCI_RHSC;
1196                         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1197
1198                         ohci_root_intr(sc);
1199
1200                         /* do not allow RHSC interrupts > 1 per second */
1201                         usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1202                             (void *)&ohci_rhsc_enable, sc);
1203                 }
1204         }
1205         status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1206         if (status != 0) {
1207                 /* Block unprocessed interrupts. XXX */
1208                 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1209                 sc->sc_eintrs &= ~status;
1210                 printf("%s: blocking intrs 0x%x\n",
1211                     __FUNCTION__, status);
1212         }
1213         /* poll all the USB transfers */
1214         ohci_interrupt_poll(sc);
1215
1216 done:
1217         USB_BUS_UNLOCK(&sc->sc_bus);
1218 }
1219
1220 /*
1221  * called when a request does not complete
1222  */
1223 static void
1224 ohci_timeout(void *arg)
1225 {
1226         struct usb_xfer *xfer = arg;
1227
1228         DPRINTF("xfer=%p\n", xfer);
1229
1230         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1231
1232         /* transfer is transferred */
1233         ohci_device_done(xfer, USB_ERR_TIMEOUT);
1234 }
1235
1236 static void
1237 ohci_do_poll(struct usb_bus *bus)
1238 {
1239         struct ohci_softc *sc = OHCI_BUS2SC(bus);
1240
1241         USB_BUS_LOCK(&sc->sc_bus);
1242         ohci_interrupt_poll(sc);
1243         USB_BUS_UNLOCK(&sc->sc_bus);
1244 }
1245
1246 static void
1247 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1248 {
1249         struct usb_page_search buf_res;
1250         ohci_td_t *td;
1251         ohci_td_t *td_next;
1252         ohci_td_t *td_alt_next;
1253         uint32_t buf_offset;
1254         uint32_t average;
1255         uint32_t len_old;
1256         uint8_t shortpkt_old;
1257         uint8_t precompute;
1258
1259         td_alt_next = NULL;
1260         buf_offset = 0;
1261         shortpkt_old = temp->shortpkt;
1262         len_old = temp->len;
1263         precompute = 1;
1264
1265         /* software is used to detect short incoming transfers */
1266
1267         if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1268                 temp->td_flags |= htole32(OHCI_TD_R);
1269         } else {
1270                 temp->td_flags &= ~htole32(OHCI_TD_R);
1271         }
1272
1273 restart:
1274
1275         td = temp->td;
1276         td_next = temp->td_next;
1277
1278         while (1) {
1279
1280                 if (temp->len == 0) {
1281
1282                         if (temp->shortpkt) {
1283                                 break;
1284                         }
1285                         /* send a Zero Length Packet, ZLP, last */
1286
1287                         temp->shortpkt = 1;
1288                         average = 0;
1289
1290                 } else {
1291
1292                         average = temp->average;
1293
1294                         if (temp->len < average) {
1295                                 if (temp->len % temp->max_frame_size) {
1296                                         temp->shortpkt = 1;
1297                                 }
1298                                 average = temp->len;
1299                         }
1300                 }
1301
1302                 if (td_next == NULL) {
1303                         panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1304                 }
1305                 /* get next TD */
1306
1307                 td = td_next;
1308                 td_next = td->obj_next;
1309
1310                 /* check if we are pre-computing */
1311
1312                 if (precompute) {
1313
1314                         /* update remaining length */
1315
1316                         temp->len -= average;
1317
1318                         continue;
1319                 }
1320                 /* fill out current TD */
1321                 td->td_flags = temp->td_flags;
1322
1323                 /* the next TD uses TOGGLE_CARRY */
1324                 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1325
1326                 if (average == 0) {
1327                         /*
1328                          * The buffer start and end phys addresses should be
1329                          * 0x0 for a zero length packet.
1330                          */
1331                         td->td_cbp = 0;
1332                         td->td_be = 0;
1333                         td->len = 0;
1334
1335                 } else {
1336
1337                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1338                         td->td_cbp = htole32(buf_res.physaddr);
1339                         buf_offset += (average - 1);
1340
1341                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1342                         td->td_be = htole32(buf_res.physaddr);
1343                         buf_offset++;
1344
1345                         td->len = average;
1346
1347                         /* update remaining length */
1348
1349                         temp->len -= average;
1350                 }
1351
1352                 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1353                         /* we need to receive these frames one by one ! */
1354                         td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1355                         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1356                         td->td_next = htole32(OHCI_TD_NEXT_END);
1357                 } else {
1358                         if (td_next) {
1359                                 /* link the current TD with the next one */
1360                                 td->td_next = td_next->td_self;
1361                         }
1362                 }
1363
1364                 td->alt_next = td_alt_next;
1365
1366                 usb_pc_cpu_flush(td->page_cache);
1367         }
1368
1369         if (precompute) {
1370                 precompute = 0;
1371
1372                 /* setup alt next pointer, if any */
1373                 if (temp->last_frame) {
1374                         /* no alternate next */
1375                         td_alt_next = NULL;
1376                 } else {
1377                         /* we use this field internally */
1378                         td_alt_next = td_next;
1379                 }
1380
1381                 /* restore */
1382                 temp->shortpkt = shortpkt_old;
1383                 temp->len = len_old;
1384                 goto restart;
1385         }
1386         temp->td = td;
1387         temp->td_next = td_next;
1388 }
1389
1390 static void
1391 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1392 {
1393         struct ohci_std_temp temp;
1394         struct usb_pipe_methods *methods;
1395         ohci_ed_t *ed;
1396         ohci_td_t *td;
1397         uint32_t ed_flags;
1398         uint32_t x;
1399
1400         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1401             xfer->address, UE_GET_ADDR(xfer->endpointno),
1402             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1403
1404         temp.average = xfer->max_hc_frame_size;
1405         temp.max_frame_size = xfer->max_frame_size;
1406
1407         /* toggle the DMA set we are using */
1408         xfer->flags_int.curr_dma_set ^= 1;
1409
1410         /* get next DMA set */
1411         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1412
1413         xfer->td_transfer_first = td;
1414         xfer->td_transfer_cache = td;
1415
1416         temp.td = NULL;
1417         temp.td_next = td;
1418         temp.last_frame = 0;
1419         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1420
1421         methods = xfer->endpoint->methods;
1422
1423         /* check if we should prepend a setup message */
1424
1425         if (xfer->flags_int.control_xfr) {
1426                 if (xfer->flags_int.control_hdr) {
1427
1428                         temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1429                             OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1430
1431                         temp.len = xfer->frlengths[0];
1432                         temp.pc = xfer->frbuffers + 0;
1433                         temp.shortpkt = temp.len ? 1 : 0;
1434                         /* check for last frame */
1435                         if (xfer->nframes == 1) {
1436                                 /* no STATUS stage yet, SETUP is last */
1437                                 if (xfer->flags_int.control_act) {
1438                                         temp.last_frame = 1;
1439                                         temp.setup_alt_next = 0;
1440                                 }
1441                         }
1442                         ohci_setup_standard_chain_sub(&temp);
1443
1444                         /*
1445                          * XXX assume that the setup message is
1446                          * contained within one USB packet:
1447                          */
1448                         xfer->endpoint->toggle_next = 1;
1449                 }
1450                 x = 1;
1451         } else {
1452                 x = 0;
1453         }
1454         temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1455
1456         /* set data toggle */
1457
1458         if (xfer->endpoint->toggle_next) {
1459                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1460         } else {
1461                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1462         }
1463
1464         /* set endpoint direction */
1465
1466         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1467                 temp.td_flags |= htole32(OHCI_TD_IN);
1468         } else {
1469                 temp.td_flags |= htole32(OHCI_TD_OUT);
1470         }
1471
1472         while (x != xfer->nframes) {
1473
1474                 /* DATA0 / DATA1 message */
1475
1476                 temp.len = xfer->frlengths[x];
1477                 temp.pc = xfer->frbuffers + x;
1478
1479                 x++;
1480
1481                 if (x == xfer->nframes) {
1482                         if (xfer->flags_int.control_xfr) {
1483                                 /* no STATUS stage yet, DATA is last */
1484                                 if (xfer->flags_int.control_act) {
1485                                         temp.last_frame = 1;
1486                                         temp.setup_alt_next = 0;
1487                                 }
1488                         } else {
1489                                 temp.last_frame = 1;
1490                                 temp.setup_alt_next = 0;
1491                         }
1492                 }
1493                 if (temp.len == 0) {
1494
1495                         /* make sure that we send an USB packet */
1496
1497                         temp.shortpkt = 0;
1498
1499                 } else {
1500
1501                         /* regular data transfer */
1502
1503                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1504                 }
1505
1506                 ohci_setup_standard_chain_sub(&temp);
1507         }
1508
1509         /* check if we should append a status stage */
1510
1511         if (xfer->flags_int.control_xfr &&
1512             !xfer->flags_int.control_act) {
1513
1514                 /*
1515                  * Send a DATA1 message and invert the current endpoint
1516                  * direction.
1517                  */
1518
1519                 /* set endpoint direction and data toggle */
1520
1521                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1522                         temp.td_flags = htole32(OHCI_TD_OUT |
1523                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1524                 } else {
1525                         temp.td_flags = htole32(OHCI_TD_IN |
1526                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1527                 }
1528
1529                 temp.len = 0;
1530                 temp.pc = NULL;
1531                 temp.shortpkt = 0;
1532                 temp.last_frame = 1;
1533                 temp.setup_alt_next = 0;
1534
1535                 ohci_setup_standard_chain_sub(&temp);
1536         }
1537         td = temp.td;
1538
1539         /* Ensure that last TD is terminating: */
1540         td->td_next = htole32(OHCI_TD_NEXT_END);
1541         td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1542         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1543
1544         usb_pc_cpu_flush(td->page_cache);
1545
1546         /* must have at least one frame! */
1547
1548         xfer->td_transfer_last = td;
1549
1550 #ifdef USB_DEBUG
1551         if (ohcidebug > 8) {
1552                 DPRINTF("nexttog=%d; data before transfer:\n",
1553                     xfer->endpoint->toggle_next);
1554                 ohci_dump_tds(xfer->td_transfer_first);
1555         }
1556 #endif
1557
1558         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1559
1560         ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1561             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1562             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1563
1564         ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1565
1566         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1567                 ed_flags |= OHCI_ED_SPEED;
1568         }
1569         ed->ed_flags = htole32(ed_flags);
1570
1571         td = xfer->td_transfer_first;
1572
1573         ed->ed_headp = td->td_self;
1574
1575         if (xfer->xroot->udev->flags.self_suspended == 0) {
1576                 /* the append function will flush the endpoint descriptor */
1577                 OHCI_APPEND_QH(ed, *ed_last);
1578
1579                 if (methods == &ohci_device_bulk_methods) {
1580                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1581
1582                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1583                 }
1584                 if (methods == &ohci_device_ctrl_methods) {
1585                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1586
1587                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1588                 }
1589         } else {
1590                 usb_pc_cpu_flush(ed->page_cache);
1591         }
1592 }
1593
1594 static void
1595 ohci_root_intr(ohci_softc_t *sc)
1596 {
1597         uint32_t hstatus;
1598         uint16_t i;
1599         uint16_t m;
1600
1601         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1602
1603         /* clear any old interrupt data */
1604         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1605
1606         hstatus = OREAD4(sc, OHCI_RH_STATUS);
1607         DPRINTF("sc=%p hstatus=0x%08x\n",
1608             sc, hstatus);
1609
1610         /* set bits */
1611         m = (sc->sc_noport + 1);
1612         if (m > (8 * sizeof(sc->sc_hub_idata))) {
1613                 m = (8 * sizeof(sc->sc_hub_idata));
1614         }
1615         for (i = 1; i < m; i++) {
1616                 /* pick out CHANGE bits from the status register */
1617                 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1618                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1619                         DPRINTF("port %d changed\n", i);
1620                 }
1621         }
1622
1623         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1624             sizeof(sc->sc_hub_idata));
1625 }
1626
1627 /* NOTE: "done" can be run two times in a row,
1628  * from close and from interrupt
1629  */
1630 static void
1631 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1632 {
1633         struct usb_pipe_methods *methods = xfer->endpoint->methods;
1634         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1635         ohci_ed_t *ed;
1636
1637         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1638
1639
1640         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1641             xfer, xfer->endpoint, error);
1642
1643         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1644         if (ed) {
1645                 usb_pc_cpu_invalidate(ed->page_cache);
1646         }
1647         if (methods == &ohci_device_bulk_methods) {
1648                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1649         }
1650         if (methods == &ohci_device_ctrl_methods) {
1651                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1652         }
1653         if (methods == &ohci_device_intr_methods) {
1654                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1655         }
1656         if (methods == &ohci_device_isoc_methods) {
1657                 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1658         }
1659         xfer->td_transfer_first = NULL;
1660         xfer->td_transfer_last = NULL;
1661
1662         /* dequeue transfer and start next transfer */
1663         usbd_transfer_done(xfer, error);
1664 }
1665
1666 /*------------------------------------------------------------------------*
1667  * ohci bulk support
1668  *------------------------------------------------------------------------*/
1669 static void
1670 ohci_device_bulk_open(struct usb_xfer *xfer)
1671 {
1672         return;
1673 }
1674
1675 static void
1676 ohci_device_bulk_close(struct usb_xfer *xfer)
1677 {
1678         ohci_device_done(xfer, USB_ERR_CANCELLED);
1679 }
1680
1681 static void
1682 ohci_device_bulk_enter(struct usb_xfer *xfer)
1683 {
1684         return;
1685 }
1686
1687 static void
1688 ohci_device_bulk_start(struct usb_xfer *xfer)
1689 {
1690         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1691
1692         /* setup TD's and QH */
1693         ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1694
1695         /* put transfer on interrupt queue */
1696         ohci_transfer_intr_enqueue(xfer);
1697 }
1698
1699 struct usb_pipe_methods ohci_device_bulk_methods =
1700 {
1701         .open = ohci_device_bulk_open,
1702         .close = ohci_device_bulk_close,
1703         .enter = ohci_device_bulk_enter,
1704         .start = ohci_device_bulk_start,
1705 };
1706
1707 /*------------------------------------------------------------------------*
1708  * ohci control support
1709  *------------------------------------------------------------------------*/
1710 static void
1711 ohci_device_ctrl_open(struct usb_xfer *xfer)
1712 {
1713         return;
1714 }
1715
1716 static void
1717 ohci_device_ctrl_close(struct usb_xfer *xfer)
1718 {
1719         ohci_device_done(xfer, USB_ERR_CANCELLED);
1720 }
1721
1722 static void
1723 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1724 {
1725         return;
1726 }
1727
1728 static void
1729 ohci_device_ctrl_start(struct usb_xfer *xfer)
1730 {
1731         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1732
1733         /* setup TD's and QH */
1734         ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1735
1736         /* put transfer on interrupt queue */
1737         ohci_transfer_intr_enqueue(xfer);
1738 }
1739
1740 struct usb_pipe_methods ohci_device_ctrl_methods =
1741 {
1742         .open = ohci_device_ctrl_open,
1743         .close = ohci_device_ctrl_close,
1744         .enter = ohci_device_ctrl_enter,
1745         .start = ohci_device_ctrl_start,
1746 };
1747
1748 /*------------------------------------------------------------------------*
1749  * ohci interrupt support
1750  *------------------------------------------------------------------------*/
1751 static void
1752 ohci_device_intr_open(struct usb_xfer *xfer)
1753 {
1754         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1755         uint16_t best;
1756         uint16_t bit;
1757         uint16_t x;
1758
1759         best = 0;
1760         bit = OHCI_NO_EDS / 2;
1761         while (bit) {
1762                 if (xfer->interval >= bit) {
1763                         x = bit;
1764                         best = bit;
1765                         while (x & bit) {
1766                                 if (sc->sc_intr_stat[x] <
1767                                     sc->sc_intr_stat[best]) {
1768                                         best = x;
1769                                 }
1770                                 x++;
1771                         }
1772                         break;
1773                 }
1774                 bit >>= 1;
1775         }
1776
1777         sc->sc_intr_stat[best]++;
1778         xfer->qh_pos = best;
1779
1780         DPRINTFN(3, "best=%d interval=%d\n",
1781             best, xfer->interval);
1782 }
1783
1784 static void
1785 ohci_device_intr_close(struct usb_xfer *xfer)
1786 {
1787         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1788
1789         sc->sc_intr_stat[xfer->qh_pos]--;
1790
1791         ohci_device_done(xfer, USB_ERR_CANCELLED);
1792 }
1793
1794 static void
1795 ohci_device_intr_enter(struct usb_xfer *xfer)
1796 {
1797         return;
1798 }
1799
1800 static void
1801 ohci_device_intr_start(struct usb_xfer *xfer)
1802 {
1803         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1804
1805         /* setup TD's and QH */
1806         ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1807
1808         /* put transfer on interrupt queue */
1809         ohci_transfer_intr_enqueue(xfer);
1810 }
1811
1812 struct usb_pipe_methods ohci_device_intr_methods =
1813 {
1814         .open = ohci_device_intr_open,
1815         .close = ohci_device_intr_close,
1816         .enter = ohci_device_intr_enter,
1817         .start = ohci_device_intr_start,
1818 };
1819
1820 /*------------------------------------------------------------------------*
1821  * ohci isochronous support
1822  *------------------------------------------------------------------------*/
1823 static void
1824 ohci_device_isoc_open(struct usb_xfer *xfer)
1825 {
1826         return;
1827 }
1828
1829 static void
1830 ohci_device_isoc_close(struct usb_xfer *xfer)
1831 {
1832         /**/
1833         ohci_device_done(xfer, USB_ERR_CANCELLED);
1834 }
1835
1836 static void
1837 ohci_device_isoc_enter(struct usb_xfer *xfer)
1838 {
1839         struct usb_page_search buf_res;
1840         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1841         struct ohci_hcca *hcca;
1842         uint32_t buf_offset;
1843         uint32_t nframes;
1844         uint32_t ed_flags;
1845         uint32_t *plen;
1846         uint16_t itd_offset[OHCI_ITD_NOFFSET];
1847         uint16_t length;
1848         uint8_t ncur;
1849         ohci_itd_t *td;
1850         ohci_itd_t *td_last = NULL;
1851         ohci_ed_t *ed;
1852
1853         hcca = ohci_get_hcca(sc);
1854
1855         nframes = le32toh(hcca->hcca_frame_number);
1856
1857         DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1858             xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1859
1860         if ((xfer->endpoint->is_synced == 0) ||
1861             (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1862             (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1863                 /*
1864                  * If there is data underflow or the pipe queue is empty we
1865                  * schedule the transfer a few frames ahead of the current
1866                  * frame position. Else two isochronous transfers might
1867                  * overlap.
1868                  */
1869                 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1870                 xfer->endpoint->is_synced = 1;
1871                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1872         }
1873         /*
1874          * compute how many milliseconds the insertion is ahead of the
1875          * current frame position:
1876          */
1877         buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1878
1879         /*
1880          * pre-compute when the isochronous transfer will be finished:
1881          */
1882         xfer->isoc_time_complete =
1883             (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1884             xfer->nframes);
1885
1886         /* get the real number of frames */
1887
1888         nframes = xfer->nframes;
1889
1890         buf_offset = 0;
1891
1892         plen = xfer->frlengths;
1893
1894         /* toggle the DMA set we are using */
1895         xfer->flags_int.curr_dma_set ^= 1;
1896
1897         /* get next DMA set */
1898         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1899
1900         xfer->td_transfer_first = td;
1901
1902         ncur = 0;
1903         length = 0;
1904
1905         while (nframes--) {
1906                 if (td == NULL) {
1907                         panic("%s:%d: out of TD's\n",
1908                             __FUNCTION__, __LINE__);
1909                 }
1910                 itd_offset[ncur] = length;
1911                 buf_offset += *plen;
1912                 length += *plen;
1913                 plen++;
1914                 ncur++;
1915
1916                 if (                    /* check if the ITD is full */
1917                     (ncur == OHCI_ITD_NOFFSET) ||
1918                 /* check if we have put more than 4K into the ITD */
1919                     (length & 0xF000) ||
1920                 /* check if it is the last frame */
1921                     (nframes == 0)) {
1922
1923                         /* fill current ITD */
1924                         td->itd_flags = htole32(
1925                             OHCI_ITD_NOCC |
1926                             OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1927                             OHCI_ITD_NOINTR |
1928                             OHCI_ITD_SET_FC(ncur));
1929
1930                         td->frames = ncur;
1931                         xfer->endpoint->isoc_next += ncur;
1932
1933                         if (length == 0) {
1934                                 /* all zero */
1935                                 td->itd_bp0 = 0;
1936                                 td->itd_be = ~0;
1937
1938                                 while (ncur--) {
1939                                         td->itd_offset[ncur] =
1940                                             htole16(OHCI_ITD_MK_OFFS(0));
1941                                 }
1942                         } else {
1943                                 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1944                                 length = OHCI_PAGE_MASK(buf_res.physaddr);
1945                                 buf_res.physaddr =
1946                                     OHCI_PAGE(buf_res.physaddr);
1947                                 td->itd_bp0 = htole32(buf_res.physaddr);
1948                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1949                                 td->itd_be = htole32(buf_res.physaddr);
1950
1951                                 while (ncur--) {
1952                                         itd_offset[ncur] += length;
1953                                         itd_offset[ncur] =
1954                                             OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1955                                         td->itd_offset[ncur] =
1956                                             htole16(itd_offset[ncur]);
1957                                 }
1958                         }
1959                         ncur = 0;
1960                         length = 0;
1961                         td_last = td;
1962                         td = td->obj_next;
1963
1964                         if (td) {
1965                                 /* link the last TD with the next one */
1966                                 td_last->itd_next = td->itd_self;
1967                         }
1968                         usb_pc_cpu_flush(td_last->page_cache);
1969                 }
1970         }
1971
1972         /* update the last TD */
1973         td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
1974         td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
1975         td_last->itd_next = 0;
1976
1977         usb_pc_cpu_flush(td_last->page_cache);
1978
1979         xfer->td_transfer_last = td_last;
1980
1981 #ifdef USB_DEBUG
1982         if (ohcidebug > 8) {
1983                 DPRINTF("data before transfer:\n");
1984                 ohci_dump_itds(xfer->td_transfer_first);
1985         }
1986 #endif
1987         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1988
1989         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
1990                 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
1991         else
1992                 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
1993
1994         ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
1995             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1996             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1997
1998         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1999                 ed_flags |= OHCI_ED_SPEED;
2000         }
2001         ed->ed_flags = htole32(ed_flags);
2002
2003         td = xfer->td_transfer_first;
2004
2005         ed->ed_headp = td->itd_self;
2006
2007         /* isochronous transfers are not affected by suspend / resume */
2008         /* the append function will flush the endpoint descriptor */
2009
2010         OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2011 }
2012
2013 static void
2014 ohci_device_isoc_start(struct usb_xfer *xfer)
2015 {
2016         /* put transfer on interrupt queue */
2017         ohci_transfer_intr_enqueue(xfer);
2018 }
2019
2020 struct usb_pipe_methods ohci_device_isoc_methods =
2021 {
2022         .open = ohci_device_isoc_open,
2023         .close = ohci_device_isoc_close,
2024         .enter = ohci_device_isoc_enter,
2025         .start = ohci_device_isoc_start,
2026 };
2027
2028 /*------------------------------------------------------------------------*
2029  * ohci root control support
2030  *------------------------------------------------------------------------*
2031  * Simulate a hardware hub by handling all the necessary requests.
2032  *------------------------------------------------------------------------*/
2033
2034 static const
2035 struct usb_device_descriptor ohci_devd =
2036 {
2037         sizeof(struct usb_device_descriptor),
2038         UDESC_DEVICE,                   /* type */
2039         {0x00, 0x01},                   /* USB version */
2040         UDCLASS_HUB,                    /* class */
2041         UDSUBCLASS_HUB,                 /* subclass */
2042         UDPROTO_FSHUB,                  /* protocol */
2043         64,                             /* max packet */
2044         {0}, {0}, {0x00, 0x01},         /* device id */
2045         1, 2, 0,                        /* string indicies */
2046         1                               /* # of configurations */
2047 };
2048
2049 static const
2050 struct ohci_config_desc ohci_confd =
2051 {
2052         .confd = {
2053                 .bLength = sizeof(struct usb_config_descriptor),
2054                 .bDescriptorType = UDESC_CONFIG,
2055                 .wTotalLength[0] = sizeof(ohci_confd),
2056                 .bNumInterface = 1,
2057                 .bConfigurationValue = 1,
2058                 .iConfiguration = 0,
2059                 .bmAttributes = UC_SELF_POWERED,
2060                 .bMaxPower = 0,         /* max power */
2061         },
2062         .ifcd = {
2063                 .bLength = sizeof(struct usb_interface_descriptor),
2064                 .bDescriptorType = UDESC_INTERFACE,
2065                 .bNumEndpoints = 1,
2066                 .bInterfaceClass = UICLASS_HUB,
2067                 .bInterfaceSubClass = UISUBCLASS_HUB,
2068                 .bInterfaceProtocol = 0,
2069         },
2070         .endpd = {
2071                 .bLength = sizeof(struct usb_endpoint_descriptor),
2072                 .bDescriptorType = UDESC_ENDPOINT,
2073                 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2074                 .bmAttributes = UE_INTERRUPT,
2075                 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2076                 .bInterval = 255,
2077         },
2078 };
2079
2080 static const
2081 struct usb_hub_descriptor ohci_hubd =
2082 {
2083         0,                              /* dynamic length */
2084         UDESC_HUB,
2085         0,
2086         {0, 0},
2087         0,
2088         0,
2089         {0},
2090 };
2091
2092 static usb_error_t
2093 ohci_roothub_exec(struct usb_device *udev,
2094     struct usb_device_request *req, const void **pptr, uint16_t *plength)
2095 {
2096         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2097         const void *ptr;
2098         const char *str_ptr;
2099         uint32_t port;
2100         uint32_t v;
2101         uint16_t len;
2102         uint16_t value;
2103         uint16_t index;
2104         uint8_t l;
2105         usb_error_t err;
2106
2107         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2108
2109         /* buffer reset */
2110         ptr = (const void *)&sc->sc_hub_desc.temp;
2111         len = 0;
2112         err = 0;
2113
2114         value = UGETW(req->wValue);
2115         index = UGETW(req->wIndex);
2116
2117         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2118             "wValue=0x%04x wIndex=0x%04x\n",
2119             req->bmRequestType, req->bRequest,
2120             UGETW(req->wLength), value, index);
2121
2122 #define C(x,y) ((x) | ((y) << 8))
2123         switch (C(req->bRequest, req->bmRequestType)) {
2124         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2125         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2126         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2127                 /*
2128                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2129                  * for the integrated root hub.
2130                  */
2131                 break;
2132         case C(UR_GET_CONFIG, UT_READ_DEVICE):
2133                 len = 1;
2134                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2135                 break;
2136         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2137                 switch (value >> 8) {
2138                 case UDESC_DEVICE:
2139                         if ((value & 0xff) != 0) {
2140                                 err = USB_ERR_IOERROR;
2141                                 goto done;
2142                         }
2143                         len = sizeof(ohci_devd);
2144                         ptr = (const void *)&ohci_devd;
2145                         break;
2146
2147                 case UDESC_CONFIG:
2148                         if ((value & 0xff) != 0) {
2149                                 err = USB_ERR_IOERROR;
2150                                 goto done;
2151                         }
2152                         len = sizeof(ohci_confd);
2153                         ptr = (const void *)&ohci_confd;
2154                         break;
2155
2156                 case UDESC_STRING:
2157                         switch (value & 0xff) {
2158                         case 0: /* Language table */
2159                                 str_ptr = "\001";
2160                                 break;
2161
2162                         case 1: /* Vendor */
2163                                 str_ptr = sc->sc_vendor;
2164                                 break;
2165
2166                         case 2: /* Product */
2167                                 str_ptr = "OHCI root HUB";
2168                                 break;
2169
2170                         default:
2171                                 str_ptr = "";
2172                                 break;
2173                         }
2174
2175                         len = usb_make_str_desc(
2176                             sc->sc_hub_desc.temp,
2177                             sizeof(sc->sc_hub_desc.temp),
2178                             str_ptr);
2179                         break;
2180
2181                 default:
2182                         err = USB_ERR_IOERROR;
2183                         goto done;
2184                 }
2185                 break;
2186         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2187                 len = 1;
2188                 sc->sc_hub_desc.temp[0] = 0;
2189                 break;
2190         case C(UR_GET_STATUS, UT_READ_DEVICE):
2191                 len = 2;
2192                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2193                 break;
2194         case C(UR_GET_STATUS, UT_READ_INTERFACE):
2195         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2196                 len = 2;
2197                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2198                 break;
2199         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2200                 if (value >= OHCI_MAX_DEVICES) {
2201                         err = USB_ERR_IOERROR;
2202                         goto done;
2203                 }
2204                 sc->sc_addr = value;
2205                 break;
2206         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2207                 if ((value != 0) && (value != 1)) {
2208                         err = USB_ERR_IOERROR;
2209                         goto done;
2210                 }
2211                 sc->sc_conf = value;
2212                 break;
2213         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2214                 break;
2215         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2216         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2217         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2218                 err = USB_ERR_IOERROR;
2219                 goto done;
2220         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2221                 break;
2222         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2223                 break;
2224                 /* Hub requests */
2225         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2226                 break;
2227         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2228                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2229                     "port=%d feature=%d\n",
2230                     index, value);
2231                 if ((index < 1) ||
2232                     (index > sc->sc_noport)) {
2233                         err = USB_ERR_IOERROR;
2234                         goto done;
2235                 }
2236                 port = OHCI_RH_PORT_STATUS(index);
2237                 switch (value) {
2238                 case UHF_PORT_ENABLE:
2239                         OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2240                         break;
2241                 case UHF_PORT_SUSPEND:
2242                         OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2243                         break;
2244                 case UHF_PORT_POWER:
2245                         /* Yes, writing to the LOW_SPEED bit clears power. */
2246                         OWRITE4(sc, port, UPS_LOW_SPEED);
2247                         break;
2248                 case UHF_C_PORT_CONNECTION:
2249                         OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2250                         break;
2251                 case UHF_C_PORT_ENABLE:
2252                         OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2253                         break;
2254                 case UHF_C_PORT_SUSPEND:
2255                         OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2256                         break;
2257                 case UHF_C_PORT_OVER_CURRENT:
2258                         OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2259                         break;
2260                 case UHF_C_PORT_RESET:
2261                         OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2262                         break;
2263                 default:
2264                         err = USB_ERR_IOERROR;
2265                         goto done;
2266                 }
2267                 switch (value) {
2268                 case UHF_C_PORT_CONNECTION:
2269                 case UHF_C_PORT_ENABLE:
2270                 case UHF_C_PORT_SUSPEND:
2271                 case UHF_C_PORT_OVER_CURRENT:
2272                 case UHF_C_PORT_RESET:
2273                         /* enable RHSC interrupt if condition is cleared. */
2274                         if ((OREAD4(sc, port) >> 16) == 0)
2275                                 ohci_rhsc_enable(sc);
2276                         break;
2277                 default:
2278                         break;
2279                 }
2280                 break;
2281         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2282                 if ((value & 0xff) != 0) {
2283                         err = USB_ERR_IOERROR;
2284                         goto done;
2285                 }
2286                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2287
2288                 sc->sc_hub_desc.hubd = ohci_hubd;
2289                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2290                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2291                     (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2292                     v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2293                 /* XXX overcurrent */
2294                     );
2295                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2296                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2297
2298                 for (l = 0; l < sc->sc_noport; l++) {
2299                         if (v & 1) {
2300                                 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2301                         }
2302                         v >>= 1;
2303                 }
2304                 sc->sc_hub_desc.hubd.bDescLength =
2305                     8 + ((sc->sc_noport + 7) / 8);
2306                 len = sc->sc_hub_desc.hubd.bDescLength;
2307                 break;
2308
2309         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2310                 len = 16;
2311                 memset(sc->sc_hub_desc.temp, 0, 16);
2312                 break;
2313         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2314                 DPRINTFN(9, "get port status i=%d\n",
2315                     index);
2316                 if ((index < 1) ||
2317                     (index > sc->sc_noport)) {
2318                         err = USB_ERR_IOERROR;
2319                         goto done;
2320                 }
2321                 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2322                 DPRINTFN(9, "port status=0x%04x\n", v);
2323                 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2324                 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2325                 len = sizeof(sc->sc_hub_desc.ps);
2326                 break;
2327         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2328                 err = USB_ERR_IOERROR;
2329                 goto done;
2330         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2331                 break;
2332         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2333                 if ((index < 1) ||
2334                     (index > sc->sc_noport)) {
2335                         err = USB_ERR_IOERROR;
2336                         goto done;
2337                 }
2338                 port = OHCI_RH_PORT_STATUS(index);
2339                 switch (value) {
2340                 case UHF_PORT_ENABLE:
2341                         OWRITE4(sc, port, UPS_PORT_ENABLED);
2342                         break;
2343                 case UHF_PORT_SUSPEND:
2344                         OWRITE4(sc, port, UPS_SUSPEND);
2345                         break;
2346                 case UHF_PORT_RESET:
2347                         DPRINTFN(6, "reset port %d\n", index);
2348                         OWRITE4(sc, port, UPS_RESET);
2349                         for (v = 0;; v++) {
2350                                 if (v < 12) {
2351                                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
2352                                             USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
2353
2354                                         if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2355                                                 break;
2356                                         }
2357                                 } else {
2358                                         err = USB_ERR_TIMEOUT;
2359                                         goto done;
2360                                 }
2361                         }
2362                         DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2363                             index, OREAD4(sc, port));
2364                         break;
2365                 case UHF_PORT_POWER:
2366                         DPRINTFN(3, "set port power %d\n", index);
2367                         OWRITE4(sc, port, UPS_PORT_POWER);
2368                         break;
2369                 default:
2370                         err = USB_ERR_IOERROR;
2371                         goto done;
2372                 }
2373                 break;
2374         default:
2375                 err = USB_ERR_IOERROR;
2376                 goto done;
2377         }
2378 done:
2379         *plength = len;
2380         *pptr = ptr;
2381         return (err);
2382 }
2383
2384 static void
2385 ohci_xfer_setup(struct usb_setup_params *parm)
2386 {
2387         struct usb_page_search page_info;
2388         struct usb_page_cache *pc;
2389         ohci_softc_t *sc;
2390         struct usb_xfer *xfer;
2391         void *last_obj;
2392         uint32_t ntd;
2393         uint32_t nitd;
2394         uint32_t nqh;
2395         uint32_t n;
2396
2397         sc = OHCI_BUS2SC(parm->udev->bus);
2398         xfer = parm->curr_xfer;
2399
2400         parm->hc_max_packet_size = 0x500;
2401         parm->hc_max_packet_count = 1;
2402         parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2403
2404         /*
2405          * calculate ntd and nqh
2406          */
2407         if (parm->methods == &ohci_device_ctrl_methods) {
2408                 xfer->flags_int.bdma_enable = 1;
2409
2410                 usbd_transfer_setup_sub(parm);
2411
2412                 nitd = 0;
2413                 ntd = ((2 * xfer->nframes) + 1  /* STATUS */
2414                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2415                 nqh = 1;
2416
2417         } else if (parm->methods == &ohci_device_bulk_methods) {
2418                 xfer->flags_int.bdma_enable = 1;
2419
2420                 usbd_transfer_setup_sub(parm);
2421
2422                 nitd = 0;
2423                 ntd = ((2 * xfer->nframes)
2424                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2425                 nqh = 1;
2426
2427         } else if (parm->methods == &ohci_device_intr_methods) {
2428                 xfer->flags_int.bdma_enable = 1;
2429
2430                 usbd_transfer_setup_sub(parm);
2431
2432                 nitd = 0;
2433                 ntd = ((2 * xfer->nframes)
2434                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2435                 nqh = 1;
2436
2437         } else if (parm->methods == &ohci_device_isoc_methods) {
2438                 xfer->flags_int.bdma_enable = 1;
2439
2440                 usbd_transfer_setup_sub(parm);
2441
2442                 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2443                     ((xfer->nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET) +
2444                     1 /* EXTRA */ );
2445                 ntd = 0;
2446                 nqh = 1;
2447
2448         } else {
2449
2450                 usbd_transfer_setup_sub(parm);
2451
2452                 nitd = 0;
2453                 ntd = 0;
2454                 nqh = 0;
2455         }
2456
2457 alloc_dma_set:
2458
2459         if (parm->err) {
2460                 return;
2461         }
2462         last_obj = NULL;
2463
2464         if (usbd_transfer_setup_sub_malloc(
2465             parm, &pc, sizeof(ohci_td_t),
2466             OHCI_TD_ALIGN, ntd)) {
2467                 parm->err = USB_ERR_NOMEM;
2468                 return;
2469         }
2470         if (parm->buf) {
2471                 for (n = 0; n != ntd; n++) {
2472                         ohci_td_t *td;
2473
2474                         usbd_get_page(pc + n, 0, &page_info);
2475
2476                         td = page_info.buffer;
2477
2478                         /* init TD */
2479                         td->td_self = htole32(page_info.physaddr);
2480                         td->obj_next = last_obj;
2481                         td->page_cache = pc + n;
2482
2483                         last_obj = td;
2484
2485                         usb_pc_cpu_flush(pc + n);
2486                 }
2487         }
2488         if (usbd_transfer_setup_sub_malloc(
2489             parm, &pc, sizeof(ohci_itd_t),
2490             OHCI_ITD_ALIGN, nitd)) {
2491                 parm->err = USB_ERR_NOMEM;
2492                 return;
2493         }
2494         if (parm->buf) {
2495                 for (n = 0; n != nitd; n++) {
2496                         ohci_itd_t *itd;
2497
2498                         usbd_get_page(pc + n, 0, &page_info);
2499
2500                         itd = page_info.buffer;
2501
2502                         /* init TD */
2503                         itd->itd_self = htole32(page_info.physaddr);
2504                         itd->obj_next = last_obj;
2505                         itd->page_cache = pc + n;
2506
2507                         last_obj = itd;
2508
2509                         usb_pc_cpu_flush(pc + n);
2510                 }
2511         }
2512         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2513
2514         last_obj = NULL;
2515
2516         if (usbd_transfer_setup_sub_malloc(
2517             parm, &pc, sizeof(ohci_ed_t),
2518             OHCI_ED_ALIGN, nqh)) {
2519                 parm->err = USB_ERR_NOMEM;
2520                 return;
2521         }
2522         if (parm->buf) {
2523                 for (n = 0; n != nqh; n++) {
2524                         ohci_ed_t *ed;
2525
2526                         usbd_get_page(pc + n, 0, &page_info);
2527
2528                         ed = page_info.buffer;
2529
2530                         /* init QH */
2531                         ed->ed_self = htole32(page_info.physaddr);
2532                         ed->obj_next = last_obj;
2533                         ed->page_cache = pc + n;
2534
2535                         last_obj = ed;
2536
2537                         usb_pc_cpu_flush(pc + n);
2538                 }
2539         }
2540         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2541
2542         if (!xfer->flags_int.curr_dma_set) {
2543                 xfer->flags_int.curr_dma_set = 1;
2544                 goto alloc_dma_set;
2545         }
2546 }
2547
2548 static void
2549 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2550     struct usb_endpoint *ep)
2551 {
2552         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2553
2554         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2555             ep, udev->address,
2556             edesc->bEndpointAddress, udev->flags.usb_mode,
2557             sc->sc_addr);
2558
2559         if (udev->flags.usb_mode != USB_MODE_HOST) {
2560                 /* not supported */
2561                 return;
2562         }
2563         if (udev->device_index != sc->sc_addr) {
2564                 switch (edesc->bmAttributes & UE_XFERTYPE) {
2565                 case UE_CONTROL:
2566                         ep->methods = &ohci_device_ctrl_methods;
2567                         break;
2568                 case UE_INTERRUPT:
2569                         ep->methods = &ohci_device_intr_methods;
2570                         break;
2571                 case UE_ISOCHRONOUS:
2572                         if (udev->speed == USB_SPEED_FULL) {
2573                                 ep->methods = &ohci_device_isoc_methods;
2574                         }
2575                         break;
2576                 case UE_BULK:
2577                         ep->methods = &ohci_device_bulk_methods;
2578                         break;
2579                 default:
2580                         /* do nothing */
2581                         break;
2582                 }
2583         }
2584 }
2585
2586 static void
2587 ohci_xfer_unsetup(struct usb_xfer *xfer)
2588 {
2589         return;
2590 }
2591
2592 static void
2593 ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2594 {
2595         /*
2596          * Wait until hardware has finished any possible use of the
2597          * transfer descriptor(s) and QH
2598          */
2599         *pus = (1125);                  /* microseconds */
2600 }
2601
2602 static void
2603 ohci_device_resume(struct usb_device *udev)
2604 {
2605         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2606         struct usb_xfer *xfer;
2607         struct usb_pipe_methods *methods;
2608         ohci_ed_t *ed;
2609
2610         DPRINTF("\n");
2611
2612         USB_BUS_LOCK(udev->bus);
2613
2614         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2615
2616                 if (xfer->xroot->udev == udev) {
2617
2618                         methods = xfer->endpoint->methods;
2619                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2620
2621                         if (methods == &ohci_device_bulk_methods) {
2622                                 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2623                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2624                         }
2625                         if (methods == &ohci_device_ctrl_methods) {
2626                                 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2627                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2628                         }
2629                         if (methods == &ohci_device_intr_methods) {
2630                                 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2631                         }
2632                 }
2633         }
2634
2635         USB_BUS_UNLOCK(udev->bus);
2636
2637         return;
2638 }
2639
2640 static void
2641 ohci_device_suspend(struct usb_device *udev)
2642 {
2643         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2644         struct usb_xfer *xfer;
2645         struct usb_pipe_methods *methods;
2646         ohci_ed_t *ed;
2647
2648         DPRINTF("\n");
2649
2650         USB_BUS_LOCK(udev->bus);
2651
2652         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2653
2654                 if (xfer->xroot->udev == udev) {
2655
2656                         methods = xfer->endpoint->methods;
2657                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2658
2659                         if (methods == &ohci_device_bulk_methods) {
2660                                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2661                         }
2662                         if (methods == &ohci_device_ctrl_methods) {
2663                                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2664                         }
2665                         if (methods == &ohci_device_intr_methods) {
2666                                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2667                         }
2668                 }
2669         }
2670
2671         USB_BUS_UNLOCK(udev->bus);
2672
2673         return;
2674 }
2675
2676 static void
2677 ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2678 {
2679         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2680
2681         switch (state) {
2682         case USB_HW_POWER_SUSPEND:
2683         case USB_HW_POWER_SHUTDOWN:
2684                 ohci_suspend(sc);
2685                 break;
2686         case USB_HW_POWER_RESUME:
2687                 ohci_resume(sc);
2688                 break;
2689         default:
2690                 break;
2691         }
2692 }
2693
2694 static void
2695 ohci_set_hw_power(struct usb_bus *bus)
2696 {
2697         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2698         uint32_t temp;
2699         uint32_t flags;
2700
2701         DPRINTF("\n");
2702
2703         USB_BUS_LOCK(bus);
2704
2705         flags = bus->hw_power_state;
2706
2707         temp = OREAD4(sc, OHCI_CONTROL);
2708         temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2709
2710         if (flags & USB_HW_POWER_CONTROL)
2711                 temp |= OHCI_CLE;
2712
2713         if (flags & USB_HW_POWER_BULK)
2714                 temp |= OHCI_BLE;
2715
2716         if (flags & USB_HW_POWER_INTERRUPT)
2717                 temp |= OHCI_PLE;
2718
2719         if (flags & USB_HW_POWER_ISOC)
2720                 temp |= OHCI_IE | OHCI_PLE;
2721
2722         OWRITE4(sc, OHCI_CONTROL, temp);
2723
2724         USB_BUS_UNLOCK(bus);
2725
2726         return;
2727 }
2728
2729 struct usb_bus_methods ohci_bus_methods =
2730 {
2731         .endpoint_init = ohci_ep_init,
2732         .xfer_setup = ohci_xfer_setup,
2733         .xfer_unsetup = ohci_xfer_unsetup,
2734         .get_dma_delay = ohci_get_dma_delay,
2735         .device_resume = ohci_device_resume,
2736         .device_suspend = ohci_device_suspend,
2737         .set_hw_power = ohci_set_hw_power,
2738         .set_hw_power_sleep = ohci_set_hw_power_sleep,
2739         .roothub_exec = ohci_roothub_exec,
2740         .xfer_poll = ohci_do_poll,
2741 };