share/mk/bsd.cpu.gcc80.mk

   1 # Set default CPU compile flags and baseline CPUTYPE for each arch.  The
   2 # compile flags must support the minimum CPU type for each architecture but
   3 # may tune support for more advanced processors.
   4
   5 generic_x86_64= x86_64 mmx sse sse2
   6 generic_i386=   i386
   7
   8 .if !defined(CPUTYPE) || empty(CPUTYPE) || ${CPUTYPE} == "native"
   9
  10 . if defined(CPUTYPE) && ${CPUTYPE:Mnative}
  11 _CPUCFLAGS=     -march=native
  12 . else
  13 _CPUCFLAGS=
  14 . endif
  15
  16 MACHINE_CPU=    ${generic_${MACHINE_ARCH}}
  17
  18 .else
  19
  20 ###############################################################################
  21 # Logic to set up correct gcc optimization flag.  This must be included
  22 # after /etc/make.conf so it can react to the local value of CPUTYPE
  23 # defined therein.  Consult:
  24 #       https://gcc.gnu.org/onlinedocs/gcc-8.3.0/gcc/x86-Options.html
  25 ###############################################################################
  26
  27 # Some GCC cpu-types have aliases, rename them to a single identifier
  28 # If the value for cpu-type is not recognized, throw it away and use -native
  29
  30 . if ${CPUTYPE} == "k8" \
  31   || ${CPUTYPE} == "opteron" \
  32   || ${CPUTYPE} == "athlon-fx"
  33 CT2=    athlon64
  34 . elif ${CPUTYPE} == "k8-sse3" \
  35     || ${CPUTYPE} == "opteron-sse3"
  36 CT2=    athlon64-sse3
  37 . elif ${CPUTYPE} == "amdfam10"
  38 CT2=    barcelona
  39 . else
  40 CT2=    ${CPUTYPE}
  41 . endif
  42
  43 known_x86_64=   athlon64 \
  44                 athlon64-sse3 \
  45                 barcelona \
  46                 bdver1 bdver2 bdver3 bdver4 \
  47                 bonnell \
  48                 broadwell \
  49                 btver1 btver2 \
  50                 cannonlake \
  51                 core2 \
  52                 haswell \
  53                 i386 \
  54                 icelake-client \
  55                 icelake-server \
  56                 ivybridge \
  57                 knl \
  58                 knm \
  59                 nocona \
  60                 nehalem \
  61                 sandybridge \
  62                 silvermont \
  63                 skylake \
  64                 skylake-avx512 \
  65                 westmere \
  66                 znver1
  67
  68 known_i386=     i386
  69
  70 . if defined(known_${MACHINE_ARCH}) && \
  71      !empty(known_${MACHINE_ARCH}:M${CT2})              # CID: Check CPUTYPE
  72
  73 # Set up the list of CPU features based on the CPU type.  This is an
  74 # unordered list to make it easy for client makefiles to test for the
  75 # presence of a CPU feature.
  76
  77 .  if ${MACHINE_ARCH} == "x86_64"
  78 C_nocona=       ${generic_x86_64} sse3
  79 C_core2=        ${C_nocona} ssse3
  80 C_nehalem=      ${C_core2} sse41 sse42 popcnt
  81 C_westmere=     ${C_nehalem} aes pclmul
  82 C_sandybridge=  ${C_westmere} avx
  83 C_ivybridge=    ${C_sandybridge} fsgsbase rdrnd f16c
  84 C_haswell=      ${C_ivybridge} movbe avx2 fma bmi bmi2
  85 C_broadwell=    ${C_haswell} rdseed adcx prefetchw
  86 C_skylake=      ${C_broadwell} xsavec xsaves clflushop
  87 C_knl=          ${C_broadwell} avx512f avx512pf avx512er avx512cd
  88 C_knm=          ${C_knl} avx5124vnniw avx5124fmaps avx512vpopcntdq
  89 C_bonnell=      ${C_core2} movbe
  90 C_silvermont=   ${C_westmere} movbe rdrnd
  91 C_skylakeavx512=${C_skylake} pku avx512f clwb avx512vl avx512bw avx512dq \
  92                 avx512cd
  93 C_cannonlake=   ${C_skylake} pku avx512f avx512vl avx512bw avx512dq avx512cd \
  94                 avx512vbmi avx512ifma sha umip
  95 C_icelakeclient=${C_skylakeavx512} avx512vbmi avx512ifma sha umip rdpid gfni \
  96                 avx512vbmi2 avx512vpopcntdq avx512bitalg avx512vnni \
  97                 vpclmulqdq vaes
  98 C_icelakeserver=${C_icelakeclient} pconfig wbnoinvd
  99
 100 C_athlon64=     ${generic_x86_64} 3dnow
 101 C_athlon64sse3= ${C_athlon64} sse3
 102 C_barcelona=    ${C_athlon64sse3} sse4a abm
 103 C_bdver1=       ${C_core2} sse4a sse41 sse42 abm fma4 avx xop lwp aes \
 104                 pclmul cx16
 105 C_bdver2=       ${C_bdver1} bmi f16c fma tbm
 106 C_bdver3=       ${C_bdver2} fsgsbase
 107 C_bdver4=       ${C_bdver3} bmi2 avx2 movbe
 108 C_znver1=       ${C_core2} bmi bmi2 f16c fma fsgsbase avx avx2 adcx rdseed \
 109                 mwaitx sha clzero aes pclmul cx16 movbe sse4a sse41 sse42 \
 110                 abm xsavec xsaves clflushop popcnt
 111 C_btver1=       ${C_barcelona} cx16
 112 C_btver2=       ${C_btver1} movbe f16c bmi avx pclmul aes sse41 sse42
 113 C_i386=         ${generic_i386}
 114
 115 .  endif        # end of x86_64 feature list
 116
 117 # i386 used for 32-bit BIOS-based boot loaders
 118
 119 .  if ${MACHINE_ARCH} == "i386"
 120 C_i386=         ${generic_i386}
 121 .  endif        # end of i386 feature list
 122
 123 _CPUCFLAGS=     -march=${CT2}
 124 MACHINE_CPU=    ${C_${CT2:S|-||}}
 125
 126 . else                                                  # CID: Check CPUTYPE
 127
 128 # CPUTYPE was defined and was not empty, but the value does not match known
 129 # CPU types of the defined MACHINE_ARCH.  Set -march to native and define
 130 # generic features based on MACHINE_ARCH
 131
 132 _CPUCFLAGS=     -march=native
 133 MACHINE_CPU=    ${generic_${MACHINE_ARCH}}
 134
 135 . endif                                                 # CID: Check CPUTYPE
 136
 137 .endif