sys/dev/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <drm/drmP.h>
  28 #include <drm/drm_crtc.h>
  29 #include <drm/drm_crtc_helper.h>
  30 #include <drm/drm_edid.h>
  31 #include "intel_drv.h"
  32 #include <drm/i915_drm.h>
  33 #include "i915_drv.h"
  34
  35 /* Here's the desired hotplug mode */
  36 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  37                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  38                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  39                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  40                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  41                            ADPA_CRT_HOTPLUG_ENABLE)
  42
  43 struct intel_crt {
  44         struct intel_encoder base;
  45         /* DPMS state is stored in the connector, which we need in the
  46          * encoder's enable/disable callbacks */
  47         struct intel_connector *connector;
  48         bool force_hotplug_required;
  49         u32 adpa_reg;
  50 };
  51
  52 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  53 {
  54         return container_of(intel_attached_encoder(connector),
  55                             struct intel_crt, base);
  56 }
  57
  58 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  59 {
  60         return container_of(encoder, struct intel_crt, base);
  61 }
  62
  63 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  64                                    enum i915_pipe *pipe)
  65 {
  66         struct drm_device *dev = encoder->base.dev;
  67         struct drm_i915_private *dev_priv = dev->dev_private;
  68         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  69         u32 tmp;
  70
  71         tmp = I915_READ(crt->adpa_reg);
  72
  73         if (!(tmp & ADPA_DAC_ENABLE))
  74                 return false;
  75
  76         if (HAS_PCH_CPT(dev))
  77                 *pipe = PORT_TO_PIPE_CPT(tmp);
  78         else
  79                 *pipe = PORT_TO_PIPE(tmp);
  80
  81         return true;
  82 }
  83
  84 /* Note: The caller is required to filter out dpms modes not supported by the
  85  * platform. */
  86 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
  87 {
  88         struct drm_device *dev = encoder->base.dev;
  89         struct drm_i915_private *dev_priv = dev->dev_private;
  90         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  91         u32 temp;
  92
  93         temp = I915_READ(crt->adpa_reg);
  94         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  95         temp &= ~ADPA_DAC_ENABLE;
  96
  97         switch (mode) {
  98         case DRM_MODE_DPMS_ON:
  99                 temp |= ADPA_DAC_ENABLE;
 100                 break;
 101         case DRM_MODE_DPMS_STANDBY:
 102                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 103                 break;
 104         case DRM_MODE_DPMS_SUSPEND:
 105                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 106                 break;
 107         case DRM_MODE_DPMS_OFF:
 108                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 109                 break;
 110         }
 111
 112         I915_WRITE(crt->adpa_reg, temp);
 113 }
 114
 115 static void intel_disable_crt(struct intel_encoder *encoder)
 116 {
 117         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 118 }
 119
 120 static void intel_enable_crt(struct intel_encoder *encoder)
 121 {
 122         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 123
 124         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 125 }
 126
 127
 128 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 129 {
 130         struct drm_device *dev = connector->dev;
 131         struct intel_encoder *encoder = intel_attached_encoder(connector);
 132         struct drm_crtc *crtc;
 133         int old_dpms;
 134
 135         /* PCH platforms and VLV only support on/off. */
 136         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 137                 mode = DRM_MODE_DPMS_OFF;
 138
 139         if (mode == connector->dpms)
 140                 return;
 141
 142         old_dpms = connector->dpms;
 143         connector->dpms = mode;
 144
 145         /* Only need to change hw state when actually enabled */
 146         crtc = encoder->base.crtc;
 147         if (!crtc) {
 148                 encoder->connectors_active = false;
 149                 return;
 150         }
 151
 152         /* We need the pipe to run for anything but OFF. */
 153         if (mode == DRM_MODE_DPMS_OFF)
 154                 encoder->connectors_active = false;
 155         else
 156                 encoder->connectors_active = true;
 157
 158         if (mode < old_dpms) {
 159                 /* From off to on, enable the pipe first. */
 160                 intel_crtc_update_dpms(crtc);
 161
 162                 intel_crt_set_dpms(encoder, mode);
 163         } else {
 164                 intel_crt_set_dpms(encoder, mode);
 165
 166                 intel_crtc_update_dpms(crtc);
 167         }
 168
 169         intel_modeset_check_state(connector->dev);
 170 }
 171
 172 static int intel_crt_mode_valid(struct drm_connector *connector,
 173                                 struct drm_display_mode *mode)
 174 {
 175         struct drm_device *dev = connector->dev;
 176
 177         int max_clock = 0;
 178         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 179                 return MODE_NO_DBLESCAN;
 180
 181         if (mode->clock < 25000)
 182                 return MODE_CLOCK_LOW;
 183
 184         if (IS_GEN2(dev))
 185                 max_clock = 350000;
 186         else
 187                 max_clock = 400000;
 188         if (mode->clock > max_clock)
 189                 return MODE_CLOCK_HIGH;
 190
 191         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 192         if (HAS_PCH_LPT(dev) &&
 193             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 194                 return MODE_CLOCK_HIGH;
 195
 196         return MODE_OK;
 197 }
 198
 199 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
 200                                  const struct drm_display_mode *mode,
 201                                  struct drm_display_mode *adjusted_mode)
 202 {
 203         return true;
 204 }
 205
 206 static void intel_crt_mode_set(struct drm_encoder *encoder,
 207                                struct drm_display_mode *mode,
 208                                struct drm_display_mode *adjusted_mode)
 209 {
 210
 211         struct drm_device *dev = encoder->dev;
 212         struct drm_crtc *crtc = encoder->crtc;
 213         struct intel_crt *crt =
 214                 intel_encoder_to_crt(to_intel_encoder(encoder));
 215         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 216         struct drm_i915_private *dev_priv = dev->dev_private;
 217         u32 adpa;
 218
 219         if (HAS_PCH_SPLIT(dev))
 220                 adpa = ADPA_HOTPLUG_BITS;
 221         else
 222                 adpa = 0;
 223
 224         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 225                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 226         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 227                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 228
 229         /* For CPT allow 3 pipe config, for others just use A or B */
 230         if (HAS_PCH_LPT(dev))
 231                 ; /* Those bits don't exist here */
 232         else if (HAS_PCH_CPT(dev))
 233                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 234         else if (intel_crtc->pipe == 0)
 235                 adpa |= ADPA_PIPE_A_SELECT;
 236         else
 237                 adpa |= ADPA_PIPE_B_SELECT;
 238
 239         if (!HAS_PCH_SPLIT(dev))
 240                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 241
 242         I915_WRITE(crt->adpa_reg, adpa);
 243 }
 244
 245 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 246 {
 247         struct drm_device *dev = connector->dev;
 248         struct intel_crt *crt = intel_attached_crt(connector);
 249         struct drm_i915_private *dev_priv = dev->dev_private;
 250         u32 adpa;
 251         bool ret;
 252
 253         /* The first time through, trigger an explicit detection cycle */
 254         if (crt->force_hotplug_required) {
 255                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 256                 u32 save_adpa;
 257
 258                 crt->force_hotplug_required = 0;
 259
 260                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 261                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 262
 263                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 264                 if (turn_off_dac)
 265                         adpa &= ~ADPA_DAC_ENABLE;
 266
 267                 I915_WRITE(crt->adpa_reg, adpa);
 268
 269                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 270                              1000))
 271                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 272
 273                 if (turn_off_dac) {
 274                         I915_WRITE(crt->adpa_reg, save_adpa);
 275                         POSTING_READ(crt->adpa_reg);
 276                 }
 277         }
 278
 279         /* Check the status to see if both blue and green are on now */
 280         adpa = I915_READ(crt->adpa_reg);
 281         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 282                 ret = true;
 283         else
 284                 ret = false;
 285         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 286
 287         return ret;
 288 }
 289
 290 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 291 {
 292         struct drm_device *dev = connector->dev;
 293         struct intel_crt *crt = intel_attached_crt(connector);
 294         struct drm_i915_private *dev_priv = dev->dev_private;
 295         u32 adpa;
 296         bool ret;
 297         u32 save_adpa;
 298
 299         save_adpa = adpa = I915_READ(crt->adpa_reg);
 300         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 301
 302         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 303
 304         I915_WRITE(crt->adpa_reg, adpa);
 305
 306         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 307                      1000)) {
 308                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 309                 I915_WRITE(crt->adpa_reg, save_adpa);
 310         }
 311
 312         /* Check the status to see if both blue and green are on now */
 313         adpa = I915_READ(crt->adpa_reg);
 314         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 315                 ret = true;
 316         else
 317                 ret = false;
 318
 319         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 320
 321         /* FIXME: debug force function and remove */
 322         ret = true;
 323
 324         return ret;
 325 }
 326
 327 /**
 328  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 329  *
 330  * Not for i915G/i915GM
 331  *
 332  * \return true if CRT is connected.
 333  * \return false if CRT is disconnected.
 334  */
 335 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 336 {
 337         struct drm_device *dev = connector->dev;
 338         struct drm_i915_private *dev_priv = dev->dev_private;
 339         u32 hotplug_en, orig, stat;
 340         bool ret = false;
 341         int i, tries = 0;
 342
 343         if (HAS_PCH_SPLIT(dev))
 344                 return intel_ironlake_crt_detect_hotplug(connector);
 345
 346         if (IS_VALLEYVIEW(dev))
 347                 return valleyview_crt_detect_hotplug(connector);
 348
 349         /*
 350          * On 4 series desktop, CRT detect sequence need to be done twice
 351          * to get a reliable result.
 352          */
 353
 354         if (IS_G4X(dev) && !IS_GM45(dev))
 355                 tries = 2;
 356         else
 357                 tries = 1;
 358         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 359         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 360
 361         for (i = 0; i < tries ; i++) {
 362                 /* turn on the FORCE_DETECT */
 363                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 364                 /* wait for FORCE_DETECT to go off */
 365                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 366                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 367                              1000))
 368                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 369         }
 370
 371         stat = I915_READ(PORT_HOTPLUG_STAT);
 372         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 373                 ret = true;
 374
 375         /* clear the interrupt we just generated, if any */
 376         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 377
 378         /* and put the bits back */
 379         I915_WRITE(PORT_HOTPLUG_EN, orig);
 380
 381         return ret;
 382 }
 383
 384 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 385                                 struct device *i2c)
 386 {
 387         struct edid *edid;
 388
 389         edid = drm_get_edid(connector, i2c);
 390
 391         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 392                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 393                 intel_gmbus_force_bit(i2c, true);
 394                 edid = drm_get_edid(connector, i2c);
 395                 intel_gmbus_force_bit(i2c, false);
 396         }
 397
 398         return edid;
 399 }
 400
 401 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 402 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 403                                 struct device *adapter)
 404 {
 405         struct edid *edid;
 406         int ret;
 407
 408         edid = intel_crt_get_edid(connector, adapter);
 409         if (!edid)
 410                 return 0;
 411
 412         ret = intel_connector_update_modes(connector, edid);
 413         kfree(edid);
 414
 415         return ret;
 416 }
 417
 418 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 419 {
 420         struct intel_crt *crt = intel_attached_crt(connector);
 421         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 422         struct edid *edid;
 423         struct device *i2c;
 424
 425         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 426
 427         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 428         edid = intel_crt_get_edid(connector, i2c);
 429
 430         if (edid) {
 431                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 432
 433                 /*
 434                  * This may be a DVI-I connector with a shared DDC
 435                  * link between analog and digital outputs, so we
 436                  * have to check the EDID input spec of the attached device.
 437                  */
 438                 if (!is_digital) {
 439                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 440                         return true;
 441                 }
 442
 443                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 444         } else {
 445                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 446         }
 447
 448         drm_free(edid, M_DRM);
 449
 450         return false;
 451 }
 452
 453 static enum drm_connector_status
 454 intel_crt_load_detect(struct intel_crt *crt)
 455 {
 456         struct drm_device *dev = crt->base.base.dev;
 457         struct drm_i915_private *dev_priv = dev->dev_private;
 458         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 459         uint32_t save_bclrpat;
 460         uint32_t save_vtotal;
 461         uint32_t vtotal, vactive;
 462         uint32_t vsample;
 463         uint32_t vblank, vblank_start, vblank_end;
 464         uint32_t dsl;
 465         uint32_t bclrpat_reg;
 466         uint32_t vtotal_reg;
 467         uint32_t vblank_reg;
 468         uint32_t vsync_reg;
 469         uint32_t pipeconf_reg;
 470         uint32_t pipe_dsl_reg;
 471         uint8_t st00;
 472         enum drm_connector_status status;
 473
 474         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 475
 476         bclrpat_reg = BCLRPAT(pipe);
 477         vtotal_reg = VTOTAL(pipe);
 478         vblank_reg = VBLANK(pipe);
 479         vsync_reg = VSYNC(pipe);
 480         pipeconf_reg = PIPECONF(pipe);
 481         pipe_dsl_reg = PIPEDSL(pipe);
 482
 483         save_bclrpat = I915_READ(bclrpat_reg);
 484         save_vtotal = I915_READ(vtotal_reg);
 485         vblank = I915_READ(vblank_reg);
 486
 487         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 488         vactive = (save_vtotal & 0x7ff) + 1;
 489
 490         vblank_start = (vblank & 0xfff) + 1;
 491         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 492
 493         /* Set the border color to purple. */
 494         I915_WRITE(bclrpat_reg, 0x500050);
 495
 496         if (!IS_GEN2(dev)) {
 497                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 498                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 499                 POSTING_READ(pipeconf_reg);
 500                 /* Wait for next Vblank to substitue
 501                  * border color for Color info */
 502                 intel_wait_for_vblank(dev, pipe);
 503                 st00 = I915_READ8(VGA_MSR_WRITE);
 504                 status = ((st00 & (1 << 4)) != 0) ?
 505                         connector_status_connected :
 506                         connector_status_disconnected;
 507
 508                 I915_WRITE(pipeconf_reg, pipeconf);
 509         } else {
 510                 bool restore_vblank = false;
 511                 int count, detect;
 512
 513                 /*
 514                 * If there isn't any border, add some.
 515                 * Yes, this will flicker
 516                 */
 517                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 518                         uint32_t vsync = I915_READ(vsync_reg);
 519                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 520
 521                         vblank_start = vsync_start;
 522                         I915_WRITE(vblank_reg,
 523                                    (vblank_start - 1) |
 524                                    ((vblank_end - 1) << 16));
 525                         restore_vblank = true;
 526                 }
 527                 /* sample in the vertical border, selecting the larger one */
 528                 if (vblank_start - vactive >= vtotal - vblank_end)
 529                         vsample = (vblank_start + vactive) >> 1;
 530                 else
 531                         vsample = (vtotal + vblank_end) >> 1;
 532
 533                 /*
 534                  * Wait for the border to be displayed
 535                  */
 536                 while (I915_READ(pipe_dsl_reg) >= vactive)
 537                         ;
 538                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 539                         ;
 540                 /*
 541                  * Watch ST00 for an entire scanline
 542                  */
 543                 detect = 0;
 544                 count = 0;
 545                 do {
 546                         count++;
 547                         /* Read the ST00 VGA status register */
 548                         st00 = I915_READ8(VGA_MSR_WRITE);
 549                         if (st00 & (1 << 4))
 550                                 detect++;
 551                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 552
 553                 /* restore vblank if necessary */
 554                 if (restore_vblank)
 555                         I915_WRITE(vblank_reg, vblank);
 556                 /*
 557                  * If more than 3/4 of the scanline detected a monitor,
 558                  * then it is assumed to be present. This works even on i830,
 559                  * where there isn't any way to force the border color across
 560                  * the screen
 561                  */
 562                 status = detect * 4 > count * 3 ?
 563                          connector_status_connected :
 564                          connector_status_disconnected;
 565         }
 566
 567         /* Restore previous settings */
 568         I915_WRITE(bclrpat_reg, save_bclrpat);
 569
 570         return status;
 571 }
 572
 573 static enum drm_connector_status
 574 intel_crt_detect(struct drm_connector *connector, bool force)
 575 {
 576         struct drm_device *dev = connector->dev;
 577         struct intel_crt *crt = intel_attached_crt(connector);
 578         enum drm_connector_status status;
 579         struct intel_load_detect_pipe tmp;
 580
 581         if (I915_HAS_HOTPLUG(dev)) {
 582                 /* We can not rely on the HPD pin always being correctly wired
 583                  * up, for example many KVM do not pass it through, and so
 584                  * only trust an assertion that the monitor is connected.
 585                  */
 586                 if (intel_crt_detect_hotplug(connector)) {
 587                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 588                         return connector_status_connected;
 589                 } else
 590                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 591         }
 592
 593         if (intel_crt_detect_ddc(connector))
 594                 return connector_status_connected;
 595
 596         /* Load detection is broken on HPD capable machines. Whoever wants a
 597          * broken monitor (without edid) to work behind a broken kvm (that fails
 598          * to have the right resistors for HP detection) needs to fix this up.
 599          * For now just bail out. */
 600         if (I915_HAS_HOTPLUG(dev))
 601                 return connector_status_disconnected;
 602
 603         if (!force)
 604                 return connector->status;
 605
 606         /* for pre-945g platforms use load detect */
 607         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 608                 if (intel_crt_detect_ddc(connector))
 609                         status = connector_status_connected;
 610                 else
 611                         status = intel_crt_load_detect(crt);
 612                 intel_release_load_detect_pipe(connector, &tmp);
 613         } else
 614                 status = connector_status_unknown;
 615
 616         return status;
 617 }
 618
 619 static void intel_crt_destroy(struct drm_connector *connector)
 620 {
 621 #if 0
 622         drm_sysfs_connector_remove(connector);
 623 #endif
 624         drm_connector_cleanup(connector);
 625         drm_free(connector, M_DRM);
 626 }
 627
 628 static int intel_crt_get_modes(struct drm_connector *connector)
 629 {
 630         struct drm_device *dev = connector->dev;
 631         struct drm_i915_private *dev_priv = dev->dev_private;
 632         int ret;
 633         struct device *i2c;
 634
 635         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 636         ret = intel_crt_ddc_get_modes(connector, i2c);
 637         if (ret || !IS_G4X(dev))
 638                 return ret;
 639
 640         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 641         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 642         return intel_crt_ddc_get_modes(connector, i2c);
 643 }
 644
 645 static int intel_crt_set_property(struct drm_connector *connector,
 646                                   struct drm_property *property,
 647                                   uint64_t value)
 648 {
 649         return 0;
 650 }
 651
 652 static void intel_crt_reset(struct drm_connector *connector)
 653 {
 654         struct drm_device *dev = connector->dev;
 655         struct drm_i915_private *dev_priv = dev->dev_private;
 656         struct intel_crt *crt = intel_attached_crt(connector);
 657
 658         if (HAS_PCH_SPLIT(dev)) {
 659                 u32 adpa;
 660
 661                 adpa = I915_READ(crt->adpa_reg);
 662                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 663                 adpa |= ADPA_HOTPLUG_BITS;
 664                 I915_WRITE(crt->adpa_reg, adpa);
 665                 POSTING_READ(crt->adpa_reg);
 666
 667                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 668                 crt->force_hotplug_required = 1;
 669         }
 670
 671 }
 672
 673 /*
 674  * Routines for controlling stuff on the analog port
 675  */
 676
 677 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
 678         .mode_fixup = intel_crt_mode_fixup,
 679         .mode_set = intel_crt_mode_set,
 680         .disable = intel_encoder_noop,
 681 };
 682
 683 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 684         .reset = intel_crt_reset,
 685         .dpms = intel_crt_dpms,
 686         .detect = intel_crt_detect,
 687         .fill_modes = drm_helper_probe_single_connector_modes,
 688         .destroy = intel_crt_destroy,
 689         .set_property = intel_crt_set_property,
 690 };
 691
 692 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 693         .mode_valid = intel_crt_mode_valid,
 694         .get_modes = intel_crt_get_modes,
 695         .best_encoder = intel_best_encoder,
 696 };
 697
 698 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 699         .destroy = intel_encoder_destroy,
 700 };
 701
 702 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 703 {
 704         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 705         return 1;
 706 }
 707
 708 static const struct dmi_system_id intel_no_crt[] = {
 709         {
 710                 .callback = intel_no_crt_dmi_callback,
 711                 .ident = "ACER ZGB",
 712                 .matches = {
 713                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 714                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 715                 },
 716         },
 717         { }
 718 };
 719
 720 void intel_crt_init(struct drm_device *dev)
 721 {
 722         struct drm_connector *connector;
 723         struct intel_crt *crt;
 724         struct intel_connector *intel_connector;
 725         struct drm_i915_private *dev_priv = dev->dev_private;
 726
 727         /* Skip machines without VGA that falsely report hotplug events */
 728         if (dmi_check_system(intel_no_crt))
 729                 return;
 730
 731         crt = kmalloc(sizeof(struct intel_crt), M_DRM, M_WAITOK | M_ZERO);
 732         if (!crt)
 733                 return;
 734
 735         intel_connector = kmalloc(sizeof(struct intel_connector), M_DRM,
 736             M_WAITOK | M_ZERO);
 737         if (!intel_connector) {
 738                 kfree(crt);
 739                 return;
 740         }
 741
 742         connector = &intel_connector->base;
 743         crt->connector = intel_connector;
 744         drm_connector_init(dev, &intel_connector->base,
 745                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 746
 747         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 748                          DRM_MODE_ENCODER_DAC);
 749
 750         intel_connector_attach_encoder(intel_connector, &crt->base);
 751
 752         crt->base.type = INTEL_OUTPUT_ANALOG;
 753         crt->base.cloneable = true;
 754         if (IS_I830(dev))
 755                 crt->base.crtc_mask = (1 << 0);
 756         else
 757                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 758
 759         if (IS_GEN2(dev))
 760                 connector->interlace_allowed = 0;
 761         else
 762                 connector->interlace_allowed = 1;
 763         connector->doublescan_allowed = 0;
 764
 765         if (HAS_PCH_SPLIT(dev))
 766                 crt->adpa_reg = PCH_ADPA;
 767         else if (IS_VALLEYVIEW(dev))
 768                 crt->adpa_reg = VLV_ADPA;
 769         else
 770                 crt->adpa_reg = ADPA;
 771
 772         crt->base.disable = intel_disable_crt;
 773         crt->base.enable = intel_enable_crt;
 774         if (HAS_DDI(dev))
 775                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 776         else
 777                 crt->base.get_hw_state = intel_crt_get_hw_state;
 778         intel_connector->get_hw_state = intel_connector_get_hw_state;
 779
 780         drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
 781         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 782
 783 #if 0
 784         drm_sysfs_connector_add(connector);
 785 #endif
 786
 787         if (I915_HAS_HOTPLUG(dev))
 788                 connector->polled = DRM_CONNECTOR_POLL_HPD;
 789         else
 790                 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 791
 792         /*
 793          * Configure the automatic hotplug detection stuff
 794          */
 795         crt->force_hotplug_required = 0;
 796
 797         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 798
 799         /*
 800          * TODO: find a proper way to discover whether we need to set the the
 801          * polarity and link reversal bits or not, instead of relying on the
 802          * BIOS.
 803          */
 804         if (HAS_PCH_LPT(dev)) {
 805                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 806                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 807
 808                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 809         }
 810 }