2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * $FreeBSD: src/sys/i386/isa/ipl.s,v 1.32.2.3 2002/05/16 16:03:56 bde Exp $
40 * $DragonFly: src/sys/platform/pc32/isa/ipl.s,v 1.2 2003/06/17 04:28:37 dillon Exp $
46 * Vector interrupt control section
48 * cpl - Current interrupt disable mask
49 * *_imask - Interrupt masks for various spl*() functions
50 * ipending - Pending interrupts (set when a masked interrupt occurs)
56 /* current priority (all off) */
58 _cpl: .long HWI_MASK | SWI_MASK
61 _tty_imask: .long SWI_TTY_MASK
63 _bio_imask: .long SWI_CLOCK_MASK | SWI_CAMBIO_MASK
65 _net_imask: .long SWI_NET_MASK | SWI_CAMNET_MASK
67 _cam_imask: .long SWI_CAMBIO_MASK | SWI_CAMNET_MASK
69 _soft_imask: .long SWI_MASK
71 _softnet_imask: .long SWI_NET_MASK
73 _softtty_imask: .long SWI_TTY_MASK
75 /* pending interrupts blocked by splxxx() */
79 /* set with bits for which queue to service */
85 .long dummynetisr, dummynetisr, dummynetisr, dummynetisr
86 .long dummynetisr, dummynetisr, dummynetisr, dummynetisr
87 .long dummynetisr, dummynetisr, dummynetisr, dummynetisr
88 .long dummynetisr, dummynetisr, dummynetisr, dummynetisr
89 .long dummynetisr, dummynetisr, dummynetisr, dummynetisr
90 .long dummynetisr, dummynetisr, dummynetisr, dummynetisr
91 .long dummynetisr, dummynetisr, dummynetisr, dummynetisr
92 .long dummynetisr, dummynetisr, dummynetisr, dummynetisr
97 * Handle return from interrupts, traps and syscalls.
100 .type _doreti,@function
102 FAKE_MCOUNT(_bintr) /* init "from" _bintr -> _doreti */
103 addl $4,%esp /* discard unit number */
104 popl %eax /* cpl or cml to restore */
107 * Check for pending HWIs and SWIs atomically with restoring cpl
108 * and exiting. The check has to be atomic with exiting to stop
109 * (ipending & ~cpl) changing from zero to nonzero while we're
110 * looking at it (this wouldn't be fatal but it would increase
111 * interrupt latency). Restoring cpl has to be atomic with exiting
112 * so that the stack cannot pile up (the nesting level of interrupt
113 * handlers is limited by the number of bits in cpl).
116 cli /* early to prevent INT deadlock */
120 notl %ecx /* set bit = unmasked level */
124 andl _ipending,%ecx /* set bit = unmasked pending INT */
127 decb _intr_nesting_level
129 /* Check for ASTs that can be handled now. */
130 testl $AST_PENDING,_astpending
132 testl $PSL_VM,TF_EFLAGS(%esp)
139 testb $SEL_RPL_MASK,TF_CS(%esp)
143 * doreti_exit - release MP lock, pop registers, iret.
145 * Note that the syscall trap shotcuts to doreti_syscall_ret.
146 * The segment register pop is a special case, since it may
147 * fault if (for example) a sigreturn specifies bad segment
148 * registers. The fault is handled in trap.c
155 /* release the kernel lock */
156 movl $_mp_lock, %edx /* GIANT_LOCK */
160 .globl doreti_popl_fs
161 .globl doreti_syscall_ret
165 .globl doreti_popl_es
168 .globl doreti_popl_ds
178 .globl doreti_iret_fault
183 .globl doreti_popl_ds_fault
184 doreti_popl_ds_fault:
186 .globl doreti_popl_es_fault
187 doreti_popl_es_fault:
189 .globl doreti_popl_fs_fault
190 doreti_popl_fs_fault:
191 movl $0,TF_ERR(%esp) /* XXX should be the error code */
192 movl $T_PROTFLT,TF_TRAPNO(%esp)
193 jmp alltraps_with_regs_pushed
198 * Enabling interrupts is safe because we haven't restored cpl yet.
199 * %ecx contains the next probable ready interrupt (~cpl & ipending)
202 bsfl %ecx, %ecx /* locate the next dispatchable int */
204 btrl %ecx, _ipending /* is it really still pending? */
205 jnc doreti_next2 /* some intr cleared memory copy */
206 sti /* late to prevent INT deadlock */
209 bsfl %ecx,%ecx /* slow, but not worth optimizing */
211 jnc doreti_next /* some intr cleared memory copy */
214 * Execute handleable interrupt
216 * Set up JUMP to _ihandlers[%ecx] for HWIs.
217 * Set up CALL of _ihandlers[%ecx] for SWIs.
218 * This is a bit early for the SMP case - we have to push %ecx and
219 * %edx, but could push only %ecx and load %edx later.
221 movl _ihandlers(,%ecx,4),%edx
223 jae doreti_swi /* software interrupt handling */
224 cli /* else hardware int handling */
226 movl %eax,_cpl /* same as non-smp case right now */
231 #ifdef APIC_INTR_DIAGNOSTIC
233 incl CNAME(apic_itrace_doreti)(,%ecx,4)
234 #ifdef APIC_INTR_DIAGNOSTIC_IRQ
235 cmpl $APIC_INTR_DIAGNOSTIC_IRQ,%ecx
240 pushl $APIC_ITRACE_DORETI
255 * At least the SWI_CLOCK handler has to run at a possibly strictly
256 * lower cpl, so we have to restore
257 * all the h/w bits in cpl now and have to worry about stack growth.
258 * The worst case is currently (30 Jan 1994) 2 SWI handlers nested
259 * in dying interrupt frames and about 12 HWIs nested in active
260 * interrupt frames. There are only 4 different SWIs and the HWI
261 * and SWI masks limit the nesting further.
263 * The SMP case is currently the same as the non-SMP case.
266 orl imasks(,%ecx,4), %eax /* or in imasks */
267 movl %eax,_cpl /* set cpl for call */
269 orl imasks(,%ecx,4),%eax
273 popl %eax /* cpl to restore */
278 andl $~AST_PENDING,_astpending
280 movl $T_ASTFLT,TF_TRAPNO(%esp)
282 subl %eax,%eax /* recover cpl|cml */
283 movb $1,_intr_nesting_level /* for doreti_next to decrement */
294 call *_netisrs(,%eax,4)
307 * The arg is in a nonstandard place, so swi_dispatcher() can't be called
308 * directly and swi_generic() can't use ENTRY() or MCOUNT.
312 .type _swi_generic,@function
324 #include "i386/isa/apic_ipl.s"
326 #include "i386/isa/icu_ipl.s"