2 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
19 * This code is derived from software contributed to The DragonFly Project
20 * by Matthew Dillon <dillon@backplane.com>
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in
30 * the documentation and/or other materials provided with the
32 * 3. Neither the name of The DragonFly Project nor the names of its
33 * contributors may be used to endorse or promote products derived
34 * from this software without specific, prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
39 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
40 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
41 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
42 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
44 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
46 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
49 * $OpenBSD: ahci.c,v 1.147 2009/02/16 21:19:07 miod Exp $
54 int ahci_port_start(struct ahci_port *, int);
55 int ahci_port_stop(struct ahci_port *, int);
56 int ahci_port_clo(struct ahci_port *);
57 int ahci_port_softreset(struct ahci_port *);
58 int ahci_port_portreset(struct ahci_port *);
60 int ahci_load_prdt(struct ahci_ccb *);
61 void ahci_unload_prdt(struct ahci_ccb *);
62 static void ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs,
63 int nsegs, int error);
64 int ahci_poll(struct ahci_ccb *, int, void (*)(void *));
65 void ahci_start(struct ahci_ccb *);
67 static void ahci_ata_cmd_timeout_unserialized(void *arg);
68 static void ahci_ata_cmd_timeout(void *arg);
70 void ahci_issue_pending_ncq_commands(struct ahci_port *);
71 void ahci_issue_pending_commands(struct ahci_port *, int);
73 u_int32_t ahci_port_intr(struct ahci_port *, u_int32_t);
75 struct ahci_ccb *ahci_get_ccb(struct ahci_port *);
76 void ahci_put_ccb(struct ahci_ccb *);
78 struct ahci_ccb *ahci_get_err_ccb(struct ahci_port *);
79 void ahci_put_err_ccb(struct ahci_ccb *);
81 int ahci_port_read_ncq_error(struct ahci_port *, int *);
83 struct ahci_dmamem *ahci_dmamem_alloc(struct ahci_softc *, bus_dma_tag_t tag);
84 void ahci_dmamem_free(struct ahci_softc *, struct ahci_dmamem *);
85 static void ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error);
87 void ahci_empty_done(struct ahci_ccb *ccb);
88 void ahci_ata_cmd_done(struct ahci_ccb *ccb);
90 /* Wait for all bits in _b to be cleared */
91 #define ahci_pwait_clr(_ap, _r, _b) ahci_pwait_eq((_ap), (_r), (_b), 0)
93 /* Wait for all bits in _b to be set */
94 #define ahci_pwait_set(_ap, _r, _b) ahci_pwait_eq((_ap), (_r), (_b), (_b))
97 ahci_init(struct ahci_softc *sc)
101 DPRINTF(AHCI_D_VERBOSE, " GHC 0x%b",
102 ahci_read(sc, AHCI_REG_GHC), AHCI_FMT_GHC);
104 /* save BIOS initialised parameters, enable staggered spin up */
105 cap = ahci_read(sc, AHCI_REG_CAP);
106 cap &= AHCI_REG_CAP_SMPS;
107 cap |= AHCI_REG_CAP_SSS;
108 pi = ahci_read(sc, AHCI_REG_PI);
110 if (AHCI_REG_GHC_AE & ahci_read(sc, AHCI_REG_GHC)) {
111 /* reset the controller */
112 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR);
113 if (ahci_wait_ne(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR,
114 AHCI_REG_GHC_HR) != 0) {
115 device_printf(sc->sc_dev,
116 "unable to reset controller\n");
121 /* enable ahci (global interrupts disabled) */
122 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
124 /* restore parameters */
125 ahci_write(sc, AHCI_REG_CAP, cap);
126 ahci_write(sc, AHCI_REG_PI, pi);
132 ahci_port_alloc(struct ahci_softc *sc, u_int port)
134 struct ahci_port *ap;
135 struct ahci_ccb *ccb;
138 struct ahci_cmd_hdr *hdr;
139 struct ahci_cmd_table *table;
144 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
146 device_printf(sc->sc_dev,
147 "unable to allocate memory for port %d\n",
152 ksnprintf(ap->ap_name, sizeof(ap->ap_name), "%s%d.%d",
153 device_get_name(sc->sc_dev),
154 device_get_unit(sc->sc_dev),
156 sc->sc_ports[port] = ap;
158 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
159 AHCI_PORT_REGION(port), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
160 device_printf(sc->sc_dev,
161 "unable to create register window for port %d\n",
168 TAILQ_INIT(&ap->ap_ccb_free);
169 TAILQ_INIT(&ap->ap_ccb_pending);
170 lockinit(&ap->ap_ccb_lock, "ahcipo", 0, 0);
172 /* Disable port interrupts */
173 ahci_pwrite(ap, AHCI_PREG_IE, 0);
175 /* Sec 10.1.2 - deinitialise port if it is already running */
176 cmd = ahci_pread(ap, AHCI_PREG_CMD);
177 if ((cmd & (AHCI_PREG_CMD_ST | AHCI_PREG_CMD_CR |
178 AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_FR)) ||
179 (ahci_pread(ap, AHCI_PREG_SCTL) & AHCI_PREG_SCTL_DET)) {
182 r = ahci_port_stop(ap, 1);
184 device_printf(sc->sc_dev,
185 "unable to disable %s, ignoring port %d\n",
186 ((r == 2) ? "CR" : "FR"), port);
191 /* Write DET to zero */
192 ahci_pwrite(ap, AHCI_PREG_SCTL, 0);
196 ap->ap_dmamem_rfis = ahci_dmamem_alloc(sc, sc->sc_tag_rfis);
197 if (ap->ap_dmamem_rfis == NULL) {
202 /* Setup RFIS base address */
203 ap->ap_rfis = (struct ahci_rfis *) AHCI_DMA_KVA(ap->ap_dmamem_rfis);
204 dva = AHCI_DMA_DVA(ap->ap_dmamem_rfis);
205 ahci_pwrite(ap, AHCI_PREG_FBU, (u_int32_t)(dva >> 32));
206 ahci_pwrite(ap, AHCI_PREG_FB, (u_int32_t)dva);
208 /* Enable FIS reception and activate port. */
209 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
210 cmd |= AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_POD | AHCI_PREG_CMD_SUD;
211 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_ICC_ACTIVE);
213 /* Check whether port activated. Skip it if not. */
214 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
215 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
216 kprintf("NOT-ACTIVATED\n");
221 /* Allocate a CCB for each command slot */
222 ap->ap_ccbs = kmalloc(sizeof(struct ahci_ccb) * sc->sc_ncmds, M_DEVBUF,
224 if (ap->ap_ccbs == NULL) {
225 device_printf(sc->sc_dev,
226 "unable to allocate command list for port %d\n",
231 /* Command List Structures and Command Tables */
232 ap->ap_dmamem_cmd_list = ahci_dmamem_alloc(sc, sc->sc_tag_cmdh);
233 ap->ap_dmamem_cmd_table = ahci_dmamem_alloc(sc, sc->sc_tag_cmdt);
234 if (ap->ap_dmamem_cmd_table == NULL ||
235 ap->ap_dmamem_cmd_list == NULL) {
237 device_printf(sc->sc_dev,
238 "unable to allocate DMA memory for port %d\n",
243 /* Setup command list base address */
244 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_list);
245 ahci_pwrite(ap, AHCI_PREG_CLBU, (u_int32_t)(dva >> 32));
246 ahci_pwrite(ap, AHCI_PREG_CLB, (u_int32_t)dva);
248 /* Split CCB allocation into CCBs and assign to command header/table */
249 hdr = AHCI_DMA_KVA(ap->ap_dmamem_cmd_list);
250 table = AHCI_DMA_KVA(ap->ap_dmamem_cmd_table);
251 for (i = 0; i < sc->sc_ncmds; i++) {
252 ccb = &ap->ap_ccbs[i];
254 error = bus_dmamap_create(sc->sc_tag_data, BUS_DMA_ALLOCNOW,
257 device_printf(sc->sc_dev,
258 "unable to create dmamap for port %d "
259 "ccb %d\n", port, i);
263 callout_init(&ccb->ccb_timeout);
266 ccb->ccb_cmd_hdr = &hdr[i];
267 ccb->ccb_cmd_table = &table[i];
268 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_table) +
269 ccb->ccb_slot * sizeof(struct ahci_cmd_table);
270 ccb->ccb_cmd_hdr->ctba_hi = htole32((u_int32_t)(dva >> 32));
271 ccb->ccb_cmd_hdr->ctba_lo = htole32((u_int32_t)dva);
274 (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
275 ccb->ccb_xa.packetcmd = ccb->ccb_cmd_table->acmd;
278 ccb->ccb_xa.ata_put_xfer = ahci_ata_put_xfer;
280 ccb->ccb_xa.state = ATA_S_COMPLETE;
284 /* Wait for ICC change to complete */
285 ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_ICC);
288 rc = ahci_port_portreset(ap);
291 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
292 case AHCI_PREG_SSTS_DET_DEV_NE:
293 device_printf(sc->sc_dev,
294 "device not communicating on port %d\n",
297 case AHCI_PREG_SSTS_DET_PHYOFFLINE:
298 device_printf(sc->sc_dev,
299 "PHY offline on port %d\n",
303 device_printf(sc->sc_dev,
304 "no device detected on port %d\n",
311 device_printf(sc->sc_dev,
312 "device on port %d didn't come ready, "
315 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
317 /* Try a soft reset to clear busy */
318 rc = ahci_port_softreset(ap);
320 device_printf(sc->sc_dev,
321 "unable to communicate "
322 "with device on port %d\n",
333 * Enable command transfers on the port if a device was detected.
334 * Otherwise leave them disabled but leave the port structure
335 * intact so we get hot-plug interrupts.
338 DPRINTF(AHCI_D_VERBOSE, "%s: detected device on port %d\n",
339 device_get_name(sc->sc_dev), port);
340 if (ahci_port_start(ap, 0)) {
341 device_printf(sc->sc_dev,
342 "failed to start command DMA on port %d, "
343 "disabling\n", port);
344 rc = ENXIO; /* couldn't start port */
349 * A missing or busy device is not fatal for the purposes of
350 * port allocation. We still want to detect hot-plug
353 if (rc == ENODEV || rc == EBUSY) {
357 /* Flush interrupts for port */
358 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
359 ahci_write(sc, AHCI_REG_IS, 1 << port);
361 /* Enable port interrupts */
362 ahci_pwrite(ap, AHCI_PREG_IE,
363 AHCI_PREG_IE_TFEE | AHCI_PREG_IE_HBFE |
364 AHCI_PREG_IE_IFE | AHCI_PREG_IE_OFE |
365 AHCI_PREG_IE_DPE | AHCI_PREG_IE_UFE |
366 AHCI_PREG_IE_PCE | AHCI_PREG_IE_PRCE |
368 ((sc->sc_ccc_ports & (1 << port)) ?
369 0 : (AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE))
371 AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE
377 ahci_port_free(sc, port);
383 ahci_port_free(struct ahci_softc *sc, u_int port)
385 struct ahci_port *ap = sc->sc_ports[port];
386 struct ahci_ccb *ccb;
388 /* Ensure port is disabled and its interrupts are flushed */
390 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
391 ahci_pwrite(ap, AHCI_PREG_IE, 0);
392 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
393 ahci_write(sc, AHCI_REG_IS, 1 << port);
397 while ((ccb = ahci_get_ccb(ap)) != NULL) {
398 if (ccb->ccb_dmamap) {
399 bus_dmamap_destroy(sc->sc_tag_data,
401 ccb->ccb_dmamap = NULL;
404 kfree(ap->ap_ccbs, M_DEVBUF);
408 if (ap->ap_dmamem_cmd_list) {
409 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_list);
410 ap->ap_dmamem_cmd_list = NULL;
412 if (ap->ap_dmamem_rfis) {
413 ahci_dmamem_free(sc, ap->ap_dmamem_rfis);
414 ap->ap_dmamem_rfis = NULL;
416 if (ap->ap_dmamem_cmd_table) {
417 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_table);
418 ap->ap_dmamem_cmd_table = NULL;
421 /* bus_space(9) says we dont free the subregions handle */
424 sc->sc_ports[port] = NULL;
428 ahci_port_start(struct ahci_port *ap, int fre_only)
432 /* Turn on FRE (and ST) */
433 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
434 r |= AHCI_PREG_CMD_FRE;
436 r |= AHCI_PREG_CMD_ST;
437 ahci_pwrite(ap, AHCI_PREG_CMD, r);
440 /* (Re-)enable coalescing on the port. */
441 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
442 ap->ap_sc->sc_ccc_ports_cur |= (1 << ap->ap_num);
443 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
444 ap->ap_sc->sc_ccc_ports_cur);
448 if (!(ap->ap_sc->sc_flags & AHCI_F_IGN_FR)) {
449 /* Wait for FR to come on */
450 if (ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR))
454 /* Wait for CR to come on */
455 if (!fre_only && ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR))
462 ahci_port_stop(struct ahci_port *ap, int stop_fis_rx)
467 /* Disable coalescing on the port while it is stopped. */
468 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
469 ap->ap_sc->sc_ccc_ports_cur &= ~(1 << ap->ap_num);
470 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
471 ap->ap_sc->sc_ccc_ports_cur);
475 /* Turn off ST (and FRE) */
476 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
477 r &= ~AHCI_PREG_CMD_ST;
479 r &= ~AHCI_PREG_CMD_FRE;
480 ahci_pwrite(ap, AHCI_PREG_CMD, r);
482 /* Wait for CR to go off */
483 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR))
486 /* Wait for FR to go off */
487 if (stop_fis_rx && ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR))
493 /* AHCI command list override -> forcibly clear TFD.STS.{BSY,DRQ} */
495 ahci_port_clo(struct ahci_port *ap)
497 struct ahci_softc *sc = ap->ap_sc;
500 /* Only attempt CLO if supported by controller */
501 if ((ahci_read(sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO) == 0)
505 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
507 if (cmd & AHCI_PREG_CMD_ST) {
508 kprintf("%s: CLO requested while port running\n",
512 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_CLO);
514 /* Wait for completion */
515 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CLO)) {
516 kprintf("%s: CLO did not complete\n", PORTNAME(ap));
523 /* AHCI soft reset, Section 10.4.1 */
525 ahci_port_softreset(struct ahci_port *ap)
527 struct ahci_ccb *ccb = NULL;
528 struct ahci_cmd_hdr *cmd_slot;
533 DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap));
537 /* Save previous command register state */
538 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
541 if (ahci_port_stop(ap, 0)) {
542 kprintf("%s: failed to stop port, cannot softreset\n",
547 /* Request CLO if device appears hung */
548 if (ahci_pread(ap, AHCI_PREG_TFD) &
549 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
553 /* Clear port errors to permit TFD transfer */
554 ahci_pwrite(ap, AHCI_PREG_SERR, ahci_pread(ap, AHCI_PREG_SERR));
557 if (ahci_port_start(ap, 0)) {
558 kprintf("%s: failed to start port, cannot softreset\n",
563 /* Check whether CLO worked */
564 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
565 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
566 kprintf("%s: CLO %s, need port reset\n",
568 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO)
569 ? "failed" : "unsupported");
574 /* Prep first D2H command with SRST feature & clear busy/reset flags */
575 ccb = ahci_get_err_ccb(ap);
576 cmd_slot = ccb->ccb_cmd_hdr;
577 bzero(ccb->ccb_cmd_table, sizeof(struct ahci_cmd_table));
579 fis = ccb->ccb_cmd_table->cfis;
580 fis[0] = 0x27; /* Host to device */
581 fis[15] = 0x04; /* SRST DEVCTL */
584 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
585 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
586 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
587 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W); /* Write */
589 ccb->ccb_xa.state = ATA_S_PENDING;
590 if (ahci_poll(ccb, hz, NULL) != 0)
593 /* Prep second D2H command to read status and complete reset sequence */
594 fis[0] = 0x27; /* Host to device */
598 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
599 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
601 ccb->ccb_xa.state = ATA_S_PENDING;
602 if (ahci_poll(ccb, hz, NULL) != 0)
605 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, AHCI_PREG_TFD_STS_BSY |
606 AHCI_PREG_TFD_STS_DRQ | AHCI_PREG_TFD_STS_ERR)) {
607 kprintf("%s: device didn't come ready after reset, TFD: 0x%b\n",
609 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
617 /* Abort our command, if it failed, by stopping command DMA. */
618 if (rc != 0 && (ap->ap_active & (1 << ccb->ccb_slot))) {
619 kprintf("%s: stopping the port, softreset slot "
620 "%d was still active.\n",
623 ahci_port_stop(ap, 0);
625 ccb->ccb_xa.state = ATA_S_ERROR;
626 ahci_put_err_ccb(ccb);
629 /* Restore saved CMD register state */
630 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
637 /* AHCI port reset, Section 10.4.2 */
639 ahci_port_portreset(struct ahci_port *ap)
644 DPRINTF(AHCI_D_VERBOSE, "%s: port reset\n", PORTNAME(ap));
646 /* Save previous command register state */
647 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
649 /* Clear ST, ignoring failure */
650 ahci_port_stop(ap, 0);
652 /* Perform device detection */
653 ap->ap_ata.ap_type = ATA_PORT_T_NONE;
654 ahci_pwrite(ap, AHCI_PREG_SCTL, 0);
656 r = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT;
658 if (AhciForceGen1 & (1 << ap->ap_num)) {
659 kprintf("%s: Force 1.5Gbits\n", PORTNAME(ap));
660 r |= AHCI_PREG_SCTL_SPD_GEN1;
662 r |= AHCI_PREG_SCTL_SPD_ANY;
664 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
665 DELAY(10000); /* wait at least 1ms for COMRESET to be sent */
666 r &= ~AHCI_PREG_SCTL_DET_INIT;
667 r |= AHCI_PREG_SCTL_DET_NONE;
668 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
671 /* Wait for device to be detected and communications established */
672 if (ahci_pwait_eq(ap, AHCI_PREG_SSTS, AHCI_PREG_SSTS_DET,
673 AHCI_PREG_SSTS_DET_DEV)) {
678 /* Clear SERR (incl X bit), so TFD can update */
679 ahci_pwrite(ap, AHCI_PREG_SERR, ahci_pread(ap, AHCI_PREG_SERR));
681 /* Wait for device to become ready */
682 /* XXX maybe more than the default wait is appropriate here? */
683 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, AHCI_PREG_TFD_STS_BSY |
684 AHCI_PREG_TFD_STS_DRQ | AHCI_PREG_TFD_STS_ERR)) {
686 kprintf("%s: Device will not come ready 0x%b\n",
688 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
693 * Figure out if we are a ATAPI or DISK device
696 sig = ahci_pread(ap, AHCI_PREG_SIG);
697 if ((sig & 0xffff0000) == (SATA_SIGNATURE_ATAPI & 0xffff0000)) {
698 ap->ap_ata.ap_type = ATA_PORT_T_ATAPI;
700 ap->ap_ata.ap_type = ATA_PORT_T_DISK;
704 /* Restore preserved port state */
705 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
711 ahci_load_prdt(struct ahci_ccb *ccb)
713 struct ahci_port *ap = ccb->ccb_port;
714 struct ahci_softc *sc = ap->ap_sc;
715 struct ata_xfer *xa = &ccb->ccb_xa;
716 struct ahci_prdt *prdt = ccb->ccb_cmd_table->prdt;
717 bus_dmamap_t dmap = ccb->ccb_dmamap;
718 struct ahci_cmd_hdr *cmd_slot = ccb->ccb_cmd_hdr;
721 if (xa->datalen == 0) {
722 ccb->ccb_cmd_hdr->prdtl = 0;
726 error = bus_dmamap_load(sc->sc_tag_data, dmap,
727 xa->data, xa->datalen,
728 ahci_load_prdt_callback,
730 ((xa->flags & ATA_F_NOWAIT) ?
731 BUS_DMA_NOWAIT : BUS_DMA_WAITOK));
733 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap), error);
736 if (xa->flags & ATA_F_PIO)
737 prdt->flags |= htole32(AHCI_PRDT_FLAG_INTR);
739 cmd_slot->prdtl = htole16(prdt - ccb->ccb_cmd_table->prdt + 1);
741 bus_dmamap_sync(sc->sc_tag_data, dmap,
742 (xa->flags & ATA_F_READ) ?
743 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
749 bus_dmamap_unload(sc->sc_tag_data, dmap);
755 * Callback from BUSDMA system to load the segment list. The passed segment
756 * list is a temporary structure.
760 ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs, int nsegs,
763 struct ahci_prdt *prd = *(void **)info;
766 KKASSERT(nsegs <= AHCI_MAX_PRDT);
769 addr = segs->ds_addr;
770 prd->dba_hi = htole32((u_int32_t)(addr >> 32));
771 prd->dba_lo = htole32((u_int32_t)addr);
773 KKASSERT((addr & 1) == 0);
774 KKASSERT((segs->ds_len & 1) == 0);
776 prd->flags = htole32(segs->ds_len - 1);
782 *(void **)info = prd; /* return last valid segment */
786 ahci_unload_prdt(struct ahci_ccb *ccb)
788 struct ahci_port *ap = ccb->ccb_port;
789 struct ahci_softc *sc = ap->ap_sc;
790 struct ata_xfer *xa = &ccb->ccb_xa;
791 bus_dmamap_t dmap = ccb->ccb_dmamap;
793 if (xa->datalen != 0) {
794 bus_dmamap_sync(sc->sc_tag_data, dmap,
795 (xa->flags & ATA_F_READ) ?
796 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
798 bus_dmamap_unload(sc->sc_tag_data, dmap);
800 if (ccb->ccb_xa.flags & ATA_F_NCQ)
803 xa->resid = xa->datalen -
804 le32toh(ccb->ccb_cmd_hdr->prdbc);
809 ahci_poll(struct ahci_ccb *ccb, int timeout, void (*timeout_fn)(void *))
811 struct ahci_port *ap = ccb->ccb_port;
816 if (ahci_port_intr(ap, AHCI_PREG_CI_ALL_SLOTS) &
817 (1 << ccb->ccb_slot)) {
822 } while (--timeout > 0);
823 kprintf("timeout ccb state %d\n", ccb->ccb_xa.state);
825 if (timeout_fn != NULL)
833 ahci_start(struct ahci_ccb *ccb)
835 struct ahci_port *ap = ccb->ccb_port;
836 struct ahci_softc *sc = ap->ap_sc;
838 KKASSERT(ccb->ccb_xa.state == ATA_S_PENDING);
840 /* Zero transferred byte count before transfer */
841 ccb->ccb_cmd_hdr->prdbc = 0;
843 /* Sync command list entry and corresponding command table entry */
844 bus_dmamap_sync(sc->sc_tag_cmdh,
845 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
846 BUS_DMASYNC_PREWRITE);
847 bus_dmamap_sync(sc->sc_tag_cmdt,
848 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
849 BUS_DMASYNC_PREWRITE);
851 /* Prepare RFIS area for write by controller */
852 bus_dmamap_sync(sc->sc_tag_rfis,
853 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
854 BUS_DMASYNC_PREREAD);
856 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
857 /* Issue NCQ commands only when there are no outstanding
858 * standard commands. */
859 if (ap->ap_active != 0 || !TAILQ_EMPTY(&ap->ap_ccb_pending))
860 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
862 KKASSERT(ap->ap_active_cnt == 0);
863 ap->ap_sactive |= (1 << ccb->ccb_slot);
864 ccb->ccb_xa.state = ATA_S_ONCHIP;
865 ahci_pwrite(ap, AHCI_PREG_SACT, 1 << ccb->ccb_slot);
866 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
869 /* Wait for all NCQ commands to finish before issuing standard
871 if (ap->ap_sactive != 0 || ap->ap_active_cnt == 2)
872 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
873 else if (ap->ap_active_cnt < 2) {
874 ap->ap_active |= 1 << ccb->ccb_slot;
875 ccb->ccb_xa.state = ATA_S_ONCHIP;
876 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
883 ahci_issue_pending_ncq_commands(struct ahci_port *ap)
885 struct ahci_ccb *nextccb;
886 u_int32_t sact_change = 0;
888 KKASSERT(ap->ap_active_cnt == 0);
890 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
891 if (nextccb == NULL || !(nextccb->ccb_xa.flags & ATA_F_NCQ))
894 /* Start all the NCQ commands at the head of the pending list. */
896 TAILQ_REMOVE(&ap->ap_ccb_pending, nextccb, ccb_entry);
897 sact_change |= 1 << nextccb->ccb_slot;
898 nextccb->ccb_xa.state = ATA_S_ONCHIP;
899 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
900 } while (nextccb && (nextccb->ccb_xa.flags & ATA_F_NCQ));
902 ap->ap_sactive |= sact_change;
903 ahci_pwrite(ap, AHCI_PREG_SACT, sact_change);
904 ahci_pwrite(ap, AHCI_PREG_CI, sact_change);
910 ahci_issue_pending_commands(struct ahci_port *ap, int last_was_ncq)
912 struct ahci_ccb *nextccb;
914 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
915 if (nextccb && (nextccb->ccb_xa.flags & ATA_F_NCQ)) {
916 KKASSERT(last_was_ncq == 0); /* otherwise it should have
917 * been started already. */
919 /* Issue NCQ commands only when there are no outstanding
920 * standard commands. */
922 if (ap->ap_active == 0)
923 ahci_issue_pending_ncq_commands(ap);
925 KKASSERT(ap->ap_active_cnt == 1);
926 } else if (nextccb) {
927 if (ap->ap_sactive != 0 || last_was_ncq)
928 KKASSERT(ap->ap_active_cnt == 0);
930 /* Wait for all NCQ commands to finish before issuing standard
932 if (ap->ap_sactive != 0)
935 /* Keep up to 2 standard commands on-chip at a time. */
937 TAILQ_REMOVE(&ap->ap_ccb_pending, nextccb, ccb_entry);
938 ap->ap_active |= 1 << nextccb->ccb_slot;
939 nextccb->ccb_xa.state = ATA_S_ONCHIP;
940 ahci_pwrite(ap, AHCI_PREG_CI, 1 << nextccb->ccb_slot);
943 if (ap->ap_active_cnt == 2)
945 KKASSERT(ap->ap_active_cnt == 1);
946 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
947 } while (nextccb && !(nextccb->ccb_xa.flags & ATA_F_NCQ));
948 } else if (!last_was_ncq) {
949 KKASSERT(ap->ap_active_cnt == 1 || ap->ap_active_cnt == 2);
951 /* Standard command finished, none waiting to start. */
954 KKASSERT(ap->ap_active_cnt == 0);
956 /* NCQ command finished. */
963 struct ahci_softc *sc = arg;
964 u_int32_t is, ack = 0;
967 /* Read global interrupt status */
968 is = ahci_read(sc, AHCI_REG_IS);
969 if (is == 0 || is == 0xffffffff)
974 /* Check coalescing interrupt first */
975 if (is & sc->sc_ccc_mask) {
976 DPRINTF(AHCI_D_INTR, "%s: command coalescing interrupt\n",
978 is &= ~sc->sc_ccc_mask;
979 is |= sc->sc_ccc_ports_cur;
983 /* Process interrupts for each port */
986 if (sc->sc_ports[port]) {
987 ahci_port_intr(sc->sc_ports[port],
988 AHCI_PREG_CI_ALL_SLOTS);
993 /* Finally, acknowledge global interrupt */
994 ahci_write(sc, AHCI_REG_IS, ack);
998 ahci_port_intr(struct ahci_port *ap, u_int32_t ci_mask)
1000 struct ahci_softc *sc = ap->ap_sc;
1001 u_int32_t is, ci_saved, ci_masked, processed = 0;
1002 int slot, need_restart = 0;
1003 struct ahci_ccb *ccb = NULL;
1004 volatile u_int32_t *active;
1009 is = ahci_pread(ap, AHCI_PREG_IS);
1011 /* Ack port interrupt only if checking all command slots. */
1012 if (ci_mask == AHCI_PREG_CI_ALL_SLOTS)
1013 ahci_pwrite(ap, AHCI_PREG_IS, is);
1016 DPRINTF(AHCI_D_INTR, "%s: interrupt: %b\n", PORTNAME(ap),
1019 if (ap->ap_sactive) {
1020 /* Active NCQ commands - use SActive instead of CI */
1021 KKASSERT(ap->ap_active == 0);
1022 KKASSERT(ap->ap_active_cnt == 0);
1023 ci_saved = ahci_pread(ap, AHCI_PREG_SACT);
1024 active = &ap->ap_sactive;
1027 ci_saved = ahci_pread(ap, AHCI_PREG_CI);
1028 active = &ap->ap_active;
1031 /* Command failed. See AHCI 1.1 spec 6.2.2.1 and 6.2.2.2. */
1032 if (is & AHCI_PREG_IS_TFES) {
1033 u_int32_t tfd, serr;
1036 tfd = ahci_pread(ap, AHCI_PREG_TFD);
1037 serr = ahci_pread(ap, AHCI_PREG_SERR);
1039 if (ap->ap_sactive == 0) {
1040 /* Errored slot is easy to determine from CMD. */
1041 err_slot = AHCI_PREG_CMD_CCS(ahci_pread(ap,
1043 ccb = &ap->ap_ccbs[err_slot];
1045 /* Preserve received taskfile data from the RFIS. */
1046 memcpy(&ccb->ccb_xa.rfis, ap->ap_rfis->rfis,
1047 sizeof(struct ata_fis_d2h));
1049 err_slot = -1; /* Must extract error from log page */
1051 DPRINTF(AHCI_D_VERBOSE, "%s: errored slot %d, TFD: %b, SERR:"
1052 " %b, DIAG: %b\n", PORTNAME(ap), err_slot, tfd,
1053 AHCI_PFMT_TFD_STS, AHCI_PREG_SERR_ERR(serr),
1054 AHCI_PFMT_SERR_ERR, AHCI_PREG_SERR_DIAG(serr),
1055 AHCI_PFMT_SERR_DIAG);
1057 /* Turn off ST to clear CI and SACT. */
1058 ahci_port_stop(ap, 0);
1061 /* Clear SERR to enable capturing new errors. */
1062 ahci_pwrite(ap, AHCI_PREG_SERR, serr);
1064 /* Acknowledge the interrupts we can recover from. */
1065 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_TFES |
1067 is = ahci_pread(ap, AHCI_PREG_IS);
1069 /* If device hasn't cleared its busy status, try to idle it. */
1070 if (tfd & (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1071 kprintf("%s: attempting to idle device\n",
1073 if (ahci_port_softreset(ap)) {
1074 kprintf("%s: failed to soft reset device\n",
1076 if (ahci_port_portreset(ap)) {
1077 kprintf("%s: failed to port reset "
1078 "device, give up on it\n",
1084 /* Had to reset device, can't gather extended info. */
1085 } else if (ap->ap_sactive) {
1086 /* Recover the NCQ error from log page 10h. */
1087 ahci_port_read_ncq_error(ap, &err_slot);
1091 DPRINTF(AHCI_D_VERBOSE, "%s: NCQ errored slot %d\n",
1092 PORTNAME(ap), err_slot);
1094 ccb = &ap->ap_ccbs[err_slot];
1096 /* Didn't reset, could gather extended info from log. */
1100 * If we couldn't determine the errored slot, reset the port
1101 * and fail all the active slots.
1103 if (err_slot == -1) {
1104 if (ahci_port_softreset(ap) != 0 &&
1105 ahci_port_portreset(ap) != 0) {
1106 kprintf("%s: couldn't reset after NCQ error, "
1107 "disabling device.\n",
1111 kprintf("%s: couldn't recover NCQ error, failing "
1112 "all outstanding commands.\n",
1117 /* Clear the failed command in saved CI so completion runs. */
1118 ci_saved &= ~(1 << err_slot);
1120 /* Note the error in the ata_xfer. */
1121 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
1122 ccb->ccb_xa.state = ATA_S_ERROR;
1125 /* There may only be one outstanding standard command now. */
1126 if (ap->ap_sactive == 0) {
1129 slot = ffs(tmp) - 1;
1130 tmp &= ~(1 << slot);
1138 * Port change (hot-plug).
1140 * A PCS interrupt will occur on hot-plug once communication is
1143 * A PRCS interrupt will occur on hot-unplug (and possibly also
1146 * We can then check the CPS (Cold Presence State) bit to determine
1147 * if a device is plugged in or not and do the right thing.
1149 if (is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS)) {
1150 ahci_pwrite(ap, AHCI_PREG_SERR,
1151 (AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_X) << 16);
1152 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
1153 case AHCI_PREG_SSTS_DET_DEV:
1154 if (ap->ap_ata.ap_type == ATA_PORT_T_NONE) {
1155 kprintf("%s: HOTPLUG - Device added\n",
1157 if (ahci_port_portreset(ap) == 0)
1158 ahci_cam_changed(ap);
1162 if (ap->ap_ata.ap_type != ATA_PORT_T_NONE) {
1163 kprintf("%s: HOTPLUG - Device removed\n",
1165 ahci_port_portreset(ap);
1166 ahci_cam_changed(ap);
1172 /* Check for remaining errors - they are fatal. */
1173 if (is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS | AHCI_PREG_IS_IFS |
1174 AHCI_PREG_IS_OFS | AHCI_PREG_IS_UFS)) {
1175 kprintf("%s: unrecoverable errors (IS: %b), disabling port.\n",
1176 PORTNAME(ap), is, AHCI_PFMT_IS);
1178 /* XXX try recovery first */
1182 /* Fail all outstanding commands if we know the port won't recover. */
1183 if (ap->ap_state == AP_S_FATAL_ERROR) {
1185 ap->ap_state = AP_S_FATAL_ERROR;
1188 /* Ensure port is shut down. */
1189 ahci_port_stop(ap, 1);
1191 /* Error all the active slots. */
1192 ci_masked = ci_saved & *active;
1194 slot = ffs(ci_masked) - 1;
1195 ccb = &ap->ap_ccbs[slot];
1196 ci_masked &= ~(1 << slot);
1197 ccb->ccb_xa.state = ATA_S_ERROR;
1200 /* Run completion for all active slots. */
1201 ci_saved &= ~*active;
1204 * Don't restart the port if our problems were deemed fatal.
1206 * Also acknowlege all fatal interrupt sources to prevent
1209 if (ap->ap_state == AP_S_FATAL_ERROR) {
1211 ahci_pwrite(ap, AHCI_PREG_IS,
1212 AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
1213 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
1219 * CCB completion is detected by noticing its slot's bit in CI has
1220 * changed to zero some time after we activated it.
1221 * If we are polling, we may only be interested in particular slot(s).
1223 ci_masked = ~ci_saved & *active & ci_mask;
1225 slot = ffs(ci_masked) - 1;
1226 ccb = &ap->ap_ccbs[slot];
1227 ci_masked &= ~(1 << slot);
1229 DPRINTF(AHCI_D_INTR, "%s: slot %d is complete%s\n",
1230 PORTNAME(ap), slot, ccb->ccb_xa.state == ATA_S_ERROR ?
1233 bus_dmamap_sync(sc->sc_tag_cmdh,
1234 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
1235 BUS_DMASYNC_POSTWRITE);
1237 bus_dmamap_sync(sc->sc_tag_cmdt,
1238 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
1239 BUS_DMASYNC_POSTWRITE);
1241 bus_dmamap_sync(sc->sc_tag_rfis,
1242 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
1243 BUS_DMASYNC_POSTREAD);
1245 *active &= ~(1 << ccb->ccb_slot);
1248 processed |= 1 << ccb->ccb_slot;
1252 /* Restart command DMA on the port */
1253 ahci_port_start(ap, 0);
1255 /* Re-enable outstanding commands on port. */
1260 slot = ffs(tmp) - 1;
1261 tmp &= ~(1 << slot);
1262 ccb = &ap->ap_ccbs[slot];
1263 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
1264 KKASSERT((!!(ccb->ccb_xa.flags & ATA_F_NCQ)) ==
1265 (!!ap->ap_sactive));
1268 DPRINTF(AHCI_D_VERBOSE, "%s: ahci_port_intr "
1269 "re-enabling%s slots %08x\n", PORTNAME(ap),
1270 ap->ap_sactive ? " NCQ" : "", ci_saved);
1273 ahci_pwrite(ap, AHCI_PREG_SACT, ci_saved);
1274 ahci_pwrite(ap, AHCI_PREG_CI, ci_saved);
1282 ahci_get_ccb(struct ahci_port *ap)
1284 struct ahci_ccb *ccb;
1286 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
1287 ccb = TAILQ_FIRST(&ap->ap_ccb_free);
1289 KKASSERT(ccb->ccb_xa.state == ATA_S_PUT);
1290 TAILQ_REMOVE(&ap->ap_ccb_free, ccb, ccb_entry);
1291 ccb->ccb_xa.state = ATA_S_SETUP;
1293 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
1299 ahci_put_ccb(struct ahci_ccb *ccb)
1301 struct ahci_port *ap = ccb->ccb_port;
1304 if (ccb->ccb_xa.state != ATA_S_COMPLETE &&
1305 ccb->ccb_xa.state != ATA_S_TIMEOUT &&
1306 ccb->ccb_xa.state != ATA_S_ERROR) {
1307 kprintf("%s: invalid ata_xfer state %02x in ahci_put_ccb, "
1309 PORTNAME(ccb->ccb_port), ccb->ccb_xa.state,
1314 ccb->ccb_xa.state = ATA_S_PUT;
1315 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
1316 TAILQ_INSERT_TAIL(&ap->ap_ccb_free, ccb, ccb_entry);
1317 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
1321 ahci_get_err_ccb(struct ahci_port *ap)
1323 struct ahci_ccb *err_ccb;
1326 /* No commands may be active on the chip. */
1327 sact = ahci_pread(ap, AHCI_PREG_SACT);
1329 kprintf("ahci_get_err_ccb but SACT %08x != 0?\n", sact);
1330 KKASSERT(ahci_pread(ap, AHCI_PREG_CI) == 0);
1333 KKASSERT(ap->ap_err_busy == 0);
1334 ap->ap_err_busy = 1;
1336 /* Save outstanding command state. */
1337 ap->ap_err_saved_active = ap->ap_active;
1338 ap->ap_err_saved_active_cnt = ap->ap_active_cnt;
1339 ap->ap_err_saved_sactive = ap->ap_sactive;
1342 * Pretend we have no commands outstanding, so that completions won't
1345 ap->ap_active = ap->ap_active_cnt = ap->ap_sactive = 0;
1348 * Grab a CCB to use for error recovery. This should never fail, as
1349 * we ask atascsi to reserve one for us at init time.
1351 err_ccb = ahci_get_ccb(ap);
1352 KKASSERT(err_ccb != NULL);
1353 err_ccb->ccb_xa.flags = 0;
1354 err_ccb->ccb_done = ahci_empty_done;
1360 ahci_put_err_ccb(struct ahci_ccb *ccb)
1362 struct ahci_port *ap = ccb->ccb_port;
1366 KKASSERT(ap->ap_err_busy);
1368 /* No commands may be active on the chip */
1369 sact = ahci_pread(ap, AHCI_PREG_SACT);
1371 kprintf("ahci_port_err_ccb_restore but SACT %08x != 0?\n",
1374 KKASSERT(ahci_pread(ap, AHCI_PREG_CI) == 0);
1376 /* Done with the CCB */
1379 /* Restore outstanding command state */
1380 ap->ap_sactive = ap->ap_err_saved_sactive;
1381 ap->ap_active_cnt = ap->ap_err_saved_active_cnt;
1382 ap->ap_active = ap->ap_err_saved_active;
1385 ap->ap_err_busy = 0;
1390 ahci_port_read_ncq_error(struct ahci_port *ap, int *err_slotp)
1392 struct ahci_ccb *ccb;
1393 struct ahci_cmd_hdr *cmd_slot;
1395 struct ata_fis_h2d *fis;
1398 DPRINTF(AHCI_D_VERBOSE, "%s: read log page\n", PORTNAME(ap));
1400 /* Save command register state. */
1401 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1403 /* Port should have been idled already. Start it. */
1404 KKASSERT((cmd & AHCI_PREG_CMD_CR) == 0);
1405 ahci_port_start(ap, 0);
1407 /* Prep error CCB for READ LOG EXT, page 10h, 1 sector. */
1408 ccb = ahci_get_err_ccb(ap);
1409 ccb->ccb_xa.flags = ATA_F_NOWAIT | ATA_F_READ | ATA_F_POLL;
1410 ccb->ccb_xa.data = ap->ap_err_scratch;
1411 ccb->ccb_xa.datalen = 512;
1412 cmd_slot = ccb->ccb_cmd_hdr;
1413 bzero(ccb->ccb_cmd_table, sizeof(struct ahci_cmd_table));
1415 fis = (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
1416 fis->type = ATA_FIS_TYPE_H2D;
1417 fis->flags = ATA_H2D_FLAGS_CMD;
1418 fis->command = ATA_C_READ_LOG_EXT;
1419 fis->lba_low = 0x10; /* queued error log page (10h) */
1420 fis->sector_count = 1; /* number of sectors (1) */
1421 fis->sector_count_exp = 0;
1422 fis->lba_mid = 0; /* starting offset */
1423 fis->lba_mid_exp = 0;
1426 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1428 if (ahci_load_prdt(ccb) != 0) {
1429 rc = ENOMEM; /* XXX caller must abort all commands */
1433 ccb->ccb_xa.state = ATA_S_PENDING;
1434 if (ahci_poll(ccb, hz, NULL) != 0)
1439 /* Abort our command, if it failed, by stopping command DMA. */
1440 if (rc != 0 && (ap->ap_active & (1 << ccb->ccb_slot))) {
1441 kprintf("%s: log page read failed, slot %d was still active.\n",
1442 PORTNAME(ap), ccb->ccb_slot);
1443 ahci_port_stop(ap, 0);
1446 /* Done with the error CCB now. */
1447 ahci_unload_prdt(ccb);
1448 ahci_put_err_ccb(ccb);
1450 /* Extract failed register set and tags from the scratch space. */
1452 struct ata_log_page_10h *log;
1455 log = (struct ata_log_page_10h *)ap->ap_err_scratch;
1456 if (log->err_regs.type & ATA_LOG_10H_TYPE_NOTQUEUED) {
1457 /* Not queued bit was set - wasn't an NCQ error? */
1458 kprintf("%s: read NCQ error page, but not an NCQ "
1463 /* Copy back the log record as a D2H register FIS. */
1464 *err_slotp = err_slot = log->err_regs.type &
1465 ATA_LOG_10H_TYPE_TAG_MASK;
1467 ccb = &ap->ap_ccbs[err_slot];
1468 memcpy(&ccb->ccb_xa.rfis, &log->err_regs,
1469 sizeof(struct ata_fis_d2h));
1470 ccb->ccb_xa.rfis.type = ATA_FIS_TYPE_D2H;
1471 ccb->ccb_xa.rfis.flags = 0;
1475 /* Restore saved CMD register state */
1476 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1482 * Allocate memory for various structures DMAd by hardware. The maximum
1483 * number of segments for these tags is 1 so the DMA memory will have a
1484 * single physical base address.
1486 struct ahci_dmamem *
1487 ahci_dmamem_alloc(struct ahci_softc *sc, bus_dma_tag_t tag)
1489 struct ahci_dmamem *adm;
1492 adm = kmalloc(sizeof(*adm), M_DEVBUF, M_INTWAIT | M_ZERO);
1494 error = bus_dmamem_alloc(tag, (void **)&adm->adm_kva,
1495 BUS_DMA_ZERO, &adm->adm_map);
1498 error = bus_dmamap_load(tag, adm->adm_map,
1500 bus_dma_tag_getmaxsize(tag),
1501 ahci_dmamem_saveseg, &adm->adm_busaddr,
1506 bus_dmamap_destroy(tag, adm->adm_map);
1507 adm->adm_map = NULL;
1508 adm->adm_tag = NULL;
1509 adm->adm_kva = NULL;
1511 kfree(adm, M_DEVBUF);
1519 ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error)
1521 KKASSERT(error == 0);
1522 KKASSERT(nsegs == 1);
1523 *(bus_addr_t *)info = segs->ds_addr;
1528 ahci_dmamem_free(struct ahci_softc *sc, struct ahci_dmamem *adm)
1531 bus_dmamap_unload(adm->adm_tag, adm->adm_map);
1532 bus_dmamap_destroy(adm->adm_tag, adm->adm_map);
1533 adm->adm_map = NULL;
1534 adm->adm_tag = NULL;
1535 adm->adm_kva = NULL;
1537 kfree(adm, M_DEVBUF);
1541 ahci_read(struct ahci_softc *sc, bus_size_t r)
1543 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
1544 BUS_SPACE_BARRIER_READ);
1545 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
1549 ahci_write(struct ahci_softc *sc, bus_size_t r, u_int32_t v)
1551 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
1552 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
1553 BUS_SPACE_BARRIER_WRITE);
1557 ahci_wait_ne(struct ahci_softc *sc, bus_size_t r, u_int32_t mask,
1562 for (i = 0; i < 1000; i++) {
1563 if ((ahci_read(sc, r) & mask) != target)
1572 ahci_pread(struct ahci_port *ap, bus_size_t r)
1574 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
1575 BUS_SPACE_BARRIER_READ);
1576 return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
1580 ahci_pwrite(struct ahci_port *ap, bus_size_t r, u_int32_t v)
1582 bus_space_write_4(ap->ap_sc->sc_iot, ap->ap_ioh, r, v);
1583 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
1584 BUS_SPACE_BARRIER_WRITE);
1588 ahci_pwait_eq(struct ahci_port *ap, bus_size_t r, u_int32_t mask,
1593 for (i = 0; i < 1000; i++) {
1594 if ((ahci_pread(ap, r) & mask) == target)
1603 ahci_ata_get_xfer(struct ahci_port *ap)
1605 /*struct ahci_softc *sc = ap->ap_sc;*/
1606 struct ahci_ccb *ccb;
1608 ccb = ahci_get_ccb(ap);
1610 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer: NULL ccb\n",
1615 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer got slot %d\n",
1616 PORTNAME(ap), ccb->ccb_slot);
1618 ccb->ccb_xa.fis->type = ATA_FIS_TYPE_H2D;
1620 return (&ccb->ccb_xa);
1624 ahci_ata_put_xfer(struct ata_xfer *xa)
1626 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
1628 DPRINTF(AHCI_D_XFER, "ahci_ata_put_xfer slot %d\n", ccb->ccb_slot);
1634 ahci_ata_cmd(struct ata_xfer *xa)
1636 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
1637 struct ahci_cmd_hdr *cmd_slot;
1639 KKASSERT(xa->state == ATA_S_SETUP);
1641 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR)
1644 ccb->ccb_done = ahci_ata_cmd_done;
1646 cmd_slot = ccb->ccb_cmd_hdr;
1647 cmd_slot->flags = htole16(5); /* FIS length (in DWORDs) */
1649 if (xa->flags & ATA_F_WRITE)
1650 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
1652 if (xa->flags & ATA_F_PACKET)
1653 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_A);
1655 if (ahci_load_prdt(ccb) != 0)
1658 xa->state = ATA_S_PENDING;
1660 if (xa->flags & ATA_F_POLL) {
1661 ahci_poll(ccb, xa->timeout, ahci_ata_cmd_timeout);
1662 return (ATA_COMPLETE);
1666 xa->flags |= ATA_F_TIMEOUT_RUNNING;
1667 callout_reset(&ccb->ccb_timeout, xa->timeout,
1668 ahci_ata_cmd_timeout_unserialized, ccb);
1671 return (ATA_QUEUED);
1675 xa->state = ATA_S_ERROR;
1682 ahci_ata_cmd_done(struct ahci_ccb *ccb)
1684 struct ata_xfer *xa = &ccb->ccb_xa;
1686 if (xa->flags & ATA_F_TIMEOUT_RUNNING) {
1687 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
1688 callout_stop(&ccb->ccb_timeout);
1691 if (xa->state == ATA_S_ONCHIP || xa->state == ATA_S_ERROR)
1692 ahci_issue_pending_commands(ccb->ccb_port,
1693 xa->flags & ATA_F_NCQ);
1695 ahci_unload_prdt(ccb);
1697 if (xa->state == ATA_S_ONCHIP)
1698 xa->state = ATA_S_COMPLETE;
1700 else if (xa->state != ATA_S_ERROR && xa->state != ATA_S_TIMEOUT)
1701 kprintf("%s: invalid ata_xfer state %02x in ahci_ata_cmd_done, "
1703 PORTNAME(ccb->ccb_port), xa->state, ccb->ccb_slot);
1705 if (xa->state != ATA_S_TIMEOUT)
1710 ahci_ata_cmd_timeout_unserialized(void *arg)
1712 struct ahci_ccb *ccb = arg;
1713 struct ahci_port *ap = ccb->ccb_port;
1715 lwkt_serialize_enter(&ap->ap_sc->sc_serializer);
1716 ahci_ata_cmd_timeout(arg);
1717 lwkt_serialize_exit(&ap->ap_sc->sc_serializer);
1721 ahci_ata_cmd_timeout(void *arg)
1723 struct ahci_ccb *ccb = arg;
1724 struct ata_xfer *xa = &ccb->ccb_xa;
1725 struct ahci_port *ap = ccb->ccb_port;
1726 volatile u_int32_t *active;
1727 int ccb_was_started, ncq_cmd;
1730 kprintf("CMD TIMEOUT port-cmd-reg 0x%b\n"
1731 "\tactive=%08x sactive=%08x\n"
1732 "\t sact=%08x ci=%08x\n",
1733 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
1734 ap->ap_active, ap->ap_sactive,
1735 ahci_pread(ap, AHCI_PREG_SACT),
1736 ahci_pread(ap, AHCI_PREG_CI));
1738 KKASSERT(xa->flags & ATA_F_TIMEOUT_RUNNING);
1739 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
1740 ncq_cmd = (xa->flags & ATA_F_NCQ);
1741 active = ncq_cmd ? &ap->ap_sactive : &ap->ap_active;
1743 if (ccb->ccb_xa.state == ATA_S_PENDING) {
1744 DPRINTF(AHCI_D_TIMEOUT, "%s: command for slot %d timed out "
1745 "before it got on chip\n", PORTNAME(ap), ccb->ccb_slot);
1746 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
1747 ccb_was_started = 0;
1748 } else if (ccb->ccb_xa.state == ATA_S_ONCHIP && ahci_port_intr(ap,
1749 1 << ccb->ccb_slot)) {
1750 DPRINTF(AHCI_D_TIMEOUT, "%s: final poll of port completed "
1751 "command in slot %d\n", PORTNAME(ap), ccb->ccb_slot);
1753 } else if (ccb->ccb_xa.state != ATA_S_ONCHIP) {
1754 DPRINTF(AHCI_D_TIMEOUT, "%s: command slot %d already "
1755 "handled%s\n", PORTNAME(ap), ccb->ccb_slot,
1756 (*active & (1 << ccb->ccb_slot)) ?
1757 " but slot is still active?" : ".");
1759 } else if ((ahci_pread(ap, ncq_cmd ? AHCI_PREG_SACT : AHCI_PREG_CI) &
1760 (1 << ccb->ccb_slot)) == 0 &&
1761 (*active & (1 << ccb->ccb_slot))) {
1762 DPRINTF(AHCI_D_TIMEOUT, "%s: command slot %d completed but "
1763 "IRQ handler didn't detect it. Why?\n", PORTNAME(ap),
1765 *active &= ~(1 << ccb->ccb_slot);
1770 ccb_was_started = 1;
1773 /* Complete the slot with a timeout error. */
1774 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1775 *active &= ~(1 << ccb->ccb_slot);
1776 DPRINTF(AHCI_D_TIMEOUT, "%s: run completion (1)\n", PORTNAME(ap));
1777 ccb->ccb_done(ccb); /* This won't issue pending commands or run the
1778 atascsi completion. */
1780 /* Reset port to abort running command. */
1781 if (ccb_was_started) {
1782 DPRINTF(AHCI_D_TIMEOUT, "%s: resetting port to abort%s command "
1783 "in slot %d, active %08x\n", PORTNAME(ap), ncq_cmd ? " NCQ"
1784 : "", ccb->ccb_slot, *active);
1785 if (ahci_port_softreset(ap) != 0 && ahci_port_portreset(ap)
1787 kprintf("%s: failed to reset port during timeout "
1788 "handling, disabling it\n",
1790 ap->ap_state = AP_S_FATAL_ERROR;
1793 /* Restart any other commands that were aborted by the reset. */
1795 DPRINTF(AHCI_D_TIMEOUT, "%s: re-enabling%s slots "
1796 "%08x\n", PORTNAME(ap), ncq_cmd ? " NCQ" : "",
1799 ahci_pwrite(ap, AHCI_PREG_SACT, *active);
1800 ahci_pwrite(ap, AHCI_PREG_CI, *active);
1804 /* Issue any pending commands now. */
1805 DPRINTF(AHCI_D_TIMEOUT, "%s: issue pending\n", PORTNAME(ap));
1806 if (ccb_was_started)
1807 ahci_issue_pending_commands(ap, ncq_cmd);
1808 else if (ap->ap_active == 0)
1809 ahci_issue_pending_ncq_commands(ap);
1811 /* Complete the timed out ata_xfer I/O (may generate new I/O). */
1812 DPRINTF(AHCI_D_TIMEOUT, "%s: run completion (2)\n", PORTNAME(ap));
1815 DPRINTF(AHCI_D_TIMEOUT, "%s: splx\n", PORTNAME(ap));
1821 ahci_empty_done(struct ahci_ccb *ccb)
1823 ccb->ccb_xa.state = ATA_S_COMPLETE;