sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2014, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  71  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  72  *   the hardware interrupt in order to avoid handler execution races from
  73  *   scheduled interrupt threads.
  74  */
  75
  76 #include "opt_ifpoll.h"
  77
  78 #include <sys/param.h>
  79 #include <sys/bus.h>
  80 #include <sys/endian.h>
  81 #include <sys/interrupt.h>
  82 #include <sys/kernel.h>
  83 #include <sys/ktr.h>
  84 #include <sys/malloc.h>
  85 #include <sys/mbuf.h>
  86 #include <sys/proc.h>
  87 #include <sys/rman.h>
  88 #include <sys/serialize.h>
  89 #include <sys/socket.h>
  90 #include <sys/sockio.h>
  91 #include <sys/sysctl.h>
  92 #include <sys/systm.h>
  93
  94 #include <net/bpf.h>
  95 #include <net/ethernet.h>
  96 #include <net/if.h>
  97 #include <net/if_arp.h>
  98 #include <net/if_dl.h>
  99 #include <net/if_media.h>
 100 #include <net/if_poll.h>
 101 #include <net/ifq_var.h>
 102 #include <net/vlan/if_vlan_var.h>
 103 #include <net/vlan/if_vlan_ether.h>
 104
 105 #include <netinet/ip.h>
 106 #include <netinet/tcp.h>
 107 #include <netinet/udp.h>
 108
 109 #include <bus/pci/pcivar.h>
 110 #include <bus/pci/pcireg.h>
 111
 112 #include <dev/netif/ig_hal/e1000_api.h>
 113 #include <dev/netif/ig_hal/e1000_82571.h>
 114 #include <dev/netif/ig_hal/e1000_dragonfly.h>
 115 #include <dev/netif/em/if_em.h>
 116
 117 #define DEBUG_HW 0
 118
 119 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 120 #define EM_VER  " 7.4.2"
 121
 122 #define _EM_DEVICE(id, ret)     \
 123         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 124 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 125 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 126 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 127
 128 static const struct em_vendor_info em_vendor_info_array[] = {
 129         EM_DEVICE(82540EM),
 130         EM_DEVICE(82540EM_LOM),
 131         EM_DEVICE(82540EP),
 132         EM_DEVICE(82540EP_LOM),
 133         EM_DEVICE(82540EP_LP),
 134
 135         EM_DEVICE(82541EI),
 136         EM_DEVICE(82541ER),
 137         EM_DEVICE(82541ER_LOM),
 138         EM_DEVICE(82541EI_MOBILE),
 139         EM_DEVICE(82541GI),
 140         EM_DEVICE(82541GI_LF),
 141         EM_DEVICE(82541GI_MOBILE),
 142
 143         EM_DEVICE(82542),
 144
 145         EM_DEVICE(82543GC_FIBER),
 146         EM_DEVICE(82543GC_COPPER),
 147
 148         EM_DEVICE(82544EI_COPPER),
 149         EM_DEVICE(82544EI_FIBER),
 150         EM_DEVICE(82544GC_COPPER),
 151         EM_DEVICE(82544GC_LOM),
 152
 153         EM_DEVICE(82545EM_COPPER),
 154         EM_DEVICE(82545EM_FIBER),
 155         EM_DEVICE(82545GM_COPPER),
 156         EM_DEVICE(82545GM_FIBER),
 157         EM_DEVICE(82545GM_SERDES),
 158
 159         EM_DEVICE(82546EB_COPPER),
 160         EM_DEVICE(82546EB_FIBER),
 161         EM_DEVICE(82546EB_QUAD_COPPER),
 162         EM_DEVICE(82546GB_COPPER),
 163         EM_DEVICE(82546GB_FIBER),
 164         EM_DEVICE(82546GB_SERDES),
 165         EM_DEVICE(82546GB_PCIE),
 166         EM_DEVICE(82546GB_QUAD_COPPER),
 167         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 168
 169         EM_DEVICE(82547EI),
 170         EM_DEVICE(82547EI_MOBILE),
 171         EM_DEVICE(82547GI),
 172
 173         EM_EMX_DEVICE(82571EB_COPPER),
 174         EM_EMX_DEVICE(82571EB_FIBER),
 175         EM_EMX_DEVICE(82571EB_SERDES),
 176         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 177         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 178         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 179         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 180         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 181         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 182         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 183
 184         EM_EMX_DEVICE(82572EI_COPPER),
 185         EM_EMX_DEVICE(82572EI_FIBER),
 186         EM_EMX_DEVICE(82572EI_SERDES),
 187         EM_EMX_DEVICE(82572EI),
 188
 189         EM_EMX_DEVICE(82573E),
 190         EM_EMX_DEVICE(82573E_IAMT),
 191         EM_EMX_DEVICE(82573L),
 192
 193         EM_DEVICE(82583V),
 194
 195         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 196         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 197         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 198         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 199
 200         EM_DEVICE(ICH8_IGP_M_AMT),
 201         EM_DEVICE(ICH8_IGP_AMT),
 202         EM_DEVICE(ICH8_IGP_C),
 203         EM_DEVICE(ICH8_IFE),
 204         EM_DEVICE(ICH8_IFE_GT),
 205         EM_DEVICE(ICH8_IFE_G),
 206         EM_DEVICE(ICH8_IGP_M),
 207         EM_DEVICE(ICH8_82567V_3),
 208
 209         EM_DEVICE(ICH9_IGP_M_AMT),
 210         EM_DEVICE(ICH9_IGP_AMT),
 211         EM_DEVICE(ICH9_IGP_C),
 212         EM_DEVICE(ICH9_IGP_M),
 213         EM_DEVICE(ICH9_IGP_M_V),
 214         EM_DEVICE(ICH9_IFE),
 215         EM_DEVICE(ICH9_IFE_GT),
 216         EM_DEVICE(ICH9_IFE_G),
 217         EM_DEVICE(ICH9_BM),
 218
 219         EM_EMX_DEVICE(82574L),
 220         EM_EMX_DEVICE(82574LA),
 221
 222         EM_DEVICE(ICH10_R_BM_LM),
 223         EM_DEVICE(ICH10_R_BM_LF),
 224         EM_DEVICE(ICH10_R_BM_V),
 225         EM_DEVICE(ICH10_D_BM_LM),
 226         EM_DEVICE(ICH10_D_BM_LF),
 227         EM_DEVICE(ICH10_D_BM_V),
 228
 229         EM_DEVICE(PCH_M_HV_LM),
 230         EM_DEVICE(PCH_M_HV_LC),
 231         EM_DEVICE(PCH_D_HV_DM),
 232         EM_DEVICE(PCH_D_HV_DC),
 233
 234         EM_DEVICE(PCH2_LV_LM),
 235         EM_DEVICE(PCH2_LV_V),
 236
 237         EM_EMX_DEVICE(PCH_LPT_I217_LM),
 238         EM_EMX_DEVICE(PCH_LPT_I217_V),
 239         EM_EMX_DEVICE(PCH_LPTLP_I218_LM),
 240         EM_EMX_DEVICE(PCH_LPTLP_I218_V),
 241         EM_EMX_DEVICE(PCH_I218_LM2),
 242         EM_EMX_DEVICE(PCH_I218_V2),
 243         EM_EMX_DEVICE(PCH_I218_LM3),
 244         EM_EMX_DEVICE(PCH_I218_V3),
 245         EM_EMX_DEVICE(PCH_SPT_I219_LM),
 246         EM_EMX_DEVICE(PCH_SPT_I219_V),
 247         EM_EMX_DEVICE(PCH_SPT_I219_LM2),
 248         EM_EMX_DEVICE(PCH_SPT_I219_V2),
 249         EM_EMX_DEVICE(PCH_SPT_I219_LM3),
 250         EM_EMX_DEVICE(PCH_SPT_I219_LM4),
 251         EM_EMX_DEVICE(PCH_SPT_I219_V4),
 252         EM_EMX_DEVICE(PCH_SPT_I219_LM5),
 253         EM_EMX_DEVICE(PCH_SPT_I219_V5),
 254
 255         /* required last entry */
 256         EM_DEVICE_NULL
 257 };
 258
 259 static int      em_probe(device_t);
 260 static int      em_attach(device_t);
 261 static int      em_detach(device_t);
 262 static int      em_shutdown(device_t);
 263 static int      em_suspend(device_t);
 264 static int      em_resume(device_t);
 265
 266 static void     em_init(void *);
 267 static void     em_stop(struct adapter *);
 268 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 269 static void     em_start(struct ifnet *, struct ifaltq_subque *);
 270 #ifdef IFPOLL_ENABLE
 271 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 272 static void     em_npoll_compat(struct ifnet *, void *, int);
 273 #endif
 274 static void     em_watchdog(struct ifnet *);
 275 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 276 static int      em_media_change(struct ifnet *);
 277 static void     em_timer(void *);
 278
 279 static void     em_intr(void *);
 280 static void     em_intr_mask(void *);
 281 static void     em_intr_body(struct adapter *, boolean_t);
 282 static void     em_rxeof(struct adapter *, int);
 283 static void     em_txeof(struct adapter *);
 284 static void     em_tx_collect(struct adapter *);
 285 static void     em_tx_purge(struct adapter *);
 286 static void     em_enable_intr(struct adapter *);
 287 static void     em_disable_intr(struct adapter *);
 288
 289 static int      em_dma_malloc(struct adapter *, bus_size_t,
 290                     struct em_dma_alloc *);
 291 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 292 static void     em_init_tx_ring(struct adapter *);
 293 static int      em_init_rx_ring(struct adapter *);
 294 static int      em_create_tx_ring(struct adapter *);
 295 static int      em_create_rx_ring(struct adapter *);
 296 static void     em_destroy_tx_ring(struct adapter *, int);
 297 static void     em_destroy_rx_ring(struct adapter *, int);
 298 static int      em_newbuf(struct adapter *, int, int);
 299 static int      em_encap(struct adapter *, struct mbuf **, int *, int *);
 300 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 301                     struct mbuf *);
 302 static int      em_txcsum(struct adapter *, struct mbuf *,
 303                     uint32_t *, uint32_t *);
 304 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 305 static int      em_tso_setup(struct adapter *, struct mbuf *,
 306                     uint32_t *, uint32_t *);
 307
 308 static int      em_get_hw_info(struct adapter *);
 309 static int      em_is_valid_eaddr(const uint8_t *);
 310 static int      em_alloc_pci_res(struct adapter *);
 311 static void     em_free_pci_res(struct adapter *);
 312 static int      em_reset(struct adapter *);
 313 static void     em_setup_ifp(struct adapter *);
 314 static void     em_init_tx_unit(struct adapter *);
 315 static void     em_init_rx_unit(struct adapter *);
 316 static void     em_update_stats(struct adapter *);
 317 static void     em_set_promisc(struct adapter *);
 318 static void     em_disable_promisc(struct adapter *);
 319 static void     em_set_multi(struct adapter *);
 320 static void     em_update_link_status(struct adapter *);
 321 static void     em_smartspeed(struct adapter *);
 322 static void     em_set_itr(struct adapter *, uint32_t);
 323 static void     em_disable_aspm(struct adapter *);
 324
 325 /* Hardware workarounds */
 326 static int      em_82547_fifo_workaround(struct adapter *, int);
 327 static void     em_82547_update_fifo_head(struct adapter *, int);
 328 static int      em_82547_tx_fifo_reset(struct adapter *);
 329 static void     em_82547_move_tail(void *);
 330 static void     em_82547_move_tail_serialized(struct adapter *);
 331 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 332
 333 static void     em_print_debug_info(struct adapter *);
 334 static void     em_print_nvm_info(struct adapter *);
 335 static void     em_print_hw_stats(struct adapter *);
 336
 337 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 338 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 339 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 340 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 341 static void     em_add_sysctl(struct adapter *adapter);
 342
 343 /* Management and WOL Support */
 344 static void     em_get_mgmt(struct adapter *);
 345 static void     em_rel_mgmt(struct adapter *);
 346 static void     em_get_hw_control(struct adapter *);
 347 static void     em_rel_hw_control(struct adapter *);
 348 static void     em_enable_wol(device_t);
 349
 350 static device_method_t em_methods[] = {
 351         /* Device interface */
 352         DEVMETHOD(device_probe,         em_probe),
 353         DEVMETHOD(device_attach,        em_attach),
 354         DEVMETHOD(device_detach,        em_detach),
 355         DEVMETHOD(device_shutdown,      em_shutdown),
 356         DEVMETHOD(device_suspend,       em_suspend),
 357         DEVMETHOD(device_resume,        em_resume),
 358         DEVMETHOD_END
 359 };
 360
 361 static driver_t em_driver = {
 362         "em",
 363         em_methods,
 364         sizeof(struct adapter),
 365 };
 366
 367 static devclass_t em_devclass;
 368
 369 DECLARE_DUMMY_MODULE(if_em);
 370 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 371 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 372
 373 /*
 374  * Tunables
 375  */
 376 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 377 static int      em_rxd = EM_DEFAULT_RXD;
 378 static int      em_txd = EM_DEFAULT_TXD;
 379 static int      em_smart_pwr_down = 0;
 380
 381 /* Controls whether promiscuous also shows bad packets */
 382 static int      em_debug_sbp = FALSE;
 383
 384 static int      em_82573_workaround = 1;
 385 static int      em_msi_enable = 1;
 386
 387 static char     em_flowctrl[IFM_ETH_FC_STRLEN] = IFM_ETH_FC_NONE;
 388
 389 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 390 TUNABLE_INT("hw.em.rxd", &em_rxd);
 391 TUNABLE_INT("hw.em.txd", &em_txd);
 392 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 393 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 394 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 395 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 396 TUNABLE_STR("hw.em.flow_ctrl", em_flowctrl, sizeof(em_flowctrl));
 397
 398 /* Global used in WOL setup with multiport cards */
 399 static int      em_global_quad_port_a = 0;
 400
 401 /* Set this to one to display debug statistics */
 402 static int      em_display_debug_stats = 0;
 403
 404 #if !defined(KTR_IF_EM)
 405 #define KTR_IF_EM       KTR_ALL
 406 #endif
 407 KTR_INFO_MASTER(if_em);
 408 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 409 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 410 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 411 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 412 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 413 #define logif(name)     KTR_LOG(if_em_ ## name)
 414
 415 static int
 416 em_probe(device_t dev)
 417 {
 418         const struct em_vendor_info *ent;
 419         uint16_t vid, did;
 420
 421         vid = pci_get_vendor(dev);
 422         did = pci_get_device(dev);
 423
 424         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 425                 if (vid == ent->vendor_id && did == ent->device_id) {
 426                         device_set_desc(dev, ent->desc);
 427                         device_set_async_attach(dev, TRUE);
 428                         return (ent->ret);
 429                 }
 430         }
 431         return (ENXIO);
 432 }
 433
 434 static int
 435 em_attach(device_t dev)
 436 {
 437         struct adapter *adapter = device_get_softc(dev);
 438         struct ifnet *ifp = &adapter->arpcom.ac_if;
 439         int tsize, rsize;
 440         int error = 0;
 441         uint16_t eeprom_data, device_id, apme_mask;
 442         driver_intr_t *intr_func;
 443         char flowctrl[IFM_ETH_FC_STRLEN];
 444
 445         adapter->dev = adapter->osdep.dev = dev;
 446
 447         callout_init_mp(&adapter->timer);
 448         callout_init_mp(&adapter->tx_fifo_timer);
 449
 450         ifmedia_init(&adapter->media, IFM_IMASK | IFM_ETH_FCMASK,
 451             em_media_change, em_media_status);
 452
 453         /* Determine hardware and mac info */
 454         error = em_get_hw_info(adapter);
 455         if (error) {
 456                 device_printf(dev, "Identify hardware failed\n");
 457                 goto fail;
 458         }
 459
 460         /* Setup PCI resources */
 461         error = em_alloc_pci_res(adapter);
 462         if (error) {
 463                 device_printf(dev, "Allocation of PCI resources failed\n");
 464                 goto fail;
 465         }
 466
 467         /*
 468          * For ICH8 and family we need to map the flash memory,
 469          * and this must happen after the MAC is identified.
 470          *
 471          * (SPT does not map the flash with a separate BAR)
 472          */
 473         if (adapter->hw.mac.type == e1000_ich8lan ||
 474             adapter->hw.mac.type == e1000_ich9lan ||
 475             adapter->hw.mac.type == e1000_ich10lan ||
 476             adapter->hw.mac.type == e1000_pchlan ||
 477             adapter->hw.mac.type == e1000_pch2lan ||
 478             adapter->hw.mac.type == e1000_pch_lpt) {
 479                 adapter->flash_rid = EM_BAR_FLASH;
 480
 481                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 482                                         &adapter->flash_rid, RF_ACTIVE);
 483                 if (adapter->flash == NULL) {
 484                         device_printf(dev, "Mapping of Flash failed\n");
 485                         error = ENXIO;
 486                         goto fail;
 487                 }
 488                 adapter->osdep.flash_bus_space_tag =
 489                     rman_get_bustag(adapter->flash);
 490                 adapter->osdep.flash_bus_space_handle =
 491                     rman_get_bushandle(adapter->flash);
 492
 493                 /*
 494                  * This is used in the shared code
 495                  * XXX this goof is actually not used.
 496                  */
 497                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 498         }
 499
 500         switch (adapter->hw.mac.type) {
 501         case e1000_82571:
 502         case e1000_82572:
 503         case e1000_pch_lpt:
 504         case e1000_pch_spt:
 505                 /*
 506                  * Pullup extra 4bytes into the first data segment for
 507                  * TSO, see:
 508                  * 82571/82572 specification update errata #7
 509                  *
 510                  * Same applies to I217 (and maybe I218 and I219).
 511                  *
 512                  * NOTE:
 513                  * 4bytes instead of 2bytes, which are mentioned in the
 514                  * errata, are pulled; mainly to keep rest of the data
 515                  * properly aligned.
 516                  */
 517                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 518                 /* FALL THROUGH */
 519
 520         default:
 521                 if (pci_is_pcie(dev))
 522                         adapter->flags |= EM_FLAG_TSO;
 523                 break;
 524         }
 525
 526         /* Do Shared Code initialization */
 527         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 528                 device_printf(dev, "Setup of Shared code failed\n");
 529                 error = ENXIO;
 530                 goto fail;
 531         }
 532
 533         e1000_get_bus_info(&adapter->hw);
 534
 535         /*
 536          * Validate number of transmit and receive descriptors.  It
 537          * must not exceed hardware maximum, and must be multiple
 538          * of E1000_DBA_ALIGN.
 539          */
 540         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 541             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 542             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 543             em_txd < EM_MIN_TXD) {
 544                 if (adapter->hw.mac.type < e1000_82544)
 545                         adapter->num_tx_desc = EM_MAX_TXD_82543;
 546                 else
 547                         adapter->num_tx_desc = EM_DEFAULT_TXD;
 548                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 549                     adapter->num_tx_desc, em_txd);
 550         } else {
 551                 adapter->num_tx_desc = em_txd;
 552         }
 553         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 554             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 555             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 556             em_rxd < EM_MIN_RXD) {
 557                 if (adapter->hw.mac.type < e1000_82544)
 558                         adapter->num_rx_desc = EM_MAX_RXD_82543;
 559                 else
 560                         adapter->num_rx_desc = EM_DEFAULT_RXD;
 561                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 562                     adapter->num_rx_desc, em_rxd);
 563         } else {
 564                 adapter->num_rx_desc = em_rxd;
 565         }
 566
 567         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 568         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 569         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 570         adapter->rx_buffer_len = MCLBYTES;
 571
 572         /*
 573          * Interrupt throttle rate
 574          */
 575         if (em_int_throttle_ceil == 0) {
 576                 adapter->int_throttle_ceil = 0;
 577         } else {
 578                 int throttle = em_int_throttle_ceil;
 579
 580                 if (throttle < 0)
 581                         throttle = EM_DEFAULT_ITR;
 582
 583                 /* Recalculate the tunable value to get the exact frequency. */
 584                 throttle = 1000000000 / 256 / throttle;
 585
 586                 /* Upper 16bits of ITR is reserved and should be zero */
 587                 if (throttle & 0xffff0000)
 588                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 589
 590                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 591         }
 592
 593         e1000_init_script_state_82541(&adapter->hw, TRUE);
 594         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 595
 596         /* Copper options */
 597         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 598                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 599                 adapter->hw.phy.disable_polarity_correction = FALSE;
 600                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 601         }
 602
 603         /* Set the frame limits assuming standard ethernet sized frames. */
 604         adapter->hw.mac.max_frame_size =
 605             ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 606         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 607
 608         /* This controls when hardware reports transmit completion status. */
 609         adapter->hw.mac.report_tx_early = 1;
 610
 611         /*
 612          * Create top level busdma tag
 613          */
 614         error = bus_dma_tag_create(NULL, 1, 0,
 615                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 616                         NULL, NULL,
 617                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 618                         0, &adapter->parent_dtag);
 619         if (error) {
 620                 device_printf(dev, "could not create top level DMA tag\n");
 621                 goto fail;
 622         }
 623
 624         /*
 625          * Allocate Transmit Descriptor ring
 626          */
 627         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 628                          EM_DBA_ALIGN);
 629         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 630         if (error) {
 631                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 632                 goto fail;
 633         }
 634         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 635
 636         /*
 637          * Allocate Receive Descriptor ring
 638          */
 639         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 640                          EM_DBA_ALIGN);
 641         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 642         if (error) {
 643                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 644                 goto fail;
 645         }
 646         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 647
 648         /* Allocate multicast array memory. */
 649         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 650             M_DEVBUF, M_WAITOK);
 651
 652         /* Indicate SOL/IDER usage */
 653         if (e1000_check_reset_block(&adapter->hw)) {
 654                 device_printf(dev,
 655                     "PHY reset is blocked due to SOL/IDER session.\n");
 656         }
 657
 658         /* Disable EEE */
 659         adapter->hw.dev_spec.ich8lan.eee_disable = 1;
 660
 661         /*
 662          * Start from a known state, this is important in reading the
 663          * nvm and mac from that.
 664          */
 665         e1000_reset_hw(&adapter->hw);
 666
 667         /* Make sure we have a good EEPROM before we read from it */
 668         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 669                 /*
 670                  * Some PCI-E parts fail the first check due to
 671                  * the link being in sleep state, call it again,
 672                  * if it fails a second time its a real issue.
 673                  */
 674                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 675                         device_printf(dev,
 676                             "The EEPROM Checksum Is Not Valid\n");
 677                         error = EIO;
 678                         goto fail;
 679                 }
 680         }
 681
 682         /* Copy the permanent MAC address out of the EEPROM */
 683         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 684                 device_printf(dev, "EEPROM read error while reading MAC"
 685                     " address\n");
 686                 error = EIO;
 687                 goto fail;
 688         }
 689         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 690                 device_printf(dev, "Invalid MAC address\n");
 691                 error = EIO;
 692                 goto fail;
 693         }
 694
 695         /* Disable ULP support */
 696         e1000_disable_ulp_lpt_lp(&adapter->hw, TRUE);
 697
 698         /* Allocate transmit descriptors and buffers */
 699         error = em_create_tx_ring(adapter);
 700         if (error) {
 701                 device_printf(dev, "Could not setup transmit structures\n");
 702                 goto fail;
 703         }
 704
 705         /* Allocate receive descriptors and buffers */
 706         error = em_create_rx_ring(adapter);
 707         if (error) {
 708                 device_printf(dev, "Could not setup receive structures\n");
 709                 goto fail;
 710         }
 711
 712         /* Manually turn off all interrupts */
 713         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 714
 715         /* Determine if we have to control management hardware */
 716         if (e1000_enable_mng_pass_thru(&adapter->hw))
 717                 adapter->flags |= EM_FLAG_HAS_MGMT;
 718
 719         /*
 720          * Setup Wake-on-Lan
 721          */
 722         apme_mask = EM_EEPROM_APME;
 723         eeprom_data = 0;
 724         switch (adapter->hw.mac.type) {
 725         case e1000_82542:
 726         case e1000_82543:
 727                 break;
 728
 729         case e1000_82573:
 730         case e1000_82583:
 731                 adapter->flags |= EM_FLAG_HAS_AMT;
 732                 /* FALL THROUGH */
 733
 734         case e1000_82546:
 735         case e1000_82546_rev_3:
 736         case e1000_82571:
 737         case e1000_82572:
 738         case e1000_80003es2lan:
 739                 if (adapter->hw.bus.func == 1) {
 740                         e1000_read_nvm(&adapter->hw,
 741                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 742                 } else {
 743                         e1000_read_nvm(&adapter->hw,
 744                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 745                 }
 746                 break;
 747
 748         case e1000_ich8lan:
 749         case e1000_ich9lan:
 750         case e1000_ich10lan:
 751         case e1000_pchlan:
 752         case e1000_pch2lan:
 753                 apme_mask = E1000_WUC_APME;
 754                 adapter->flags |= EM_FLAG_HAS_AMT;
 755                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 756                 break;
 757
 758         default:
 759                 e1000_read_nvm(&adapter->hw,
 760                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 761                 break;
 762         }
 763         if (eeprom_data & apme_mask)
 764                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 765
 766         /*
 767          * We have the eeprom settings, now apply the special cases
 768          * where the eeprom may be wrong or the board won't support
 769          * wake on lan on a particular port
 770          */
 771         device_id = pci_get_device(dev);
 772         switch (device_id) {
 773         case E1000_DEV_ID_82546GB_PCIE:
 774                 adapter->wol = 0;
 775                 break;
 776
 777         case E1000_DEV_ID_82546EB_FIBER:
 778         case E1000_DEV_ID_82546GB_FIBER:
 779         case E1000_DEV_ID_82571EB_FIBER:
 780                 /*
 781                  * Wake events only supported on port A for dual fiber
 782                  * regardless of eeprom setting
 783                  */
 784                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 785                     E1000_STATUS_FUNC_1)
 786                         adapter->wol = 0;
 787                 break;
 788
 789         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 790         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 791         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 792         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 793                 /* if quad port adapter, disable WoL on all but port A */
 794                 if (em_global_quad_port_a != 0)
 795                         adapter->wol = 0;
 796                 /* Reset for multiple quad port adapters */
 797                 if (++em_global_quad_port_a == 4)
 798                         em_global_quad_port_a = 0;
 799                 break;
 800         }
 801
 802         /* XXX disable wol */
 803         adapter->wol = 0;
 804
 805         /* Setup flow control. */
 806         device_getenv_string(dev, "flow_ctrl", flowctrl, sizeof(flowctrl),
 807             em_flowctrl);
 808         adapter->ifm_flowctrl = ifmedia_str2ethfc(flowctrl);
 809         if (adapter->hw.mac.type == e1000_pchlan) {
 810                 /* Only PAUSE reception is supported on PCH */
 811                 adapter->ifm_flowctrl &= ~IFM_ETH_TXPAUSE;
 812         }
 813
 814         /* Setup OS specific network interface */
 815         em_setup_ifp(adapter);
 816
 817         /* Add sysctl tree, must after em_setup_ifp() */
 818         em_add_sysctl(adapter);
 819
 820 #ifdef IFPOLL_ENABLE
 821         /* Polling setup */
 822         ifpoll_compat_setup(&adapter->npoll,
 823             device_get_sysctl_ctx(dev), device_get_sysctl_tree(dev),
 824             device_get_unit(dev), ifp->if_serializer);
 825 #endif
 826
 827         /* Reset the hardware */
 828         error = em_reset(adapter);
 829         if (error) {
 830                 /*
 831                  * Some 82573 parts fail the first reset, call it again,
 832                  * if it fails a second time its a real issue.
 833                  */
 834                 error = em_reset(adapter);
 835                 if (error) {
 836                         device_printf(dev, "Unable to reset the hardware\n");
 837                         ether_ifdetach(ifp);
 838                         goto fail;
 839                 }
 840         }
 841
 842         /* Initialize statistics */
 843         em_update_stats(adapter);
 844
 845         adapter->hw.mac.get_link_status = 1;
 846         em_update_link_status(adapter);
 847
 848         /* Do we need workaround for 82544 PCI-X adapter? */
 849         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 850             adapter->hw.mac.type == e1000_82544)
 851                 adapter->pcix_82544 = TRUE;
 852         else
 853                 adapter->pcix_82544 = FALSE;
 854
 855         if (adapter->pcix_82544) {
 856                 /*
 857                  * 82544 on PCI-X may split one TX segment
 858                  * into two TX descs, so we double its number
 859                  * of spare TX desc here.
 860                  */
 861                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 862         } else {
 863                 adapter->spare_tx_desc = EM_TX_SPARE;
 864         }
 865         if (adapter->flags & EM_FLAG_TSO)
 866                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 867         adapter->tx_wreg_nsegs = EM_DEFAULT_TXWREG;
 868
 869         /*
 870          * Keep following relationship between spare_tx_desc, oact_tx_desc
 871          * and tx_int_nsegs:
 872          * (spare_tx_desc + EM_TX_RESERVED) <=
 873          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 874          */
 875         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 876         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 877                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 878         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 879                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 880
 881         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 882         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 883                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 884
 885         /* Non-AMT based hardware can now take control from firmware */
 886         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 887             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 888                 em_get_hw_control(adapter);
 889
 890         ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
 891
 892         /*
 893          * Missing Interrupt Following ICR read:
 894          *
 895          * 82571/82572 specification update errata #76
 896          * 82573 specification update errata #31
 897          * 82574 specification update errata #12
 898          * 82583 specification update errata #4
 899          */
 900         intr_func = em_intr;
 901         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 902             (adapter->hw.mac.type == e1000_82571 ||
 903              adapter->hw.mac.type == e1000_82572 ||
 904              adapter->hw.mac.type == e1000_82573 ||
 905              adapter->hw.mac.type == e1000_82574 ||
 906              adapter->hw.mac.type == e1000_82583))
 907                 intr_func = em_intr_mask;
 908
 909         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 910                                intr_func, adapter, &adapter->intr_tag,
 911                                ifp->if_serializer);
 912         if (error) {
 913                 device_printf(dev, "Failed to register interrupt handler");
 914                 ether_ifdetach(ifp);
 915                 goto fail;
 916         }
 917         return (0);
 918 fail:
 919         em_detach(dev);
 920         return (error);
 921 }
 922
 923 static int
 924 em_detach(device_t dev)
 925 {
 926         struct adapter *adapter = device_get_softc(dev);
 927
 928         if (device_is_attached(dev)) {
 929                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 930
 931                 lwkt_serialize_enter(ifp->if_serializer);
 932
 933                 em_stop(adapter);
 934
 935                 e1000_phy_hw_reset(&adapter->hw);
 936
 937                 em_rel_mgmt(adapter);
 938                 em_rel_hw_control(adapter);
 939
 940                 if (adapter->wol) {
 941                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 942                                         E1000_WUC_PME_EN);
 943                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 944                         em_enable_wol(dev);
 945                 }
 946
 947                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 948
 949                 lwkt_serialize_exit(ifp->if_serializer);
 950
 951                 ether_ifdetach(ifp);
 952         } else if (adapter->memory != NULL) {
 953                 em_rel_hw_control(adapter);
 954         }
 955
 956         ifmedia_removeall(&adapter->media);
 957         bus_generic_detach(dev);
 958
 959         em_free_pci_res(adapter);
 960
 961         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 962         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 963
 964         /* Free Transmit Descriptor ring */
 965         if (adapter->tx_desc_base)
 966                 em_dma_free(adapter, &adapter->txdma);
 967
 968         /* Free Receive Descriptor ring */
 969         if (adapter->rx_desc_base)
 970                 em_dma_free(adapter, &adapter->rxdma);
 971
 972         /* Free top level busdma tag */
 973         if (adapter->parent_dtag != NULL)
 974                 bus_dma_tag_destroy(adapter->parent_dtag);
 975
 976         if (adapter->mta != NULL)
 977                 kfree(adapter->mta, M_DEVBUF);
 978
 979         return (0);
 980 }
 981
 982 static int
 983 em_shutdown(device_t dev)
 984 {
 985         return em_suspend(dev);
 986 }
 987
 988 static int
 989 em_suspend(device_t dev)
 990 {
 991         struct adapter *adapter = device_get_softc(dev);
 992         struct ifnet *ifp = &adapter->arpcom.ac_if;
 993
 994         lwkt_serialize_enter(ifp->if_serializer);
 995
 996         em_stop(adapter);
 997
 998         em_rel_mgmt(adapter);
 999         em_rel_hw_control(adapter);
1000
1001         if (adapter->wol) {
1002                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
1003                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
1004                 em_enable_wol(dev);
1005         }
1006
1007         lwkt_serialize_exit(ifp->if_serializer);
1008
1009         return bus_generic_suspend(dev);
1010 }
1011
1012 static int
1013 em_resume(device_t dev)
1014 {
1015         struct adapter *adapter = device_get_softc(dev);
1016         struct ifnet *ifp = &adapter->arpcom.ac_if;
1017
1018         lwkt_serialize_enter(ifp->if_serializer);
1019
1020         if (adapter->hw.mac.type == e1000_pch2lan)
1021                 e1000_resume_workarounds_pchlan(&adapter->hw);
1022
1023         em_init(adapter);
1024         em_get_mgmt(adapter);
1025         if_devstart(ifp);
1026
1027         lwkt_serialize_exit(ifp->if_serializer);
1028
1029         return bus_generic_resume(dev);
1030 }
1031
1032 static void
1033 em_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
1034 {
1035         struct adapter *adapter = ifp->if_softc;
1036         struct mbuf *m_head;
1037         int idx = -1, nsegs = 0;
1038
1039         ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1040         ASSERT_SERIALIZED(ifp->if_serializer);
1041
1042         if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
1043                 return;
1044
1045         if (!adapter->link_active) {
1046                 ifq_purge(&ifp->if_snd);
1047                 return;
1048         }
1049
1050         while (!ifq_is_empty(&ifp->if_snd)) {
1051                 /* Now do we at least have a minimal? */
1052                 if (EM_IS_OACTIVE(adapter)) {
1053                         em_tx_collect(adapter);
1054                         if (EM_IS_OACTIVE(adapter)) {
1055                                 ifq_set_oactive(&ifp->if_snd);
1056                                 adapter->no_tx_desc_avail1++;
1057                                 break;
1058                         }
1059                 }
1060
1061                 logif(pkt_txqueue);
1062                 m_head = ifq_dequeue(&ifp->if_snd);
1063                 if (m_head == NULL)
1064                         break;
1065
1066                 if (em_encap(adapter, &m_head, &nsegs, &idx)) {
1067                         IFNET_STAT_INC(ifp, oerrors, 1);
1068                         em_tx_collect(adapter);
1069                         continue;
1070                 }
1071
1072                 /*
1073                  * TX interrupt are aggressively aggregated, so increasing
1074                  * opackets at TX interrupt time will make the opackets
1075                  * statistics vastly inaccurate; we do the opackets increment
1076                  * now.
1077                  */
1078                 IFNET_STAT_INC(ifp, opackets, 1);
1079
1080                 if (nsegs >= adapter->tx_wreg_nsegs && idx >= 0) {
1081                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1082                         nsegs = 0;
1083                         idx = -1;
1084                 }
1085
1086                 /* Send a copy of the frame to the BPF listener */
1087                 ETHER_BPF_MTAP(ifp, m_head);
1088
1089                 /* Set timeout in case hardware has problems transmitting. */
1090                 ifp->if_timer = EM_TX_TIMEOUT;
1091         }
1092         if (idx >= 0)
1093                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1094 }
1095
1096 static int
1097 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1098 {
1099         struct adapter *adapter = ifp->if_softc;
1100         struct ifreq *ifr = (struct ifreq *)data;
1101         uint16_t eeprom_data = 0;
1102         int max_frame_size, mask, reinit;
1103         int error = 0;
1104
1105         ASSERT_SERIALIZED(ifp->if_serializer);
1106
1107         switch (command) {
1108         case SIOCSIFMTU:
1109                 switch (adapter->hw.mac.type) {
1110                 case e1000_82573:
1111                         /*
1112                          * 82573 only supports jumbo frames
1113                          * if ASPM is disabled.
1114                          */
1115                         e1000_read_nvm(&adapter->hw,
1116                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1117                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1118                                 max_frame_size = ETHER_MAX_LEN;
1119                                 break;
1120                         }
1121                         /* FALL THROUGH */
1122
1123                 /* Limit Jumbo Frame size */
1124                 case e1000_82571:
1125                 case e1000_82572:
1126                 case e1000_ich9lan:
1127                 case e1000_ich10lan:
1128                 case e1000_pch2lan:
1129                 case e1000_pch_lpt:
1130                 case e1000_pch_spt:
1131                 case e1000_82574:
1132                 case e1000_82583:
1133                 case e1000_80003es2lan:
1134                         max_frame_size = 9234;
1135                         break;
1136
1137                 case e1000_pchlan:
1138                         max_frame_size = 4096;
1139                         break;
1140
1141                 /* Adapters that do not support jumbo frames */
1142                 case e1000_82542:
1143                 case e1000_ich8lan:
1144                         max_frame_size = ETHER_MAX_LEN;
1145                         break;
1146
1147                 default:
1148                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1149                         break;
1150                 }
1151                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1152                     ETHER_CRC_LEN) {
1153                         error = EINVAL;
1154                         break;
1155                 }
1156
1157                 ifp->if_mtu = ifr->ifr_mtu;
1158                 adapter->hw.mac.max_frame_size =
1159                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1160
1161                 if (ifp->if_flags & IFF_RUNNING)
1162                         em_init(adapter);
1163                 break;
1164
1165         case SIOCSIFFLAGS:
1166                 if (ifp->if_flags & IFF_UP) {
1167                         if ((ifp->if_flags & IFF_RUNNING)) {
1168                                 if ((ifp->if_flags ^ adapter->if_flags) &
1169                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1170                                         em_disable_promisc(adapter);
1171                                         em_set_promisc(adapter);
1172                                 }
1173                         } else {
1174                                 em_init(adapter);
1175                         }
1176                 } else if (ifp->if_flags & IFF_RUNNING) {
1177                         em_stop(adapter);
1178                 }
1179                 adapter->if_flags = ifp->if_flags;
1180                 break;
1181
1182         case SIOCADDMULTI:
1183         case SIOCDELMULTI:
1184                 if (ifp->if_flags & IFF_RUNNING) {
1185                         em_disable_intr(adapter);
1186                         em_set_multi(adapter);
1187                         if (adapter->hw.mac.type == e1000_82542 &&
1188                             adapter->hw.revision_id == E1000_REVISION_2)
1189                                 em_init_rx_unit(adapter);
1190 #ifdef IFPOLL_ENABLE
1191                         if (!(ifp->if_flags & IFF_NPOLLING))
1192 #endif
1193                                 em_enable_intr(adapter);
1194                 }
1195                 break;
1196
1197         case SIOCSIFMEDIA:
1198                 /* Check SOL/IDER usage */
1199                 if (e1000_check_reset_block(&adapter->hw)) {
1200                         device_printf(adapter->dev, "Media change is"
1201                             " blocked due to SOL/IDER session.\n");
1202                         break;
1203                 }
1204                 /* FALL THROUGH */
1205
1206         case SIOCGIFMEDIA:
1207                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1208                 break;
1209
1210         case SIOCSIFCAP:
1211                 reinit = 0;
1212                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1213                 if (mask & IFCAP_RXCSUM) {
1214                         ifp->if_capenable ^= IFCAP_RXCSUM;
1215                         reinit = 1;
1216                 }
1217                 if (mask & IFCAP_TXCSUM) {
1218                         ifp->if_capenable ^= IFCAP_TXCSUM;
1219                         if (ifp->if_capenable & IFCAP_TXCSUM)
1220                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1221                         else
1222                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1223                 }
1224                 if (mask & IFCAP_TSO) {
1225                         ifp->if_capenable ^= IFCAP_TSO;
1226                         if (ifp->if_capenable & IFCAP_TSO)
1227                                 ifp->if_hwassist |= CSUM_TSO;
1228                         else
1229                                 ifp->if_hwassist &= ~CSUM_TSO;
1230                 }
1231                 if (mask & IFCAP_VLAN_HWTAGGING) {
1232                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1233                         reinit = 1;
1234                 }
1235                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1236                         em_init(adapter);
1237                 break;
1238
1239         default:
1240                 error = ether_ioctl(ifp, command, data);
1241                 break;
1242         }
1243         return (error);
1244 }
1245
1246 static void
1247 em_watchdog(struct ifnet *ifp)
1248 {
1249         struct adapter *adapter = ifp->if_softc;
1250
1251         ASSERT_SERIALIZED(ifp->if_serializer);
1252
1253         /*
1254          * The timer is set to 5 every time start queues a packet.
1255          * Then txeof keeps resetting it as long as it cleans at
1256          * least one descriptor.
1257          * Finally, anytime all descriptors are clean the timer is
1258          * set to 0.
1259          */
1260
1261         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1262             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1263                 /*
1264                  * If we reach here, all TX jobs are completed and
1265                  * the TX engine should have been idled for some time.
1266                  * We don't need to call if_devstart() here.
1267                  */
1268                 ifq_clr_oactive(&ifp->if_snd);
1269                 ifp->if_timer = 0;
1270                 return;
1271         }
1272
1273         /*
1274          * If we are in this routine because of pause frames, then
1275          * don't reset the hardware.
1276          */
1277         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1278             E1000_STATUS_TXOFF) {
1279                 ifp->if_timer = EM_TX_TIMEOUT;
1280                 return;
1281         }
1282
1283         if (e1000_check_for_link(&adapter->hw) == 0)
1284                 if_printf(ifp, "watchdog timeout -- resetting\n");
1285
1286         IFNET_STAT_INC(ifp, oerrors, 1);
1287         adapter->watchdog_events++;
1288
1289         em_init(adapter);
1290
1291         if (!ifq_is_empty(&ifp->if_snd))
1292                 if_devstart(ifp);
1293 }
1294
1295 static void
1296 em_init(void *xsc)
1297 {
1298         struct adapter *adapter = xsc;
1299         struct ifnet *ifp = &adapter->arpcom.ac_if;
1300         device_t dev = adapter->dev;
1301
1302         ASSERT_SERIALIZED(ifp->if_serializer);
1303
1304         em_stop(adapter);
1305
1306         /* Get the latest mac address, User can use a LAA */
1307         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1308
1309         /* Put the address into the Receive Address Array */
1310         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1311
1312         /*
1313          * With the 82571 adapter, RAR[0] may be overwritten
1314          * when the other port is reset, we make a duplicate
1315          * in RAR[14] for that eventuality, this assures
1316          * the interface continues to function.
1317          */
1318         if (adapter->hw.mac.type == e1000_82571) {
1319                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1320                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1321                     E1000_RAR_ENTRIES - 1);
1322         }
1323
1324         /* Reset the hardware */
1325         if (em_reset(adapter)) {
1326                 device_printf(dev, "Unable to reset the hardware\n");
1327                 /* XXX em_stop()? */
1328                 return;
1329         }
1330         em_update_link_status(adapter);
1331
1332         /* Setup VLAN support, basic and offload if available */
1333         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1334
1335         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1336                 uint32_t ctrl;
1337
1338                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1339                 ctrl |= E1000_CTRL_VME;
1340                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1341         }
1342
1343         /* Configure for OS presence */
1344         em_get_mgmt(adapter);
1345
1346         /* Prepare transmit descriptors and buffers */
1347         em_init_tx_ring(adapter);
1348         em_init_tx_unit(adapter);
1349
1350         /* Setup Multicast table */
1351         em_set_multi(adapter);
1352
1353         /* Prepare receive descriptors and buffers */
1354         if (em_init_rx_ring(adapter)) {
1355                 device_printf(dev, "Could not setup receive structures\n");
1356                 em_stop(adapter);
1357                 return;
1358         }
1359         em_init_rx_unit(adapter);
1360
1361         /* Don't lose promiscuous settings */
1362         em_set_promisc(adapter);
1363
1364         ifp->if_flags |= IFF_RUNNING;
1365         ifq_clr_oactive(&ifp->if_snd);
1366
1367         callout_reset(&adapter->timer, hz, em_timer, adapter);
1368         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1369
1370         /* MSI/X configuration for 82574 */
1371         if (adapter->hw.mac.type == e1000_82574) {
1372                 int tmp;
1373
1374                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1375                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1376                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1377                 /*
1378                  * XXX MSIX
1379                  * Set the IVAR - interrupt vector routing.
1380                  * Each nibble represents a vector, high bit
1381                  * is enable, other 3 bits are the MSIX table
1382                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1383                  * Link (other) to 2, hence the magic number.
1384                  */
1385                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1386         }
1387
1388 #ifdef IFPOLL_ENABLE
1389         /*
1390          * Only enable interrupts if we are not polling, make sure
1391          * they are off otherwise.
1392          */
1393         if (ifp->if_flags & IFF_NPOLLING)
1394                 em_disable_intr(adapter);
1395         else
1396 #endif /* IFPOLL_ENABLE */
1397                 em_enable_intr(adapter);
1398
1399         /* AMT based hardware can now take control from firmware */
1400         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1401             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1402             adapter->hw.mac.type >= e1000_82571)
1403                 em_get_hw_control(adapter);
1404 }
1405
1406 #ifdef IFPOLL_ENABLE
1407
1408 static void
1409 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1410 {
1411         struct adapter *adapter = ifp->if_softc;
1412
1413         ASSERT_SERIALIZED(ifp->if_serializer);
1414
1415         if (adapter->npoll.ifpc_stcount-- == 0) {
1416                 uint32_t reg_icr;
1417
1418                 adapter->npoll.ifpc_stcount = adapter->npoll.ifpc_stfrac;
1419
1420                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1421                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1422                         callout_stop(&adapter->timer);
1423                         adapter->hw.mac.get_link_status = 1;
1424                         em_update_link_status(adapter);
1425                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1426                 }
1427         }
1428
1429         em_rxeof(adapter, count);
1430         em_txeof(adapter);
1431
1432         if (!ifq_is_empty(&ifp->if_snd))
1433                 if_devstart(ifp);
1434 }
1435
1436 static void
1437 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1438 {
1439         struct adapter *adapter = ifp->if_softc;
1440
1441         ASSERT_SERIALIZED(ifp->if_serializer);
1442
1443         if (info != NULL) {
1444                 int cpuid = adapter->npoll.ifpc_cpuid;
1445
1446                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1447                 info->ifpi_rx[cpuid].arg = NULL;
1448                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1449
1450                 if (ifp->if_flags & IFF_RUNNING)
1451                         em_disable_intr(adapter);
1452                 ifq_set_cpuid(&ifp->if_snd, cpuid);
1453         } else {
1454                 if (ifp->if_flags & IFF_RUNNING)
1455                         em_enable_intr(adapter);
1456                 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
1457         }
1458 }
1459
1460 #endif /* IFPOLL_ENABLE */
1461
1462 static void
1463 em_intr(void *xsc)
1464 {
1465         em_intr_body(xsc, TRUE);
1466 }
1467
1468 static void
1469 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1470 {
1471         struct ifnet *ifp = &adapter->arpcom.ac_if;
1472         uint32_t reg_icr;
1473
1474         logif(intr_beg);
1475         ASSERT_SERIALIZED(ifp->if_serializer);
1476
1477         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1478
1479         if (chk_asserted &&
1480             ((adapter->hw.mac.type >= e1000_82571 &&
1481               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1482              reg_icr == 0)) {
1483                 logif(intr_end);
1484                 return;
1485         }
1486
1487         /*
1488          * XXX: some laptops trigger several spurious interrupts
1489          * on em(4) when in the resume cycle. The ICR register
1490          * reports all-ones value in this case. Processing such
1491          * interrupts would lead to a freeze. I don't know why.
1492          */
1493         if (reg_icr == 0xffffffff) {
1494                 logif(intr_end);
1495                 return;
1496         }
1497
1498         if (ifp->if_flags & IFF_RUNNING) {
1499                 if (reg_icr &
1500                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1501                         em_rxeof(adapter, -1);
1502                 if (reg_icr & E1000_ICR_TXDW) {
1503                         em_txeof(adapter);
1504                         if (!ifq_is_empty(&ifp->if_snd))
1505                                 if_devstart(ifp);
1506                 }
1507         }
1508
1509         /* Link status change */
1510         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1511                 callout_stop(&adapter->timer);
1512                 adapter->hw.mac.get_link_status = 1;
1513                 em_update_link_status(adapter);
1514
1515                 /* Deal with TX cruft when link lost */
1516                 em_tx_purge(adapter);
1517
1518                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1519         }
1520
1521         if (reg_icr & E1000_ICR_RXO)
1522                 adapter->rx_overruns++;
1523
1524         logif(intr_end);
1525 }
1526
1527 static void
1528 em_intr_mask(void *xsc)
1529 {
1530         struct adapter *adapter = xsc;
1531
1532         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1533         /*
1534          * NOTE:
1535          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1536          * so don't check it.
1537          */
1538         em_intr_body(adapter, FALSE);
1539         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1540 }
1541
1542 static void
1543 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1544 {
1545         struct adapter *adapter = ifp->if_softc;
1546
1547         ASSERT_SERIALIZED(ifp->if_serializer);
1548
1549         em_update_link_status(adapter);
1550
1551         ifmr->ifm_status = IFM_AVALID;
1552         ifmr->ifm_active = IFM_ETHER;
1553
1554         if (!adapter->link_active) {
1555                 if (adapter->hw.mac.autoneg)
1556                         ifmr->ifm_active |= IFM_NONE;
1557                 else
1558                         ifmr->ifm_active = adapter->media.ifm_media;
1559                 return;
1560         }
1561
1562         ifmr->ifm_status |= IFM_ACTIVE;
1563         if (adapter->ifm_flowctrl & IFM_ETH_FORCEPAUSE)
1564                 ifmr->ifm_active |= adapter->ifm_flowctrl;
1565
1566         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1567             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1568                 u_char fiber_type = IFM_1000_SX;
1569
1570                 if (adapter->hw.mac.type == e1000_82545)
1571                         fiber_type = IFM_1000_LX;
1572                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1573         } else {
1574                 switch (adapter->link_speed) {
1575                 case 10:
1576                         ifmr->ifm_active |= IFM_10_T;
1577                         break;
1578                 case 100:
1579                         ifmr->ifm_active |= IFM_100_TX;
1580                         break;
1581
1582                 case 1000:
1583                         ifmr->ifm_active |= IFM_1000_T;
1584                         break;
1585                 }
1586                 if (adapter->link_duplex == FULL_DUPLEX)
1587                         ifmr->ifm_active |= IFM_FDX;
1588                 else
1589                         ifmr->ifm_active |= IFM_HDX;
1590         }
1591         if (ifmr->ifm_active & IFM_FDX) {
1592                 ifmr->ifm_active |=
1593                     e1000_fc2ifmedia(adapter->hw.fc.current_mode);
1594         }
1595 }
1596
1597 static int
1598 em_media_change(struct ifnet *ifp)
1599 {
1600         struct adapter *adapter = ifp->if_softc;
1601         struct ifmedia *ifm = &adapter->media;
1602
1603         ASSERT_SERIALIZED(ifp->if_serializer);
1604
1605         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1606                 return (EINVAL);
1607
1608         if (adapter->hw.mac.type == e1000_pchlan &&
1609             (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_TXPAUSE)) {
1610                 if (bootverbose)
1611                         if_printf(ifp, "TX PAUSE is not supported on PCH\n");
1612                 return EINVAL;
1613         }
1614
1615         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1616         case IFM_AUTO:
1617                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1618                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1619                 break;
1620
1621         case IFM_1000_LX:
1622         case IFM_1000_SX:
1623         case IFM_1000_T:
1624                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1625                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1626                 break;
1627
1628         case IFM_100_TX:
1629                 if (IFM_OPTIONS(ifm->ifm_media) & IFM_FDX) {
1630                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1631                 } else {
1632                         if (IFM_OPTIONS(ifm->ifm_media) &
1633                             (IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE)) {
1634                                 if (bootverbose) {
1635                                         if_printf(ifp, "Flow control is not "
1636                                             "allowed for half-duplex\n");
1637                                 }
1638                                 return EINVAL;
1639                         }
1640                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1641                 }
1642                 adapter->hw.mac.autoneg = FALSE;
1643                 adapter->hw.phy.autoneg_advertised = 0;
1644                 break;
1645
1646         case IFM_10_T:
1647                 if (IFM_OPTIONS(ifm->ifm_media) & IFM_FDX) {
1648                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1649                 } else {
1650                         if (IFM_OPTIONS(ifm->ifm_media) &
1651                             (IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE)) {
1652                                 if (bootverbose) {
1653                                         if_printf(ifp, "Flow control is not "
1654                                             "allowed for half-duplex\n");
1655                                 }
1656                                 return EINVAL;
1657                         }
1658                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1659                 }
1660                 adapter->hw.mac.autoneg = FALSE;
1661                 adapter->hw.phy.autoneg_advertised = 0;
1662                 break;
1663
1664         default:
1665                 if (bootverbose) {
1666                         if_printf(ifp, "Unsupported media type %d\n",
1667                             IFM_SUBTYPE(ifm->ifm_media));
1668                 }
1669                 return EINVAL;
1670         }
1671         adapter->ifm_flowctrl = ifm->ifm_media & IFM_ETH_FCMASK;
1672
1673         if (ifp->if_flags & IFF_RUNNING)
1674                 em_init(adapter);
1675
1676         return (0);
1677 }
1678
1679 static int
1680 em_encap(struct adapter *adapter, struct mbuf **m_headp,
1681     int *segs_used, int *idx)
1682 {
1683         bus_dma_segment_t segs[EM_MAX_SCATTER];
1684         bus_dmamap_t map;
1685         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1686         struct e1000_tx_desc *ctxd = NULL;
1687         struct mbuf *m_head = *m_headp;
1688         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1689         int maxsegs, nsegs, i, j, first, last = 0, error;
1690
1691         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1692                 error = em_tso_pullup(adapter, m_headp);
1693                 if (error)
1694                         return error;
1695                 m_head = *m_headp;
1696         }
1697
1698         txd_upper = txd_lower = 0;
1699         txd_used = 0;
1700
1701         /*
1702          * Capture the first descriptor index, this descriptor
1703          * will have the index of the EOP which is the only one
1704          * that now gets a DONE bit writeback.
1705          */
1706         first = adapter->next_avail_tx_desc;
1707         tx_buffer = &adapter->tx_buffer_area[first];
1708         tx_buffer_mapped = tx_buffer;
1709         map = tx_buffer->map;
1710
1711         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1712         KASSERT(maxsegs >= adapter->spare_tx_desc,
1713                 ("not enough spare TX desc"));
1714         if (adapter->pcix_82544) {
1715                 /* Half it; see the comment in em_attach() */
1716                 maxsegs >>= 1;
1717         }
1718         if (maxsegs > EM_MAX_SCATTER)
1719                 maxsegs = EM_MAX_SCATTER;
1720
1721         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1722                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1723         if (error) {
1724                 if (error == ENOBUFS)
1725                         adapter->mbuf_alloc_failed++;
1726                 else
1727                         adapter->no_tx_dma_setup++;
1728
1729                 m_freem(*m_headp);
1730                 *m_headp = NULL;
1731                 return error;
1732         }
1733         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1734
1735         m_head = *m_headp;
1736         adapter->tx_nsegs += nsegs;
1737         *segs_used += nsegs;
1738
1739         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1740                 /* TSO will consume one TX desc */
1741                 i = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower);
1742                 adapter->tx_nsegs += i;
1743                 *segs_used += i;
1744         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1745                 /* TX csum offloading will consume one TX desc */
1746                 i = em_txcsum(adapter, m_head, &txd_upper, &txd_lower);
1747                 adapter->tx_nsegs += i;
1748                 *segs_used += i;
1749         }
1750
1751         /* Handle VLAN tag */
1752         if (m_head->m_flags & M_VLANTAG) {
1753                 /* Set the vlan id. */
1754                 txd_upper |= (htole16(m_head->m_pkthdr.ether_vlantag) << 16);
1755                 /* Tell hardware to add tag */
1756                 txd_lower |= htole32(E1000_TXD_CMD_VLE);
1757         }
1758
1759         i = adapter->next_avail_tx_desc;
1760
1761         /* Set up our transmit descriptors */
1762         for (j = 0; j < nsegs; j++) {
1763                 /* If adapter is 82544 and on PCIX bus */
1764                 if(adapter->pcix_82544) {
1765                         DESC_ARRAY desc_array;
1766                         uint32_t array_elements, counter;
1767
1768                         /*
1769                          * Check the Address and Length combination and
1770                          * split the data accordingly
1771                          */
1772                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1773                                                 segs[j].ds_len, &desc_array);
1774                         for (counter = 0; counter < array_elements; counter++) {
1775                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1776
1777                                 tx_buffer = &adapter->tx_buffer_area[i];
1778                                 ctxd = &adapter->tx_desc_base[i];
1779
1780                                 ctxd->buffer_addr = htole64(
1781                                     desc_array.descriptor[counter].address);
1782                                 ctxd->lower.data = htole32(
1783                                     E1000_TXD_CMD_IFCS | txd_lower |
1784                                     desc_array.descriptor[counter].length);
1785                                 ctxd->upper.data = htole32(txd_upper);
1786
1787                                 last = i;
1788                                 if (++i == adapter->num_tx_desc)
1789                                         i = 0;
1790
1791                                 txd_used++;
1792                         }
1793                 } else {
1794                         tx_buffer = &adapter->tx_buffer_area[i];
1795                         ctxd = &adapter->tx_desc_base[i];
1796
1797                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1798                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1799                                                    txd_lower | segs[j].ds_len);
1800                         ctxd->upper.data = htole32(txd_upper);
1801
1802                         last = i;
1803                         if (++i == adapter->num_tx_desc)
1804                                 i = 0;
1805                 }
1806         }
1807
1808         adapter->next_avail_tx_desc = i;
1809         if (adapter->pcix_82544) {
1810                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1811                 adapter->num_tx_desc_avail -= txd_used;
1812         } else {
1813                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1814                 adapter->num_tx_desc_avail -= nsegs;
1815         }
1816
1817         tx_buffer->m_head = m_head;
1818         tx_buffer_mapped->map = tx_buffer->map;
1819         tx_buffer->map = map;
1820
1821         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1822                 adapter->tx_nsegs = 0;
1823
1824                 /*
1825                  * Report Status (RS) is turned on
1826                  * every tx_int_nsegs descriptors.
1827                  */
1828                 cmd = E1000_TXD_CMD_RS;
1829
1830                 /*
1831                  * Keep track of the descriptor, which will
1832                  * be written back by hardware.
1833                  */
1834                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1835                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1836                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1837         }
1838
1839         /*
1840          * Last Descriptor of Packet needs End Of Packet (EOP)
1841          */
1842         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1843
1844         if (adapter->hw.mac.type == e1000_82547) {
1845                 /*
1846                  * Advance the Transmit Descriptor Tail (TDT), this tells the
1847                  * E1000 that this frame is available to transmit.
1848                  */
1849                 if (adapter->link_duplex == HALF_DUPLEX) {
1850                         em_82547_move_tail_serialized(adapter);
1851                 } else {
1852                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1853                         em_82547_update_fifo_head(adapter,
1854                             m_head->m_pkthdr.len);
1855                 }
1856         } else {
1857                 /*
1858                  * Defer TDT updating, until enough descriptors are setup
1859                  */
1860                 *idx = i;
1861         }
1862         return (0);
1863 }
1864
1865 /*
1866  * 82547 workaround to avoid controller hang in half-duplex environment.
1867  * The workaround is to avoid queuing a large packet that would span
1868  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1869  * in this case.  We do that only when FIFO is quiescent.
1870  */
1871 static void
1872 em_82547_move_tail_serialized(struct adapter *adapter)
1873 {
1874         struct e1000_tx_desc *tx_desc;
1875         uint16_t hw_tdt, sw_tdt, length = 0;
1876         bool eop = 0;
1877
1878         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1879
1880         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1881         sw_tdt = adapter->next_avail_tx_desc;
1882
1883         while (hw_tdt != sw_tdt) {
1884                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1885                 length += tx_desc->lower.flags.length;
1886                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1887                 if (++hw_tdt == adapter->num_tx_desc)
1888                         hw_tdt = 0;
1889
1890                 if (eop) {
1891                         if (em_82547_fifo_workaround(adapter, length)) {
1892                                 adapter->tx_fifo_wrk_cnt++;
1893                                 callout_reset(&adapter->tx_fifo_timer, 1,
1894                                         em_82547_move_tail, adapter);
1895                                 break;
1896                         }
1897                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1898                         em_82547_update_fifo_head(adapter, length);
1899                         length = 0;
1900                 }
1901         }
1902 }
1903
1904 static void
1905 em_82547_move_tail(void *xsc)
1906 {
1907         struct adapter *adapter = xsc;
1908         struct ifnet *ifp = &adapter->arpcom.ac_if;
1909
1910         lwkt_serialize_enter(ifp->if_serializer);
1911         em_82547_move_tail_serialized(adapter);
1912         lwkt_serialize_exit(ifp->if_serializer);
1913 }
1914
1915 static int
1916 em_82547_fifo_workaround(struct adapter *adapter, int len)
1917 {
1918         int fifo_space, fifo_pkt_len;
1919
1920         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1921
1922         if (adapter->link_duplex == HALF_DUPLEX) {
1923                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1924
1925                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1926                         if (em_82547_tx_fifo_reset(adapter))
1927                                 return (0);
1928                         else
1929                                 return (1);
1930                 }
1931         }
1932         return (0);
1933 }
1934
1935 static void
1936 em_82547_update_fifo_head(struct adapter *adapter, int len)
1937 {
1938         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1939
1940         /* tx_fifo_head is always 16 byte aligned */
1941         adapter->tx_fifo_head += fifo_pkt_len;
1942         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1943                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1944 }
1945
1946 static int
1947 em_82547_tx_fifo_reset(struct adapter *adapter)
1948 {
1949         uint32_t tctl;
1950
1951         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1952              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1953             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1954              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1955             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1956              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1957             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1958                 /* Disable TX unit */
1959                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1960                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1961                     tctl & ~E1000_TCTL_EN);
1962
1963                 /* Reset FIFO pointers */
1964                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1965                     adapter->tx_head_addr);
1966                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1967                     adapter->tx_head_addr);
1968                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1969                     adapter->tx_head_addr);
1970                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1971                     adapter->tx_head_addr);
1972
1973                 /* Re-enable TX unit */
1974                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1975                 E1000_WRITE_FLUSH(&adapter->hw);
1976
1977                 adapter->tx_fifo_head = 0;
1978                 adapter->tx_fifo_reset_cnt++;
1979
1980                 return (TRUE);
1981         } else {
1982                 return (FALSE);
1983         }
1984 }
1985
1986 static void
1987 em_set_promisc(struct adapter *adapter)
1988 {
1989         struct ifnet *ifp = &adapter->arpcom.ac_if;
1990         uint32_t reg_rctl;
1991
1992         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1993
1994         if (ifp->if_flags & IFF_PROMISC) {
1995                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1996                 /* Turn this on if you want to see bad packets */
1997                 if (em_debug_sbp)
1998                         reg_rctl |= E1000_RCTL_SBP;
1999                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2000         } else if (ifp->if_flags & IFF_ALLMULTI) {
2001                 reg_rctl |= E1000_RCTL_MPE;
2002                 reg_rctl &= ~E1000_RCTL_UPE;
2003                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2004         }
2005 }
2006
2007 static void
2008 em_disable_promisc(struct adapter *adapter)
2009 {
2010         uint32_t reg_rctl;
2011
2012         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2013
2014         reg_rctl &= ~E1000_RCTL_UPE;
2015         reg_rctl &= ~E1000_RCTL_MPE;
2016         reg_rctl &= ~E1000_RCTL_SBP;
2017         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2018 }
2019
2020 static void
2021 em_set_multi(struct adapter *adapter)
2022 {
2023         struct ifnet *ifp = &adapter->arpcom.ac_if;
2024         struct ifmultiaddr *ifma;
2025         uint32_t reg_rctl = 0;
2026         uint8_t *mta;
2027         int mcnt = 0;
2028
2029         mta = adapter->mta;
2030         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
2031
2032         if (adapter->hw.mac.type == e1000_82542 &&
2033             adapter->hw.revision_id == E1000_REVISION_2) {
2034                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2035                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2036                         e1000_pci_clear_mwi(&adapter->hw);
2037                 reg_rctl |= E1000_RCTL_RST;
2038                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2039                 msec_delay(5);
2040         }
2041
2042         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2043                 if (ifma->ifma_addr->sa_family != AF_LINK)
2044                         continue;
2045
2046                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
2047                         break;
2048
2049                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
2050                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
2051                 mcnt++;
2052         }
2053
2054         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
2055                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2056                 reg_rctl |= E1000_RCTL_MPE;
2057                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2058         } else {
2059                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
2060         }
2061
2062         if (adapter->hw.mac.type == e1000_82542 &&
2063             adapter->hw.revision_id == E1000_REVISION_2) {
2064                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2065                 reg_rctl &= ~E1000_RCTL_RST;
2066                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2067                 msec_delay(5);
2068                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2069                         e1000_pci_set_mwi(&adapter->hw);
2070         }
2071 }
2072
2073 /*
2074  * This routine checks for link status and updates statistics.
2075  */
2076 static void
2077 em_timer(void *xsc)
2078 {
2079         struct adapter *adapter = xsc;
2080         struct ifnet *ifp = &adapter->arpcom.ac_if;
2081
2082         lwkt_serialize_enter(ifp->if_serializer);
2083
2084         em_update_link_status(adapter);
2085         em_update_stats(adapter);
2086
2087         /* Reset LAA into RAR[0] on 82571 */
2088         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
2089                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2090
2091         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
2092                 em_print_hw_stats(adapter);
2093
2094         em_smartspeed(adapter);
2095
2096         callout_reset(&adapter->timer, hz, em_timer, adapter);
2097
2098         lwkt_serialize_exit(ifp->if_serializer);
2099 }
2100
2101 static void
2102 em_update_link_status(struct adapter *adapter)
2103 {
2104         struct e1000_hw *hw = &adapter->hw;
2105         struct ifnet *ifp = &adapter->arpcom.ac_if;
2106         device_t dev = adapter->dev;
2107         uint32_t link_check = 0;
2108
2109         /* Get the cached link value or read phy for real */
2110         switch (hw->phy.media_type) {
2111         case e1000_media_type_copper:
2112                 if (hw->mac.get_link_status) {
2113                         /* Do the work to read phy */
2114                         e1000_check_for_link(hw);
2115                         link_check = !hw->mac.get_link_status;
2116                         if (link_check) /* ESB2 fix */
2117                                 e1000_cfg_on_link_up(hw);
2118                 } else {
2119                         link_check = TRUE;
2120                 }
2121                 break;
2122
2123         case e1000_media_type_fiber:
2124                 e1000_check_for_link(hw);
2125                 link_check =
2126                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2127                 break;
2128
2129         case e1000_media_type_internal_serdes:
2130                 e1000_check_for_link(hw);
2131                 link_check = adapter->hw.mac.serdes_has_link;
2132                 break;
2133
2134         case e1000_media_type_unknown:
2135         default:
2136                 break;
2137         }
2138
2139         /* Now check for a transition */
2140         if (link_check && adapter->link_active == 0) {
2141                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2142                     &adapter->link_duplex);
2143
2144                 /*
2145                  * Check if we should enable/disable SPEED_MODE bit on
2146                  * 82571/82572
2147                  */
2148                 if (adapter->link_speed != SPEED_1000 &&
2149                     (hw->mac.type == e1000_82571 ||
2150                      hw->mac.type == e1000_82572)) {
2151                         int tarc0;
2152
2153                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2154                         tarc0 &= ~SPEED_MODE_BIT;
2155                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2156                 }
2157                 if (bootverbose) {
2158                         char flowctrl[IFM_ETH_FC_STRLEN];
2159
2160                         e1000_fc2str(hw->fc.current_mode, flowctrl,
2161                             sizeof(flowctrl));
2162                         device_printf(dev, "Link is up %d Mbps %s, "
2163                             "Flow control: %s\n",
2164                             adapter->link_speed,
2165                             (adapter->link_duplex == FULL_DUPLEX) ?
2166                             "Full Duplex" : "Half Duplex",
2167                             flowctrl);
2168                 }
2169                 if (adapter->ifm_flowctrl & IFM_ETH_FORCEPAUSE)
2170                         e1000_force_flowctrl(hw, adapter->ifm_flowctrl);
2171                 adapter->link_active = 1;
2172                 adapter->smartspeed = 0;
2173                 ifp->if_baudrate = adapter->link_speed * 1000000;
2174                 ifp->if_link_state = LINK_STATE_UP;
2175                 if_link_state_change(ifp);
2176         } else if (!link_check && adapter->link_active == 1) {
2177                 ifp->if_baudrate = adapter->link_speed = 0;
2178                 adapter->link_duplex = 0;
2179                 if (bootverbose)
2180                         device_printf(dev, "Link is Down\n");
2181                 adapter->link_active = 0;
2182 #if 0
2183                 /* Link down, disable watchdog */
2184                 if->if_timer = 0;
2185 #endif
2186                 ifp->if_link_state = LINK_STATE_DOWN;
2187                 if_link_state_change(ifp);
2188         }
2189 }
2190
2191 static void
2192 em_stop(struct adapter *adapter)
2193 {
2194         struct ifnet *ifp = &adapter->arpcom.ac_if;
2195         int i;
2196
2197         ASSERT_SERIALIZED(ifp->if_serializer);
2198
2199         em_disable_intr(adapter);
2200
2201         callout_stop(&adapter->timer);
2202         callout_stop(&adapter->tx_fifo_timer);
2203
2204         ifp->if_flags &= ~IFF_RUNNING;
2205         ifq_clr_oactive(&ifp->if_snd);
2206         ifp->if_timer = 0;
2207
2208         e1000_reset_hw(&adapter->hw);
2209         if (adapter->hw.mac.type >= e1000_82544)
2210                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2211
2212         for (i = 0; i < adapter->num_tx_desc; i++) {
2213                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2214
2215                 if (tx_buffer->m_head != NULL) {
2216                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2217                         m_freem(tx_buffer->m_head);
2218                         tx_buffer->m_head = NULL;
2219                 }
2220         }
2221
2222         for (i = 0; i < adapter->num_rx_desc; i++) {
2223                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2224
2225                 if (rx_buffer->m_head != NULL) {
2226                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2227                         m_freem(rx_buffer->m_head);
2228                         rx_buffer->m_head = NULL;
2229                 }
2230         }
2231
2232         if (adapter->fmp != NULL)
2233                 m_freem(adapter->fmp);
2234         adapter->fmp = NULL;
2235         adapter->lmp = NULL;
2236
2237         adapter->csum_flags = 0;
2238         adapter->csum_lhlen = 0;
2239         adapter->csum_iphlen = 0;
2240         adapter->csum_thlen = 0;
2241         adapter->csum_mss = 0;
2242         adapter->csum_pktlen = 0;
2243
2244         adapter->tx_dd_head = 0;
2245         adapter->tx_dd_tail = 0;
2246         adapter->tx_nsegs = 0;
2247 }
2248
2249 static int
2250 em_get_hw_info(struct adapter *adapter)
2251 {
2252         device_t dev = adapter->dev;
2253
2254         /* Save off the information about this board */
2255         adapter->hw.vendor_id = pci_get_vendor(dev);
2256         adapter->hw.device_id = pci_get_device(dev);
2257         adapter->hw.revision_id = pci_get_revid(dev);
2258         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2259         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2260
2261         /* Do Shared Code Init and Setup */
2262         if (e1000_set_mac_type(&adapter->hw))
2263                 return ENXIO;
2264         return 0;
2265 }
2266
2267 static int
2268 em_alloc_pci_res(struct adapter *adapter)
2269 {
2270         device_t dev = adapter->dev;
2271         u_int intr_flags;
2272         int val, rid, msi_enable, cap;
2273
2274         /* Enable bus mastering */
2275         pci_enable_busmaster(dev);
2276
2277         adapter->memory_rid = EM_BAR_MEM;
2278         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2279                                 &adapter->memory_rid, RF_ACTIVE);
2280         if (adapter->memory == NULL) {
2281                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2282                 return (ENXIO);
2283         }
2284         adapter->osdep.mem_bus_space_tag =
2285             rman_get_bustag(adapter->memory);
2286         adapter->osdep.mem_bus_space_handle =
2287             rman_get_bushandle(adapter->memory);
2288
2289         /* XXX This is quite goofy, it is not actually used */
2290         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2291
2292         /* Only older adapters use IO mapping */
2293         if (adapter->hw.mac.type > e1000_82543 &&
2294             adapter->hw.mac.type < e1000_82571) {
2295                 /* Figure our where our IO BAR is ? */
2296                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2297                         val = pci_read_config(dev, rid, 4);
2298                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2299                                 adapter->io_rid = rid;
2300                                 break;
2301                         }
2302                         rid += 4;
2303                         /* check for 64bit BAR */
2304                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2305                                 rid += 4;
2306                 }
2307                 if (rid >= PCIR_CARDBUSCIS) {
2308                         device_printf(dev, "Unable to locate IO BAR\n");
2309                         return (ENXIO);
2310                 }
2311                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2312                                         &adapter->io_rid, RF_ACTIVE);
2313                 if (adapter->ioport == NULL) {
2314                         device_printf(dev, "Unable to allocate bus resource: "
2315                             "ioport\n");
2316                         return (ENXIO);
2317                 }
2318                 adapter->hw.io_base = 0;
2319                 adapter->osdep.io_bus_space_tag =
2320                     rman_get_bustag(adapter->ioport);
2321                 adapter->osdep.io_bus_space_handle =
2322                     rman_get_bushandle(adapter->ioport);
2323         }
2324
2325         /*
2326          * Don't enable MSI-X on 82574, see:
2327          * 82574 specification update errata #15
2328          *
2329          * Don't enable MSI on PCI/PCI-X chips, see:
2330          * 82540 specification update errata #6
2331          * 82545 specification update errata #4
2332          *
2333          * Don't enable MSI on 82571/82572, see:
2334          * 82571/82572 specification update errata #63
2335          *
2336          * Some versions of I219 only have PCI AF.
2337          */
2338         msi_enable = em_msi_enable;
2339         if (msi_enable &&
2340             (!(pci_is_pcie(dev) ||
2341                pci_find_extcap(dev, PCIY_PCIAF, &cap) == 0) ||
2342              adapter->hw.mac.type == e1000_82571 ||
2343              adapter->hw.mac.type == e1000_82572))
2344                 msi_enable = 0;
2345 again:
2346         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2347             &adapter->intr_rid, &intr_flags);
2348
2349         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2350                 int unshared;
2351
2352                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2353                 if (!unshared) {
2354                         adapter->flags |= EM_FLAG_SHARED_INTR;
2355                         if (bootverbose)
2356                                 device_printf(dev, "IRQ shared\n");
2357                 } else {
2358                         intr_flags &= ~RF_SHAREABLE;
2359                         if (bootverbose)
2360                                 device_printf(dev, "IRQ unshared\n");
2361                 }
2362         }
2363
2364         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2365             &adapter->intr_rid, intr_flags);
2366         if (adapter->intr_res == NULL) {
2367                 device_printf(dev, "Unable to allocate bus resource: %s\n",
2368                     adapter->intr_type == PCI_INTR_TYPE_MSI ?
2369                     "MSI" : "legacy intr");
2370                 if (!msi_enable) {
2371                         /* Retry with MSI. */
2372                         msi_enable = 1;
2373                         adapter->flags &= ~EM_FLAG_SHARED_INTR;
2374                         goto again;
2375                 }
2376                 return (ENXIO);
2377         }
2378
2379         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2380         adapter->hw.back = &adapter->osdep;
2381         return (0);
2382 }
2383
2384 static void
2385 em_free_pci_res(struct adapter *adapter)
2386 {
2387         device_t dev = adapter->dev;
2388
2389         if (adapter->intr_res != NULL) {
2390                 bus_release_resource(dev, SYS_RES_IRQ,
2391                     adapter->intr_rid, adapter->intr_res);
2392         }
2393
2394         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2395                 pci_release_msi(dev);
2396
2397         if (adapter->memory != NULL) {
2398                 bus_release_resource(dev, SYS_RES_MEMORY,
2399                     adapter->memory_rid, adapter->memory);
2400         }
2401
2402         if (adapter->flash != NULL) {
2403                 bus_release_resource(dev, SYS_RES_MEMORY,
2404                     adapter->flash_rid, adapter->flash);
2405         }
2406
2407         if (adapter->ioport != NULL) {
2408                 bus_release_resource(dev, SYS_RES_IOPORT,
2409                     adapter->io_rid, adapter->ioport);
2410         }
2411 }
2412
2413 static int
2414 em_reset(struct adapter *adapter)
2415 {
2416         device_t dev = adapter->dev;
2417         uint16_t rx_buffer_size;
2418         uint32_t pba;
2419
2420         /* When hardware is reset, fifo_head is also reset */
2421         adapter->tx_fifo_head = 0;
2422
2423         /* Set up smart power down as default off on newer adapters. */
2424         if (!em_smart_pwr_down &&
2425             (adapter->hw.mac.type == e1000_82571 ||
2426              adapter->hw.mac.type == e1000_82572)) {
2427                 uint16_t phy_tmp = 0;
2428
2429                 /* Speed up time to link by disabling smart power down. */
2430                 e1000_read_phy_reg(&adapter->hw,
2431                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2432                 phy_tmp &= ~IGP02E1000_PM_SPD;
2433                 e1000_write_phy_reg(&adapter->hw,
2434                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2435         }
2436
2437         /*
2438          * Packet Buffer Allocation (PBA)
2439          * Writing PBA sets the receive portion of the buffer
2440          * the remainder is used for the transmit buffer.
2441          *
2442          * Devices before the 82547 had a Packet Buffer of 64K.
2443          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
2444          * After the 82547 the buffer was reduced to 40K.
2445          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
2446          *   Note: default does not leave enough room for Jumbo Frame >10k.
2447          */
2448         switch (adapter->hw.mac.type) {
2449         case e1000_82547:
2450         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
2451                 if (adapter->hw.mac.max_frame_size > 8192)
2452                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
2453                 else
2454                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
2455                 adapter->tx_fifo_head = 0;
2456                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
2457                 adapter->tx_fifo_size =
2458                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
2459                 break;
2460
2461         /* Total Packet Buffer on these is 48K */
2462         case e1000_82571:
2463         case e1000_82572:
2464         case e1000_80003es2lan:
2465                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
2466                 break;
2467
2468         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
2469                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
2470                 break;
2471
2472         case e1000_82574:
2473         case e1000_82583:
2474                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
2475                 break;
2476
2477         case e1000_ich8lan:
2478                 pba = E1000_PBA_8K;
2479                 break;
2480
2481         case e1000_ich9lan:
2482         case e1000_ich10lan:
2483 #define E1000_PBA_10K   0x000A
2484                 pba = E1000_PBA_10K;
2485                 break;
2486
2487         case e1000_pchlan:
2488         case e1000_pch2lan:
2489         case e1000_pch_lpt:
2490         case e1000_pch_spt:
2491                 pba = E1000_PBA_26K;
2492                 break;
2493
2494         default:
2495                 /* Devices before 82547 had a Packet Buffer of 64K.   */
2496                 if (adapter->hw.mac.max_frame_size > 8192)
2497                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
2498                 else
2499                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
2500         }
2501         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
2502
2503         /*
2504          * These parameters control the automatic generation (Tx) and
2505          * response (Rx) to Ethernet PAUSE frames.
2506          * - High water mark should allow for at least two frames to be
2507          *   received after sending an XOFF.
2508          * - Low water mark works best when it is very near the high water mark.
2509          *   This allows the receiver to restart by sending XON when it has
2510          *   drained a bit. Here we use an arbitary value of 1500 which will
2511          *   restart after one full frame is pulled from the buffer. There
2512          *   could be several smaller frames in the buffer and if so they will
2513          *   not trigger the XON until their total number reduces the buffer
2514          *   by 1500.
2515          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2516          */
2517         rx_buffer_size =
2518                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2519
2520         adapter->hw.fc.high_water = rx_buffer_size -
2521             roundup2(adapter->hw.mac.max_frame_size, 1024);
2522         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2523
2524         if (adapter->hw.mac.type == e1000_80003es2lan)
2525                 adapter->hw.fc.pause_time = 0xFFFF;
2526         else
2527                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2528
2529         adapter->hw.fc.send_xon = TRUE;
2530
2531         adapter->hw.fc.requested_mode = e1000_ifmedia2fc(adapter->ifm_flowctrl);
2532
2533         /*
2534          * Device specific overrides/settings
2535          */
2536         switch (adapter->hw.mac.type) {
2537         case e1000_pchlan:
2538                 KASSERT(adapter->hw.fc.requested_mode == e1000_fc_rx_pause ||
2539                     adapter->hw.fc.requested_mode == e1000_fc_none,
2540                     ("unsupported flow control on PCH %d",
2541                      adapter->hw.fc.requested_mode));
2542                 adapter->hw.fc.pause_time = 0xFFFF; /* override */
2543                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2544                         adapter->hw.fc.high_water = 0x3500;
2545                         adapter->hw.fc.low_water = 0x1500;
2546                 } else {
2547                         adapter->hw.fc.high_water = 0x5000;
2548                         adapter->hw.fc.low_water = 0x3000;
2549                 }
2550                 adapter->hw.fc.refresh_time = 0x1000;
2551                 break;
2552
2553         case e1000_pch2lan:
2554         case e1000_pch_lpt:
2555         case e1000_pch_spt:
2556                 adapter->hw.fc.high_water = 0x5C20;
2557                 adapter->hw.fc.low_water = 0x5048;
2558                 adapter->hw.fc.pause_time = 0x0650;
2559                 adapter->hw.fc.refresh_time = 0x0400;
2560                 /* Jumbos need adjusted PBA */
2561                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2562                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2563                 else
2564                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2565                 break;
2566
2567         case e1000_ich9lan:
2568         case e1000_ich10lan:
2569                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2570                         adapter->hw.fc.high_water = 0x2800;
2571                         adapter->hw.fc.low_water =
2572                             adapter->hw.fc.high_water - 8;
2573                         break;
2574                 }
2575                 /* FALL THROUGH */
2576         default:
2577                 if (adapter->hw.mac.type == e1000_80003es2lan)
2578                         adapter->hw.fc.pause_time = 0xFFFF;
2579                 break;
2580         }
2581
2582         /* Issue a global reset */
2583         e1000_reset_hw(&adapter->hw);
2584         if (adapter->hw.mac.type >= e1000_82544)
2585                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2586         em_disable_aspm(adapter);
2587
2588         if (e1000_init_hw(&adapter->hw) < 0) {
2589                 device_printf(dev, "Hardware Initialization Failed\n");
2590                 return (EIO);
2591         }
2592
2593         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2594         e1000_get_phy_info(&adapter->hw);
2595         e1000_check_for_link(&adapter->hw);
2596
2597         return (0);
2598 }
2599
2600 static void
2601 em_setup_ifp(struct adapter *adapter)
2602 {
2603         struct ifnet *ifp = &adapter->arpcom.ac_if;
2604
2605         if_initname(ifp, device_get_name(adapter->dev),
2606                     device_get_unit(adapter->dev));
2607         ifp->if_softc = adapter;
2608         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2609         ifp->if_init =  em_init;
2610         ifp->if_ioctl = em_ioctl;
2611         ifp->if_start = em_start;
2612 #ifdef IFPOLL_ENABLE
2613         ifp->if_npoll = em_npoll;
2614 #endif
2615         ifp->if_watchdog = em_watchdog;
2616         ifp->if_nmbclusters = adapter->num_rx_desc;
2617         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2618         ifq_set_ready(&ifp->if_snd);
2619
2620         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2621
2622         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2623         if (adapter->hw.mac.type >= e1000_82543)
2624                 ifp->if_capabilities |= IFCAP_HWCSUM;
2625         if (adapter->flags & EM_FLAG_TSO)
2626                 ifp->if_capabilities |= IFCAP_TSO;
2627         ifp->if_capenable = ifp->if_capabilities;
2628
2629         if (ifp->if_capenable & IFCAP_TXCSUM)
2630                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2631         if (ifp->if_capenable & IFCAP_TSO)
2632                 ifp->if_hwassist |= CSUM_TSO;
2633
2634         /*
2635          * Tell the upper layer(s) we support long frames.
2636          */
2637         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2638
2639         /*
2640          * Specify the media types supported by this adapter and register
2641          * callbacks to update media and link information
2642          */
2643         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2644             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2645                 u_char fiber_type = IFM_1000_SX; /* default type */
2646
2647                 if (adapter->hw.mac.type == e1000_82545)
2648                         fiber_type = IFM_1000_LX;
2649                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2650                             0, NULL);
2651         } else {
2652                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2653                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2654                             0, NULL);
2655                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2656                             0, NULL);
2657                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2658                             0, NULL);
2659                 if (adapter->hw.phy.type != e1000_phy_ife) {
2660                         ifmedia_add(&adapter->media,
2661                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2662                 }
2663         }
2664         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2665         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO |
2666             adapter->ifm_flowctrl);
2667 }
2668
2669
2670 /*
2671  * Workaround for SmartSpeed on 82541 and 82547 controllers
2672  */
2673 static void
2674 em_smartspeed(struct adapter *adapter)
2675 {
2676         uint16_t phy_tmp;
2677
2678         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2679             adapter->hw.mac.autoneg == 0 ||
2680             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2681                 return;
2682
2683         if (adapter->smartspeed == 0) {
2684                 /*
2685                  * If Master/Slave config fault is asserted twice,
2686                  * we assume back-to-back
2687                  */
2688                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2689                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2690                         return;
2691                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2692                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2693                         e1000_read_phy_reg(&adapter->hw,
2694                             PHY_1000T_CTRL, &phy_tmp);
2695                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2696                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2697                                 e1000_write_phy_reg(&adapter->hw,
2698                                     PHY_1000T_CTRL, phy_tmp);
2699                                 adapter->smartspeed++;
2700                                 if (adapter->hw.mac.autoneg &&
2701                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2702                                     !e1000_read_phy_reg(&adapter->hw,
2703                                      PHY_CONTROL, &phy_tmp)) {
2704                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2705                                                    MII_CR_RESTART_AUTO_NEG;
2706                                         e1000_write_phy_reg(&adapter->hw,
2707                                             PHY_CONTROL, phy_tmp);
2708                                 }
2709                         }
2710                 }
2711                 return;
2712         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2713                 /* If still no link, perhaps using 2/3 pair cable */
2714                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2715                 phy_tmp |= CR_1000T_MS_ENABLE;
2716                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2717                 if (adapter->hw.mac.autoneg &&
2718                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2719                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2720                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2721                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2722                 }
2723         }
2724
2725         /* Restart process after EM_SMARTSPEED_MAX iterations */
2726         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2727                 adapter->smartspeed = 0;
2728 }
2729
2730 static int
2731 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2732               struct em_dma_alloc *dma)
2733 {
2734         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2735                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2736                                 &dma->dma_tag, &dma->dma_map,
2737                                 &dma->dma_paddr);
2738         if (dma->dma_vaddr == NULL)
2739                 return ENOMEM;
2740         else
2741                 return 0;
2742 }
2743
2744 static void
2745 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2746 {
2747         if (dma->dma_tag == NULL)
2748                 return;
2749         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2750         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2751         bus_dma_tag_destroy(dma->dma_tag);
2752 }
2753
2754 static int
2755 em_create_tx_ring(struct adapter *adapter)
2756 {
2757         device_t dev = adapter->dev;
2758         struct em_buffer *tx_buffer;
2759         int error, i;
2760
2761         adapter->tx_buffer_area =
2762                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2763                         M_DEVBUF, M_WAITOK | M_ZERO);
2764
2765         /*
2766          * Create DMA tags for tx buffers
2767          */
2768         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2769                         1, 0,                   /* alignment, bounds */
2770                         BUS_SPACE_MAXADDR,      /* lowaddr */
2771                         BUS_SPACE_MAXADDR,      /* highaddr */
2772                         NULL, NULL,             /* filter, filterarg */
2773                         EM_TSO_SIZE,            /* maxsize */
2774                         EM_MAX_SCATTER,         /* nsegments */
2775                         PAGE_SIZE,              /* maxsegsize */
2776                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2777                         BUS_DMA_ONEBPAGE,       /* flags */
2778                         &adapter->txtag);
2779         if (error) {
2780                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2781                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2782                 adapter->tx_buffer_area = NULL;
2783                 return error;
2784         }
2785
2786         /*
2787          * Create DMA maps for tx buffers
2788          */
2789         for (i = 0; i < adapter->num_tx_desc; i++) {
2790                 tx_buffer = &adapter->tx_buffer_area[i];
2791
2792                 error = bus_dmamap_create(adapter->txtag,
2793                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2794                                           &tx_buffer->map);
2795                 if (error) {
2796                         device_printf(dev, "Unable to create TX DMA map\n");
2797                         em_destroy_tx_ring(adapter, i);
2798                         return error;
2799                 }
2800         }
2801         return (0);
2802 }
2803
2804 static void
2805 em_init_tx_ring(struct adapter *adapter)
2806 {
2807         /* Clear the old ring contents */
2808         bzero(adapter->tx_desc_base,
2809             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2810
2811         /* Reset state */
2812         adapter->next_avail_tx_desc = 0;
2813         adapter->next_tx_to_clean = 0;
2814         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2815 }
2816
2817 static void
2818 em_init_tx_unit(struct adapter *adapter)
2819 {
2820         uint32_t tctl, tarc, tipg = 0;
2821         uint64_t bus_addr;
2822
2823         /* Setup the Base and Length of the Tx Descriptor Ring */
2824         bus_addr = adapter->txdma.dma_paddr;
2825         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2826             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2827         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2828             (uint32_t)(bus_addr >> 32));
2829         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2830             (uint32_t)bus_addr);
2831         /* Setup the HW Tx Head and Tail descriptor pointers */
2832         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2833         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2834
2835         /* Set the default values for the Tx Inter Packet Gap timer */
2836         switch (adapter->hw.mac.type) {
2837         case e1000_82542:
2838                 tipg = DEFAULT_82542_TIPG_IPGT;
2839                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2840                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2841                 break;
2842
2843         case e1000_80003es2lan:
2844                 tipg = DEFAULT_82543_TIPG_IPGR1;
2845                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2846                     E1000_TIPG_IPGR2_SHIFT;
2847                 break;
2848
2849         default:
2850                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2851                     adapter->hw.phy.media_type ==
2852                     e1000_media_type_internal_serdes)
2853                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2854                 else
2855                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2856                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2857                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2858                 break;
2859         }
2860
2861         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2862
2863         /* NOTE: 0 is not allowed for TIDV */
2864         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2865         if(adapter->hw.mac.type >= e1000_82540)
2866                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2867
2868         if (adapter->hw.mac.type == e1000_82571 ||
2869             adapter->hw.mac.type == e1000_82572) {
2870                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2871                 tarc |= SPEED_MODE_BIT;
2872                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2873         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2874                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2875                 tarc |= 1;
2876                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2877                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2878                 tarc |= 1;
2879                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2880         }
2881
2882         /* Program the Transmit Control Register */
2883         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2884         tctl &= ~E1000_TCTL_CT;
2885         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2886                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2887
2888         if (adapter->hw.mac.type >= e1000_82571)
2889                 tctl |= E1000_TCTL_MULR;
2890
2891         /* This write will effectively turn on the transmit unit. */
2892         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2893
2894         if (adapter->hw.mac.type == e1000_82571 ||
2895             adapter->hw.mac.type == e1000_82572 ||
2896             adapter->hw.mac.type == e1000_80003es2lan) {
2897                 /* Bit 28 of TARC1 must be cleared when MULR is enabled */
2898                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2899                 tarc &= ~(1 << 28);
2900                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2901         }
2902 }
2903
2904 static void
2905 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2906 {
2907         struct em_buffer *tx_buffer;
2908         int i;
2909
2910         if (adapter->tx_buffer_area == NULL)
2911                 return;
2912
2913         for (i = 0; i < ndesc; i++) {
2914                 tx_buffer = &adapter->tx_buffer_area[i];
2915
2916                 KKASSERT(tx_buffer->m_head == NULL);
2917                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2918         }
2919         bus_dma_tag_destroy(adapter->txtag);
2920
2921         kfree(adapter->tx_buffer_area, M_DEVBUF);
2922         adapter->tx_buffer_area = NULL;
2923 }
2924
2925 /*
2926  * The offload context needs to be set when we transfer the first
2927  * packet of a particular protocol (TCP/UDP).  This routine has been
2928  * enhanced to deal with inserted VLAN headers.
2929  *
2930  * If the new packet's ether header length, ip header length and
2931  * csum offloading type are same as the previous packet, we should
2932  * avoid allocating a new csum context descriptor; mainly to take
2933  * advantage of the pipeline effect of the TX data read request.
2934  *
2935  * This function returns number of TX descrptors allocated for
2936  * csum context.
2937  */
2938 static int
2939 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2940           uint32_t *txd_upper, uint32_t *txd_lower)
2941 {
2942         struct e1000_context_desc *TXD;
2943         int curr_txd, ehdrlen, csum_flags;
2944         uint32_t cmd, hdr_len, ip_hlen;
2945
2946         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2947         ip_hlen = mp->m_pkthdr.csum_iphlen;
2948         ehdrlen = mp->m_pkthdr.csum_lhlen;
2949
2950         if (adapter->csum_lhlen == ehdrlen &&
2951             adapter->csum_iphlen == ip_hlen &&
2952             adapter->csum_flags == csum_flags) {
2953                 /*
2954                  * Same csum offload context as the previous packets;
2955                  * just return.
2956                  */
2957                 *txd_upper = adapter->csum_txd_upper;
2958                 *txd_lower = adapter->csum_txd_lower;
2959                 return 0;
2960         }
2961
2962         /*
2963          * Setup a new csum offload context.
2964          */
2965
2966         curr_txd = adapter->next_avail_tx_desc;
2967         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2968
2969         cmd = 0;
2970
2971         /* Setup of IP header checksum. */
2972         if (csum_flags & CSUM_IP) {
2973                 /*
2974                  * Start offset for header checksum calculation.
2975                  * End offset for header checksum calculation.
2976                  * Offset of place to put the checksum.
2977                  */
2978                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2979                 TXD->lower_setup.ip_fields.ipcse =
2980                     htole16(ehdrlen + ip_hlen - 1);
2981                 TXD->lower_setup.ip_fields.ipcso =
2982                     ehdrlen + offsetof(struct ip, ip_sum);
2983                 cmd |= E1000_TXD_CMD_IP;
2984                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2985         }
2986         hdr_len = ehdrlen + ip_hlen;
2987
2988         if (csum_flags & CSUM_TCP) {
2989                 /*
2990                  * Start offset for payload checksum calculation.
2991                  * End offset for payload checksum calculation.
2992                  * Offset of place to put the checksum.
2993                  */
2994                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2995                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2996                 TXD->upper_setup.tcp_fields.tucso =
2997                     hdr_len + offsetof(struct tcphdr, th_sum);
2998                 cmd |= E1000_TXD_CMD_TCP;
2999                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3000         } else if (csum_flags & CSUM_UDP) {
3001                 /*
3002                  * Start offset for header checksum calculation.
3003                  * End offset for header checksum calculation.
3004                  * Offset of place to put the checksum.
3005                  */
3006                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
3007                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
3008                 TXD->upper_setup.tcp_fields.tucso =
3009                     hdr_len + offsetof(struct udphdr, uh_sum);
3010                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3011         }
3012
3013         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
3014                      E1000_TXD_DTYP_D;          /* Data descr */
3015
3016         /* Save the information for this csum offloading context */
3017         adapter->csum_lhlen = ehdrlen;
3018         adapter->csum_iphlen = ip_hlen;
3019         adapter->csum_flags = csum_flags;
3020         adapter->csum_txd_upper = *txd_upper;
3021         adapter->csum_txd_lower = *txd_lower;
3022
3023         TXD->tcp_seg_setup.data = htole32(0);
3024         TXD->cmd_and_length =
3025             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
3026
3027         if (++curr_txd == adapter->num_tx_desc)
3028                 curr_txd = 0;
3029
3030         KKASSERT(adapter->num_tx_desc_avail > 0);
3031         adapter->num_tx_desc_avail--;
3032
3033         adapter->next_avail_tx_desc = curr_txd;
3034         return 1;
3035 }
3036
3037 static void
3038 em_txeof(struct adapter *adapter)
3039 {
3040         struct ifnet *ifp = &adapter->arpcom.ac_if;
3041         struct em_buffer *tx_buffer;
3042         int first, num_avail;
3043
3044         if (adapter->tx_dd_head == adapter->tx_dd_tail)
3045                 return;
3046
3047         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3048                 return;
3049
3050         num_avail = adapter->num_tx_desc_avail;
3051         first = adapter->next_tx_to_clean;
3052
3053         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
3054                 struct e1000_tx_desc *tx_desc;
3055                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3056
3057                 tx_desc = &adapter->tx_desc_base[dd_idx];
3058                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
3059                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3060
3061                         if (++dd_idx == adapter->num_tx_desc)
3062                                 dd_idx = 0;
3063
3064                         while (first != dd_idx) {
3065                                 logif(pkt_txclean);
3066
3067                                 num_avail++;
3068
3069                                 tx_buffer = &adapter->tx_buffer_area[first];
3070                                 if (tx_buffer->m_head) {
3071                                         bus_dmamap_unload(adapter->txtag,
3072                                                           tx_buffer->map);
3073                                         m_freem(tx_buffer->m_head);
3074                                         tx_buffer->m_head = NULL;
3075                                 }
3076
3077                                 if (++first == adapter->num_tx_desc)
3078                                         first = 0;
3079                         }
3080                 } else {
3081                         break;
3082                 }
3083         }
3084         adapter->next_tx_to_clean = first;
3085         adapter->num_tx_desc_avail = num_avail;
3086
3087         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3088                 adapter->tx_dd_head = 0;
3089                 adapter->tx_dd_tail = 0;
3090         }
3091
3092         if (!EM_IS_OACTIVE(adapter)) {
3093                 ifq_clr_oactive(&ifp->if_snd);
3094
3095                 /* All clean, turn off the timer */
3096                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3097                         ifp->if_timer = 0;
3098         }
3099 }
3100
3101 static void
3102 em_tx_collect(struct adapter *adapter)
3103 {
3104         struct ifnet *ifp = &adapter->arpcom.ac_if;
3105         struct em_buffer *tx_buffer;
3106         int tdh, first, num_avail, dd_idx = -1;
3107
3108         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3109                 return;
3110
3111         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
3112         if (tdh == adapter->next_tx_to_clean)
3113                 return;
3114
3115         if (adapter->tx_dd_head != adapter->tx_dd_tail)
3116                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3117
3118         num_avail = adapter->num_tx_desc_avail;
3119         first = adapter->next_tx_to_clean;
3120
3121         while (first != tdh) {
3122                 logif(pkt_txclean);
3123
3124                 num_avail++;
3125
3126                 tx_buffer = &adapter->tx_buffer_area[first];
3127                 if (tx_buffer->m_head) {
3128                         bus_dmamap_unload(adapter->txtag,
3129                                           tx_buffer->map);
3130                         m_freem(tx_buffer->m_head);
3131                         tx_buffer->m_head = NULL;
3132                 }
3133
3134                 if (first == dd_idx) {
3135                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3136                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3137                                 adapter->tx_dd_head = 0;
3138                                 adapter->tx_dd_tail = 0;
3139                                 dd_idx = -1;
3140                         } else {
3141                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3142                         }
3143                 }
3144
3145                 if (++first == adapter->num_tx_desc)
3146                         first = 0;
3147         }
3148         adapter->next_tx_to_clean = first;
3149         adapter->num_tx_desc_avail = num_avail;
3150
3151         if (!EM_IS_OACTIVE(adapter)) {
3152                 ifq_clr_oactive(&ifp->if_snd);
3153
3154                 /* All clean, turn off the timer */
3155                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3156                         ifp->if_timer = 0;
3157         }
3158 }
3159
3160 /*
3161  * When Link is lost sometimes there is work still in the TX ring
3162  * which will result in a watchdog, rather than allow that do an
3163  * attempted cleanup and then reinit here.  Note that this has been
3164  * seens mostly with fiber adapters.
3165  */
3166 static void
3167 em_tx_purge(struct adapter *adapter)
3168 {
3169         struct ifnet *ifp = &adapter->arpcom.ac_if;
3170
3171         if (!adapter->link_active && ifp->if_timer) {
3172                 em_tx_collect(adapter);
3173                 if (ifp->if_timer) {
3174                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3175                         ifp->if_timer = 0;
3176                         em_init(adapter);
3177                 }
3178         }
3179 }
3180
3181 static int
3182 em_newbuf(struct adapter *adapter, int i, int init)
3183 {
3184         struct mbuf *m;
3185         bus_dma_segment_t seg;
3186         bus_dmamap_t map;
3187         struct em_buffer *rx_buffer;
3188         int error, nseg;
3189
3190         m = m_getcl(init ? M_WAITOK : M_NOWAIT, MT_DATA, M_PKTHDR);
3191         if (m == NULL) {
3192                 adapter->mbuf_cluster_failed++;
3193                 if (init) {
3194                         if_printf(&adapter->arpcom.ac_if,
3195                                   "Unable to allocate RX mbuf\n");
3196                 }
3197                 return (ENOBUFS);
3198         }
3199         m->m_len = m->m_pkthdr.len = MCLBYTES;
3200
3201         if (adapter->hw.mac.max_frame_size <= MCLBYTES - ETHER_ALIGN)
3202                 m_adj(m, ETHER_ALIGN);
3203
3204         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3205                         adapter->rx_sparemap, m,
3206                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3207         if (error) {
3208                 m_freem(m);
3209                 if (init) {
3210                         if_printf(&adapter->arpcom.ac_if,
3211                                   "Unable to load RX mbuf\n");
3212                 }
3213                 return (error);
3214         }
3215
3216         rx_buffer = &adapter->rx_buffer_area[i];
3217         if (rx_buffer->m_head != NULL)
3218                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3219
3220         map = rx_buffer->map;
3221         rx_buffer->map = adapter->rx_sparemap;
3222         adapter->rx_sparemap = map;
3223
3224         rx_buffer->m_head = m;
3225
3226         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3227         return (0);
3228 }
3229
3230 static int
3231 em_create_rx_ring(struct adapter *adapter)
3232 {
3233         device_t dev = adapter->dev;
3234         struct em_buffer *rx_buffer;
3235         int i, error;
3236
3237         adapter->rx_buffer_area =
3238                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3239                         M_DEVBUF, M_WAITOK | M_ZERO);
3240
3241         /*
3242          * Create DMA tag for rx buffers
3243          */
3244         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3245                         1, 0,                   /* alignment, bounds */
3246                         BUS_SPACE_MAXADDR,      /* lowaddr */
3247                         BUS_SPACE_MAXADDR,      /* highaddr */
3248                         NULL, NULL,             /* filter, filterarg */
3249                         MCLBYTES,               /* maxsize */
3250                         1,                      /* nsegments */
3251                         MCLBYTES,               /* maxsegsize */
3252                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3253                         &adapter->rxtag);
3254         if (error) {
3255                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3256                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3257                 adapter->rx_buffer_area = NULL;
3258                 return error;
3259         }
3260
3261         /*
3262          * Create spare DMA map for rx buffers
3263          */
3264         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3265                                   &adapter->rx_sparemap);
3266         if (error) {
3267                 device_printf(dev, "Unable to create spare RX DMA map\n");
3268                 bus_dma_tag_destroy(adapter->rxtag);
3269                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3270                 adapter->rx_buffer_area = NULL;
3271                 return error;
3272         }
3273
3274         /*
3275          * Create DMA maps for rx buffers
3276          */
3277         for (i = 0; i < adapter->num_rx_desc; i++) {
3278                 rx_buffer = &adapter->rx_buffer_area[i];
3279
3280                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3281                                           &rx_buffer->map);
3282                 if (error) {
3283                         device_printf(dev, "Unable to create RX DMA map\n");
3284                         em_destroy_rx_ring(adapter, i);
3285                         return error;
3286                 }
3287         }
3288         return (0);
3289 }
3290
3291 static int
3292 em_init_rx_ring(struct adapter *adapter)
3293 {
3294         int i, error;
3295
3296         /* Reset descriptor ring */
3297         bzero(adapter->rx_desc_base,
3298             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3299
3300         /* Allocate new ones. */
3301         for (i = 0; i < adapter->num_rx_desc; i++) {
3302                 error = em_newbuf(adapter, i, 1);
3303                 if (error)
3304                         return (error);
3305         }
3306
3307         /* Setup our descriptor pointers */
3308         adapter->next_rx_desc_to_check = 0;
3309
3310         return (0);
3311 }
3312
3313 static void
3314 em_init_rx_unit(struct adapter *adapter)
3315 {
3316         struct ifnet *ifp = &adapter->arpcom.ac_if;
3317         uint64_t bus_addr;
3318         uint32_t rctl;
3319
3320         /*
3321          * Make sure receives are disabled while setting
3322          * up the descriptor ring
3323          */
3324         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3325         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3326
3327         if (adapter->hw.mac.type >= e1000_82540) {
3328                 uint32_t itr;
3329
3330                 /*
3331                  * Set the interrupt throttling rate. Value is calculated
3332                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3333                  */
3334                 if (adapter->int_throttle_ceil)
3335                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3336                 else
3337                         itr = 0;
3338                 em_set_itr(adapter, itr);
3339         }
3340
3341         /* Disable accelerated ackknowledge */
3342         if (adapter->hw.mac.type == e1000_82574) {
3343                 E1000_WRITE_REG(&adapter->hw,
3344                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3345         }
3346
3347         /* Receive Checksum Offload for TCP and UDP */
3348         if (ifp->if_capenable & IFCAP_RXCSUM) {
3349                 uint32_t rxcsum;
3350
3351                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3352                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3353                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3354         }
3355
3356         /*
3357          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3358          * long latencies are observed, like Lenovo X60. This
3359          * change eliminates the problem, but since having positive
3360          * values in RDTR is a known source of problems on other
3361          * platforms another solution is being sought.
3362          */
3363         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3364                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3365                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3366         }
3367
3368         /*
3369          * Setup the Base and Length of the Rx Descriptor Ring
3370          */
3371         bus_addr = adapter->rxdma.dma_paddr;
3372         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3373             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3374         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3375             (uint32_t)(bus_addr >> 32));
3376         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3377             (uint32_t)bus_addr);
3378
3379         /*
3380          * Setup the HW Rx Head and Tail Descriptor Pointers
3381          */
3382         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3383         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3384
3385         /* Set PTHRESH for improved jumbo performance */
3386         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3387             (adapter->hw.mac.type == e1000_pch2lan) ||
3388             (adapter->hw.mac.type == e1000_ich10lan)) &&
3389             (ifp->if_mtu > ETHERMTU)) {
3390                 uint32_t rxdctl;
3391
3392                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3393                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3394         }
3395
3396         if (adapter->hw.mac.type >= e1000_pch2lan) {
3397                 if (ifp->if_mtu > ETHERMTU)
3398                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3399                 else
3400                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3401         }
3402
3403         /* Setup the Receive Control Register */
3404         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3405         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3406                 E1000_RCTL_RDMTS_HALF |
3407                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3408
3409         /* Make sure VLAN Filters are off */
3410         rctl &= ~E1000_RCTL_VFE;
3411
3412         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3413                 rctl |= E1000_RCTL_SBP;
3414         else
3415                 rctl &= ~E1000_RCTL_SBP;
3416
3417         switch (adapter->rx_buffer_len) {
3418         default:
3419         case 2048:
3420                 rctl |= E1000_RCTL_SZ_2048;
3421                 break;
3422
3423         case 4096:
3424                 rctl |= E1000_RCTL_SZ_4096 |
3425                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3426                 break;
3427
3428         case 8192:
3429                 rctl |= E1000_RCTL_SZ_8192 |
3430                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3431                 break;
3432
3433         case 16384:
3434                 rctl |= E1000_RCTL_SZ_16384 |
3435                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3436                 break;
3437         }
3438
3439         if (ifp->if_mtu > ETHERMTU)
3440                 rctl |= E1000_RCTL_LPE;
3441         else
3442                 rctl &= ~E1000_RCTL_LPE;
3443
3444         /* Enable Receives */
3445         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3446 }
3447
3448 static void
3449 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3450 {
3451         struct em_buffer *rx_buffer;
3452         int i;
3453
3454         if (adapter->rx_buffer_area == NULL)
3455                 return;
3456
3457         for (i = 0; i < ndesc; i++) {
3458                 rx_buffer = &adapter->rx_buffer_area[i];
3459
3460                 KKASSERT(rx_buffer->m_head == NULL);
3461                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3462         }
3463         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3464         bus_dma_tag_destroy(adapter->rxtag);
3465
3466         kfree(adapter->rx_buffer_area, M_DEVBUF);
3467         adapter->rx_buffer_area = NULL;
3468 }
3469
3470 static void
3471 em_rxeof(struct adapter *adapter, int count)
3472 {
3473         struct ifnet *ifp = &adapter->arpcom.ac_if;
3474         uint8_t status, accept_frame = 0, eop = 0;
3475         uint16_t len, desc_len, prev_len_adj;
3476         struct e1000_rx_desc *current_desc;
3477         struct mbuf *mp;
3478         int i;
3479
3480         i = adapter->next_rx_desc_to_check;
3481         current_desc = &adapter->rx_desc_base[i];
3482
3483         if (!(current_desc->status & E1000_RXD_STAT_DD))
3484                 return;
3485
3486         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3487                 struct mbuf *m = NULL;
3488
3489                 logif(pkt_receive);
3490
3491                 mp = adapter->rx_buffer_area[i].m_head;
3492
3493                 /*
3494                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3495                  * needs to access the last received byte in the mbuf.
3496                  */
3497                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3498                                 BUS_DMASYNC_POSTREAD);
3499
3500                 accept_frame = 1;
3501                 prev_len_adj = 0;
3502                 desc_len = le16toh(current_desc->length);
3503                 status = current_desc->status;
3504                 if (status & E1000_RXD_STAT_EOP) {
3505                         count--;
3506                         eop = 1;
3507                         if (desc_len < ETHER_CRC_LEN) {
3508                                 len = 0;
3509                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3510                         } else {
3511                                 len = desc_len - ETHER_CRC_LEN;
3512                         }
3513                 } else {
3514                         eop = 0;
3515                         len = desc_len;
3516                 }
3517
3518                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3519                         uint8_t last_byte;
3520                         uint32_t pkt_len = desc_len;
3521
3522                         if (adapter->fmp != NULL)
3523                                 pkt_len += adapter->fmp->m_pkthdr.len;
3524
3525                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3526                         if (TBI_ACCEPT(&adapter->hw, status,
3527                             current_desc->errors, pkt_len, last_byte,
3528                             adapter->min_frame_size,
3529                             adapter->hw.mac.max_frame_size)) {
3530                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3531                                     &adapter->stats, pkt_len,
3532                                     adapter->hw.mac.addr,
3533                                     adapter->hw.mac.max_frame_size);
3534                                 if (len > 0)
3535                                         len--;
3536                         } else {
3537                                 accept_frame = 0;
3538                         }
3539                 }
3540
3541                 if (accept_frame) {
3542                         if (em_newbuf(adapter, i, 0) != 0) {
3543                                 IFNET_STAT_INC(ifp, iqdrops, 1);
3544                                 goto discard;
3545                         }
3546
3547                         /* Assign correct length to the current fragment */
3548                         mp->m_len = len;
3549
3550                         if (adapter->fmp == NULL) {
3551                                 mp->m_pkthdr.len = len;
3552                                 adapter->fmp = mp; /* Store the first mbuf */
3553                                 adapter->lmp = mp;
3554                         } else {
3555                                 /*
3556                                  * Chain mbuf's together
3557                                  */
3558
3559                                 /*
3560                                  * Adjust length of previous mbuf in chain if
3561                                  * we received less than 4 bytes in the last
3562                                  * descriptor.
3563                                  */
3564                                 if (prev_len_adj > 0) {
3565                                         adapter->lmp->m_len -= prev_len_adj;
3566                                         adapter->fmp->m_pkthdr.len -=
3567                                             prev_len_adj;
3568                                 }
3569                                 adapter->lmp->m_next = mp;
3570                                 adapter->lmp = adapter->lmp->m_next;
3571                                 adapter->fmp->m_pkthdr.len += len;
3572                         }
3573
3574                         if (eop) {
3575                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3576                                 IFNET_STAT_INC(ifp, ipackets, 1);
3577
3578                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3579                                         em_rxcsum(adapter, current_desc,
3580                                                   adapter->fmp);
3581                                 }
3582
3583                                 if (status & E1000_RXD_STAT_VP) {
3584                                         adapter->fmp->m_pkthdr.ether_vlantag =
3585                                             (le16toh(current_desc->special) &
3586                                             E1000_RXD_SPC_VLAN_MASK);
3587                                         adapter->fmp->m_flags |= M_VLANTAG;
3588                                 }
3589                                 m = adapter->fmp;
3590                                 adapter->fmp = NULL;
3591                                 adapter->lmp = NULL;
3592                         }
3593                 } else {
3594                         IFNET_STAT_INC(ifp, ierrors, 1);
3595 discard:
3596 #ifdef foo
3597                         /* Reuse loaded DMA map and just update mbuf chain */
3598                         mp = adapter->rx_buffer_area[i].m_head;
3599                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3600                         mp->m_data = mp->m_ext.ext_buf;
3601                         mp->m_next = NULL;
3602                         if (adapter->hw.mac.max_frame_size <=
3603                             (MCLBYTES - ETHER_ALIGN))
3604                                 m_adj(mp, ETHER_ALIGN);
3605 #endif
3606                         if (adapter->fmp != NULL) {
3607                                 m_freem(adapter->fmp);
3608                                 adapter->fmp = NULL;
3609                                 adapter->lmp = NULL;
3610                         }
3611                         m = NULL;
3612                 }
3613
3614                 /* Zero out the receive descriptors status. */
3615                 current_desc->status = 0;
3616
3617                 if (m != NULL)
3618                         ifp->if_input(ifp, m, NULL, -1);
3619
3620                 /* Advance our pointers to the next descriptor. */
3621                 if (++i == adapter->num_rx_desc)
3622                         i = 0;
3623                 current_desc = &adapter->rx_desc_base[i];
3624         }
3625         adapter->next_rx_desc_to_check = i;
3626
3627         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3628         if (--i < 0)
3629                 i = adapter->num_rx_desc - 1;
3630         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3631 }
3632
3633 static void
3634 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3635           struct mbuf *mp)
3636 {
3637         /* 82543 or newer only */
3638         if (adapter->hw.mac.type < e1000_82543 ||
3639             /* Ignore Checksum bit is set */
3640             (rx_desc->status & E1000_RXD_STAT_IXSM))
3641                 return;
3642
3643         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3644             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3645                 /* IP Checksum Good */
3646                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3647         }
3648
3649         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3650             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3651                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3652                                            CSUM_PSEUDO_HDR |
3653                                            CSUM_FRAG_NOT_CHECKED;
3654                 mp->m_pkthdr.csum_data = htons(0xffff);
3655         }
3656 }
3657
3658 static void
3659 em_enable_intr(struct adapter *adapter)
3660 {
3661         uint32_t ims_mask = IMS_ENABLE_MASK;
3662
3663         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3664
3665 #if 0
3666         /* XXX MSIX */
3667         if (adapter->hw.mac.type == e1000_82574) {
3668                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3669                 ims_mask |= EM_MSIX_MASK;
3670         }
3671 #endif
3672         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3673 }
3674
3675 static void
3676 em_disable_intr(struct adapter *adapter)
3677 {
3678         uint32_t clear = 0xffffffff;
3679
3680         /*
3681          * The first version of 82542 had an errata where when link was forced
3682          * it would stay up even up even if the cable was disconnected.
3683          * Sequence errors were used to detect the disconnect and then the
3684          * driver would unforce the link.  This code in the in the ISR.  For
3685          * this to work correctly the Sequence error interrupt had to be
3686          * enabled all the time.
3687          */
3688         if (adapter->hw.mac.type == e1000_82542 &&
3689             adapter->hw.revision_id == E1000_REVISION_2)
3690                 clear &= ~E1000_ICR_RXSEQ;
3691         else if (adapter->hw.mac.type == e1000_82574)
3692                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3693
3694         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3695
3696         adapter->npoll.ifpc_stcount = 0;
3697
3698         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3699 }
3700
3701 /*
3702  * Bit of a misnomer, what this really means is
3703  * to enable OS management of the system... aka
3704  * to disable special hardware management features
3705  */
3706 static void
3707 em_get_mgmt(struct adapter *adapter)
3708 {
3709         /* A shared code workaround */
3710 #define E1000_82542_MANC2H E1000_MANC2H
3711         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3712                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3713                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3714
3715                 /* disable hardware interception of ARP */
3716                 manc &= ~(E1000_MANC_ARP_EN);
3717
3718                 /* enable receiving management packets to the host */
3719                 if (adapter->hw.mac.type >= e1000_82571) {
3720                         manc |= E1000_MANC_EN_MNG2HOST;
3721 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3722 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3723                         manc2h |= E1000_MNG2HOST_PORT_623;
3724                         manc2h |= E1000_MNG2HOST_PORT_664;
3725                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3726                 }
3727
3728                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3729         }
3730 }
3731
3732 /*
3733  * Give control back to hardware management
3734  * controller if there is one.
3735  */
3736 static void
3737 em_rel_mgmt(struct adapter *adapter)
3738 {
3739         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3740                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3741
3742                 /* re-enable hardware interception of ARP */
3743                 manc |= E1000_MANC_ARP_EN;
3744
3745                 if (adapter->hw.mac.type >= e1000_82571)
3746                         manc &= ~E1000_MANC_EN_MNG2HOST;
3747
3748                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3749         }
3750 }
3751
3752 /*
3753  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3754  * For ASF and Pass Through versions of f/w this means that
3755  * the driver is loaded.  For AMT version (only with 82573)
3756  * of the f/w this means that the network i/f is open.
3757  */
3758 static void
3759 em_get_hw_control(struct adapter *adapter)
3760 {
3761         /* Let firmware know the driver has taken over */
3762         if (adapter->hw.mac.type == e1000_82573) {
3763                 uint32_t swsm;
3764
3765                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3766                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3767                     swsm | E1000_SWSM_DRV_LOAD);
3768         } else {
3769                 uint32_t ctrl_ext;
3770
3771                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3772                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3773                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3774         }
3775         adapter->flags |= EM_FLAG_HW_CTRL;
3776 }
3777
3778 /*
3779  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3780  * For ASF and Pass Through versions of f/w this means that the
3781  * driver is no longer loaded.  For AMT version (only with 82573)
3782  * of the f/w this means that the network i/f is closed.
3783  */
3784 static void
3785 em_rel_hw_control(struct adapter *adapter)
3786 {
3787         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3788                 return;
3789         adapter->flags &= ~EM_FLAG_HW_CTRL;
3790
3791         /* Let firmware taken over control of h/w */
3792         if (adapter->hw.mac.type == e1000_82573) {
3793                 uint32_t swsm;
3794
3795                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3796                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3797                     swsm & ~E1000_SWSM_DRV_LOAD);
3798         } else {
3799                 uint32_t ctrl_ext;
3800
3801                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3802                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3803                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3804         }
3805 }
3806
3807 static int
3808 em_is_valid_eaddr(const uint8_t *addr)
3809 {
3810         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3811
3812         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3813                 return (FALSE);
3814
3815         return (TRUE);
3816 }
3817
3818 /*
3819  * Enable PCI Wake On Lan capability
3820  */
3821 static void
3822 em_enable_wol(device_t dev)
3823 {
3824         uint16_t cap, status;
3825         uint8_t id;
3826
3827         /* First find the capabilities pointer*/
3828         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3829
3830         /* Read the PM Capabilities */
3831         id = pci_read_config(dev, cap, 1);
3832         if (id != PCIY_PMG)     /* Something wrong */
3833                 return;
3834
3835         /*
3836          * OK, we have the power capabilities,
3837          * so now get the status register
3838          */
3839         cap += PCIR_POWER_STATUS;
3840         status = pci_read_config(dev, cap, 2);
3841         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3842         pci_write_config(dev, cap, status, 2);
3843 }
3844
3845
3846 /*
3847  * 82544 Coexistence issue workaround.
3848  *    There are 2 issues.
3849  *       1. Transmit Hang issue.
3850  *    To detect this issue, following equation can be used...
3851  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3852  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3853  *
3854  *       2. DAC issue.
3855  *    To detect this issue, following equation can be used...
3856  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3857  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3858  *
3859  *    WORKAROUND:
3860  *        Make sure we do not have ending address
3861  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3862  */
3863 static uint32_t
3864 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3865 {
3866         uint32_t safe_terminator;
3867
3868         /*
3869          * Since issue is sensitive to length and address.
3870          * Let us first check the address...
3871          */
3872         if (length <= 4) {
3873                 desc_array->descriptor[0].address = address;
3874                 desc_array->descriptor[0].length = length;
3875                 desc_array->elements = 1;
3876                 return (desc_array->elements);
3877         }
3878
3879         safe_terminator =
3880         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3881
3882         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3883         if (safe_terminator == 0 ||
3884             (safe_terminator > 4 && safe_terminator < 9) ||
3885             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3886                 desc_array->descriptor[0].address = address;
3887                 desc_array->descriptor[0].length = length;
3888                 desc_array->elements = 1;
3889                 return (desc_array->elements);
3890         }
3891
3892         desc_array->descriptor[0].address = address;
3893         desc_array->descriptor[0].length = length - 4;
3894         desc_array->descriptor[1].address = address + (length - 4);
3895         desc_array->descriptor[1].length = 4;
3896         desc_array->elements = 2;
3897         return (desc_array->elements);
3898 }
3899
3900 static void
3901 em_update_stats(struct adapter *adapter)
3902 {
3903         struct ifnet *ifp = &adapter->arpcom.ac_if;
3904
3905         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3906             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3907                 adapter->stats.symerrs +=
3908                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3909                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3910         }
3911         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3912         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3913         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3914         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3915
3916         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3917         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3918         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3919         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3920         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3921         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3922         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3923         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3924         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3925         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3926         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3927         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3928         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3929         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3930         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3931         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3932         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3933         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3934         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3935         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3936
3937         /* For the 64-bit byte counters the low dword must be read first. */
3938         /* Both registers clear on the read of the high dword */
3939
3940         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3941         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3942
3943         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3944         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3945         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3946         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3947         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3948
3949         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3950         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3951
3952         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3953         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3954         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3955         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3956         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3957         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3958         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3959         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3960         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3961         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3962
3963         if (adapter->hw.mac.type >= e1000_82543) {
3964                 adapter->stats.algnerrc +=
3965                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3966                 adapter->stats.rxerrc +=
3967                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3968                 adapter->stats.tncrs +=
3969                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3970                 adapter->stats.cexterr +=
3971                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3972                 adapter->stats.tsctc +=
3973                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3974                 adapter->stats.tsctfc +=
3975                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3976         }
3977
3978         IFNET_STAT_SET(ifp, collisions, adapter->stats.colc);
3979
3980         /* Rx Errors */
3981         IFNET_STAT_SET(ifp, ierrors,
3982             adapter->dropped_pkts + adapter->stats.rxerrc +
3983             adapter->stats.crcerrs + adapter->stats.algnerrc +
3984             adapter->stats.ruc + adapter->stats.roc +
3985             adapter->stats.mpc + adapter->stats.cexterr);
3986
3987         /* Tx Errors */
3988         IFNET_STAT_SET(ifp, oerrors,
3989             adapter->stats.ecol + adapter->stats.latecol +
3990             adapter->watchdog_events);
3991 }
3992
3993 static void
3994 em_print_debug_info(struct adapter *adapter)
3995 {
3996         device_t dev = adapter->dev;
3997         uint8_t *hw_addr = adapter->hw.hw_addr;
3998
3999         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
4000         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
4001             E1000_READ_REG(&adapter->hw, E1000_CTRL),
4002             E1000_READ_REG(&adapter->hw, E1000_RCTL));
4003         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
4004             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
4005             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
4006         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
4007             adapter->hw.fc.high_water,
4008             adapter->hw.fc.low_water);
4009         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
4010             E1000_READ_REG(&adapter->hw, E1000_TIDV),
4011             E1000_READ_REG(&adapter->hw, E1000_TADV));
4012         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
4013             E1000_READ_REG(&adapter->hw, E1000_RDTR),
4014             E1000_READ_REG(&adapter->hw, E1000_RADV));
4015         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
4016             (long long)adapter->tx_fifo_wrk_cnt,
4017             (long long)adapter->tx_fifo_reset_cnt);
4018         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
4019             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
4020             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
4021         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
4022             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
4023             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
4024         device_printf(dev, "Num Tx descriptors avail = %d\n",
4025             adapter->num_tx_desc_avail);
4026         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
4027             adapter->no_tx_desc_avail1);
4028         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
4029             adapter->no_tx_desc_avail2);
4030         device_printf(dev, "Std mbuf failed = %ld\n",
4031             adapter->mbuf_alloc_failed);
4032         device_printf(dev, "Std mbuf cluster failed = %ld\n",
4033             adapter->mbuf_cluster_failed);
4034         device_printf(dev, "Driver dropped packets = %ld\n",
4035             adapter->dropped_pkts);
4036         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
4037             adapter->no_tx_dma_setup);
4038 }
4039
4040 static void
4041 em_print_hw_stats(struct adapter *adapter)
4042 {
4043         device_t dev = adapter->dev;
4044
4045         device_printf(dev, "Excessive collisions = %lld\n",
4046             (long long)adapter->stats.ecol);
4047 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
4048         device_printf(dev, "Symbol errors = %lld\n",
4049             (long long)adapter->stats.symerrs);
4050 #endif
4051         device_printf(dev, "Sequence errors = %lld\n",
4052             (long long)adapter->stats.sec);
4053         device_printf(dev, "Defer count = %lld\n",
4054             (long long)adapter->stats.dc);
4055         device_printf(dev, "Missed Packets = %lld\n",
4056             (long long)adapter->stats.mpc);
4057         device_printf(dev, "Receive No Buffers = %lld\n",
4058             (long long)adapter->stats.rnbc);
4059         /* RLEC is inaccurate on some hardware, calculate our own. */
4060         device_printf(dev, "Receive Length Errors = %lld\n",
4061             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
4062         device_printf(dev, "Receive errors = %lld\n",
4063             (long long)adapter->stats.rxerrc);
4064         device_printf(dev, "Crc errors = %lld\n",
4065             (long long)adapter->stats.crcerrs);
4066         device_printf(dev, "Alignment errors = %lld\n",
4067             (long long)adapter->stats.algnerrc);
4068         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
4069             (long long)adapter->stats.cexterr);
4070         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
4071         device_printf(dev, "watchdog timeouts = %ld\n",
4072             adapter->watchdog_events);
4073         device_printf(dev, "XON Rcvd = %lld\n",
4074             (long long)adapter->stats.xonrxc);
4075         device_printf(dev, "XON Xmtd = %lld\n",
4076             (long long)adapter->stats.xontxc);
4077         device_printf(dev, "XOFF Rcvd = %lld\n",
4078             (long long)adapter->stats.xoffrxc);
4079         device_printf(dev, "XOFF Xmtd = %lld\n",
4080             (long long)adapter->stats.xofftxc);
4081         device_printf(dev, "Good Packets Rcvd = %lld\n",
4082             (long long)adapter->stats.gprc);
4083         device_printf(dev, "Good Packets Xmtd = %lld\n",
4084             (long long)adapter->stats.gptc);
4085 }
4086
4087 static void
4088 em_print_nvm_info(struct adapter *adapter)
4089 {
4090         uint16_t eeprom_data;
4091         int i, j, row = 0;
4092
4093         /* Its a bit crude, but it gets the job done */
4094         kprintf("\nInterface EEPROM Dump:\n");
4095         kprintf("Offset\n0x0000  ");
4096         for (i = 0, j = 0; i < 32; i++, j++) {
4097                 if (j == 8) { /* Make the offset block */
4098                         j = 0; ++row;
4099                         kprintf("\n0x00%x0  ",row);
4100                 }
4101                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
4102                 kprintf("%04x ", eeprom_data);
4103         }
4104         kprintf("\n");
4105 }
4106
4107 static int
4108 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
4109 {
4110         struct adapter *adapter;
4111         struct ifnet *ifp;
4112         int error, result;
4113
4114         result = -1;
4115         error = sysctl_handle_int(oidp, &result, 0, req);
4116         if (error || !req->newptr)
4117                 return (error);
4118
4119         adapter = (struct adapter *)arg1;
4120         ifp = &adapter->arpcom.ac_if;
4121
4122         lwkt_serialize_enter(ifp->if_serializer);
4123
4124         if (result == 1)
4125                 em_print_debug_info(adapter);
4126
4127         /*
4128          * This value will cause a hex dump of the
4129          * first 32 16-bit words of the EEPROM to
4130          * the screen.
4131          */
4132         if (result == 2)
4133                 em_print_nvm_info(adapter);
4134
4135         lwkt_serialize_exit(ifp->if_serializer);
4136
4137         return (error);
4138 }
4139
4140 static int
4141 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
4142 {
4143         int error, result;
4144
4145         result = -1;
4146         error = sysctl_handle_int(oidp, &result, 0, req);
4147         if (error || !req->newptr)
4148                 return (error);
4149
4150         if (result == 1) {
4151                 struct adapter *adapter = (struct adapter *)arg1;
4152                 struct ifnet *ifp = &adapter->arpcom.ac_if;
4153
4154                 lwkt_serialize_enter(ifp->if_serializer);
4155                 em_print_hw_stats(adapter);
4156                 lwkt_serialize_exit(ifp->if_serializer);
4157         }
4158         return (error);
4159 }
4160
4161 static void
4162 em_add_sysctl(struct adapter *adapter)
4163 {
4164         struct sysctl_ctx_list *ctx;
4165         struct sysctl_oid *tree;
4166
4167         ctx = device_get_sysctl_ctx(adapter->dev);
4168         tree = device_get_sysctl_tree(adapter->dev);
4169         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4170             OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4171             em_sysctl_debug_info, "I", "Debug Information");
4172
4173         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4174             OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4175             em_sysctl_stats, "I", "Statistics");
4176
4177         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4178             OID_AUTO, "rxd", CTLFLAG_RD,
4179             &adapter->num_rx_desc, 0, NULL);
4180         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4181             OID_AUTO, "txd", CTLFLAG_RD,
4182             &adapter->num_tx_desc, 0, NULL);
4183
4184         if (adapter->hw.mac.type >= e1000_82540) {
4185                 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4186                     OID_AUTO, "int_throttle_ceil",
4187                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4188                     em_sysctl_int_throttle, "I",
4189                     "interrupt throttling rate");
4190         }
4191         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4192             OID_AUTO, "int_tx_nsegs",
4193             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4194             em_sysctl_int_tx_nsegs, "I",
4195             "# segments per TX interrupt");
4196         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4197             OID_AUTO, "wreg_tx_nsegs", CTLFLAG_RW,
4198             &adapter->tx_wreg_nsegs, 0,
4199             "# segments before write to hardware register");
4200 }
4201
4202 static int
4203 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4204 {
4205         struct adapter *adapter = (void *)arg1;
4206         struct ifnet *ifp = &adapter->arpcom.ac_if;
4207         int error, throttle;
4208
4209         throttle = adapter->int_throttle_ceil;
4210         error = sysctl_handle_int(oidp, &throttle, 0, req);
4211         if (error || req->newptr == NULL)
4212                 return error;
4213         if (throttle < 0 || throttle > 1000000000 / 256)
4214                 return EINVAL;
4215
4216         if (throttle) {
4217                 /*
4218                  * Set the interrupt throttling rate in 256ns increments,
4219                  * recalculate sysctl value assignment to get exact frequency.
4220                  */
4221                 throttle = 1000000000 / 256 / throttle;
4222
4223                 /* Upper 16bits of ITR is reserved and should be zero */
4224                 if (throttle & 0xffff0000)
4225                         return EINVAL;
4226         }
4227
4228         lwkt_serialize_enter(ifp->if_serializer);
4229
4230         if (throttle)
4231                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4232         else
4233                 adapter->int_throttle_ceil = 0;
4234
4235         if (ifp->if_flags & IFF_RUNNING)
4236                 em_set_itr(adapter, throttle);
4237
4238         lwkt_serialize_exit(ifp->if_serializer);
4239
4240         if (bootverbose) {
4241                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4242                           adapter->int_throttle_ceil);
4243         }
4244         return 0;
4245 }
4246
4247 static int
4248 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4249 {
4250         struct adapter *adapter = (void *)arg1;
4251         struct ifnet *ifp = &adapter->arpcom.ac_if;
4252         int error, segs;
4253
4254         segs = adapter->tx_int_nsegs;
4255         error = sysctl_handle_int(oidp, &segs, 0, req);
4256         if (error || req->newptr == NULL)
4257                 return error;
4258         if (segs <= 0)
4259                 return EINVAL;
4260
4261         lwkt_serialize_enter(ifp->if_serializer);
4262
4263         /*
4264          * Don't allow int_tx_nsegs to become:
4265          * o  Less the oact_tx_desc
4266          * o  Too large that no TX desc will cause TX interrupt to
4267          *    be generated (OACTIVE will never recover)
4268          * o  Too small that will cause tx_dd[] overflow
4269          */
4270         if (segs < adapter->oact_tx_desc ||
4271             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4272             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4273                 error = EINVAL;
4274         } else {
4275                 error = 0;
4276                 adapter->tx_int_nsegs = segs;
4277         }
4278
4279         lwkt_serialize_exit(ifp->if_serializer);
4280
4281         return error;
4282 }
4283
4284 static void
4285 em_set_itr(struct adapter *adapter, uint32_t itr)
4286 {
4287         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4288         if (adapter->hw.mac.type == e1000_82574) {
4289                 int i;
4290
4291                 /*
4292                  * When using MSIX interrupts we need to
4293                  * throttle using the EITR register
4294                  */
4295                 for (i = 0; i < 4; ++i) {
4296                         E1000_WRITE_REG(&adapter->hw,
4297                             E1000_EITR_82574(i), itr);
4298                 }
4299         }
4300 }
4301
4302 static void
4303 em_disable_aspm(struct adapter *adapter)
4304 {
4305         uint16_t link_cap, link_ctrl, disable;
4306         uint8_t pcie_ptr, reg;
4307         device_t dev = adapter->dev;
4308
4309         switch (adapter->hw.mac.type) {
4310         case e1000_82571:
4311         case e1000_82572:
4312         case e1000_82573:
4313                 /*
4314                  * 82573 specification update
4315                  * errata #8 disable L0s
4316                  * errata #41 disable L1
4317                  *
4318                  * 82571/82572 specification update
4319                  # errata #13 disable L1
4320                  * errata #68 disable L0s
4321                  */
4322                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4323                 break;
4324
4325         case e1000_82574:
4326         case e1000_82583:
4327                 /*
4328                  * 82574 specification update errata #20
4329                  * 82583 specification update errata #9
4330                  *
4331                  * There is no need to disable L1
4332                  */
4333                 disable = PCIEM_LNKCTL_ASPM_L0S;
4334                 break;
4335
4336         default:
4337                 return;
4338         }
4339
4340         pcie_ptr = pci_get_pciecap_ptr(dev);
4341         if (pcie_ptr == 0)
4342                 return;
4343
4344         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4345         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4346                 return;
4347
4348         if (bootverbose) {
4349                 if_printf(&adapter->arpcom.ac_if,
4350                     "disable ASPM %#02x\n", disable);
4351         }
4352
4353         reg = pcie_ptr + PCIER_LINKCTRL;
4354         link_ctrl = pci_read_config(dev, reg, 2);
4355         link_ctrl &= ~disable;
4356         pci_write_config(dev, reg, link_ctrl, 2);
4357 }
4358
4359 static int
4360 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4361 {
4362         int iphlen, hoff, thoff, ex = 0;
4363         struct mbuf *m;
4364         struct ip *ip;
4365
4366         m = *mp;
4367         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4368
4369         iphlen = m->m_pkthdr.csum_iphlen;
4370         thoff = m->m_pkthdr.csum_thlen;
4371         hoff = m->m_pkthdr.csum_lhlen;
4372
4373         KASSERT(iphlen > 0, ("invalid ip hlen"));
4374         KASSERT(thoff > 0, ("invalid tcp hlen"));
4375         KASSERT(hoff > 0, ("invalid ether hlen"));
4376
4377         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4378                 ex = 4;
4379
4380         if (m->m_len < hoff + iphlen + thoff + ex) {
4381                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4382                 if (m == NULL) {
4383                         *mp = NULL;
4384                         return ENOBUFS;
4385                 }
4386                 *mp = m;
4387         }
4388         ip = mtodoff(m, struct ip *, hoff);
4389         ip->ip_len = 0;
4390
4391         return 0;
4392 }
4393
4394 static int
4395 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4396     uint32_t *txd_upper, uint32_t *txd_lower)
4397 {
4398         struct e1000_context_desc *TXD;
4399         int hoff, iphlen, thoff, hlen;
4400         int mss, pktlen, curr_txd;
4401
4402         iphlen = mp->m_pkthdr.csum_iphlen;
4403         thoff = mp->m_pkthdr.csum_thlen;
4404         hoff = mp->m_pkthdr.csum_lhlen;
4405         mss = mp->m_pkthdr.tso_segsz;
4406         pktlen = mp->m_pkthdr.len;
4407
4408         if (adapter->csum_flags == CSUM_TSO &&
4409             adapter->csum_iphlen == iphlen &&
4410             adapter->csum_lhlen == hoff &&
4411             adapter->csum_thlen == thoff &&
4412             adapter->csum_mss == mss &&
4413             adapter->csum_pktlen == pktlen) {
4414                 *txd_upper = adapter->csum_txd_upper;
4415                 *txd_lower = adapter->csum_txd_lower;
4416                 return 0;
4417         }
4418         hlen = hoff + iphlen + thoff;
4419
4420         /*
4421          * Setup a new TSO context.
4422          */
4423
4424         curr_txd = adapter->next_avail_tx_desc;
4425         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4426
4427         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4428                      E1000_TXD_DTYP_D |         /* Data descr type */
4429                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4430
4431         /* IP and/or TCP header checksum calculation and insertion. */
4432         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4433
4434         /*
4435          * Start offset for header checksum calculation.
4436          * End offset for header checksum calculation.
4437          * Offset of place put the checksum.
4438          */
4439         TXD->lower_setup.ip_fields.ipcss = hoff;
4440         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4441         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4442
4443         /*
4444          * Start offset for payload checksum calculation.
4445          * End offset for payload checksum calculation.
4446          * Offset of place to put the checksum.
4447          */
4448         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4449         TXD->upper_setup.tcp_fields.tucse = 0;
4450         TXD->upper_setup.tcp_fields.tucso =
4451             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4452
4453         /*
4454          * Payload size per packet w/o any headers.
4455          * Length of all headers up to payload.
4456          */
4457         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4458         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4459         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4460                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4461                                 E1000_TXD_CMD_TSE |     /* TSE context */
4462                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4463                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4464                                 (pktlen - hlen));       /* Total len */
4465
4466         /* Save the information for this TSO context */
4467         adapter->csum_flags = CSUM_TSO;
4468         adapter->csum_lhlen = hoff;
4469         adapter->csum_iphlen = iphlen;
4470         adapter->csum_thlen = thoff;
4471         adapter->csum_mss = mss;
4472         adapter->csum_pktlen = pktlen;
4473         adapter->csum_txd_upper = *txd_upper;
4474         adapter->csum_txd_lower = *txd_lower;
4475
4476         if (++curr_txd == adapter->num_tx_desc)
4477                 curr_txd = 0;
4478
4479         KKASSERT(adapter->num_tx_desc_avail > 0);
4480         adapter->num_tx_desc_avail--;
4481
4482         adapter->next_avail_tx_desc = curr_txd;
4483         return 1;
4484 }