2 * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>. All rights reserved.
4 * Copyright (c) 2001-2008, Intel Corporation
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived from
19 * this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
34 * Copyright (c) 2005 The DragonFly Project. All rights reserved.
36 * This code is derived from software contributed to The DragonFly Project
37 * by Matthew Dillon <dillon@backplane.com>
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
49 * 3. Neither the name of The DragonFly Project nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific, prior written permission.
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
56 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
57 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
58 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
59 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
61 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
62 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
63 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
66 * $DragonFly: src/sys/dev/netif/em/if_em.c,v 1.80 2008/09/17 08:51:29 sephe Exp $
69 * SERIALIZATION API RULES:
71 * - If the driver uses the same serializer for the interrupt as for the
72 * ifnet, most of the serialization will be done automatically for the
75 * - ifmedia entry points will be serialized by the ifmedia code using the
78 * - if_* entry points except for if_input will be serialized by the IF
79 * and protocol layers.
81 * - The device driver must be sure to serialize access from timeout code
82 * installed by the device driver.
84 * - The device driver typically holds the serializer at the time it wishes
87 * - We must call lwkt_serialize_handler_enable() prior to enabling the
88 * hardware interrupt and lwkt_serialize_handler_disable() after disabling
89 * the hardware interrupt in order to avoid handler execution races from
90 * scheduled interrupt threads.
92 * NOTE! Since callers into the device driver hold the ifnet serializer,
93 * the device driver may be holding a serializer at the time it calls
94 * if_input even if it is not serializer-aware.
97 #include "opt_polling.h"
98 #include "opt_serializer.h"
100 #include <sys/param.h>
102 #include <sys/endian.h>
103 #include <sys/interrupt.h>
104 #include <sys/kernel.h>
106 #include <sys/malloc.h>
107 #include <sys/mbuf.h>
108 #include <sys/proc.h>
109 #include <sys/rman.h>
110 #include <sys/serialize.h>
111 #include <sys/socket.h>
112 #include <sys/sockio.h>
113 #include <sys/sysctl.h>
114 #include <sys/systm.h>
117 #include <net/ethernet.h>
119 #include <net/if_arp.h>
120 #include <net/if_dl.h>
121 #include <net/if_media.h>
122 #include <net/ifq_var.h>
123 #include <net/vlan/if_vlan_var.h>
124 #include <net/vlan/if_vlan_ether.h>
126 #include <netinet/in_systm.h>
127 #include <netinet/in.h>
128 #include <netinet/ip.h>
129 #include <netinet/tcp.h>
130 #include <netinet/udp.h>
132 #include <bus/pci/pcivar.h>
133 #include <bus/pci/pcireg.h>
135 #include <dev/netif/ig_hal/e1000_api.h>
136 #include <dev/netif/ig_hal/e1000_82571.h>
137 #include <dev/netif/em/if_em.h>
139 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
140 #define EM_VER " 6.9.6"
142 #define EM_DEVICE(id) \
143 { EM_VENDOR_ID, E1000_DEV_ID_##id, EM_NAME #id EM_VER }
144 #define EM_DEVICE_NULL { 0, 0, NULL }
146 static const struct em_vendor_info em_vendor_info_array[] = {
148 EM_DEVICE(82540EM_LOM),
150 EM_DEVICE(82540EP_LOM),
151 EM_DEVICE(82540EP_LP),
155 EM_DEVICE(82541ER_LOM),
156 EM_DEVICE(82541EI_MOBILE),
158 EM_DEVICE(82541GI_LF),
159 EM_DEVICE(82541GI_MOBILE),
163 EM_DEVICE(82543GC_FIBER),
164 EM_DEVICE(82543GC_COPPER),
166 EM_DEVICE(82544EI_COPPER),
167 EM_DEVICE(82544EI_FIBER),
168 EM_DEVICE(82544GC_COPPER),
169 EM_DEVICE(82544GC_LOM),
171 EM_DEVICE(82545EM_COPPER),
172 EM_DEVICE(82545EM_FIBER),
173 EM_DEVICE(82545GM_COPPER),
174 EM_DEVICE(82545GM_FIBER),
175 EM_DEVICE(82545GM_SERDES),
177 EM_DEVICE(82546EB_COPPER),
178 EM_DEVICE(82546EB_FIBER),
179 EM_DEVICE(82546EB_QUAD_COPPER),
180 EM_DEVICE(82546GB_COPPER),
181 EM_DEVICE(82546GB_FIBER),
182 EM_DEVICE(82546GB_SERDES),
183 EM_DEVICE(82546GB_PCIE),
184 EM_DEVICE(82546GB_QUAD_COPPER),
185 EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
188 EM_DEVICE(82547EI_MOBILE),
191 EM_DEVICE(82571EB_COPPER),
192 EM_DEVICE(82571EB_FIBER),
193 EM_DEVICE(82571EB_SERDES),
194 EM_DEVICE(82571EB_SERDES_DUAL),
195 EM_DEVICE(82571EB_SERDES_QUAD),
196 EM_DEVICE(82571EB_QUAD_COPPER),
197 EM_DEVICE(82571EB_QUAD_COPPER_LP),
198 EM_DEVICE(82571EB_QUAD_FIBER),
199 EM_DEVICE(82571PT_QUAD_COPPER),
201 EM_DEVICE(82572EI_COPPER),
202 EM_DEVICE(82572EI_FIBER),
203 EM_DEVICE(82572EI_SERDES),
207 EM_DEVICE(82573E_IAMT),
210 EM_DEVICE(80003ES2LAN_COPPER_SPT),
211 EM_DEVICE(80003ES2LAN_SERDES_SPT),
212 EM_DEVICE(80003ES2LAN_COPPER_DPT),
213 EM_DEVICE(80003ES2LAN_SERDES_DPT),
215 EM_DEVICE(ICH8_IGP_M_AMT),
216 EM_DEVICE(ICH8_IGP_AMT),
217 EM_DEVICE(ICH8_IGP_C),
219 EM_DEVICE(ICH8_IFE_GT),
220 EM_DEVICE(ICH8_IFE_G),
221 EM_DEVICE(ICH8_IGP_M),
223 EM_DEVICE(ICH9_IGP_M_AMT),
224 EM_DEVICE(ICH9_IGP_AMT),
225 EM_DEVICE(ICH9_IGP_C),
226 EM_DEVICE(ICH9_IGP_M),
227 EM_DEVICE(ICH9_IGP_M_V),
229 EM_DEVICE(ICH9_IFE_GT),
230 EM_DEVICE(ICH9_IFE_G),
235 EM_DEVICE(ICH10_R_BM_LM),
236 EM_DEVICE(ICH10_R_BM_LF),
237 EM_DEVICE(ICH10_R_BM_V),
238 EM_DEVICE(ICH10_D_BM_LM),
239 EM_DEVICE(ICH10_D_BM_LF),
241 /* required last entry */
245 static int em_probe(device_t);
246 static int em_attach(device_t);
247 static int em_detach(device_t);
248 static int em_shutdown(device_t);
249 static int em_suspend(device_t);
250 static int em_resume(device_t);
252 static void em_init(void *);
253 static void em_stop(struct adapter *);
254 static int em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
255 static void em_start(struct ifnet *);
256 #ifdef DEVICE_POLLING
257 static void em_poll(struct ifnet *, enum poll_cmd, int);
259 static void em_watchdog(struct ifnet *);
260 static void em_media_status(struct ifnet *, struct ifmediareq *);
261 static int em_media_change(struct ifnet *);
262 static void em_timer(void *);
264 static void em_intr(void *);
265 static void em_rxeof(struct adapter *, int);
266 static void em_txeof(struct adapter *);
267 static void em_tx_collect(struct adapter *);
268 static void em_tx_purge(struct adapter *);
269 static void em_enable_intr(struct adapter *);
270 static void em_disable_intr(struct adapter *);
272 static int em_dma_malloc(struct adapter *, bus_size_t,
273 struct em_dma_alloc *);
274 static void em_dma_free(struct adapter *, struct em_dma_alloc *);
275 static void em_init_tx_ring(struct adapter *);
276 static int em_init_rx_ring(struct adapter *);
277 static int em_create_tx_ring(struct adapter *);
278 static int em_create_rx_ring(struct adapter *);
279 static void em_destroy_tx_ring(struct adapter *, int);
280 static void em_destroy_rx_ring(struct adapter *, int);
281 static int em_newbuf(struct adapter *, int, int);
282 static int em_encap(struct adapter *, struct mbuf **);
283 static void em_rxcsum(struct adapter *, struct e1000_rx_desc *,
285 static int em_txcsum_pullup(struct adapter *, struct mbuf **);
286 static int em_txcsum(struct adapter *, struct mbuf *,
287 uint32_t *, uint32_t *);
289 static int em_get_hw_info(struct adapter *);
290 static int em_is_valid_eaddr(const uint8_t *);
291 static int em_alloc_pci_res(struct adapter *);
292 static void em_free_pci_res(struct adapter *);
293 static int em_hw_init(struct adapter *);
294 static void em_setup_ifp(struct adapter *);
295 static void em_init_tx_unit(struct adapter *);
296 static void em_init_rx_unit(struct adapter *);
297 static void em_update_stats(struct adapter *);
298 static void em_set_promisc(struct adapter *);
299 static void em_disable_promisc(struct adapter *);
300 static void em_set_multi(struct adapter *);
301 static void em_update_link_status(struct adapter *);
302 static void em_smartspeed(struct adapter *);
304 /* Hardware workarounds */
305 static int em_82547_fifo_workaround(struct adapter *, int);
306 static void em_82547_update_fifo_head(struct adapter *, int);
307 static int em_82547_tx_fifo_reset(struct adapter *);
308 static void em_82547_move_tail(void *);
309 static void em_82547_move_tail_serialized(struct adapter *);
310 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
312 static void em_print_debug_info(struct adapter *);
313 static void em_print_nvm_info(struct adapter *);
314 static void em_print_hw_stats(struct adapter *);
316 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS);
317 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
318 static int em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
319 static int em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
320 static void em_add_sysctl(struct adapter *adapter);
322 /* Management and WOL Support */
323 static void em_get_mgmt(struct adapter *);
324 static void em_rel_mgmt(struct adapter *);
325 static void em_get_hw_control(struct adapter *);
326 static void em_rel_hw_control(struct adapter *);
327 static void em_enable_wol(device_t);
329 static device_method_t em_methods[] = {
330 /* Device interface */
331 DEVMETHOD(device_probe, em_probe),
332 DEVMETHOD(device_attach, em_attach),
333 DEVMETHOD(device_detach, em_detach),
334 DEVMETHOD(device_shutdown, em_shutdown),
335 DEVMETHOD(device_suspend, em_suspend),
336 DEVMETHOD(device_resume, em_resume),
340 static driver_t em_driver = {
343 sizeof(struct adapter),
346 static devclass_t em_devclass;
348 DECLARE_DUMMY_MODULE(if_em);
349 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
350 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, 0, 0);
355 static int em_int_throttle_ceil = EM_DEFAULT_ITR;
356 static int em_rxd = EM_DEFAULT_RXD;
357 static int em_txd = EM_DEFAULT_TXD;
358 static int em_smart_pwr_down = FALSE;
360 /* Controls whether promiscuous also shows bad packets */
361 static int em_debug_sbp = FALSE;
363 static int em_82573_workaround = TRUE;
365 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
366 TUNABLE_INT("hw.em.rxd", &em_rxd);
367 TUNABLE_INT("hw.em.txd", &em_txd);
368 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
369 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
370 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
372 /* Global used in WOL setup with multiport cards */
373 static int em_global_quad_port_a = 0;
375 /* Set this to one to display debug statistics */
376 static int em_display_debug_stats = 0;
378 #if !defined(KTR_IF_EM)
379 #define KTR_IF_EM KTR_ALL
381 KTR_INFO_MASTER(if_em);
382 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin", 0);
383 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end", 0);
384 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet", 0);
385 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet", 0);
386 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean", 0);
387 #define logif(name) KTR_LOG(if_em_ ## name)
390 em_probe(device_t dev)
392 const struct em_vendor_info *ent;
395 vid = pci_get_vendor(dev);
396 did = pci_get_device(dev);
398 for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
399 if (vid == ent->vendor_id && did == ent->device_id) {
400 device_set_desc(dev, ent->desc);
401 device_set_async_attach(dev, TRUE);
409 em_attach(device_t dev)
411 struct adapter *adapter = device_get_softc(dev);
412 struct ifnet *ifp = &adapter->arpcom.ac_if;
415 uint16_t eeprom_data, device_id;
417 adapter->dev = adapter->osdep.dev = dev;
419 callout_init(&adapter->timer);
420 callout_init(&adapter->tx_fifo_timer);
422 /* Determine hardware and mac info */
423 error = em_get_hw_info(adapter);
425 device_printf(dev, "Identify hardware failed\n");
429 /* Setup PCI resources */
430 error = em_alloc_pci_res(adapter);
432 device_printf(dev, "Allocation of PCI resources failed\n");
437 * For ICH8 and family we need to map the flash memory,
438 * and this must happen after the MAC is identified.
440 if (adapter->hw.mac.type == e1000_ich8lan ||
441 adapter->hw.mac.type == e1000_ich10lan ||
442 adapter->hw.mac.type == e1000_ich9lan) {
443 adapter->flash_rid = EM_BAR_FLASH;
445 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
446 &adapter->flash_rid, RF_ACTIVE);
447 if (adapter->flash == NULL) {
448 device_printf(dev, "Mapping of Flash failed\n");
452 adapter->osdep.flash_bus_space_tag =
453 rman_get_bustag(adapter->flash);
454 adapter->osdep.flash_bus_space_handle =
455 rman_get_bushandle(adapter->flash);
458 * This is used in the shared code
459 * XXX this goof is actually not used.
461 adapter->hw.flash_address = (uint8_t *)adapter->flash;
464 /* Do Shared Code initialization */
465 if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
466 device_printf(dev, "Setup of Shared code failed\n");
471 e1000_get_bus_info(&adapter->hw);
474 * Validate number of transmit and receive descriptors. It
475 * must not exceed hardware maximum, and must be multiple
476 * of E1000_DBA_ALIGN.
478 if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
479 (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
480 (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
481 em_txd < EM_MIN_TXD) {
482 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
483 EM_DEFAULT_TXD, em_txd);
484 adapter->num_tx_desc = EM_DEFAULT_TXD;
486 adapter->num_tx_desc = em_txd;
488 if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
489 (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
490 (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
491 em_rxd < EM_MIN_RXD) {
492 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
493 EM_DEFAULT_RXD, em_rxd);
494 adapter->num_rx_desc = EM_DEFAULT_RXD;
496 adapter->num_rx_desc = em_rxd;
499 adapter->hw.mac.autoneg = DO_AUTO_NEG;
500 adapter->hw.phy.autoneg_wait_to_complete = FALSE;
501 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
502 adapter->rx_buffer_len = MCLBYTES;
505 * Interrupt throttle rate
507 if (em_int_throttle_ceil == 0) {
508 adapter->int_throttle_ceil = 0;
510 int throttle = em_int_throttle_ceil;
513 throttle = EM_DEFAULT_ITR;
515 /* Recalculate the tunable value to get the exact frequency. */
516 throttle = 1000000000 / 256 / throttle;
518 /* Upper 16bits of ITR is reserved and should be zero */
519 if (throttle & 0xffff0000)
520 throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
522 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
525 e1000_init_script_state_82541(&adapter->hw, TRUE);
526 e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
529 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
530 adapter->hw.phy.mdix = AUTO_ALL_MODES;
531 adapter->hw.phy.disable_polarity_correction = FALSE;
532 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
535 /* Set the frame limits assuming standard ethernet sized frames. */
536 adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
537 adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
539 /* This controls when hardware reports transmit completion status. */
540 adapter->hw.mac.report_tx_early = 1;
543 * Create top level busdma tag
545 error = bus_dma_tag_create(NULL, 1, 0,
546 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
548 BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
549 0, &adapter->parent_dtag);
551 device_printf(dev, "could not create top level DMA tag\n");
556 * Allocate Transmit Descriptor ring
558 tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
560 error = em_dma_malloc(adapter, tsize, &adapter->txdma);
562 device_printf(dev, "Unable to allocate tx_desc memory\n");
565 adapter->tx_desc_base = adapter->txdma.dma_vaddr;
568 * Allocate Receive Descriptor ring
570 rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
572 error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
574 device_printf(dev, "Unable to allocate rx_desc memory\n");
577 adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
579 /* Make sure we have a good EEPROM before we read from it */
580 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
582 * Some PCI-E parts fail the first check due to
583 * the link being in sleep state, call it again,
584 * if it fails a second time its a real issue.
586 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
588 "The EEPROM Checksum Is Not Valid\n");
594 /* Initialize the hardware */
595 error = em_hw_init(adapter);
597 device_printf(dev, "Unable to initialize the hardware\n");
601 /* Copy the permanent MAC address out of the EEPROM */
602 if (e1000_read_mac_addr(&adapter->hw) < 0) {
603 device_printf(dev, "EEPROM read error while reading MAC"
608 if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
609 device_printf(dev, "Invalid MAC address\n");
614 /* Allocate transmit descriptors and buffers */
615 error = em_create_tx_ring(adapter);
617 device_printf(dev, "Could not setup transmit structures\n");
621 /* Allocate receive descriptors and buffers */
622 error = em_create_rx_ring(adapter);
624 device_printf(dev, "Could not setup receive structures\n");
628 /* Manually turn off all interrupts */
629 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
631 /* Setup OS specific network interface */
632 em_setup_ifp(adapter);
634 /* Add sysctl tree, must after em_setup_ifp() */
635 em_add_sysctl(adapter);
637 /* Initialize statistics */
638 em_update_stats(adapter);
640 adapter->hw.mac.get_link_status = 1;
641 em_update_link_status(adapter);
643 /* Indicate SOL/IDER usage */
644 if (e1000_check_reset_block(&adapter->hw)) {
646 "PHY reset is blocked due to SOL/IDER session.\n");
649 /* Determine if we have to control management hardware */
650 adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw);
655 switch (adapter->hw.mac.type) {
661 case e1000_82546_rev_3:
663 case e1000_80003es2lan:
664 if (adapter->hw.bus.func == 1) {
665 e1000_read_nvm(&adapter->hw,
666 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
668 e1000_read_nvm(&adapter->hw,
669 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
671 eeprom_data &= EM_EEPROM_APME;
675 /* APME bit in EEPROM is mapped to WUC.APME */
677 E1000_READ_REG(&adapter->hw, E1000_WUC) & E1000_WUC_APME;
681 adapter->wol = E1000_WUFC_MAG;
683 * We have the eeprom settings, now apply the special cases
684 * where the eeprom may be wrong or the board won't support
685 * wake on lan on a particular port
687 device_id = pci_get_device(dev);
689 case E1000_DEV_ID_82546GB_PCIE:
693 case E1000_DEV_ID_82546EB_FIBER:
694 case E1000_DEV_ID_82546GB_FIBER:
695 case E1000_DEV_ID_82571EB_FIBER:
697 * Wake events only supported on port A for dual fiber
698 * regardless of eeprom setting
700 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
705 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
706 case E1000_DEV_ID_82571EB_QUAD_COPPER:
707 case E1000_DEV_ID_82571EB_QUAD_FIBER:
708 case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
709 /* if quad port adapter, disable WoL on all but port A */
710 if (em_global_quad_port_a != 0)
712 /* Reset for multiple quad port adapters */
713 if (++em_global_quad_port_a == 4)
714 em_global_quad_port_a = 0;
718 /* XXX disable wol */
721 /* Do we need workaround for 82544 PCI-X adapter? */
722 if (adapter->hw.bus.type == e1000_bus_type_pcix &&
723 adapter->hw.mac.type == e1000_82544)
724 adapter->pcix_82544 = TRUE;
726 adapter->pcix_82544 = FALSE;
728 if (adapter->pcix_82544) {
730 * 82544 on PCI-X may split one TX segment
731 * into two TX descs, so we double its number
732 * of spare TX desc here.
734 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
736 adapter->spare_tx_desc = EM_TX_SPARE;
740 * Keep following relationship between spare_tx_desc, oact_tx_desc
742 * (spare_tx_desc + EM_TX_RESERVED) <=
743 * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
745 adapter->oact_tx_desc = adapter->num_tx_desc / 8;
746 if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
747 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
748 if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
749 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
751 adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
752 if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
753 adapter->tx_int_nsegs = adapter->oact_tx_desc;
755 error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
756 em_intr, adapter, &adapter->intr_tag,
759 device_printf(dev, "Failed to register interrupt handler");
760 ether_ifdetach(&adapter->arpcom.ac_if);
764 ifp->if_cpuid = ithread_cpuid(rman_get_start(adapter->intr_res));
765 KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus);
773 em_detach(device_t dev)
775 struct adapter *adapter = device_get_softc(dev);
777 if (device_is_attached(dev)) {
778 struct ifnet *ifp = &adapter->arpcom.ac_if;
780 lwkt_serialize_enter(ifp->if_serializer);
782 adapter->in_detach = 1;
785 e1000_phy_hw_reset(&adapter->hw);
787 em_rel_mgmt(adapter);
789 if ((adapter->hw.mac.type == e1000_82573 ||
790 adapter->hw.mac.type == e1000_ich8lan ||
791 adapter->hw.mac.type == e1000_ich10lan ||
792 adapter->hw.mac.type == e1000_ich9lan) &&
793 e1000_check_mng_mode(&adapter->hw))
794 em_rel_hw_control(adapter);
797 E1000_WRITE_REG(&adapter->hw, E1000_WUC,
799 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
803 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
805 lwkt_serialize_exit(ifp->if_serializer);
809 bus_generic_detach(dev);
811 em_free_pci_res(adapter);
813 em_destroy_tx_ring(adapter, adapter->num_tx_desc);
814 em_destroy_rx_ring(adapter, adapter->num_rx_desc);
816 /* Free Transmit Descriptor ring */
817 if (adapter->tx_desc_base)
818 em_dma_free(adapter, &adapter->txdma);
820 /* Free Receive Descriptor ring */
821 if (adapter->rx_desc_base)
822 em_dma_free(adapter, &adapter->rxdma);
824 /* Free top level busdma tag */
825 if (adapter->parent_dtag != NULL)
826 bus_dma_tag_destroy(adapter->parent_dtag);
828 /* Free sysctl tree */
829 if (adapter->sysctl_tree != NULL)
830 sysctl_ctx_free(&adapter->sysctl_ctx);
836 em_shutdown(device_t dev)
838 return em_suspend(dev);
842 em_suspend(device_t dev)
844 struct adapter *adapter = device_get_softc(dev);
845 struct ifnet *ifp = &adapter->arpcom.ac_if;
847 lwkt_serialize_enter(ifp->if_serializer);
851 em_rel_mgmt(adapter);
853 if ((adapter->hw.mac.type == e1000_82573 ||
854 adapter->hw.mac.type == e1000_ich8lan ||
855 adapter->hw.mac.type == e1000_ich10lan ||
856 adapter->hw.mac.type == e1000_ich9lan) &&
857 e1000_check_mng_mode(&adapter->hw))
858 em_rel_hw_control(adapter);
861 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
862 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
866 lwkt_serialize_exit(ifp->if_serializer);
868 return bus_generic_suspend(dev);
872 em_resume(device_t dev)
874 struct adapter *adapter = device_get_softc(dev);
875 struct ifnet *ifp = &adapter->arpcom.ac_if;
877 lwkt_serialize_enter(ifp->if_serializer);
880 em_get_mgmt(adapter);
883 lwkt_serialize_exit(ifp->if_serializer);
885 return bus_generic_resume(dev);
889 em_start(struct ifnet *ifp)
891 struct adapter *adapter = ifp->if_softc;
894 ASSERT_SERIALIZED(ifp->if_serializer);
896 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
899 if (!adapter->link_active) {
900 ifq_purge(&ifp->if_snd);
904 while (!ifq_is_empty(&ifp->if_snd)) {
905 /* Now do we at least have a minimal? */
906 if (EM_IS_OACTIVE(adapter)) {
907 em_tx_collect(adapter);
908 if (EM_IS_OACTIVE(adapter)) {
909 ifp->if_flags |= IFF_OACTIVE;
910 adapter->no_tx_desc_avail1++;
916 m_head = ifq_dequeue(&ifp->if_snd, NULL);
920 if (em_encap(adapter, &m_head)) {
922 em_tx_collect(adapter);
926 /* Send a copy of the frame to the BPF listener */
927 ETHER_BPF_MTAP(ifp, m_head);
929 /* Set timeout in case hardware has problems transmitting. */
930 ifp->if_timer = EM_TX_TIMEOUT;
935 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
937 struct adapter *adapter = ifp->if_softc;
938 struct ifreq *ifr = (struct ifreq *)data;
939 uint16_t eeprom_data = 0;
940 int max_frame_size, mask, reinit;
943 if (adapter->in_detach)
946 ASSERT_SERIALIZED(ifp->if_serializer);
950 switch (adapter->hw.mac.type) {
953 * 82573 only supports jumbo frames
954 * if ASPM is disabled.
956 e1000_read_nvm(&adapter->hw,
957 NVM_INIT_3GIO_3, 1, &eeprom_data);
958 if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
959 max_frame_size = ETHER_MAX_LEN;
964 /* Limit Jumbo Frame size */
970 case e1000_80003es2lan:
971 max_frame_size = 9234;
974 /* Adapters that do not support jumbo frames */
977 max_frame_size = ETHER_MAX_LEN;
981 max_frame_size = MAX_JUMBO_FRAME_SIZE;
984 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
990 ifp->if_mtu = ifr->ifr_mtu;
991 adapter->max_frame_size =
992 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
994 if (ifp->if_flags & IFF_RUNNING)
999 if (ifp->if_flags & IFF_UP) {
1000 if ((ifp->if_flags & IFF_RUNNING)) {
1001 if ((ifp->if_flags ^ adapter->if_flags) &
1002 (IFF_PROMISC | IFF_ALLMULTI)) {
1003 em_disable_promisc(adapter);
1004 em_set_promisc(adapter);
1009 } else if (ifp->if_flags & IFF_RUNNING) {
1012 adapter->if_flags = ifp->if_flags;
1017 if (ifp->if_flags & IFF_RUNNING) {
1018 em_disable_intr(adapter);
1019 em_set_multi(adapter);
1020 if (adapter->hw.mac.type == e1000_82542 &&
1021 adapter->hw.revision_id == E1000_REVISION_2)
1022 em_init_rx_unit(adapter);
1023 #ifdef DEVICE_POLLING
1024 if (!(ifp->if_flags & IFF_POLLING))
1026 em_enable_intr(adapter);
1031 /* Check SOL/IDER usage */
1032 if (e1000_check_reset_block(&adapter->hw)) {
1033 device_printf(adapter->dev, "Media change is"
1034 " blocked due to SOL/IDER session.\n");
1040 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1045 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1046 if (mask & IFCAP_HWCSUM) {
1047 ifp->if_capenable ^= (mask & IFCAP_HWCSUM);
1050 if (mask & IFCAP_VLAN_HWTAGGING) {
1051 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1054 if (reinit && (ifp->if_flags & IFF_RUNNING))
1059 error = ether_ioctl(ifp, command, data);
1066 em_watchdog(struct ifnet *ifp)
1068 struct adapter *adapter = ifp->if_softc;
1070 ASSERT_SERIALIZED(ifp->if_serializer);
1073 * The timer is set to 5 every time start queues a packet.
1074 * Then txeof keeps resetting it as long as it cleans at
1075 * least one descriptor.
1076 * Finally, anytime all descriptors are clean the timer is
1080 if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1081 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1083 * If we reach here, all TX jobs are completed and
1084 * the TX engine should have been idled for some time.
1085 * We don't need to call if_devstart() here.
1087 ifp->if_flags &= ~IFF_OACTIVE;
1093 * If we are in this routine because of pause frames, then
1094 * don't reset the hardware.
1096 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1097 E1000_STATUS_TXOFF) {
1098 ifp->if_timer = EM_TX_TIMEOUT;
1102 if (e1000_check_for_link(&adapter->hw) == 0)
1103 if_printf(ifp, "watchdog timeout -- resetting\n");
1106 adapter->watchdog_events++;
1110 if (!ifq_is_empty(&ifp->if_snd))
1117 struct adapter *adapter = xsc;
1118 struct ifnet *ifp = &adapter->arpcom.ac_if;
1119 device_t dev = adapter->dev;
1122 ASSERT_SERIALIZED(ifp->if_serializer);
1127 * Packet Buffer Allocation (PBA)
1128 * Writing PBA sets the receive portion of the buffer
1129 * the remainder is used for the transmit buffer.
1131 * Devices before the 82547 had a Packet Buffer of 64K.
1132 * Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1133 * After the 82547 the buffer was reduced to 40K.
1134 * Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1135 * Note: default does not leave enough room for Jumbo Frame >10k.
1137 switch (adapter->hw.mac.type) {
1139 case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1140 if (adapter->max_frame_size > 8192)
1141 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1143 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1144 adapter->tx_fifo_head = 0;
1145 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1146 adapter->tx_fifo_size =
1147 (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1150 /* Total Packet Buffer on these is 48K */
1153 case e1000_80003es2lan:
1154 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1157 case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1158 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1162 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1166 case e1000_ich10lan:
1167 #define E1000_PBA_10K 0x000A
1168 pba = E1000_PBA_10K;
1176 /* Devices before 82547 had a Packet Buffer of 64K. */
1177 if (adapter->max_frame_size > 8192)
1178 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1180 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1183 E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1185 /* Get the latest mac address, User can use a LAA */
1186 bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1188 /* Put the address into the Receive Address Array */
1189 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1192 * With the 82571 adapter, RAR[0] may be overwritten
1193 * when the other port is reset, we make a duplicate
1194 * in RAR[14] for that eventuality, this assures
1195 * the interface continues to function.
1197 if (adapter->hw.mac.type == e1000_82571) {
1198 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1199 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1200 E1000_RAR_ENTRIES - 1);
1203 /* Initialize the hardware */
1204 if (em_hw_init(adapter)) {
1205 device_printf(dev, "Unable to initialize the hardware\n");
1206 /* XXX em_stop()? */
1209 em_update_link_status(adapter);
1211 /* Setup VLAN support, basic and offload if available */
1212 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1214 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1217 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1218 ctrl |= E1000_CTRL_VME;
1219 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1222 /* Set hardware offload abilities */
1223 if (ifp->if_capenable & IFCAP_TXCSUM)
1224 ifp->if_hwassist = EM_CSUM_FEATURES;
1226 ifp->if_hwassist = 0;
1228 /* Configure for OS presence */
1229 em_get_mgmt(adapter);
1231 /* Prepare transmit descriptors and buffers */
1232 em_init_tx_ring(adapter);
1233 em_init_tx_unit(adapter);
1235 /* Setup Multicast table */
1236 em_set_multi(adapter);
1238 /* Prepare receive descriptors and buffers */
1239 if (em_init_rx_ring(adapter)) {
1240 device_printf(dev, "Could not setup receive structures\n");
1244 em_init_rx_unit(adapter);
1246 /* Don't lose promiscuous settings */
1247 em_set_promisc(adapter);
1249 ifp->if_flags |= IFF_RUNNING;
1250 ifp->if_flags &= ~IFF_OACTIVE;
1252 callout_reset(&adapter->timer, hz, em_timer, adapter);
1253 e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1255 /* MSI/X configuration for 82574 */
1256 if (adapter->hw.mac.type == e1000_82574) {
1259 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1260 tmp |= E1000_CTRL_EXT_PBA_CLR;
1261 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1263 * Set the IVAR - interrupt vector routing.
1264 * Each nibble represents a vector, high bit
1265 * is enable, other 3 bits are the MSIX table
1266 * entry, we map RXQ0 to 0, TXQ0 to 1, and
1267 * Link (other) to 2, hence the magic number.
1269 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1272 #ifdef DEVICE_POLLING
1274 * Only enable interrupts if we are not polling, make sure
1275 * they are off otherwise.
1277 if (ifp->if_flags & IFF_POLLING)
1278 em_disable_intr(adapter);
1280 #endif /* DEVICE_POLLING */
1281 em_enable_intr(adapter);
1283 /* Don't reset the phy next time init gets called */
1284 adapter->hw.phy.reset_disable = TRUE;
1287 #ifdef DEVICE_POLLING
1290 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1292 struct adapter *adapter = ifp->if_softc;
1295 ASSERT_SERIALIZED(ifp->if_serializer);
1299 em_disable_intr(adapter);
1302 case POLL_DEREGISTER:
1303 em_enable_intr(adapter);
1306 case POLL_AND_CHECK_STATUS:
1307 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1308 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1309 callout_stop(&adapter->timer);
1310 adapter->hw.mac.get_link_status = 1;
1311 em_update_link_status(adapter);
1312 callout_reset(&adapter->timer, hz, em_timer, adapter);
1316 if (ifp->if_flags & IFF_RUNNING) {
1317 em_rxeof(adapter, count);
1320 if (!ifq_is_empty(&ifp->if_snd))
1327 #endif /* DEVICE_POLLING */
1332 struct adapter *adapter = xsc;
1333 struct ifnet *ifp = &adapter->arpcom.ac_if;
1337 ASSERT_SERIALIZED(ifp->if_serializer);
1339 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1341 if ((adapter->hw.mac.type >= e1000_82571 &&
1342 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1349 * XXX: some laptops trigger several spurious interrupts
1350 * on em(4) when in the resume cycle. The ICR register
1351 * reports all-ones value in this case. Processing such
1352 * interrupts would lead to a freeze. I don't know why.
1354 if (reg_icr == 0xffffffff) {
1359 if (ifp->if_flags & IFF_RUNNING) {
1361 (E1000_IMS_RXT0 | E1000_IMS_RXDMT0 | E1000_ICR_RXO))
1362 em_rxeof(adapter, -1);
1363 if (reg_icr & E1000_IMS_TXDW) {
1365 if (!ifq_is_empty(&ifp->if_snd))
1370 /* Link status change */
1371 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1372 callout_stop(&adapter->timer);
1373 adapter->hw.mac.get_link_status = 1;
1374 em_update_link_status(adapter);
1376 /* Deal with TX cruft when link lost */
1377 em_tx_purge(adapter);
1379 callout_reset(&adapter->timer, hz, em_timer, adapter);
1382 if (reg_icr & E1000_ICR_RXO)
1383 adapter->rx_overruns++;
1389 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1391 struct adapter *adapter = ifp->if_softc;
1392 u_char fiber_type = IFM_1000_SX;
1394 ASSERT_SERIALIZED(ifp->if_serializer);
1396 em_update_link_status(adapter);
1398 ifmr->ifm_status = IFM_AVALID;
1399 ifmr->ifm_active = IFM_ETHER;
1401 if (!adapter->link_active)
1404 ifmr->ifm_status |= IFM_ACTIVE;
1406 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1407 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1408 if (adapter->hw.mac.type == e1000_82545)
1409 fiber_type = IFM_1000_LX;
1410 ifmr->ifm_active |= fiber_type | IFM_FDX;
1412 switch (adapter->link_speed) {
1414 ifmr->ifm_active |= IFM_10_T;
1417 ifmr->ifm_active |= IFM_100_TX;
1421 ifmr->ifm_active |= IFM_1000_T;
1424 if (adapter->link_duplex == FULL_DUPLEX)
1425 ifmr->ifm_active |= IFM_FDX;
1427 ifmr->ifm_active |= IFM_HDX;
1432 em_media_change(struct ifnet *ifp)
1434 struct adapter *adapter = ifp->if_softc;
1435 struct ifmedia *ifm = &adapter->media;
1437 ASSERT_SERIALIZED(ifp->if_serializer);
1439 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1442 switch (IFM_SUBTYPE(ifm->ifm_media)) {
1444 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1445 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1451 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1452 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1456 adapter->hw.mac.autoneg = FALSE;
1457 adapter->hw.phy.autoneg_advertised = 0;
1458 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1459 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1461 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1465 adapter->hw.mac.autoneg = FALSE;
1466 adapter->hw.phy.autoneg_advertised = 0;
1467 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1468 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1470 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1474 if_printf(ifp, "Unsupported media type\n");
1479 * As the speed/duplex settings my have changed we need to
1482 adapter->hw.phy.reset_disable = FALSE;
1490 em_encap(struct adapter *adapter, struct mbuf **m_headp)
1492 bus_dma_segment_t segs[EM_MAX_SCATTER];
1494 struct em_buffer *tx_buffer, *tx_buffer_mapped;
1495 struct e1000_tx_desc *ctxd = NULL;
1496 struct mbuf *m_head = *m_headp;
1497 uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1498 int maxsegs, nsegs, i, j, first, last = 0, error;
1500 if (__predict_false(m_head->m_len < EM_TXCSUM_MINHL) &&
1501 (m_head->m_flags & EM_CSUM_FEATURES)) {
1503 * Make sure that ethernet header and ip.ip_hl are in
1504 * contiguous memory, since if TXCSUM is enabled, later
1505 * TX context descriptor's setup need to access ip.ip_hl.
1507 error = em_txcsum_pullup(adapter, m_headp);
1509 KKASSERT(*m_headp == NULL);
1515 txd_upper = txd_lower = 0;
1519 * Capture the first descriptor index, this descriptor
1520 * will have the index of the EOP which is the only one
1521 * that now gets a DONE bit writeback.
1523 first = adapter->next_avail_tx_desc;
1524 tx_buffer = &adapter->tx_buffer_area[first];
1525 tx_buffer_mapped = tx_buffer;
1526 map = tx_buffer->map;
1528 maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1529 KASSERT(maxsegs >= adapter->spare_tx_desc,
1530 ("not enough spare TX desc\n"));
1531 if (adapter->pcix_82544) {
1532 /* Half it; see the comment in em_attach() */
1535 if (maxsegs > EM_MAX_SCATTER)
1536 maxsegs = EM_MAX_SCATTER;
1538 error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1539 segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1541 if (error == ENOBUFS)
1542 adapter->mbuf_alloc_failed++;
1544 adapter->no_tx_dma_setup++;
1550 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1553 adapter->tx_nsegs += nsegs;
1555 if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1556 /* TX csum offloading will consume one TX desc */
1557 adapter->tx_nsegs += em_txcsum(adapter, m_head,
1558 &txd_upper, &txd_lower);
1560 i = adapter->next_avail_tx_desc;
1562 /* Set up our transmit descriptors */
1563 for (j = 0; j < nsegs; j++) {
1564 /* If adapter is 82544 and on PCIX bus */
1565 if(adapter->pcix_82544) {
1566 DESC_ARRAY desc_array;
1567 uint32_t array_elements, counter;
1570 * Check the Address and Length combination and
1571 * split the data accordingly
1573 array_elements = em_82544_fill_desc(segs[j].ds_addr,
1574 segs[j].ds_len, &desc_array);
1575 for (counter = 0; counter < array_elements; counter++) {
1576 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1578 tx_buffer = &adapter->tx_buffer_area[i];
1579 ctxd = &adapter->tx_desc_base[i];
1581 ctxd->buffer_addr = htole64(
1582 desc_array.descriptor[counter].address);
1583 ctxd->lower.data = htole32(
1584 E1000_TXD_CMD_IFCS | txd_lower |
1585 desc_array.descriptor[counter].length);
1586 ctxd->upper.data = htole32(txd_upper);
1589 if (++i == adapter->num_tx_desc)
1592 tx_buffer->m_head = NULL;
1596 tx_buffer = &adapter->tx_buffer_area[i];
1597 ctxd = &adapter->tx_desc_base[i];
1599 ctxd->buffer_addr = htole64(segs[j].ds_addr);
1600 ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1601 txd_lower | segs[j].ds_len);
1602 ctxd->upper.data = htole32(txd_upper);
1605 if (++i == adapter->num_tx_desc)
1608 tx_buffer->m_head = NULL;
1612 adapter->next_avail_tx_desc = i;
1613 if (adapter->pcix_82544) {
1614 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1615 adapter->num_tx_desc_avail -= txd_used;
1617 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1618 adapter->num_tx_desc_avail -= nsegs;
1621 /* Handle VLAN tag */
1622 if (m_head->m_flags & M_VLANTAG) {
1623 /* Set the vlan id. */
1624 ctxd->upper.fields.special =
1625 htole16(m_head->m_pkthdr.ether_vlantag);
1627 /* Tell hardware to add tag */
1628 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1631 tx_buffer->m_head = m_head;
1632 tx_buffer_mapped->map = tx_buffer->map;
1633 tx_buffer->map = map;
1635 if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1636 adapter->tx_nsegs = 0;
1637 cmd = E1000_TXD_CMD_RS;
1639 adapter->tx_dd[adapter->tx_dd_tail] = last;
1640 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1641 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1645 * Last Descriptor of Packet needs End Of Packet (EOP)
1646 * and Report Status (RS)
1648 ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1651 * Keep track in the first buffer which descriptor will be
1654 tx_buffer = &adapter->tx_buffer_area[first];
1657 * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1658 * that this frame is available to transmit.
1660 if (adapter->hw.mac.type == e1000_82547 &&
1661 adapter->link_duplex == HALF_DUPLEX) {
1662 em_82547_move_tail_serialized(adapter);
1664 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1665 if (adapter->hw.mac.type == e1000_82547) {
1666 em_82547_update_fifo_head(adapter,
1667 m_head->m_pkthdr.len);
1674 * 82547 workaround to avoid controller hang in half-duplex environment.
1675 * The workaround is to avoid queuing a large packet that would span
1676 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers
1677 * in this case. We do that only when FIFO is quiescent.
1680 em_82547_move_tail_serialized(struct adapter *adapter)
1682 struct e1000_tx_desc *tx_desc;
1683 uint16_t hw_tdt, sw_tdt, length = 0;
1686 ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1688 hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1689 sw_tdt = adapter->next_avail_tx_desc;
1691 while (hw_tdt != sw_tdt) {
1692 tx_desc = &adapter->tx_desc_base[hw_tdt];
1693 length += tx_desc->lower.flags.length;
1694 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1695 if (++hw_tdt == adapter->num_tx_desc)
1699 if (em_82547_fifo_workaround(adapter, length)) {
1700 adapter->tx_fifo_wrk_cnt++;
1701 callout_reset(&adapter->tx_fifo_timer, 1,
1702 em_82547_move_tail, adapter);
1705 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1706 em_82547_update_fifo_head(adapter, length);
1713 em_82547_move_tail(void *xsc)
1715 struct adapter *adapter = xsc;
1716 struct ifnet *ifp = &adapter->arpcom.ac_if;
1718 lwkt_serialize_enter(ifp->if_serializer);
1719 em_82547_move_tail_serialized(adapter);
1720 lwkt_serialize_exit(ifp->if_serializer);
1724 em_82547_fifo_workaround(struct adapter *adapter, int len)
1726 int fifo_space, fifo_pkt_len;
1728 fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1730 if (adapter->link_duplex == HALF_DUPLEX) {
1731 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1733 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1734 if (em_82547_tx_fifo_reset(adapter))
1744 em_82547_update_fifo_head(struct adapter *adapter, int len)
1746 int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1748 /* tx_fifo_head is always 16 byte aligned */
1749 adapter->tx_fifo_head += fifo_pkt_len;
1750 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1751 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1755 em_82547_tx_fifo_reset(struct adapter *adapter)
1759 if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1760 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1761 (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1762 E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1763 (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1764 E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1765 (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1766 /* Disable TX unit */
1767 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1768 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1769 tctl & ~E1000_TCTL_EN);
1771 /* Reset FIFO pointers */
1772 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1773 adapter->tx_head_addr);
1774 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1775 adapter->tx_head_addr);
1776 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1777 adapter->tx_head_addr);
1778 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1779 adapter->tx_head_addr);
1781 /* Re-enable TX unit */
1782 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1783 E1000_WRITE_FLUSH(&adapter->hw);
1785 adapter->tx_fifo_head = 0;
1786 adapter->tx_fifo_reset_cnt++;
1795 em_set_promisc(struct adapter *adapter)
1797 struct ifnet *ifp = &adapter->arpcom.ac_if;
1800 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1802 if (ifp->if_flags & IFF_PROMISC) {
1803 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1804 /* Turn this on if you want to see bad packets */
1806 reg_rctl |= E1000_RCTL_SBP;
1807 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1808 } else if (ifp->if_flags & IFF_ALLMULTI) {
1809 reg_rctl |= E1000_RCTL_MPE;
1810 reg_rctl &= ~E1000_RCTL_UPE;
1811 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1816 em_disable_promisc(struct adapter *adapter)
1820 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1822 reg_rctl &= ~E1000_RCTL_UPE;
1823 reg_rctl &= ~E1000_RCTL_MPE;
1824 reg_rctl &= ~E1000_RCTL_SBP;
1825 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1829 em_set_multi(struct adapter *adapter)
1831 struct ifnet *ifp = &adapter->arpcom.ac_if;
1832 struct ifmultiaddr *ifma;
1833 uint32_t reg_rctl = 0;
1834 uint8_t mta[512]; /* Largest MTS is 4096 bits */
1837 if (adapter->hw.mac.type == e1000_82542 &&
1838 adapter->hw.revision_id == E1000_REVISION_2) {
1839 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1840 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1841 e1000_pci_clear_mwi(&adapter->hw);
1842 reg_rctl |= E1000_RCTL_RST;
1843 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1847 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1848 if (ifma->ifma_addr->sa_family != AF_LINK)
1851 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1854 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1855 &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1859 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1860 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1861 reg_rctl |= E1000_RCTL_MPE;
1862 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1864 e1000_update_mc_addr_list(&adapter->hw, mta,
1865 mcnt, 1, adapter->hw.mac.rar_entry_count);
1868 if (adapter->hw.mac.type == e1000_82542 &&
1869 adapter->hw.revision_id == E1000_REVISION_2) {
1870 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1871 reg_rctl &= ~E1000_RCTL_RST;
1872 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1874 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1875 e1000_pci_set_mwi(&adapter->hw);
1880 * This routine checks for link status and updates statistics.
1885 struct adapter *adapter = xsc;
1886 struct ifnet *ifp = &adapter->arpcom.ac_if;
1888 lwkt_serialize_enter(ifp->if_serializer);
1890 em_update_link_status(adapter);
1891 em_update_stats(adapter);
1893 /* Reset LAA into RAR[0] on 82571 */
1894 if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
1895 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1897 if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
1898 em_print_hw_stats(adapter);
1900 em_smartspeed(adapter);
1902 callout_reset(&adapter->timer, hz, em_timer, adapter);
1904 lwkt_serialize_exit(ifp->if_serializer);
1908 em_update_link_status(struct adapter *adapter)
1910 struct e1000_hw *hw = &adapter->hw;
1911 struct ifnet *ifp = &adapter->arpcom.ac_if;
1912 device_t dev = adapter->dev;
1913 uint32_t link_check = 0;
1915 /* Get the cached link value or read phy for real */
1916 switch (hw->phy.media_type) {
1917 case e1000_media_type_copper:
1918 if (hw->mac.get_link_status) {
1919 /* Do the work to read phy */
1920 e1000_check_for_link(hw);
1921 link_check = !hw->mac.get_link_status;
1922 if (link_check) /* ESB2 fix */
1923 e1000_cfg_on_link_up(hw);
1929 case e1000_media_type_fiber:
1930 e1000_check_for_link(hw);
1932 E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
1935 case e1000_media_type_internal_serdes:
1936 e1000_check_for_link(hw);
1937 link_check = adapter->hw.mac.serdes_has_link;
1940 case e1000_media_type_unknown:
1945 /* Now check for a transition */
1946 if (link_check && adapter->link_active == 0) {
1947 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
1948 &adapter->link_duplex);
1951 * Check if we should enable/disable SPEED_MODE bit on
1954 if (hw->mac.type == e1000_82571 ||
1955 hw->mac.type == e1000_82572) {
1958 tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
1959 if (adapter->link_speed != SPEED_1000)
1960 tarc0 &= ~SPEED_MODE_BIT;
1962 tarc0 |= SPEED_MODE_BIT;
1963 E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
1966 device_printf(dev, "Link is up %d Mbps %s\n",
1967 adapter->link_speed,
1968 ((adapter->link_duplex == FULL_DUPLEX) ?
1969 "Full Duplex" : "Half Duplex"));
1971 adapter->link_active = 1;
1972 adapter->smartspeed = 0;
1973 ifp->if_baudrate = adapter->link_speed * 1000000;
1974 ifp->if_link_state = LINK_STATE_UP;
1975 if_link_state_change(ifp);
1976 } else if (!link_check && adapter->link_active == 1) {
1977 ifp->if_baudrate = adapter->link_speed = 0;
1978 adapter->link_duplex = 0;
1980 device_printf(dev, "Link is Down\n");
1981 adapter->link_active = 0;
1983 /* Link down, disable watchdog */
1986 ifp->if_link_state = LINK_STATE_DOWN;
1987 if_link_state_change(ifp);
1992 em_stop(struct adapter *adapter)
1994 struct ifnet *ifp = &adapter->arpcom.ac_if;
1997 ASSERT_SERIALIZED(ifp->if_serializer);
1999 em_disable_intr(adapter);
2001 callout_stop(&adapter->timer);
2002 callout_stop(&adapter->tx_fifo_timer);
2004 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2007 e1000_reset_hw(&adapter->hw);
2008 if (adapter->hw.mac.type >= e1000_82544)
2009 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2011 for (i = 0; i < adapter->num_tx_desc; i++) {
2012 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2014 if (tx_buffer->m_head != NULL) {
2015 bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2016 m_freem(tx_buffer->m_head);
2017 tx_buffer->m_head = NULL;
2021 for (i = 0; i < adapter->num_rx_desc; i++) {
2022 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2024 if (rx_buffer->m_head != NULL) {
2025 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2026 m_freem(rx_buffer->m_head);
2027 rx_buffer->m_head = NULL;
2031 if (adapter->fmp != NULL)
2032 m_freem(adapter->fmp);
2033 adapter->fmp = NULL;
2034 adapter->lmp = NULL;
2036 adapter->csum_flags = 0;
2037 adapter->csum_ehlen = 0;
2038 adapter->csum_iphlen = 0;
2040 adapter->tx_dd_head = 0;
2041 adapter->tx_dd_tail = 0;
2042 adapter->tx_nsegs = 0;
2046 em_get_hw_info(struct adapter *adapter)
2048 device_t dev = adapter->dev;
2050 /* Save off the information about this board */
2051 adapter->hw.vendor_id = pci_get_vendor(dev);
2052 adapter->hw.device_id = pci_get_device(dev);
2053 adapter->hw.revision_id = pci_get_revid(dev);
2054 adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2055 adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2057 /* Do Shared Code Init and Setup */
2058 if (e1000_set_mac_type(&adapter->hw))
2064 em_alloc_pci_res(struct adapter *adapter)
2066 device_t dev = adapter->dev;
2067 int val, rid, error = E1000_SUCCESS;
2069 /* Enable bus mastering */
2070 pci_enable_busmaster(dev);
2072 adapter->memory_rid = EM_BAR_MEM;
2073 adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2074 &adapter->memory_rid, RF_ACTIVE);
2075 if (adapter->memory == NULL) {
2076 device_printf(dev, "Unable to allocate bus resource: memory\n");
2079 adapter->osdep.mem_bus_space_tag =
2080 rman_get_bustag(adapter->memory);
2081 adapter->osdep.mem_bus_space_handle =
2082 rman_get_bushandle(adapter->memory);
2084 /* XXX This is quite goofy, it is not actually used */
2085 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2087 /* Only older adapters use IO mapping */
2088 if (adapter->hw.mac.type > e1000_82543 &&
2089 adapter->hw.mac.type < e1000_82571) {
2090 /* Figure our where our IO BAR is ? */
2091 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2092 val = pci_read_config(dev, rid, 4);
2093 if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2094 adapter->io_rid = rid;
2098 /* check for 64bit BAR */
2099 if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2102 if (rid >= PCIR_CARDBUSCIS) {
2103 device_printf(dev, "Unable to locate IO BAR\n");
2106 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2107 &adapter->io_rid, RF_ACTIVE);
2108 if (adapter->ioport == NULL) {
2109 device_printf(dev, "Unable to allocate bus resource: "
2113 adapter->hw.io_base = 0;
2114 adapter->osdep.io_bus_space_tag =
2115 rman_get_bustag(adapter->ioport);
2116 adapter->osdep.io_bus_space_handle =
2117 rman_get_bushandle(adapter->ioport);
2120 adapter->intr_rid = 0;
2121 adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2123 RF_SHAREABLE | RF_ACTIVE);
2124 if (adapter->intr_res == NULL) {
2125 device_printf(dev, "Unable to allocate bus resource: "
2130 adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2131 adapter->hw.back = &adapter->osdep;
2136 em_free_pci_res(struct adapter *adapter)
2138 device_t dev = adapter->dev;
2140 if (adapter->intr_res != NULL) {
2141 bus_release_resource(dev, SYS_RES_IRQ,
2142 adapter->intr_rid, adapter->intr_res);
2145 if (adapter->memory != NULL) {
2146 bus_release_resource(dev, SYS_RES_MEMORY,
2147 adapter->memory_rid, adapter->memory);
2150 if (adapter->flash != NULL) {
2151 bus_release_resource(dev, SYS_RES_MEMORY,
2152 adapter->flash_rid, adapter->flash);
2155 if (adapter->ioport != NULL) {
2156 bus_release_resource(dev, SYS_RES_IOPORT,
2157 adapter->io_rid, adapter->ioport);
2162 em_hw_init(struct adapter *adapter)
2164 device_t dev = adapter->dev;
2165 uint16_t rx_buffer_size;
2167 /* Issue a global reset */
2168 e1000_reset_hw(&adapter->hw);
2170 /* Get control from any management/hw control */
2171 if ((adapter->hw.mac.type == e1000_82573 ||
2172 adapter->hw.mac.type == e1000_ich8lan ||
2173 adapter->hw.mac.type == e1000_ich10lan ||
2174 adapter->hw.mac.type == e1000_ich9lan) &&
2175 e1000_check_mng_mode(&adapter->hw))
2176 em_get_hw_control(adapter);
2178 /* When hardware is reset, fifo_head is also reset */
2179 adapter->tx_fifo_head = 0;
2181 /* Set up smart power down as default off on newer adapters. */
2182 if (!em_smart_pwr_down &&
2183 (adapter->hw.mac.type == e1000_82571 ||
2184 adapter->hw.mac.type == e1000_82572)) {
2185 uint16_t phy_tmp = 0;
2187 /* Speed up time to link by disabling smart power down. */
2188 e1000_read_phy_reg(&adapter->hw,
2189 IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2190 phy_tmp &= ~IGP02E1000_PM_SPD;
2191 e1000_write_phy_reg(&adapter->hw,
2192 IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2196 * These parameters control the automatic generation (Tx) and
2197 * response (Rx) to Ethernet PAUSE frames.
2198 * - High water mark should allow for at least two frames to be
2199 * received after sending an XOFF.
2200 * - Low water mark works best when it is very near the high water mark.
2201 * This allows the receiver to restart by sending XON when it has
2202 * drained a bit. Here we use an arbitary value of 1500 which will
2203 * restart after one full frame is pulled from the buffer. There
2204 * could be several smaller frames in the buffer and if so they will
2205 * not trigger the XON until their total number reduces the buffer
2207 * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2210 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2212 adapter->hw.fc.high_water = rx_buffer_size -
2213 roundup2(adapter->max_frame_size, 1024);
2214 adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2216 if (adapter->hw.mac.type == e1000_80003es2lan)
2217 adapter->hw.fc.pause_time = 0xFFFF;
2219 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2220 adapter->hw.fc.send_xon = TRUE;
2221 adapter->hw.fc.requested_mode = e1000_fc_full;
2223 if (e1000_init_hw(&adapter->hw) < 0) {
2224 device_printf(dev, "Hardware Initialization Failed\n");
2228 e1000_check_for_link(&adapter->hw);
2234 em_setup_ifp(struct adapter *adapter)
2236 struct ifnet *ifp = &adapter->arpcom.ac_if;
2238 if_initname(ifp, device_get_name(adapter->dev),
2239 device_get_unit(adapter->dev));
2240 ifp->if_softc = adapter;
2241 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2242 ifp->if_init = em_init;
2243 ifp->if_ioctl = em_ioctl;
2244 ifp->if_start = em_start;
2245 #ifdef DEVICE_POLLING
2246 ifp->if_poll = em_poll;
2248 ifp->if_watchdog = em_watchdog;
2249 ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2250 ifq_set_ready(&ifp->if_snd);
2252 ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2254 if (adapter->hw.mac.type >= e1000_82543)
2255 ifp->if_capabilities = IFCAP_HWCSUM;
2257 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2258 ifp->if_capenable = ifp->if_capabilities;
2260 if (ifp->if_capenable & IFCAP_TXCSUM)
2261 ifp->if_hwassist = EM_CSUM_FEATURES;
2264 * Tell the upper layer(s) we support long frames.
2266 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2269 * Specify the media types supported by this adapter and register
2270 * callbacks to update media and link information
2272 ifmedia_init(&adapter->media, IFM_IMASK,
2273 em_media_change, em_media_status);
2274 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2275 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2276 u_char fiber_type = IFM_1000_SX; /* default type */
2278 if (adapter->hw.mac.type == e1000_82545)
2279 fiber_type = IFM_1000_LX;
2280 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2282 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2284 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2285 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2287 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2289 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2291 if (adapter->hw.phy.type != e1000_phy_ife) {
2292 ifmedia_add(&adapter->media,
2293 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2294 ifmedia_add(&adapter->media,
2295 IFM_ETHER | IFM_1000_T, 0, NULL);
2298 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2299 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2304 * Workaround for SmartSpeed on 82541 and 82547 controllers
2307 em_smartspeed(struct adapter *adapter)
2311 if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2312 adapter->hw.mac.autoneg == 0 ||
2313 (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2316 if (adapter->smartspeed == 0) {
2318 * If Master/Slave config fault is asserted twice,
2319 * we assume back-to-back
2321 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2322 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2324 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2325 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2326 e1000_read_phy_reg(&adapter->hw,
2327 PHY_1000T_CTRL, &phy_tmp);
2328 if (phy_tmp & CR_1000T_MS_ENABLE) {
2329 phy_tmp &= ~CR_1000T_MS_ENABLE;
2330 e1000_write_phy_reg(&adapter->hw,
2331 PHY_1000T_CTRL, phy_tmp);
2332 adapter->smartspeed++;
2333 if (adapter->hw.mac.autoneg &&
2334 !e1000_phy_setup_autoneg(&adapter->hw) &&
2335 !e1000_read_phy_reg(&adapter->hw,
2336 PHY_CONTROL, &phy_tmp)) {
2337 phy_tmp |= MII_CR_AUTO_NEG_EN |
2338 MII_CR_RESTART_AUTO_NEG;
2339 e1000_write_phy_reg(&adapter->hw,
2340 PHY_CONTROL, phy_tmp);
2345 } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2346 /* If still no link, perhaps using 2/3 pair cable */
2347 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2348 phy_tmp |= CR_1000T_MS_ENABLE;
2349 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2350 if (adapter->hw.mac.autoneg &&
2351 !e1000_phy_setup_autoneg(&adapter->hw) &&
2352 !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2353 phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2354 e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2358 /* Restart process after EM_SMARTSPEED_MAX iterations */
2359 if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2360 adapter->smartspeed = 0;
2364 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2365 struct em_dma_alloc *dma)
2367 dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2368 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2369 &dma->dma_tag, &dma->dma_map,
2371 if (dma->dma_vaddr == NULL)
2378 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2380 if (dma->dma_tag == NULL)
2382 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2383 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2384 bus_dma_tag_destroy(dma->dma_tag);
2388 em_create_tx_ring(struct adapter *adapter)
2390 device_t dev = adapter->dev;
2391 struct em_buffer *tx_buffer;
2394 adapter->tx_buffer_area =
2395 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2396 M_DEVBUF, M_WAITOK | M_ZERO);
2399 * Create DMA tags for tx buffers
2401 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2402 1, 0, /* alignment, bounds */
2403 BUS_SPACE_MAXADDR, /* lowaddr */
2404 BUS_SPACE_MAXADDR, /* highaddr */
2405 NULL, NULL, /* filter, filterarg */
2406 EM_TSO_SIZE, /* maxsize */
2407 EM_MAX_SCATTER, /* nsegments */
2408 EM_MAX_SEGSIZE, /* maxsegsize */
2409 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2410 BUS_DMA_ONEBPAGE, /* flags */
2413 device_printf(dev, "Unable to allocate TX DMA tag\n");
2414 kfree(adapter->tx_buffer_area, M_DEVBUF);
2415 adapter->tx_buffer_area = NULL;
2420 * Create DMA maps for tx buffers
2422 for (i = 0; i < adapter->num_tx_desc; i++) {
2423 tx_buffer = &adapter->tx_buffer_area[i];
2425 error = bus_dmamap_create(adapter->txtag,
2426 BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2429 device_printf(dev, "Unable to create TX DMA map\n");
2430 em_destroy_tx_ring(adapter, i);
2438 em_init_tx_ring(struct adapter *adapter)
2440 /* Clear the old ring contents */
2441 bzero(adapter->tx_desc_base,
2442 (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2445 adapter->next_avail_tx_desc = 0;
2446 adapter->next_tx_to_clean = 0;
2447 adapter->num_tx_desc_avail = adapter->num_tx_desc;
2451 em_init_tx_unit(struct adapter *adapter)
2453 uint32_t tctl, tarc, tipg = 0;
2456 /* Setup the Base and Length of the Tx Descriptor Ring */
2457 bus_addr = adapter->txdma.dma_paddr;
2458 E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2459 adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2460 E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2461 (uint32_t)(bus_addr >> 32));
2462 E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2463 (uint32_t)bus_addr);
2464 /* Setup the HW Tx Head and Tail descriptor pointers */
2465 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2466 E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2468 /* Set the default values for the Tx Inter Packet Gap timer */
2469 switch (adapter->hw.mac.type) {
2471 tipg = DEFAULT_82542_TIPG_IPGT;
2472 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2473 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2476 case e1000_80003es2lan:
2477 tipg = DEFAULT_82543_TIPG_IPGR1;
2478 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2479 E1000_TIPG_IPGR2_SHIFT;
2483 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2484 adapter->hw.phy.media_type ==
2485 e1000_media_type_internal_serdes)
2486 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2488 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2489 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2490 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2494 E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2496 /* NOTE: 0 is not allowed for TIDV */
2497 E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2498 if(adapter->hw.mac.type >= e1000_82540)
2499 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2501 if (adapter->hw.mac.type == e1000_82571 ||
2502 adapter->hw.mac.type == e1000_82572) {
2503 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2504 tarc |= SPEED_MODE_BIT;
2505 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2506 } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2507 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2509 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2510 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2512 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2515 /* Program the Transmit Control Register */
2516 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2517 tctl &= ~E1000_TCTL_CT;
2518 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2519 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2521 if (adapter->hw.mac.type >= e1000_82571)
2522 tctl |= E1000_TCTL_MULR;
2524 /* This write will effectively turn on the transmit unit. */
2525 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2529 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2531 struct em_buffer *tx_buffer;
2534 if (adapter->tx_buffer_area == NULL)
2537 for (i = 0; i < ndesc; i++) {
2538 tx_buffer = &adapter->tx_buffer_area[i];
2540 KKASSERT(tx_buffer->m_head == NULL);
2541 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2543 bus_dma_tag_destroy(adapter->txtag);
2545 kfree(adapter->tx_buffer_area, M_DEVBUF);
2546 adapter->tx_buffer_area = NULL;
2550 * The offload context needs to be set when we transfer the first
2551 * packet of a particular protocol (TCP/UDP). This routine has been
2552 * enhanced to deal with inserted VLAN headers.
2554 * If the new packet's ether header length, ip header length and
2555 * csum offloading type are same as the previous packet, we should
2556 * avoid allocating a new csum context descriptor; mainly to take
2557 * advantage of the pipeline effect of the TX data read request.
2559 * This function returns number of TX descrptors allocated for
2563 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2564 uint32_t *txd_upper, uint32_t *txd_lower)
2566 struct e1000_context_desc *TXD;
2567 struct em_buffer *tx_buffer;
2568 struct ether_vlan_header *eh;
2570 int curr_txd, ehdrlen, csum_flags;
2571 uint32_t cmd, hdr_len, ip_hlen;
2575 * Determine where frame payload starts.
2576 * Jump over vlan headers if already present,
2577 * helpful for QinQ too.
2579 KASSERT(mp->m_len >= ETHER_HDR_LEN,
2580 ("em_txcsum_pullup is not called (eh)?\n"));
2581 eh = mtod(mp, struct ether_vlan_header *);
2582 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2583 KASSERT(mp->m_len >= ETHER_HDR_LEN + EVL_ENCAPLEN,
2584 ("em_txcsum_pullup is not called (evh)?\n"));
2585 etype = ntohs(eh->evl_proto);
2586 ehdrlen = ETHER_HDR_LEN + EVL_ENCAPLEN;
2588 etype = ntohs(eh->evl_encap_proto);
2589 ehdrlen = ETHER_HDR_LEN;
2593 * We only support TCP/UDP for IPv4 for the moment.
2594 * TODO: Support SCTP too when it hits the tree.
2596 if (etype != ETHERTYPE_IP)
2599 KASSERT(mp->m_len >= ehdrlen + EM_IPVHL_SIZE,
2600 ("em_txcsum_pullup is not called (eh+ip_vhl)?\n"));
2602 /* NOTE: We could only safely access ip.ip_vhl part */
2603 ip = (struct ip *)(mp->m_data + ehdrlen);
2604 ip_hlen = ip->ip_hl << 2;
2606 csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2608 if (adapter->csum_ehlen == ehdrlen &&
2609 adapter->csum_iphlen == ip_hlen &&
2610 adapter->csum_flags == csum_flags) {
2612 * Same csum offload context as the previous packets;
2615 *txd_upper = adapter->csum_txd_upper;
2616 *txd_lower = adapter->csum_txd_lower;
2621 * Setup a new csum offload context.
2624 curr_txd = adapter->next_avail_tx_desc;
2625 tx_buffer = &adapter->tx_buffer_area[curr_txd];
2626 TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2630 /* Setup of IP header checksum. */
2631 if (csum_flags & CSUM_IP) {
2633 * Start offset for header checksum calculation.
2634 * End offset for header checksum calculation.
2635 * Offset of place to put the checksum.
2637 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2638 TXD->lower_setup.ip_fields.ipcse =
2639 htole16(ehdrlen + ip_hlen - 1);
2640 TXD->lower_setup.ip_fields.ipcso =
2641 ehdrlen + offsetof(struct ip, ip_sum);
2642 cmd |= E1000_TXD_CMD_IP;
2643 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2645 hdr_len = ehdrlen + ip_hlen;
2647 if (csum_flags & CSUM_TCP) {
2649 * Start offset for payload checksum calculation.
2650 * End offset for payload checksum calculation.
2651 * Offset of place to put the checksum.
2653 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2654 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2655 TXD->upper_setup.tcp_fields.tucso =
2656 hdr_len + offsetof(struct tcphdr, th_sum);
2657 cmd |= E1000_TXD_CMD_TCP;
2658 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2659 } else if (csum_flags & CSUM_UDP) {
2661 * Start offset for header checksum calculation.
2662 * End offset for header checksum calculation.
2663 * Offset of place to put the checksum.
2665 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2666 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2667 TXD->upper_setup.tcp_fields.tucso =
2668 hdr_len + offsetof(struct udphdr, uh_sum);
2669 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2672 *txd_lower = E1000_TXD_CMD_DEXT | /* Extended descr type */
2673 E1000_TXD_DTYP_D; /* Data descr */
2675 /* Save the information for this csum offloading context */
2676 adapter->csum_ehlen = ehdrlen;
2677 adapter->csum_iphlen = ip_hlen;
2678 adapter->csum_flags = csum_flags;
2679 adapter->csum_txd_upper = *txd_upper;
2680 adapter->csum_txd_lower = *txd_lower;
2682 TXD->tcp_seg_setup.data = htole32(0);
2683 TXD->cmd_and_length =
2684 htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2685 tx_buffer->m_head = NULL;
2687 if (++curr_txd == adapter->num_tx_desc)
2690 KKASSERT(adapter->num_tx_desc_avail > 0);
2691 adapter->num_tx_desc_avail--;
2693 adapter->next_avail_tx_desc = curr_txd;
2698 em_txcsum_pullup(struct adapter *adapter, struct mbuf **m0)
2700 struct mbuf *m = *m0;
2701 struct ether_header *eh;
2704 adapter->tx_csum_try_pullup++;
2706 len = ETHER_HDR_LEN + EM_IPVHL_SIZE;
2708 if (__predict_false(!M_WRITABLE(m))) {
2709 if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2710 adapter->tx_csum_drop1++;
2715 eh = mtod(m, struct ether_header *);
2717 if (eh->ether_type == htons(ETHERTYPE_VLAN))
2718 len += EVL_ENCAPLEN;
2720 if (__predict_false(m->m_len < len)) {
2721 adapter->tx_csum_drop2++;
2729 if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2730 adapter->tx_csum_pullup1++;
2731 m = m_pullup(m, ETHER_HDR_LEN);
2733 adapter->tx_csum_pullup1_failed++;
2739 eh = mtod(m, struct ether_header *);
2741 if (eh->ether_type == htons(ETHERTYPE_VLAN))
2742 len += EVL_ENCAPLEN;
2744 if (__predict_false(m->m_len < len)) {
2745 adapter->tx_csum_pullup2++;
2746 m = m_pullup(m, len);
2748 adapter->tx_csum_pullup2_failed++;
2758 em_txeof(struct adapter *adapter)
2760 struct ifnet *ifp = &adapter->arpcom.ac_if;
2761 struct e1000_tx_desc *tx_desc;
2762 struct em_buffer *tx_buffer;
2763 int first, num_avail;
2765 if (adapter->tx_dd_head == adapter->tx_dd_tail)
2768 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2771 num_avail = adapter->num_tx_desc_avail;
2772 first = adapter->next_tx_to_clean;
2774 while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2775 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2777 tx_desc = &adapter->tx_desc_base[dd_idx];
2779 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2780 EM_INC_TXDD_IDX(adapter->tx_dd_head);
2782 if (++dd_idx == adapter->num_tx_desc)
2785 while (first != dd_idx) {
2786 tx_buffer = &adapter->tx_buffer_area[first];
2787 tx_desc = &adapter->tx_desc_base[first];
2789 tx_desc->upper.data = 0;
2790 tx_desc->lower.data = 0;
2791 tx_desc->buffer_addr = 0;
2794 if (tx_buffer->m_head) {
2796 bus_dmamap_unload(adapter->txtag,
2798 m_freem(tx_buffer->m_head);
2799 tx_buffer->m_head = NULL;
2802 if (++first == adapter->num_tx_desc)
2809 adapter->next_tx_to_clean = first;
2810 adapter->num_tx_desc_avail = num_avail;
2812 if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2813 adapter->tx_dd_head = 0;
2814 adapter->tx_dd_tail = 0;
2817 if (!EM_IS_OACTIVE(adapter)) {
2818 ifp->if_flags &= ~IFF_OACTIVE;
2820 /* All clean, turn off the timer */
2821 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2827 em_tx_collect(struct adapter *adapter)
2829 struct ifnet *ifp = &adapter->arpcom.ac_if;
2830 struct e1000_tx_desc *tx_desc;
2831 struct em_buffer *tx_buffer;
2832 int tdh, first, num_avail, dd_idx = -1;
2834 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2837 tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2838 if (tdh == adapter->next_tx_to_clean)
2841 if (adapter->tx_dd_head != adapter->tx_dd_tail)
2842 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2844 num_avail = adapter->num_tx_desc_avail;
2845 first = adapter->next_tx_to_clean;
2847 while (first != tdh) {
2848 tx_buffer = &adapter->tx_buffer_area[first];
2849 tx_desc = &adapter->tx_desc_base[first];
2851 tx_desc->upper.data = 0;
2852 tx_desc->lower.data = 0;
2853 tx_desc->buffer_addr = 0;
2856 if (tx_buffer->m_head) {
2858 bus_dmamap_unload(adapter->txtag,
2860 m_freem(tx_buffer->m_head);
2861 tx_buffer->m_head = NULL;
2864 if (first == dd_idx) {
2865 EM_INC_TXDD_IDX(adapter->tx_dd_head);
2866 if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2867 adapter->tx_dd_head = 0;
2868 adapter->tx_dd_tail = 0;
2871 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2875 if (++first == adapter->num_tx_desc)
2878 adapter->next_tx_to_clean = first;
2879 adapter->num_tx_desc_avail = num_avail;
2881 if (!EM_IS_OACTIVE(adapter)) {
2882 ifp->if_flags &= ~IFF_OACTIVE;
2884 /* All clean, turn off the timer */
2885 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2891 * When Link is lost sometimes there is work still in the TX ring
2892 * which will result in a watchdog, rather than allow that do an
2893 * attempted cleanup and then reinit here. Note that this has been
2894 * seens mostly with fiber adapters.
2897 em_tx_purge(struct adapter *adapter)
2899 struct ifnet *ifp = &adapter->arpcom.ac_if;
2901 if (!adapter->link_active && ifp->if_timer) {
2902 em_tx_collect(adapter);
2903 if (ifp->if_timer) {
2904 if_printf(ifp, "Link lost, TX pending, reinit\n");
2912 em_newbuf(struct adapter *adapter, int i, int init)
2915 bus_dma_segment_t seg;
2917 struct em_buffer *rx_buffer;
2920 m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2922 adapter->mbuf_cluster_failed++;
2924 if_printf(&adapter->arpcom.ac_if,
2925 "Unable to allocate RX mbuf\n");
2929 m->m_len = m->m_pkthdr.len = MCLBYTES;
2931 if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
2932 m_adj(m, ETHER_ALIGN);
2934 error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
2935 adapter->rx_sparemap, m,
2936 &seg, 1, &nseg, BUS_DMA_NOWAIT);
2940 if_printf(&adapter->arpcom.ac_if,
2941 "Unable to load RX mbuf\n");
2946 rx_buffer = &adapter->rx_buffer_area[i];
2947 if (rx_buffer->m_head != NULL)
2948 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2950 map = rx_buffer->map;
2951 rx_buffer->map = adapter->rx_sparemap;
2952 adapter->rx_sparemap = map;
2954 rx_buffer->m_head = m;
2956 adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
2961 em_create_rx_ring(struct adapter *adapter)
2963 device_t dev = adapter->dev;
2964 struct em_buffer *rx_buffer;
2967 adapter->rx_buffer_area =
2968 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
2969 M_DEVBUF, M_WAITOK | M_ZERO);
2972 * Create DMA tag for rx buffers
2974 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2975 1, 0, /* alignment, bounds */
2976 BUS_SPACE_MAXADDR, /* lowaddr */
2977 BUS_SPACE_MAXADDR, /* highaddr */
2978 NULL, NULL, /* filter, filterarg */
2979 MCLBYTES, /* maxsize */
2981 MCLBYTES, /* maxsegsize */
2982 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
2985 device_printf(dev, "Unable to allocate RX DMA tag\n");
2986 kfree(adapter->rx_buffer_area, M_DEVBUF);
2987 adapter->rx_buffer_area = NULL;
2992 * Create spare DMA map for rx buffers
2994 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
2995 &adapter->rx_sparemap);
2997 device_printf(dev, "Unable to create spare RX DMA map\n");
2998 bus_dma_tag_destroy(adapter->rxtag);
2999 kfree(adapter->rx_buffer_area, M_DEVBUF);
3000 adapter->rx_buffer_area = NULL;
3005 * Create DMA maps for rx buffers
3007 for (i = 0; i < adapter->num_rx_desc; i++) {
3008 rx_buffer = &adapter->rx_buffer_area[i];
3010 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3013 device_printf(dev, "Unable to create RX DMA map\n");
3014 em_destroy_rx_ring(adapter, i);
3022 em_init_rx_ring(struct adapter *adapter)
3026 /* Reset descriptor ring */
3027 bzero(adapter->rx_desc_base,
3028 (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3030 /* Allocate new ones. */
3031 for (i = 0; i < adapter->num_rx_desc; i++) {
3032 error = em_newbuf(adapter, i, 1);
3037 /* Setup our descriptor pointers */
3038 adapter->next_rx_desc_to_check = 0;
3044 em_init_rx_unit(struct adapter *adapter)
3046 struct ifnet *ifp = &adapter->arpcom.ac_if;
3048 uint32_t rctl, rxcsum;
3051 * Make sure receives are disabled while setting
3052 * up the descriptor ring
3054 rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3055 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3057 if (adapter->hw.mac.type >= e1000_82540) {
3059 * Set the interrupt throttling rate. Value is calculated
3060 * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3062 if (adapter->int_throttle_ceil) {
3063 E1000_WRITE_REG(&adapter->hw, E1000_ITR,
3064 1000000000 / 256 / adapter->int_throttle_ceil);
3066 E1000_WRITE_REG(&adapter->hw, E1000_ITR, 0);
3070 /* Disable accelerated ackknowledge */
3071 if (adapter->hw.mac.type == e1000_82574) {
3072 E1000_WRITE_REG(&adapter->hw,
3073 E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3076 /* Setup the Base and Length of the Rx Descriptor Ring */
3077 bus_addr = adapter->rxdma.dma_paddr;
3078 E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3079 adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3080 E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3081 (uint32_t)(bus_addr >> 32));
3082 E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3083 (uint32_t)bus_addr);
3085 /* Setup the Receive Control Register */
3086 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3087 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3088 E1000_RCTL_RDMTS_HALF |
3089 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3091 /* Make sure VLAN Filters are off */
3092 rctl &= ~E1000_RCTL_VFE;
3094 if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3095 rctl |= E1000_RCTL_SBP;
3097 rctl &= ~E1000_RCTL_SBP;
3099 switch (adapter->rx_buffer_len) {
3102 rctl |= E1000_RCTL_SZ_2048;
3106 rctl |= E1000_RCTL_SZ_4096 |
3107 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3111 rctl |= E1000_RCTL_SZ_8192 |
3112 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3116 rctl |= E1000_RCTL_SZ_16384 |
3117 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3121 if (ifp->if_mtu > ETHERMTU)
3122 rctl |= E1000_RCTL_LPE;
3124 rctl &= ~E1000_RCTL_LPE;
3126 /* Receive Checksum Offload for TCP and UDP */
3127 if (ifp->if_capenable & IFCAP_RXCSUM) {
3128 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3129 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3130 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3134 * XXX TEMPORARY WORKAROUND: on some systems with 82573
3135 * long latencies are observed, like Lenovo X60. This
3136 * change eliminates the problem, but since having positive
3137 * values in RDTR is a known source of problems on other
3138 * platforms another solution is being sought.
3140 if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3141 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3142 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3145 /* Enable Receives */
3146 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3149 * Setup the HW Rx Head and Tail Descriptor Pointers
3151 E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3152 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3156 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3158 struct em_buffer *rx_buffer;
3161 if (adapter->rx_buffer_area == NULL)
3164 for (i = 0; i < ndesc; i++) {
3165 rx_buffer = &adapter->rx_buffer_area[i];
3167 KKASSERT(rx_buffer->m_head == NULL);
3168 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3170 bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3171 bus_dma_tag_destroy(adapter->rxtag);
3173 kfree(adapter->rx_buffer_area, M_DEVBUF);
3174 adapter->rx_buffer_area = NULL;
3178 em_rxeof(struct adapter *adapter, int count)
3180 struct ifnet *ifp = &adapter->arpcom.ac_if;
3181 uint8_t status, accept_frame = 0, eop = 0;
3182 uint16_t len, desc_len, prev_len_adj;
3183 struct e1000_rx_desc *current_desc;
3186 struct mbuf_chain chain[MAXCPU];
3188 i = adapter->next_rx_desc_to_check;
3189 current_desc = &adapter->rx_desc_base[i];
3191 if (!(current_desc->status & E1000_RXD_STAT_DD))
3194 ether_input_chain_init(chain);
3196 while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3197 struct mbuf *m = NULL;
3201 mp = adapter->rx_buffer_area[i].m_head;
3204 * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3205 * needs to access the last received byte in the mbuf.
3207 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3208 BUS_DMASYNC_POSTREAD);
3212 desc_len = le16toh(current_desc->length);
3213 status = current_desc->status;
3214 if (status & E1000_RXD_STAT_EOP) {
3217 if (desc_len < ETHER_CRC_LEN) {
3219 prev_len_adj = ETHER_CRC_LEN - desc_len;
3221 len = desc_len - ETHER_CRC_LEN;
3228 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3230 uint32_t pkt_len = desc_len;
3232 if (adapter->fmp != NULL)
3233 pkt_len += adapter->fmp->m_pkthdr.len;
3235 last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3236 if (TBI_ACCEPT(&adapter->hw, status,
3237 current_desc->errors, pkt_len, last_byte,
3238 adapter->min_frame_size, adapter->max_frame_size)) {
3239 e1000_tbi_adjust_stats_82543(&adapter->hw,
3240 &adapter->stats, pkt_len,
3241 adapter->hw.mac.addr,
3242 adapter->max_frame_size);
3251 if (em_newbuf(adapter, i, 0) != 0) {
3256 /* Assign correct length to the current fragment */
3259 if (adapter->fmp == NULL) {
3260 mp->m_pkthdr.len = len;
3261 adapter->fmp = mp; /* Store the first mbuf */
3265 * Chain mbuf's together
3269 * Adjust length of previous mbuf in chain if
3270 * we received less than 4 bytes in the last
3273 if (prev_len_adj > 0) {
3274 adapter->lmp->m_len -= prev_len_adj;
3275 adapter->fmp->m_pkthdr.len -=
3278 adapter->lmp->m_next = mp;
3279 adapter->lmp = adapter->lmp->m_next;
3280 adapter->fmp->m_pkthdr.len += len;
3284 adapter->fmp->m_pkthdr.rcvif = ifp;
3287 if (ifp->if_capenable & IFCAP_RXCSUM) {
3288 em_rxcsum(adapter, current_desc,
3292 if (status & E1000_RXD_STAT_VP) {
3293 adapter->fmp->m_pkthdr.ether_vlantag =
3294 (le16toh(current_desc->special) &
3295 E1000_RXD_SPC_VLAN_MASK);
3296 adapter->fmp->m_flags |= M_VLANTAG;
3299 adapter->fmp = NULL;
3300 adapter->lmp = NULL;
3306 /* Reuse loaded DMA map and just update mbuf chain */
3307 mp = adapter->rx_buffer_area[i].m_head;
3308 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3309 mp->m_data = mp->m_ext.ext_buf;
3311 if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3312 m_adj(mp, ETHER_ALIGN);
3314 if (adapter->fmp != NULL) {
3315 m_freem(adapter->fmp);
3316 adapter->fmp = NULL;
3317 adapter->lmp = NULL;
3322 /* Zero out the receive descriptors status. */
3323 current_desc->status = 0;
3326 ether_input_chain(ifp, m, chain);
3328 /* Advance our pointers to the next descriptor. */
3329 if (++i == adapter->num_rx_desc)
3331 current_desc = &adapter->rx_desc_base[i];
3333 adapter->next_rx_desc_to_check = i;
3335 ether_input_dispatch(chain);
3337 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */
3339 i = adapter->num_rx_desc - 1;
3340 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3344 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3347 /* 82543 or newer only */
3348 if (adapter->hw.mac.type < e1000_82543 ||
3349 /* Ignore Checksum bit is set */
3350 (rx_desc->status & E1000_RXD_STAT_IXSM))
3353 if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3354 !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3355 /* IP Checksum Good */
3356 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3359 if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3360 !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3361 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3363 CSUM_FRAG_NOT_CHECKED;
3364 mp->m_pkthdr.csum_data = htons(0xffff);
3369 em_enable_intr(struct adapter *adapter)
3371 lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3372 E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
3376 em_disable_intr(struct adapter *adapter)
3378 uint32_t clear = 0xffffffff;
3381 * The first version of 82542 had an errata where when link was forced
3382 * it would stay up even up even if the cable was disconnected.
3383 * Sequence errors were used to detect the disconnect and then the
3384 * driver would unforce the link. This code in the in the ISR. For
3385 * this to work correctly the Sequence error interrupt had to be
3386 * enabled all the time.
3388 if (adapter->hw.mac.type == e1000_82542 &&
3389 adapter->hw.revision_id == E1000_REVISION_2)
3390 clear &= ~E1000_IMC_RXSEQ;
3392 E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3394 lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3398 * Bit of a misnomer, what this really means is
3399 * to enable OS management of the system... aka
3400 * to disable special hardware management features
3403 em_get_mgmt(struct adapter *adapter)
3405 /* A shared code workaround */
3406 #define E1000_82542_MANC2H E1000_MANC2H
3407 if (adapter->has_manage) {
3408 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3409 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3411 /* disable hardware interception of ARP */
3412 manc &= ~(E1000_MANC_ARP_EN);
3414 /* enable receiving management packets to the host */
3415 if (adapter->hw.mac.type >= e1000_82571) {
3416 manc |= E1000_MANC_EN_MNG2HOST;
3417 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3418 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3419 manc2h |= E1000_MNG2HOST_PORT_623;
3420 manc2h |= E1000_MNG2HOST_PORT_664;
3421 E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3424 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3429 * Give control back to hardware management
3430 * controller if there is one.
3433 em_rel_mgmt(struct adapter *adapter)
3435 if (adapter->has_manage) {
3436 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3438 /* re-enable hardware interception of ARP */
3439 manc |= E1000_MANC_ARP_EN;
3441 if (adapter->hw.mac.type >= e1000_82571)
3442 manc &= ~E1000_MANC_EN_MNG2HOST;
3444 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3449 * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3450 * For ASF and Pass Through versions of f/w this means that
3451 * the driver is loaded. For AMT version (only with 82573)
3452 * of the f/w this means that the network i/f is open.
3455 em_get_hw_control(struct adapter *adapter)
3457 uint32_t ctrl_ext, swsm;
3459 /* Let firmware know the driver has taken over */
3460 switch (adapter->hw.mac.type) {
3462 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3463 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3464 swsm | E1000_SWSM_DRV_LOAD);
3468 case e1000_80003es2lan:
3471 case e1000_ich10lan:
3472 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3473 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3474 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3482 * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3483 * For ASF and Pass Through versions of f/w this means that the
3484 * driver is no longer loaded. For AMT version (only with 82573)
3485 * of the f/w this means that the network i/f is closed.
3488 em_rel_hw_control(struct adapter *adapter)
3490 uint32_t ctrl_ext, swsm;
3492 /* Let firmware taken over control of h/w */
3493 switch (adapter->hw.mac.type) {
3495 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3496 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3497 swsm & ~E1000_SWSM_DRV_LOAD);
3502 case e1000_80003es2lan:
3505 case e1000_ich10lan:
3506 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3507 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3508 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3517 em_is_valid_eaddr(const uint8_t *addr)
3519 char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3521 if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3528 * Enable PCI Wake On Lan capability
3531 em_enable_wol(device_t dev)
3533 uint16_t cap, status;
3536 /* First find the capabilities pointer*/
3537 cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3539 /* Read the PM Capabilities */
3540 id = pci_read_config(dev, cap, 1);
3541 if (id != PCIY_PMG) /* Something wrong */
3545 * OK, we have the power capabilities,
3546 * so now get the status register
3548 cap += PCIR_POWER_STATUS;
3549 status = pci_read_config(dev, cap, 2);
3550 status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3551 pci_write_config(dev, cap, status, 2);
3556 * 82544 Coexistence issue workaround.
3557 * There are 2 issues.
3558 * 1. Transmit Hang issue.
3559 * To detect this issue, following equation can be used...
3560 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3561 * If SUM[3:0] is in between 1 to 4, we will have this issue.
3564 * To detect this issue, following equation can be used...
3565 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3566 * If SUM[3:0] is in between 9 to c, we will have this issue.
3569 * Make sure we do not have ending address
3570 * as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3573 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3575 uint32_t safe_terminator;
3578 * Since issue is sensitive to length and address.
3579 * Let us first check the address...
3582 desc_array->descriptor[0].address = address;
3583 desc_array->descriptor[0].length = length;
3584 desc_array->elements = 1;
3585 return (desc_array->elements);
3589 (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3591 /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3592 if (safe_terminator == 0 ||
3593 (safe_terminator > 4 && safe_terminator < 9) ||
3594 (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3595 desc_array->descriptor[0].address = address;
3596 desc_array->descriptor[0].length = length;
3597 desc_array->elements = 1;
3598 return (desc_array->elements);
3601 desc_array->descriptor[0].address = address;
3602 desc_array->descriptor[0].length = length - 4;
3603 desc_array->descriptor[1].address = address + (length - 4);
3604 desc_array->descriptor[1].length = 4;
3605 desc_array->elements = 2;
3606 return (desc_array->elements);
3610 em_update_stats(struct adapter *adapter)
3612 struct ifnet *ifp = &adapter->arpcom.ac_if;
3614 if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3615 (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3616 adapter->stats.symerrs +=
3617 E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3618 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3620 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3621 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3622 adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3623 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3625 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3626 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3627 adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3628 adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3629 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3630 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3631 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3632 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3633 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3634 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3635 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3636 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3637 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3638 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3639 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3640 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3641 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3642 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3643 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3644 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3646 /* For the 64-bit byte counters the low dword must be read first. */
3647 /* Both registers clear on the read of the high dword */
3649 adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3650 adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3652 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3653 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3654 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3655 adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3656 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3658 adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3659 adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3661 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3662 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3663 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3664 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3665 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3666 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3667 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3668 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3669 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3670 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3672 if (adapter->hw.mac.type >= e1000_82543) {
3673 adapter->stats.algnerrc +=
3674 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3675 adapter->stats.rxerrc +=
3676 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3677 adapter->stats.tncrs +=
3678 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3679 adapter->stats.cexterr +=
3680 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3681 adapter->stats.tsctc +=
3682 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3683 adapter->stats.tsctfc +=
3684 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3687 ifp->if_collisions = adapter->stats.colc;
3691 adapter->dropped_pkts + adapter->stats.rxerrc +
3692 adapter->stats.crcerrs + adapter->stats.algnerrc +
3693 adapter->stats.ruc + adapter->stats.roc +
3694 adapter->stats.mpc + adapter->stats.cexterr;
3698 adapter->stats.ecol + adapter->stats.latecol +
3699 adapter->watchdog_events;
3703 em_print_debug_info(struct adapter *adapter)
3705 device_t dev = adapter->dev;
3706 uint8_t *hw_addr = adapter->hw.hw_addr;
3708 device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3709 device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3710 E1000_READ_REG(&adapter->hw, E1000_CTRL),
3711 E1000_READ_REG(&adapter->hw, E1000_RCTL));
3712 device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3713 ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3714 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3715 device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3716 adapter->hw.fc.high_water,
3717 adapter->hw.fc.low_water);
3718 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3719 E1000_READ_REG(&adapter->hw, E1000_TIDV),
3720 E1000_READ_REG(&adapter->hw, E1000_TADV));
3721 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3722 E1000_READ_REG(&adapter->hw, E1000_RDTR),
3723 E1000_READ_REG(&adapter->hw, E1000_RADV));
3724 device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3725 (long long)adapter->tx_fifo_wrk_cnt,
3726 (long long)adapter->tx_fifo_reset_cnt);
3727 device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3728 E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3729 E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3730 device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3731 E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3732 E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3733 device_printf(dev, "Num Tx descriptors avail = %d\n",
3734 adapter->num_tx_desc_avail);
3735 device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3736 adapter->no_tx_desc_avail1);
3737 device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3738 adapter->no_tx_desc_avail2);
3739 device_printf(dev, "Std mbuf failed = %ld\n",
3740 adapter->mbuf_alloc_failed);
3741 device_printf(dev, "Std mbuf cluster failed = %ld\n",
3742 adapter->mbuf_cluster_failed);
3743 device_printf(dev, "Driver dropped packets = %ld\n",
3744 adapter->dropped_pkts);
3745 device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3746 adapter->no_tx_dma_setup);
3748 device_printf(dev, "TXCSUM try pullup = %lu\n",
3749 adapter->tx_csum_try_pullup);
3750 device_printf(dev, "TXCSUM m_pullup(eh) called = %lu\n",
3751 adapter->tx_csum_pullup1);
3752 device_printf(dev, "TXCSUM m_pullup(eh) failed = %lu\n",
3753 adapter->tx_csum_pullup1_failed);
3754 device_printf(dev, "TXCSUM m_pullup(eh+ip) called = %lu\n",
3755 adapter->tx_csum_pullup2);
3756 device_printf(dev, "TXCSUM m_pullup(eh+ip) failed = %lu\n",
3757 adapter->tx_csum_pullup2_failed);
3758 device_printf(dev, "TXCSUM non-writable(eh) droped = %lu\n",
3759 adapter->tx_csum_drop1);
3760 device_printf(dev, "TXCSUM non-writable(eh+ip) droped = %lu\n",
3761 adapter->tx_csum_drop2);
3765 em_print_hw_stats(struct adapter *adapter)
3767 device_t dev = adapter->dev;
3769 device_printf(dev, "Excessive collisions = %lld\n",
3770 (long long)adapter->stats.ecol);
3771 #if (DEBUG_HW > 0) /* Dont output these errors normally */
3772 device_printf(dev, "Symbol errors = %lld\n",
3773 (long long)adapter->stats.symerrs);
3775 device_printf(dev, "Sequence errors = %lld\n",
3776 (long long)adapter->stats.sec);
3777 device_printf(dev, "Defer count = %lld\n",
3778 (long long)adapter->stats.dc);
3779 device_printf(dev, "Missed Packets = %lld\n",
3780 (long long)adapter->stats.mpc);
3781 device_printf(dev, "Receive No Buffers = %lld\n",
3782 (long long)adapter->stats.rnbc);
3783 /* RLEC is inaccurate on some hardware, calculate our own. */
3784 device_printf(dev, "Receive Length Errors = %lld\n",
3785 ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3786 device_printf(dev, "Receive errors = %lld\n",
3787 (long long)adapter->stats.rxerrc);
3788 device_printf(dev, "Crc errors = %lld\n",
3789 (long long)adapter->stats.crcerrs);
3790 device_printf(dev, "Alignment errors = %lld\n",
3791 (long long)adapter->stats.algnerrc);
3792 device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3793 (long long)adapter->stats.cexterr);
3794 device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3795 device_printf(dev, "watchdog timeouts = %ld\n",
3796 adapter->watchdog_events);
3797 device_printf(dev, "XON Rcvd = %lld\n",
3798 (long long)adapter->stats.xonrxc);
3799 device_printf(dev, "XON Xmtd = %lld\n",
3800 (long long)adapter->stats.xontxc);
3801 device_printf(dev, "XOFF Rcvd = %lld\n",
3802 (long long)adapter->stats.xoffrxc);
3803 device_printf(dev, "XOFF Xmtd = %lld\n",
3804 (long long)adapter->stats.xofftxc);
3805 device_printf(dev, "Good Packets Rcvd = %lld\n",
3806 (long long)adapter->stats.gprc);
3807 device_printf(dev, "Good Packets Xmtd = %lld\n",
3808 (long long)adapter->stats.gptc);
3812 em_print_nvm_info(struct adapter *adapter)
3814 uint16_t eeprom_data;
3817 /* Its a bit crude, but it gets the job done */
3818 kprintf("\nInterface EEPROM Dump:\n");
3819 kprintf("Offset\n0x0000 ");
3820 for (i = 0, j = 0; i < 32; i++, j++) {
3821 if (j == 8) { /* Make the offset block */
3823 kprintf("\n0x00%x0 ",row);
3825 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3826 kprintf("%04x ", eeprom_data);
3832 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3834 struct adapter *adapter;
3839 error = sysctl_handle_int(oidp, &result, 0, req);
3840 if (error || !req->newptr)
3843 adapter = (struct adapter *)arg1;
3844 ifp = &adapter->arpcom.ac_if;
3846 lwkt_serialize_enter(ifp->if_serializer);
3849 em_print_debug_info(adapter);
3852 * This value will cause a hex dump of the
3853 * first 32 16-bit words of the EEPROM to
3857 em_print_nvm_info(adapter);
3859 lwkt_serialize_exit(ifp->if_serializer);
3865 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3870 error = sysctl_handle_int(oidp, &result, 0, req);
3871 if (error || !req->newptr)
3875 struct adapter *adapter = (struct adapter *)arg1;
3876 struct ifnet *ifp = &adapter->arpcom.ac_if;
3878 lwkt_serialize_enter(ifp->if_serializer);
3879 em_print_hw_stats(adapter);
3880 lwkt_serialize_exit(ifp->if_serializer);
3886 em_add_sysctl(struct adapter *adapter)
3888 #ifdef PROFILE_SERIALIZER
3889 struct ifnet *ifp = &adapter->arpcom.ac_if;
3892 sysctl_ctx_init(&adapter->sysctl_ctx);
3893 adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
3894 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
3895 device_get_nameunit(adapter->dev),
3897 if (adapter->sysctl_tree == NULL) {
3898 device_printf(adapter->dev, "can't add sysctl node\n");
3900 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3901 SYSCTL_CHILDREN(adapter->sysctl_tree),
3902 OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3903 em_sysctl_debug_info, "I", "Debug Information");
3905 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3906 SYSCTL_CHILDREN(adapter->sysctl_tree),
3907 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3908 em_sysctl_stats, "I", "Statistics");
3910 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3911 SYSCTL_CHILDREN(adapter->sysctl_tree),
3912 OID_AUTO, "rxd", CTLFLAG_RD,
3913 &adapter->num_rx_desc, 0, NULL);
3914 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3915 SYSCTL_CHILDREN(adapter->sysctl_tree),
3916 OID_AUTO, "txd", CTLFLAG_RD,
3917 &adapter->num_tx_desc, 0, NULL);
3919 #ifdef PROFILE_SERIALIZER
3920 SYSCTL_ADD_UINT(&adapter->sysctl_ctx,
3921 SYSCTL_CHILDREN(adapter->sysctl_tree),
3922 OID_AUTO, "serializer_sleep", CTLFLAG_RW,
3923 &ifp->if_serializer->sleep_cnt, 0, NULL);
3924 SYSCTL_ADD_UINT(&adapter->sysctl_ctx,
3925 SYSCTL_CHILDREN(adapter->sysctl_tree),
3926 OID_AUTO, "serializer_tryfail", CTLFLAG_RW,
3927 &ifp->if_serializer->tryfail_cnt, 0, NULL);
3928 SYSCTL_ADD_UINT(&adapter->sysctl_ctx,
3929 SYSCTL_CHILDREN(adapter->sysctl_tree),
3930 OID_AUTO, "serializer_enter", CTLFLAG_RW,
3931 &ifp->if_serializer->enter_cnt, 0, NULL);
3932 SYSCTL_ADD_UINT(&adapter->sysctl_ctx,
3933 SYSCTL_CHILDREN(adapter->sysctl_tree),
3934 OID_AUTO, "serializer_try", CTLFLAG_RW,
3935 &ifp->if_serializer->try_cnt, 0, NULL);
3937 if (adapter->hw.mac.type >= e1000_82540) {
3938 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3939 SYSCTL_CHILDREN(adapter->sysctl_tree),
3940 OID_AUTO, "int_throttle_ceil",
3941 CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3942 em_sysctl_int_throttle, "I",
3943 "interrupt throttling rate");
3945 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3946 SYSCTL_CHILDREN(adapter->sysctl_tree),
3947 OID_AUTO, "int_tx_nsegs",
3948 CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3949 em_sysctl_int_tx_nsegs, "I",
3950 "# segments per TX interrupt");
3955 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
3957 struct adapter *adapter = (void *)arg1;
3958 struct ifnet *ifp = &adapter->arpcom.ac_if;
3959 int error, throttle;
3961 throttle = adapter->int_throttle_ceil;
3962 error = sysctl_handle_int(oidp, &throttle, 0, req);
3963 if (error || req->newptr == NULL)
3965 if (throttle < 0 || throttle > 1000000000 / 256)
3970 * Set the interrupt throttling rate in 256ns increments,
3971 * recalculate sysctl value assignment to get exact frequency.
3973 throttle = 1000000000 / 256 / throttle;
3975 /* Upper 16bits of ITR is reserved and should be zero */
3976 if (throttle & 0xffff0000)
3980 lwkt_serialize_enter(ifp->if_serializer);
3983 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
3985 adapter->int_throttle_ceil = 0;
3987 if (ifp->if_flags & IFF_RUNNING)
3988 E1000_WRITE_REG(&adapter->hw, E1000_ITR, throttle);
3990 lwkt_serialize_exit(ifp->if_serializer);
3993 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
3994 adapter->int_throttle_ceil);
4000 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4002 struct adapter *adapter = (void *)arg1;
4003 struct ifnet *ifp = &adapter->arpcom.ac_if;
4006 segs = adapter->tx_int_nsegs;
4007 error = sysctl_handle_int(oidp, &segs, 0, req);
4008 if (error || req->newptr == NULL)
4013 lwkt_serialize_enter(ifp->if_serializer);
4016 * Don't allow int_tx_nsegs to become:
4017 * o Less the oact_tx_desc
4018 * o Too large that no TX desc will cause TX interrupt to
4019 * be generated (OACTIVE will never recover)
4020 * o Too small that will cause tx_dd[] overflow
4022 if (segs < adapter->oact_tx_desc ||
4023 segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4024 segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4028 adapter->tx_int_nsegs = segs;
4031 lwkt_serialize_exit(ifp->if_serializer);