sys/dev/netif/em/if_em.c

   1 /*
   2  *
   3  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   4  *
   5  * Copyright (c) 2001-2006, Intel Corporation
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  *  1. Redistributions of source code must retain the above copyright notice,
  12  *     this list of conditions and the following disclaimer.
  13  *
  14  *  2. Redistributions in binary form must reproduce the above copyright
  15  *     notice, this list of conditions and the following disclaimer in the
  16  *     documentation and/or other materials provided with the distribution.
  17  *
  18  *  3. Neither the name of the Intel Corporation nor the names of its
  19  *     contributors may be used to endorse or promote products derived from
  20  *     this software without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  26  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  32  * POSSIBILITY OF SUCH DAMAGE.
  33  *
  34  *
  35  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  36  *
  37  * This code is derived from software contributed to The DragonFly Project
  38  * by Matthew Dillon <dillon@backplane.com>
  39  *
  40  * Redistribution and use in source and binary forms, with or without
  41  * modification, are permitted provided that the following conditions
  42  * are met:
  43  *
  44  * 1. Redistributions of source code must retain the above copyright
  45  *    notice, this list of conditions and the following disclaimer.
  46  * 2. Redistributions in binary form must reproduce the above copyright
  47  *    notice, this list of conditions and the following disclaimer in
  48  *    the documentation and/or other materials provided with the
  49  *    distribution.
  50  * 3. Neither the name of The DragonFly Project nor the names of its
  51  *    contributors may be used to endorse or promote products derived
  52  *    from this software without specific, prior written permission.
  53  *
  54  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  57  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  58  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  59  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  60  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  61  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  62  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  63  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  64  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  65  * SUCH DAMAGE.
  66  *
  67  * $DragonFly: src/sys/dev/netif/em/if_em.c,v 1.62 2008/01/10 10:44:28 matthias Exp $
  68  * $FreeBSD$
  69  */
  70 /*
  71  * SERIALIZATION API RULES:
  72  *
  73  * - If the driver uses the same serializer for the interrupt as for the
  74  *   ifnet, most of the serialization will be done automatically for the
  75  *   driver.
  76  *
  77  * - ifmedia entry points will be serialized by the ifmedia code using the
  78  *   ifnet serializer.
  79  *
  80  * - if_* entry points except for if_input will be serialized by the IF
  81  *   and protocol layers.
  82  *
  83  * - The device driver must be sure to serialize access from timeout code
  84  *   installed by the device driver.
  85  *
  86  * - The device driver typically holds the serializer at the time it wishes
  87  *   to call if_input.  If so, it should pass the serializer to if_input and
  88  *   note that the serializer might be dropped temporarily by if_input
  89  *   (e.g. in case it has to bridge the packet to another interface).
  90  *
  91  *   NOTE!  Since callers into the device driver hold the ifnet serializer,
  92  *   the device driver may be holding a serializer at the time it calls
  93  *   if_input even if it is not serializer-aware.
  94  */
  95
  96 #include "opt_polling.h"
  97 #include "opt_inet.h"
  98
  99 #include <sys/param.h>
 100 #include <sys/bus.h>
 101 #include <sys/endian.h>
 102 #include <sys/kernel.h>
 103 #include <sys/ktr.h>
 104 #include <sys/malloc.h>
 105 #include <sys/mbuf.h>
 106 #include <sys/module.h>
 107 #include <sys/rman.h>
 108 #include <sys/serialize.h>
 109 #include <sys/socket.h>
 110 #include <sys/sockio.h>
 111 #include <sys/sysctl.h>
 112
 113 #include <net/bpf.h>
 114 #include <net/ethernet.h>
 115 #include <net/if.h>
 116 #include <net/if_arp.h>
 117 #include <net/if_dl.h>
 118 #include <net/if_media.h>
 119 #include <net/if_types.h>
 120 #include <net/ifq_var.h>
 121 #include <net/vlan/if_vlan_var.h>
 122
 123 #ifdef INET
 124 #include <netinet/in.h>
 125 #include <netinet/in_systm.h>
 126 #include <netinet/in_var.h>
 127 #include <netinet/ip.h>
 128 #include <netinet/tcp.h>
 129 #include <netinet/udp.h>
 130 #endif
 131
 132 #include <dev/netif/em/if_em_hw.h>
 133 #include <dev/netif/em/if_em.h>
 134
 135 #define EM_X60_WORKAROUND
 136
 137 /*********************************************************************
 138  *  Set this to one to display debug statistics
 139  *********************************************************************/
 140 int     em_display_debug_stats = 0;
 141
 142 /*********************************************************************
 143  *  Driver version
 144  *********************************************************************/
 145
 146 char em_driver_version[] = "6.2.9";
 147
 148
 149 /*********************************************************************
 150  *  PCI Device ID Table
 151  *
 152  *  Used by probe to select devices to load on
 153  *  Last field stores an index into em_strings
 154  *  Last entry must be all 0s
 155  *
 156  *  { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
 157  *********************************************************************/
 158
 159 static em_vendor_info_t em_vendor_info_array[] =
 160 {
 161         /* Intel(R) PRO/1000 Network Connection */
 162         { 0x8086, E1000_DEV_ID_82540EM,         PCI_ANY_ID, PCI_ANY_ID, 0},
 163         { 0x8086, E1000_DEV_ID_82540EM_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 164         { 0x8086, E1000_DEV_ID_82540EP,         PCI_ANY_ID, PCI_ANY_ID, 0},
 165         { 0x8086, E1000_DEV_ID_82540EP_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 166         { 0x8086, E1000_DEV_ID_82540EP_LP,      PCI_ANY_ID, PCI_ANY_ID, 0},
 167
 168         { 0x8086, E1000_DEV_ID_82541EI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 169         { 0x8086, E1000_DEV_ID_82541ER,         PCI_ANY_ID, PCI_ANY_ID, 0},
 170         { 0x8086, E1000_DEV_ID_82541ER_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 171         { 0x8086, E1000_DEV_ID_82541EI_MOBILE,  PCI_ANY_ID, PCI_ANY_ID, 0},
 172         { 0x8086, E1000_DEV_ID_82541GI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 173         { 0x8086, E1000_DEV_ID_82541GI_LF,      PCI_ANY_ID, PCI_ANY_ID, 0},
 174         { 0x8086, E1000_DEV_ID_82541GI_MOBILE,  PCI_ANY_ID, PCI_ANY_ID, 0},
 175
 176         { 0x8086, E1000_DEV_ID_82542,           PCI_ANY_ID, PCI_ANY_ID, 0},
 177
 178         { 0x8086, E1000_DEV_ID_82543GC_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 179         { 0x8086, E1000_DEV_ID_82543GC_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 180
 181         { 0x8086, E1000_DEV_ID_82544EI_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 182         { 0x8086, E1000_DEV_ID_82544EI_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 183         { 0x8086, E1000_DEV_ID_82544GC_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 184         { 0x8086, E1000_DEV_ID_82544GC_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 185
 186         { 0x8086, E1000_DEV_ID_82545EM_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 187         { 0x8086, E1000_DEV_ID_82545EM_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 188         { 0x8086, E1000_DEV_ID_82545GM_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 189         { 0x8086, E1000_DEV_ID_82545GM_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 190         { 0x8086, E1000_DEV_ID_82545GM_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 191
 192         { 0x8086, E1000_DEV_ID_82546EB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 193         { 0x8086, E1000_DEV_ID_82546EB_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 194         { 0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
 195         { 0x8086, E1000_DEV_ID_82546GB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 196         { 0x8086, E1000_DEV_ID_82546GB_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 197         { 0x8086, E1000_DEV_ID_82546GB_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 198         { 0x8086, E1000_DEV_ID_82546GB_PCIE,    PCI_ANY_ID, PCI_ANY_ID, 0},
 199         { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
 200         { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3,
 201                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 202
 203         { 0x8086, E1000_DEV_ID_82547EI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 204         { 0x8086, E1000_DEV_ID_82547EI_MOBILE,  PCI_ANY_ID, PCI_ANY_ID, 0},
 205         { 0x8086, E1000_DEV_ID_82547GI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 206
 207         { 0x8086, E1000_DEV_ID_82571EB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 208         { 0x8086, E1000_DEV_ID_82571EB_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 209         { 0x8086, E1000_DEV_ID_82571EB_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 210         { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER,
 211                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 212         { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE,
 213                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 214
 215         { 0x8086, E1000_DEV_ID_82571EB_QUAD_FIBER,
 216                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 217         { 0x8086, E1000_DEV_ID_82571PT_QUAD_COPPER,
 218                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 219         { 0x8086, E1000_DEV_ID_82572EI_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 220         { 0x8086, E1000_DEV_ID_82572EI_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 221         { 0x8086, E1000_DEV_ID_82572EI_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 222         { 0x8086, E1000_DEV_ID_82572EI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 223
 224         { 0x8086, E1000_DEV_ID_82573E,          PCI_ANY_ID, PCI_ANY_ID, 0},
 225         { 0x8086, E1000_DEV_ID_82573E_IAMT,     PCI_ANY_ID, PCI_ANY_ID, 0},
 226         { 0x8086, E1000_DEV_ID_82573L,          PCI_ANY_ID, PCI_ANY_ID, 0},
 227
 228         { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_SPT,
 229                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 230         { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_SPT,
 231                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 232         { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_DPT,
 233                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 234         { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_DPT,
 235                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 236
 237         { 0x8086, E1000_DEV_ID_ICH8_IGP_M_AMT,  PCI_ANY_ID, PCI_ANY_ID, 0},
 238         { 0x8086, E1000_DEV_ID_ICH8_IGP_AMT,    PCI_ANY_ID, PCI_ANY_ID, 0},
 239         { 0x8086, E1000_DEV_ID_ICH8_IGP_C,      PCI_ANY_ID, PCI_ANY_ID, 0},
 240         { 0x8086, E1000_DEV_ID_ICH8_IFE,        PCI_ANY_ID, PCI_ANY_ID, 0},
 241         { 0x8086, E1000_DEV_ID_ICH8_IFE_GT,     PCI_ANY_ID, PCI_ANY_ID, 0},
 242         { 0x8086, E1000_DEV_ID_ICH8_IFE_G,      PCI_ANY_ID, PCI_ANY_ID, 0},
 243         { 0x8086, E1000_DEV_ID_ICH8_IGP_M,      PCI_ANY_ID, PCI_ANY_ID, 0},
 244
 245         { 0x8086, E1000_DEV_ID_ICH9_IGP_AMT,    PCI_ANY_ID, PCI_ANY_ID, 0},
 246         { 0x8086, E1000_DEV_ID_ICH9_IGP_C,      PCI_ANY_ID, PCI_ANY_ID, 0},
 247         { 0x8086, E1000_DEV_ID_ICH9_IFE,        PCI_ANY_ID, PCI_ANY_ID, 0},
 248         { 0x8086, E1000_DEV_ID_ICH9_IFE_GT,     PCI_ANY_ID, PCI_ANY_ID, 0},
 249         { 0x8086, E1000_DEV_ID_ICH9_IFE_G,      PCI_ANY_ID, PCI_ANY_ID, 0},
 250
 251         { 0x8086, E1000_DEV_ID_82575EB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 252         { 0x8086, E1000_DEV_ID_82575EB_FIBER_SERDES,
 253                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 254         { 0x8086, E1000_DEV_ID_82575GB_QUAD_COPPER,
 255                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 256         { 0x8086, 0x101A, PCI_ANY_ID, PCI_ANY_ID, 0},
 257         { 0x8086, 0x1014, PCI_ANY_ID, PCI_ANY_ID, 0},
 258         /* required last entry */
 259         { 0, 0, 0, 0, 0}
 260 };
 261
 262 /*********************************************************************
 263  *  Table of branding strings for all supported NICs.
 264  *********************************************************************/
 265
 266 static const char *em_strings[] = {
 267         "Intel(R) PRO/1000 Network Connection"
 268 };
 269
 270 /*********************************************************************
 271  *  Function prototypes
 272  *********************************************************************/
 273 static int      em_probe(device_t);
 274 static int      em_attach(device_t);
 275 static int      em_detach(device_t);
 276 static int      em_shutdown(device_t);
 277 static void     em_intr(void *);
 278 static int      em_suspend(device_t);
 279 static int      em_resume(device_t);
 280 static void     em_start(struct ifnet *);
 281 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 282 static void     em_watchdog(struct ifnet *);
 283 static void     em_init(void *);
 284 static void     em_stop(void *);
 285 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 286 static int      em_media_change(struct ifnet *);
 287 static void     em_identify_hardware(struct adapter *);
 288 static int      em_allocate_pci_resources(device_t);
 289 static void     em_free_pci_resources(device_t);
 290 static void     em_local_timer(void *);
 291 static int      em_hardware_init(struct adapter *);
 292 static void     em_setup_interface(device_t, struct adapter *);
 293 static int      em_setup_transmit_structures(struct adapter *);
 294 static void     em_initialize_transmit_unit(struct adapter *);
 295 static int      em_setup_receive_structures(struct adapter *);
 296 static void     em_initialize_receive_unit(struct adapter *);
 297 static void     em_enable_intr(struct adapter *);
 298 static void     em_disable_intr(struct adapter *);
 299 static void     em_free_transmit_structures(struct adapter *);
 300 static void     em_free_receive_structures(struct adapter *);
 301 static void     em_update_stats_counters(struct adapter *);
 302 static void     em_txeof(struct adapter *);
 303 static int      em_allocate_receive_structures(struct adapter *);
 304 static void     em_rxeof(struct adapter *, int);
 305 static void     em_receive_checksum(struct adapter *, struct em_rx_desc *,
 306                                     struct mbuf *);
 307 static void     em_transmit_checksum_setup(struct adapter *, struct mbuf *,
 308                                            uint32_t *, uint32_t *);
 309 static void     em_set_promisc(struct adapter *);
 310 static void     em_disable_promisc(struct adapter *);
 311 static void     em_set_multi(struct adapter *);
 312 static void     em_print_hw_stats(struct adapter *);
 313 static void     em_update_link_status(struct adapter *);
 314 static int      em_get_buf(int i, struct adapter *, struct mbuf *, int how);
 315 static void     em_enable_vlans(struct adapter *);
 316 static void     em_disable_vlans(struct adapter *);
 317 static int      em_encap(struct adapter *, struct mbuf *);
 318 static void     em_smartspeed(struct adapter *);
 319 static int      em_82547_fifo_workaround(struct adapter *, int);
 320 static void     em_82547_update_fifo_head(struct adapter *, int);
 321 static int      em_82547_tx_fifo_reset(struct adapter *);
 322 static void     em_82547_move_tail(void *);
 323 static void     em_82547_move_tail_serialized(struct adapter *);
 324 static int      em_dma_malloc(struct adapter *, bus_size_t,
 325                               struct em_dma_alloc *);
 326 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 327 static void     em_print_debug_info(struct adapter *);
 328 static int      em_is_valid_ether_addr(uint8_t *);
 329 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 330 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 331 static uint32_t em_fill_descriptors(bus_addr_t address, uint32_t length,
 332                                    PDESC_ARRAY desc_array);
 333 static int      em_sysctl_int_delay(SYSCTL_HANDLER_ARGS);
 334 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 335 static void     em_add_int_delay_sysctl(struct adapter *, const char *,
 336                                         const char *,
 337                                         struct em_int_delay_info *, int, int);
 338
 339 /*********************************************************************
 340  *  FreeBSD Device Interface Entry Points
 341  *********************************************************************/
 342
 343 static device_method_t em_methods[] = {
 344         /* Device interface */
 345         DEVMETHOD(device_probe, em_probe),
 346         DEVMETHOD(device_attach, em_attach),
 347         DEVMETHOD(device_detach, em_detach),
 348         DEVMETHOD(device_shutdown, em_shutdown),
 349         DEVMETHOD(device_suspend, em_suspend),
 350         DEVMETHOD(device_resume, em_resume),
 351         {0, 0}
 352 };
 353
 354 static driver_t em_driver = {
 355         "em", em_methods, sizeof(struct adapter),
 356 };
 357
 358 static devclass_t em_devclass;
 359
 360 DECLARE_DUMMY_MODULE(if_em);
 361 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, 0, 0);
 362
 363 /*********************************************************************
 364  *  Tunable default values.
 365  *********************************************************************/
 366
 367 #define E1000_TICKS_TO_USECS(ticks)     ((1024 * (ticks) + 500) / 1000)
 368 #define E1000_USECS_TO_TICKS(usecs)     ((1000 * (usecs) + 512) / 1024)
 369
 370 static int em_tx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TIDV);
 371 static int em_rx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RDTR);
 372 static int em_tx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TADV);
 373 static int em_rx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RADV);
 374 static int em_int_throttle_ceil = 10000;
 375 static int em_rxd = EM_DEFAULT_RXD;
 376 static int em_txd = EM_DEFAULT_TXD;
 377 static int em_smart_pwr_down = FALSE;
 378
 379 TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt);
 380 TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt);
 381 TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt);
 382 TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt);
 383 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 384 TUNABLE_INT("hw.em.rxd", &em_rxd);
 385 TUNABLE_INT("hw.em.txd", &em_txd);
 386 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 387
 388 /*
 389  * Kernel trace for characterization of operations
 390  */
 391 #if !defined(KTR_IF_EM)
 392 #define KTR_IF_EM       KTR_ALL
 393 #endif
 394 KTR_INFO_MASTER(if_em);
 395 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin", 0);
 396 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end", 0);
 397 #ifdef DEVICE_POLLING
 398 KTR_INFO(KTR_IF_EM, if_em, poll_beg, 2, "poll begin", 0);
 399 KTR_INFO(KTR_IF_EM, if_em, poll_end, 3, "poll end", 0);
 400 #endif
 401 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet", 0);
 402 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet", 0);
 403 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean", 0);
 404 #define logif(name)     KTR_LOG(if_em_ ## name)
 405
 406 /*********************************************************************
 407  *  Device identification routine
 408  *
 409  *  em_probe determines if the driver should be loaded on
 410  *  adapter based on PCI vendor/device id of the adapter.
 411  *
 412  *  return 0 on success, positive on failure
 413  *********************************************************************/
 414
 415 static int
 416 em_probe(device_t dev)
 417 {
 418         em_vendor_info_t *ent;
 419
 420         uint16_t pci_vendor_id = 0;
 421         uint16_t pci_device_id = 0;
 422         uint16_t pci_subvendor_id = 0;
 423         uint16_t pci_subdevice_id = 0;
 424         char adapter_name[60];
 425
 426         INIT_DEBUGOUT("em_probe: begin");
 427
 428         pci_vendor_id = pci_get_vendor(dev);
 429         if (pci_vendor_id != EM_VENDOR_ID)
 430                 return (ENXIO);
 431
 432         pci_device_id = pci_get_device(dev);
 433         pci_subvendor_id = pci_get_subvendor(dev);
 434         pci_subdevice_id = pci_get_subdevice(dev);
 435
 436         ent = em_vendor_info_array;
 437         while (ent->vendor_id != 0) {
 438                 if ((pci_vendor_id == ent->vendor_id) &&
 439                     (pci_device_id == ent->device_id) &&
 440
 441                     ((pci_subvendor_id == ent->subvendor_id) ||
 442                      (ent->subvendor_id == PCI_ANY_ID)) &&
 443
 444                     ((pci_subdevice_id == ent->subdevice_id) ||
 445                      (ent->subdevice_id == PCI_ANY_ID))) {
 446                         ksnprintf(adapter_name, sizeof(adapter_name),
 447                                  "%s, Version - %s",  em_strings[ent->index],
 448                                  em_driver_version);
 449                         device_set_desc_copy(dev, adapter_name);
 450                         device_set_async_attach(dev, TRUE);
 451                         return (0);
 452                 }
 453                 ent++;
 454         }
 455
 456         return (ENXIO);
 457 }
 458
 459 /*********************************************************************
 460  *  Device initialization routine
 461  *
 462  *  The attach entry point is called when the driver is being loaded.
 463  *  This routine identifies the type of hardware, allocates all resources
 464  *  and initializes the hardware.
 465  *
 466  *  return 0 on success, positive on failure
 467  *********************************************************************/
 468
 469 static int
 470 em_attach(device_t dev)
 471 {
 472         struct adapter *adapter;
 473         int tsize, rsize;
 474         int error = 0;
 475
 476         INIT_DEBUGOUT("em_attach: begin");
 477
 478         adapter = device_get_softc(dev);
 479
 480         callout_init(&adapter->timer);
 481         callout_init(&adapter->tx_fifo_timer);
 482
 483         adapter->dev = dev;
 484         adapter->osdep.dev = dev;
 485
 486         /* SYSCTL stuff */
 487         sysctl_ctx_init(&adapter->sysctl_ctx);
 488         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
 489                                                SYSCTL_STATIC_CHILDREN(_hw),
 490                                                OID_AUTO,
 491                                                device_get_nameunit(dev),
 492                                                CTLFLAG_RD,
 493                                                0, "");
 494
 495         if (adapter->sysctl_tree == NULL) {
 496                 device_printf(dev, "Unable to create sysctl tree\n");
 497                 return EIO;
 498         }
 499
 500         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
 501                         SYSCTL_CHILDREN(adapter->sysctl_tree),
 502                         OID_AUTO, "debug_info", CTLTYPE_INT|CTLFLAG_RW,
 503                         (void *)adapter, 0,
 504                         em_sysctl_debug_info, "I", "Debug Information");
 505
 506         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
 507                         SYSCTL_CHILDREN(adapter->sysctl_tree),
 508                         OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW,
 509                         (void *)adapter, 0,
 510                         em_sysctl_stats, "I", "Statistics");
 511
 512         /* Determine hardware revision */
 513         em_identify_hardware(adapter);
 514
 515         /* Set up some sysctls for the tunable interrupt delays */
 516         em_add_int_delay_sysctl(adapter, "rx_int_delay",
 517                                 "receive interrupt delay in usecs",
 518                                 &adapter->rx_int_delay,
 519                                 E1000_REG_OFFSET(&adapter->hw, RDTR),
 520                                 em_rx_int_delay_dflt);
 521         em_add_int_delay_sysctl(adapter, "tx_int_delay",
 522                                 "transmit interrupt delay in usecs",
 523                                 &adapter->tx_int_delay,
 524                                 E1000_REG_OFFSET(&adapter->hw, TIDV),
 525                                 em_tx_int_delay_dflt);
 526         if (adapter->hw.mac_type >= em_82540) {
 527                 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay",
 528                                         "receive interrupt delay limit in usecs",
 529                                         &adapter->rx_abs_int_delay,
 530                                         E1000_REG_OFFSET(&adapter->hw, RADV),
 531                                         em_rx_abs_int_delay_dflt);
 532                 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay",
 533                                         "transmit interrupt delay limit in usecs",
 534                                         &adapter->tx_abs_int_delay,
 535                                         E1000_REG_OFFSET(&adapter->hw, TADV),
 536                                         em_tx_abs_int_delay_dflt);
 537                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
 538                         SYSCTL_CHILDREN(adapter->sysctl_tree),
 539                         OID_AUTO, "int_throttle_ceil", CTLTYPE_INT|CTLFLAG_RW,
 540                         adapter, 0, em_sysctl_int_throttle, "I", NULL);
 541         }
 542
 543         /*
 544          * Validate number of transmit and receive descriptors. It
 545          * must not exceed hardware maximum, and must be multiple
 546          * of EM_DBA_ALIGN.
 547          */
 548         if (((em_txd * sizeof(struct em_tx_desc)) % EM_DBA_ALIGN) != 0 ||
 549             (adapter->hw.mac_type >= em_82544 && em_txd > EM_MAX_TXD) ||
 550             (adapter->hw.mac_type < em_82544 && em_txd > EM_MAX_TXD_82543) ||
 551             (em_txd < EM_MIN_TXD)) {
 552                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 553                               EM_DEFAULT_TXD, em_txd);
 554                 adapter->num_tx_desc = EM_DEFAULT_TXD;
 555         } else {
 556                 adapter->num_tx_desc = em_txd;
 557         }
 558
 559         if (((em_rxd * sizeof(struct em_rx_desc)) % EM_DBA_ALIGN) != 0 ||
 560             (adapter->hw.mac_type >= em_82544 && em_rxd > EM_MAX_RXD) ||
 561             (adapter->hw.mac_type < em_82544 && em_rxd > EM_MAX_RXD_82543) ||
 562             (em_rxd < EM_MIN_RXD)) {
 563                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 564                               EM_DEFAULT_RXD, em_rxd);
 565                 adapter->num_rx_desc = EM_DEFAULT_RXD;
 566         } else {
 567                 adapter->num_rx_desc = em_rxd;
 568         }
 569
 570         SYSCTL_ADD_INT(NULL, SYSCTL_CHILDREN(adapter->sysctl_tree), OID_AUTO, "rxd",
 571                        CTLFLAG_RD, &adapter->num_rx_desc, 0, NULL);
 572         SYSCTL_ADD_INT(NULL, SYSCTL_CHILDREN(adapter->sysctl_tree), OID_AUTO, "txd",
 573                        CTLFLAG_RD, &adapter->num_tx_desc, 0, NULL);
 574
 575         adapter->hw.autoneg = DO_AUTO_NEG;
 576         adapter->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT;
 577         adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 578         adapter->hw.tbi_compatibility_en = TRUE;
 579         adapter->rx_buffer_len = EM_RXBUFFER_2048;
 580
 581         adapter->hw.phy_init_script = 1;
 582         adapter->hw.phy_reset_disable = FALSE;
 583
 584 #ifndef EM_MASTER_SLAVE
 585         adapter->hw.master_slave = em_ms_hw_default;
 586 #else
 587         adapter->hw.master_slave = EM_MASTER_SLAVE;
 588 #endif
 589
 590         /*
 591          * Set the max frame size assuming standard ethernet
 592          * sized frames.
 593          */
 594         adapter->hw.max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 595
 596         adapter->hw.min_frame_size =
 597             MINIMUM_ETHERNET_PACKET_SIZE + ETHER_CRC_LEN;
 598
 599         /*
 600          * This controls when hardware reports transmit completion
 601          * status.
 602          */
 603         adapter->hw.report_tx_early = 1;
 604
 605         error = em_allocate_pci_resources(dev);
 606         if (error)
 607                 goto fail;
 608
 609         /* Initialize eeprom parameters */
 610         em_init_eeprom_params(&adapter->hw);
 611
 612         tsize = roundup2(adapter->num_tx_desc * sizeof(struct em_tx_desc),
 613                          EM_DBA_ALIGN);
 614
 615         /* Allocate Transmit Descriptor ring */
 616         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 617         if (error) {
 618                 device_printf(dev, "Unable to allocate TxDescriptor memory\n");
 619                 goto fail;
 620         }
 621         adapter->tx_desc_base = (struct em_tx_desc *)adapter->txdma.dma_vaddr;
 622
 623         rsize = roundup2(adapter->num_rx_desc * sizeof(struct em_rx_desc),
 624                          EM_DBA_ALIGN);
 625
 626         /* Allocate Receive Descriptor ring */
 627         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 628         if (error) {
 629                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 630                 goto fail;
 631         }
 632         adapter->rx_desc_base = (struct em_rx_desc *)adapter->rxdma.dma_vaddr;
 633
 634         /* Initialize the hardware */
 635         if (em_hardware_init(adapter)) {
 636                 device_printf(dev, "Unable to initialize the hardware\n");
 637                 error = EIO;
 638                 goto fail;
 639         }
 640
 641         /* Copy the permanent MAC address out of the EEPROM */
 642         if (em_read_mac_addr(&adapter->hw) < 0) {
 643                 device_printf(dev,
 644                               "EEPROM read error while reading MAC address\n");
 645                 error = EIO;
 646                 goto fail;
 647         }
 648
 649         if (!em_is_valid_ether_addr(adapter->hw.mac_addr)) {
 650                 device_printf(dev, "Invalid MAC address\n");
 651                 error = EIO;
 652                 goto fail;
 653         }
 654
 655         /* Setup OS specific network interface */
 656         em_setup_interface(dev, adapter);
 657
 658         /* Initialize statistics */
 659         em_clear_hw_cntrs(&adapter->hw);
 660         em_update_stats_counters(adapter);
 661         adapter->hw.get_link_status = 1;
 662         em_update_link_status(adapter);
 663
 664         /* Indicate SOL/IDER usage */
 665         if (em_check_phy_reset_block(&adapter->hw)) {
 666                 device_printf(dev, "PHY reset is blocked due to "
 667                               "SOL/IDER session.\n");
 668         }
 669
 670         /* Identify 82544 on PCIX */
 671         em_get_bus_info(&adapter->hw);
 672         if (adapter->hw.bus_type == em_bus_type_pcix &&
 673             adapter->hw.mac_type == em_82544)
 674                 adapter->pcix_82544 = TRUE;
 675         else
 676                 adapter->pcix_82544 = FALSE;
 677
 678         error = bus_setup_intr(dev, adapter->res_interrupt, INTR_NETSAFE,
 679                            em_intr, adapter,
 680                            &adapter->int_handler_tag,
 681                            adapter->interface_data.ac_if.if_serializer);
 682         if (error) {
 683                 device_printf(dev, "Error registering interrupt handler!\n");
 684                 ether_ifdetach(&adapter->interface_data.ac_if);
 685                 goto fail;
 686         }
 687
 688         INIT_DEBUGOUT("em_attach: end");
 689         return(0);
 690
 691 fail:
 692         em_detach(dev);
 693         return(error);
 694 }
 695
 696 /*********************************************************************
 697  *  Device removal routine
 698  *
 699  *  The detach entry point is called when the driver is being removed.
 700  *  This routine stops the adapter and deallocates all the resources
 701  *  that were allocated for driver operation.
 702  *
 703  *  return 0 on success, positive on failure
 704  *********************************************************************/
 705
 706 static int
 707 em_detach(device_t dev)
 708 {
 709         struct adapter *adapter = device_get_softc(dev);
 710
 711         INIT_DEBUGOUT("em_detach: begin");
 712
 713         if (device_is_attached(dev)) {
 714                 struct ifnet *ifp = &adapter->interface_data.ac_if;
 715
 716                 lwkt_serialize_enter(ifp->if_serializer);
 717                 adapter->in_detach = 1;
 718                 em_stop(adapter);
 719                 em_phy_hw_reset(&adapter->hw);
 720                 bus_teardown_intr(dev, adapter->res_interrupt,
 721                                   adapter->int_handler_tag);
 722                 lwkt_serialize_exit(ifp->if_serializer);
 723
 724                 ether_ifdetach(ifp);
 725         }
 726         bus_generic_detach(dev);
 727
 728         em_free_pci_resources(dev);
 729
 730         /* Free Transmit Descriptor ring */
 731         if (adapter->tx_desc_base != NULL) {
 732                 em_dma_free(adapter, &adapter->txdma);
 733                 adapter->tx_desc_base = NULL;
 734         }
 735
 736         /* Free Receive Descriptor ring */
 737         if (adapter->rx_desc_base != NULL) {
 738                 em_dma_free(adapter, &adapter->rxdma);
 739                 adapter->rx_desc_base = NULL;
 740         }
 741
 742         /* Free sysctl tree */
 743         if (adapter->sysctl_tree != NULL) {
 744                 adapter->sysctl_tree = NULL;
 745                 sysctl_ctx_free(&adapter->sysctl_ctx);
 746         }
 747
 748         return (0);
 749 }
 750
 751 /*********************************************************************
 752  *
 753  *  Shutdown entry point
 754  *
 755  **********************************************************************/
 756
 757 static int
 758 em_shutdown(device_t dev)
 759 {
 760         struct adapter *adapter = device_get_softc(dev);
 761         struct ifnet *ifp = &adapter->interface_data.ac_if;
 762
 763         lwkt_serialize_enter(ifp->if_serializer);
 764         em_stop(adapter);
 765         lwkt_serialize_exit(ifp->if_serializer);
 766
 767         return (0);
 768 }
 769
 770 /*
 771  * Suspend/resume device methods.
 772  */
 773 static int
 774 em_suspend(device_t dev)
 775 {
 776         struct adapter *adapter = device_get_softc(dev);
 777         struct ifnet *ifp = &adapter->interface_data.ac_if;
 778
 779         lwkt_serialize_enter(ifp->if_serializer);
 780         em_stop(adapter);
 781         lwkt_serialize_exit(ifp->if_serializer);
 782         return (0);
 783 }
 784
 785 static int
 786 em_resume(device_t dev)
 787 {
 788         struct adapter *adapter = device_get_softc(dev);
 789         struct ifnet *ifp = &adapter->interface_data.ac_if;
 790
 791         lwkt_serialize_enter(ifp->if_serializer);
 792         ifp->if_flags &= ~IFF_RUNNING;
 793         em_init(adapter);
 794         if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
 795                 em_start(ifp);
 796         lwkt_serialize_exit(ifp->if_serializer);
 797
 798         return bus_generic_resume(dev);
 799 }
 800
 801 /*********************************************************************
 802  *  Transmit entry point
 803  *
 804  *  em_start is called by the stack to initiate a transmit.
 805  *  The driver will remain in this routine as long as there are
 806  *  packets to transmit and transmit resources are available.
 807  *  In case resources are not available stack is notified and
 808  *  the packet is requeued.
 809  **********************************************************************/
 810
 811 static void
 812 em_start(struct ifnet *ifp)
 813 {
 814         struct mbuf *m_head;
 815         struct adapter *adapter = ifp->if_softc;
 816
 817         ASSERT_SERIALIZED(ifp->if_serializer);
 818
 819         if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
 820                 return;
 821         if (!adapter->link_active)
 822                 return;
 823         while (!ifq_is_empty(&ifp->if_snd)) {
 824                 m_head = ifq_poll(&ifp->if_snd);
 825
 826                 if (m_head == NULL)
 827                         break;
 828
 829                 logif(pkt_txqueue);
 830                 if (em_encap(adapter, m_head)) {
 831                         ifp->if_flags |= IFF_OACTIVE;
 832                         break;
 833                 }
 834                 ifq_dequeue(&ifp->if_snd, m_head);
 835
 836                 /* Send a copy of the frame to the BPF listener */
 837                 BPF_MTAP(ifp, m_head);
 838
 839                 /* Set timeout in case hardware has problems transmitting. */
 840                 ifp->if_timer = EM_TX_TIMEOUT;
 841         }
 842 }
 843
 844 /*********************************************************************
 845  *  Ioctl entry point
 846  *
 847  *  em_ioctl is called when the user wants to configure the
 848  *  interface.
 849  *
 850  *  return 0 on success, positive on failure
 851  **********************************************************************/
 852
 853 static int
 854 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
 855 {
 856         int max_frame_size, mask, error = 0, reinit = 0;
 857         struct ifreq *ifr = (struct ifreq *) data;
 858         struct adapter *adapter = ifp->if_softc;
 859         uint16_t eeprom_data = 0;
 860
 861         ASSERT_SERIALIZED(ifp->if_serializer);
 862
 863         if (adapter->in_detach)
 864                 return 0;
 865
 866         switch (command) {
 867         case SIOCSIFMTU:
 868                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)");
 869                 switch (adapter->hw.mac_type) {
 870                 case em_82573:
 871                         /*
 872                          * 82573 only supports jumbo frames
 873                          * if ASPM is disabled.
 874                          */
 875                         em_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3,
 876                             1, &eeprom_data);
 877                         if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
 878                                 max_frame_size = ETHER_MAX_LEN;
 879                                 break;
 880                         }
 881                         /* Allow Jumbo frames */
 882                         /* FALLTHROUGH */
 883                 case em_82571:
 884                 case em_82572:
 885                 case em_ich9lan:
 886                 case em_80003es2lan:    /* Limit Jumbo Frame size */
 887                         max_frame_size = 9234;
 888                         break;
 889                 case em_ich8lan:
 890                         /* ICH8 does not support jumbo frames */
 891                         max_frame_size = ETHER_MAX_LEN;
 892                         break;
 893                 default:
 894                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
 895                         break;
 896                 }
 897                 if (ifr->ifr_mtu >
 898                         max_frame_size - ETHER_HDR_LEN - ETHER_CRC_LEN) {
 899                         error = EINVAL;
 900                 } else {
 901                         ifp->if_mtu = ifr->ifr_mtu;
 902                         adapter->hw.max_frame_size =
 903                         ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
 904                         ifp->if_flags &= ~IFF_RUNNING;
 905                         em_init(adapter);
 906                 }
 907                 break;
 908         case SIOCSIFFLAGS:
 909                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS "
 910                                "(Set Interface Flags)");
 911                 if (ifp->if_flags & IFF_UP) {
 912                         if (!(ifp->if_flags & IFF_RUNNING)) {
 913                                 em_init(adapter);
 914                         } else if ((ifp->if_flags ^ adapter->if_flags) &
 915                                    IFF_PROMISC) {
 916                                 em_disable_promisc(adapter);
 917                                 em_set_promisc(adapter);
 918                         }
 919                 } else {
 920                         if (ifp->if_flags & IFF_RUNNING)
 921                                 em_stop(adapter);
 922                 }
 923                 adapter->if_flags = ifp->if_flags;
 924                 break;
 925         case SIOCADDMULTI:
 926         case SIOCDELMULTI:
 927                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI");
 928                 if (ifp->if_flags & IFF_RUNNING) {
 929                         em_disable_intr(adapter);
 930                         em_set_multi(adapter);
 931                         if (adapter->hw.mac_type == em_82542_rev2_0)
 932                                 em_initialize_receive_unit(adapter);
 933 #ifdef DEVICE_POLLING
 934                         /* Do not enable interrupt if polling(4) is enabled */
 935                         if ((ifp->if_flags & IFF_POLLING) == 0)
 936 #endif
 937                         em_enable_intr(adapter);
 938                 }
 939                 break;
 940         case SIOCSIFMEDIA:
 941                 /* Check SOL/IDER usage */
 942                 if (em_check_phy_reset_block(&adapter->hw)) {
 943                         if_printf(ifp, "Media change is blocked due to "
 944                                   "SOL/IDER session.\n");
 945                         break;
 946                 }
 947                 /* FALLTHROUGH */
 948         case SIOCGIFMEDIA:
 949                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA "
 950                                "(Get/Set Interface Media)");
 951                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
 952                 break;
 953         case SIOCSIFCAP:
 954                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)");
 955                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
 956                 if (mask & IFCAP_HWCSUM) {
 957                         ifp->if_capenable ^= IFCAP_HWCSUM;
 958                         reinit = 1;
 959                 }
 960                 if (mask & IFCAP_VLAN_HWTAGGING) {
 961                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
 962                         reinit = 1;
 963                 }
 964                 if (reinit && (ifp->if_flags & IFF_RUNNING)) {
 965                         ifp->if_flags &= ~IFF_RUNNING;
 966                         em_init(adapter);
 967                 }
 968                 break;
 969         default:
 970                 error = ether_ioctl(ifp, command, data);
 971                 break;
 972         }
 973
 974         return (error);
 975 }
 976
 977 /*********************************************************************
 978  *  Watchdog entry point
 979  *
 980  *  This routine is called whenever hardware quits transmitting.
 981  *
 982  **********************************************************************/
 983
 984 static void
 985 em_watchdog(struct ifnet *ifp)
 986 {
 987         struct adapter *adapter = ifp->if_softc;
 988
 989         /*
 990          * If we are in this routine because of pause frames, then
 991          * don't reset the hardware.
 992          */
 993         if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_TXOFF) {
 994                 ifp->if_timer = EM_TX_TIMEOUT;
 995                 return;
 996         }
 997
 998         if (em_check_for_link(&adapter->hw) == 0)
 999                 if_printf(ifp, "watchdog timeout -- resetting\n");
1000
1001         ifp->if_flags &= ~IFF_RUNNING;
1002         em_init(adapter);
1003
1004         adapter->watchdog_timeouts++;
1005 }
1006
1007 /*********************************************************************
1008  *  Init entry point
1009  *
1010  *  This routine is used in two ways. It is used by the stack as
1011  *  init entry point in network interface structure. It is also used
1012  *  by the driver as a hw/sw initialization routine to get to a
1013  *  consistent state.
1014  *
1015  *  return 0 on success, positive on failure
1016  **********************************************************************/
1017
1018 static void
1019 em_init(void *arg)
1020 {
1021         struct adapter *adapter = arg;
1022         uint32_t pba;
1023         struct ifnet *ifp = &adapter->interface_data.ac_if;
1024
1025         ASSERT_SERIALIZED(ifp->if_serializer);
1026
1027         INIT_DEBUGOUT("em_init: begin");
1028
1029         if (ifp->if_flags & IFF_RUNNING)
1030                 return;
1031
1032         em_stop(adapter);
1033
1034         /*
1035          * Packet Buffer Allocation (PBA)
1036          * Writing PBA sets the receive portion of the buffer
1037          * the remainder is used for the transmit buffer.
1038          *
1039          * Devices before the 82547 had a Packet Buffer of 64K.
1040          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1041          * After the 82547 the buffer was reduced to 40K.
1042          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1043          *   Note: default does not leave enough room for Jumbo Frame >10k.
1044          */
1045         switch (adapter->hw.mac_type) {
1046         case em_82547:
1047         case em_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1048                 if (adapter->hw.max_frame_size > EM_RXBUFFER_8192)
1049                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1050                 else
1051                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1052
1053                 adapter->tx_fifo_head = 0;
1054                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1055                 adapter->tx_fifo_size =
1056                         (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1057                 break;
1058         /* Total Packet Buffer on these is 48K */
1059         case em_82571:
1060         case em_82572:
1061         case em_80003es2lan:
1062                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1063                 break;
1064         case em_82573: /* 82573: Total Packet Buffer is 32K */
1065                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1066                 break;
1067         case em_ich8lan:
1068                 pba = E1000_PBA_8K;
1069                 break;
1070         case em_ich9lan:
1071 #define E1000_PBA_10K   0x000A
1072                 pba = E1000_PBA_10K;
1073                 break;
1074         default:
1075                 /* Devices before 82547 had a Packet Buffer of 64K.   */
1076                 if(adapter->hw.max_frame_size > EM_RXBUFFER_8192)
1077                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1078                 else
1079                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1080         }
1081
1082         INIT_DEBUGOUT1("em_init: pba=%dK",pba);
1083         E1000_WRITE_REG(&adapter->hw, PBA, pba);
1084
1085         /* Get the latest mac address, User can use a LAA */
1086         bcopy(adapter->interface_data.ac_enaddr, adapter->hw.mac_addr,
1087               ETHER_ADDR_LEN);
1088
1089         /* Initialize the hardware */
1090         if (em_hardware_init(adapter)) {
1091                 if_printf(ifp, "Unable to initialize the hardware\n");
1092                 return;
1093         }
1094         em_update_link_status(adapter);
1095
1096         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1097                 em_enable_vlans(adapter);
1098
1099         /* Set hardware offload abilities */
1100         if (adapter->hw.mac_type >= em_82543) {
1101                 if (ifp->if_capenable & IFCAP_TXCSUM)
1102                         ifp->if_hwassist = EM_CHECKSUM_FEATURES;
1103                 else
1104                         ifp->if_hwassist = 0;
1105         }
1106
1107         /* Prepare transmit descriptors and buffers */
1108         if (em_setup_transmit_structures(adapter)) {
1109                 if_printf(ifp, "Could not setup transmit structures\n");
1110                 em_stop(adapter);
1111                 return;
1112         }
1113         em_initialize_transmit_unit(adapter);
1114
1115         /* Setup Multicast table */
1116         em_set_multi(adapter);
1117
1118         /* Prepare receive descriptors and buffers */
1119         if (em_setup_receive_structures(adapter)) {
1120                 if_printf(ifp, "Could not setup receive structures\n");
1121                 em_stop(adapter);
1122                 return;
1123         }
1124         em_initialize_receive_unit(adapter);
1125
1126         /* Don't lose promiscuous settings */
1127         em_set_promisc(adapter);
1128
1129         ifp->if_flags |= IFF_RUNNING;
1130         ifp->if_flags &= ~IFF_OACTIVE;
1131
1132         callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1133         em_clear_hw_cntrs(&adapter->hw);
1134
1135 #ifdef DEVICE_POLLING
1136         /* Do not enable interrupt if polling(4) is enabled */
1137         if (ifp->if_flags & IFF_POLLING)
1138                 em_disable_intr(adapter);
1139         else
1140 #endif
1141         em_enable_intr(adapter);
1142
1143         /* Don't reset the phy next time init gets called */
1144         adapter->hw.phy_reset_disable = TRUE;
1145 }
1146
1147 #ifdef DEVICE_POLLING
1148
1149 static void
1150 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1151 {
1152         struct adapter *adapter = ifp->if_softc;
1153         uint32_t reg_icr;
1154
1155         logif(poll_beg);
1156
1157         ASSERT_SERIALIZED(ifp->if_serializer);
1158
1159         switch(cmd) {
1160         case POLL_REGISTER:
1161                 em_disable_intr(adapter);
1162                 break;
1163         case POLL_DEREGISTER:
1164                 em_enable_intr(adapter);
1165                 break;
1166         case POLL_AND_CHECK_STATUS:
1167                 reg_icr = E1000_READ_REG(&adapter->hw, ICR);
1168                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1169                         callout_stop(&adapter->timer);
1170                         adapter->hw.get_link_status = 1;
1171                         em_check_for_link(&adapter->hw);
1172                         em_update_link_status(adapter);
1173                         callout_reset(&adapter->timer, hz, em_local_timer,
1174                                       adapter);
1175                 }
1176                 /* fall through */
1177         case POLL_ONLY:
1178                 if (ifp->if_flags & IFF_RUNNING) {
1179                         em_rxeof(adapter, count);
1180                         em_txeof(adapter);
1181
1182                         if (!ifq_is_empty(&ifp->if_snd))
1183                                 em_start(ifp);
1184                 }
1185                 break;
1186         }
1187         logif(poll_end);
1188 }
1189
1190 #endif /* DEVICE_POLLING */
1191
1192 /*********************************************************************
1193  *
1194  *  Interrupt Service routine
1195  *
1196  *********************************************************************/
1197 static void
1198 em_intr(void *arg)
1199 {
1200         uint32_t reg_icr;
1201         struct ifnet *ifp;
1202         struct adapter *adapter = arg;
1203
1204         ifp = &adapter->interface_data.ac_if;
1205
1206         logif(intr_beg);
1207         ASSERT_SERIALIZED(ifp->if_serializer);
1208
1209         reg_icr = E1000_READ_REG(&adapter->hw, ICR);
1210         if ((adapter->hw.mac_type >= em_82571 &&
1211              (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1212             reg_icr == 0) {
1213                 logif(intr_end);
1214                 return;
1215         }
1216
1217         /*
1218          * XXX: some laptops trigger several spurious interrupts on em(4)
1219          * when in the resume cycle. The ICR register reports all-ones
1220          * value in this case. Processing such interrupts would lead to
1221          * a freeze. I don't know why.
1222          */
1223         if (reg_icr == 0xffffffff) {
1224                 logif(intr_end);
1225                 return;
1226         }
1227
1228         /*
1229          * note: do not attempt to improve efficiency by looping.  This
1230          * only results in unnecessary piecemeal collection of received
1231          * packets and unnecessary piecemeal cleanups of the transmit ring.
1232          */
1233         if (ifp->if_flags & IFF_RUNNING) {
1234                 em_rxeof(adapter, -1);
1235                 em_txeof(adapter);
1236         }
1237
1238         /* Link status change */
1239         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1240                 callout_stop(&adapter->timer);
1241                 adapter->hw.get_link_status = 1;
1242                 em_check_for_link(&adapter->hw);
1243                 em_update_link_status(adapter);
1244                 callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1245         }
1246
1247         if (reg_icr & E1000_ICR_RXO)
1248                 adapter->rx_overruns++;
1249
1250         if ((ifp->if_flags & IFF_RUNNING) && !ifq_is_empty(&ifp->if_snd))
1251                 em_start(ifp);
1252         logif(intr_end);
1253 }
1254
1255 /*********************************************************************
1256  *
1257  *  Media Ioctl callback
1258  *
1259  *  This routine is called whenever the user queries the status of
1260  *  the interface using ifconfig.
1261  *
1262  **********************************************************************/
1263 static void
1264 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1265 {
1266         struct adapter *adapter = ifp->if_softc;
1267         u_char fiber_type = IFM_1000_SX;
1268
1269         INIT_DEBUGOUT("em_media_status: begin");
1270
1271         ASSERT_SERIALIZED(ifp->if_serializer);
1272
1273         em_check_for_link(&adapter->hw);
1274         em_update_link_status(adapter);
1275
1276         ifmr->ifm_status = IFM_AVALID;
1277         ifmr->ifm_active = IFM_ETHER;
1278
1279         if (!adapter->link_active)
1280                 return;
1281
1282         ifmr->ifm_status |= IFM_ACTIVE;
1283
1284         if (adapter->hw.media_type == em_media_type_fiber ||
1285             adapter->hw.media_type == em_media_type_internal_serdes) {
1286                 if (adapter->hw.mac_type == em_82545)
1287                         fiber_type = IFM_1000_LX;
1288                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1289         } else {
1290                 switch (adapter->link_speed) {
1291                 case 10:
1292                         ifmr->ifm_active |= IFM_10_T;
1293                         break;
1294                 case 100:
1295                         ifmr->ifm_active |= IFM_100_TX;
1296                         break;
1297                 case 1000:
1298                         ifmr->ifm_active |= IFM_1000_T;
1299                         break;
1300                 }
1301                 if (adapter->link_duplex == FULL_DUPLEX)
1302                         ifmr->ifm_active |= IFM_FDX;
1303                 else
1304                         ifmr->ifm_active |= IFM_HDX;
1305         }
1306 }
1307
1308 /*********************************************************************
1309  *
1310  *  Media Ioctl callback
1311  *
1312  *  This routine is called when the user changes speed/duplex using
1313  *  media/mediopt option with ifconfig.
1314  *
1315  **********************************************************************/
1316 static int
1317 em_media_change(struct ifnet *ifp)
1318 {
1319         struct adapter *adapter = ifp->if_softc;
1320         struct ifmedia *ifm = &adapter->media;
1321
1322         INIT_DEBUGOUT("em_media_change: begin");
1323
1324         ASSERT_SERIALIZED(ifp->if_serializer);
1325
1326         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1327                 return (EINVAL);
1328
1329         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1330         case IFM_AUTO:
1331                 adapter->hw.autoneg = DO_AUTO_NEG;
1332                 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1333                 break;
1334         case IFM_1000_LX:
1335         case IFM_1000_SX:
1336         case IFM_1000_T:
1337                 adapter->hw.autoneg = DO_AUTO_NEG;
1338                 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
1339                 break;
1340         case IFM_100_TX:
1341                 adapter->hw.autoneg = FALSE;
1342                 adapter->hw.autoneg_advertised = 0;
1343                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1344                         adapter->hw.forced_speed_duplex = em_100_full;
1345                 else
1346                         adapter->hw.forced_speed_duplex = em_100_half;
1347                 break;
1348         case IFM_10_T:
1349                 adapter->hw.autoneg = FALSE;
1350                 adapter->hw.autoneg_advertised = 0;
1351                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1352                         adapter->hw.forced_speed_duplex = em_10_full;
1353                 else
1354                         adapter->hw.forced_speed_duplex = em_10_half;
1355                 break;
1356         default:
1357                 if_printf(ifp, "Unsupported media type\n");
1358         }
1359         /*
1360          * As the speed/duplex settings may have changed we need to
1361          * reset the PHY.
1362          */
1363         adapter->hw.phy_reset_disable = FALSE;
1364
1365         ifp->if_flags &= ~IFF_RUNNING;
1366         em_init(adapter);
1367
1368         return(0);
1369 }
1370
1371 static void
1372 em_tx_cb(void *arg, bus_dma_segment_t *seg, int nsegs, bus_size_t mapsize,
1373          int error)
1374 {
1375         struct em_q *q = arg;
1376
1377         if (error)
1378                 return;
1379         KASSERT(nsegs <= EM_MAX_SCATTER,
1380                 ("Too many DMA segments returned when mapping tx packet"));
1381         q->nsegs = nsegs;
1382         bcopy(seg, q->segs, nsegs * sizeof(seg[0]));
1383 }
1384
1385 /*********************************************************************
1386  *
1387  *  This routine maps the mbufs to tx descriptors.
1388  *
1389  *  return 0 on success, positive on failure
1390  **********************************************************************/
1391 static int
1392 em_encap(struct adapter *adapter, struct mbuf *m_head)
1393 {
1394         uint32_t txd_upper = 0, txd_lower = 0, txd_used = 0, txd_saved = 0;
1395         int i, j, error, last = 0;
1396
1397         struct ifvlan *ifv = NULL;
1398         struct em_q q;
1399         struct em_buffer *tx_buffer = NULL, *tx_buffer_first;
1400         bus_dmamap_t map;
1401         struct em_tx_desc *current_tx_desc = NULL;
1402         struct ifnet *ifp = &adapter->interface_data.ac_if;
1403
1404         /*
1405          * Force a cleanup if number of TX descriptors
1406          * available hits the threshold
1407          */
1408         if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1409                 em_txeof(adapter);
1410                 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1411                         adapter->no_tx_desc_avail1++;
1412                         return (ENOBUFS);
1413                 }
1414         }
1415
1416         /*
1417          * Capture the first descriptor index, this descriptor will have
1418          * the index of the EOP which is the only one that now gets a
1419          * DONE bit writeback.
1420          */
1421         tx_buffer_first = &adapter->tx_buffer_area[adapter->next_avail_tx_desc];
1422
1423         /*
1424          * Map the packet for DMA.
1425          */
1426         map = tx_buffer_first->map;
1427         error = bus_dmamap_load_mbuf(adapter->txtag, map, m_head, em_tx_cb,
1428                                      &q, BUS_DMA_NOWAIT);
1429         if (error != 0) {
1430                 adapter->no_tx_dma_setup++;
1431                 return (error);
1432         }
1433         KASSERT(q.nsegs != 0, ("em_encap: empty packet"));
1434
1435         if (q.nsegs > (adapter->num_tx_desc_avail - 2)) {
1436                 adapter->no_tx_desc_avail2++;
1437                 error = ENOBUFS;
1438                 goto fail;
1439         }
1440
1441         if (ifp->if_hwassist > 0) {
1442                 em_transmit_checksum_setup(adapter,  m_head,
1443                                            &txd_upper, &txd_lower);
1444         }
1445
1446         /* Find out if we are in vlan mode */
1447         if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
1448             m_head->m_pkthdr.rcvif != NULL &&
1449             m_head->m_pkthdr.rcvif->if_type == IFT_L2VLAN)
1450                 ifv = m_head->m_pkthdr.rcvif->if_softc;
1451
1452         i = adapter->next_avail_tx_desc;
1453         if (adapter->pcix_82544)
1454                 txd_saved = i;
1455
1456         /* Set up our transmit descriptors */
1457         for (j = 0; j < q.nsegs; j++) {
1458                 /* If adapter is 82544 and on PCIX bus */
1459                 if(adapter->pcix_82544) {
1460                         DESC_ARRAY desc_array;
1461                         uint32_t array_elements, counter;
1462
1463                         /*
1464                          * Check the Address and Length combination and
1465                          * split the data accordingly
1466                          */
1467                         array_elements = em_fill_descriptors(q.segs[j].ds_addr,
1468                                                 q.segs[j].ds_len, &desc_array);
1469                         for (counter = 0; counter < array_elements; counter++) {
1470                                 if (txd_used == adapter->num_tx_desc_avail) {
1471                                         adapter->next_avail_tx_desc = txd_saved;
1472                                         adapter->no_tx_desc_avail2++;
1473                                         error = ENOBUFS;
1474                                         goto fail;
1475                                 }
1476                                 tx_buffer = &adapter->tx_buffer_area[i];
1477                                 current_tx_desc = &adapter->tx_desc_base[i];
1478                                 current_tx_desc->buffer_addr = htole64(
1479                                         desc_array.descriptor[counter].address);
1480                                 current_tx_desc->lower.data = htole32(
1481                                         adapter->txd_cmd | txd_lower |
1482                                         (uint16_t)desc_array.descriptor[counter].length);
1483                                 current_tx_desc->upper.data = htole32(txd_upper);
1484
1485                                 last = i;
1486                                 if (++i == adapter->num_tx_desc)
1487                                         i = 0;
1488
1489                                 tx_buffer->m_head = NULL;
1490                                 tx_buffer->next_eop = -1;
1491                                 txd_used++;
1492                         }
1493                 } else {
1494                         tx_buffer = &adapter->tx_buffer_area[i];
1495                         current_tx_desc = &adapter->tx_desc_base[i];
1496
1497                         current_tx_desc->buffer_addr = htole64(q.segs[j].ds_addr);
1498                         current_tx_desc->lower.data = htole32(
1499                                 adapter->txd_cmd | txd_lower | q.segs[j].ds_len);
1500                         current_tx_desc->upper.data = htole32(txd_upper);
1501
1502                         last = i;
1503                         if (++i == adapter->num_tx_desc)
1504                                 i = 0;
1505
1506                         tx_buffer->m_head = NULL;
1507                         tx_buffer->next_eop = -1;
1508                 }
1509         }
1510
1511         adapter->next_avail_tx_desc = i;
1512         if (adapter->pcix_82544)
1513                 adapter->num_tx_desc_avail -= txd_used;
1514         else
1515                 adapter->num_tx_desc_avail -= q.nsegs;
1516
1517         if (ifv != NULL) {
1518                 /* Set the vlan id */
1519                 current_tx_desc->upper.fields.special = htole16(ifv->ifv_tag);
1520
1521                 /* Tell hardware to add tag */
1522                 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_VLE);
1523         }
1524
1525         tx_buffer->m_head = m_head;
1526         tx_buffer_first->map = tx_buffer->map;
1527         tx_buffer->map = map;
1528         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1529
1530         /*
1531          * Last Descriptor of Packet needs End Of Packet (EOP)
1532          * and Report Status (RS)
1533          */
1534         current_tx_desc->lower.data |=
1535                 htole32(E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS);
1536
1537         /*
1538          * Keep track in the first buffer which descriptor will be
1539          * written back.
1540          */
1541         tx_buffer_first->next_eop = last;
1542
1543         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
1544                         BUS_DMASYNC_PREWRITE);
1545
1546         /*
1547          * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000
1548          * that this frame is available to transmit.
1549          */
1550         if (adapter->hw.mac_type == em_82547 &&
1551             adapter->link_duplex == HALF_DUPLEX) {
1552                 em_82547_move_tail_serialized(adapter);
1553         } else {
1554                 E1000_WRITE_REG(&adapter->hw, TDT, i);
1555                 if (adapter->hw.mac_type == em_82547) {
1556                         em_82547_update_fifo_head(adapter,
1557                                                   m_head->m_pkthdr.len);
1558                 }
1559         }
1560
1561         return (0);
1562 fail:
1563         bus_dmamap_unload(adapter->txtag, map);
1564         return error;
1565 }
1566
1567 /*********************************************************************
1568  *
1569  * 82547 workaround to avoid controller hang in half-duplex environment.
1570  * The workaround is to avoid queuing a large packet that would span
1571  * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers
1572  * in this case. We do that only when FIFO is quiescent.
1573  *
1574  **********************************************************************/
1575 static void
1576 em_82547_move_tail(void *arg)
1577 {
1578         struct adapter *adapter = arg;
1579         struct ifnet *ifp = &adapter->interface_data.ac_if;
1580
1581         lwkt_serialize_enter(ifp->if_serializer);
1582         em_82547_move_tail_serialized(adapter);
1583         lwkt_serialize_exit(ifp->if_serializer);
1584 }
1585
1586 static void
1587 em_82547_move_tail_serialized(struct adapter *adapter)
1588 {
1589         uint16_t hw_tdt;
1590         uint16_t sw_tdt;
1591         struct em_tx_desc *tx_desc;
1592         uint16_t length = 0;
1593         boolean_t eop = 0;
1594
1595         hw_tdt = E1000_READ_REG(&adapter->hw, TDT);
1596         sw_tdt = adapter->next_avail_tx_desc;
1597
1598         while (hw_tdt != sw_tdt) {
1599                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1600                 length += tx_desc->lower.flags.length;
1601                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1602                 if (++hw_tdt == adapter->num_tx_desc)
1603                         hw_tdt = 0;
1604
1605                 if (eop) {
1606                         if (em_82547_fifo_workaround(adapter, length)) {
1607                                 adapter->tx_fifo_wrk_cnt++;
1608                                 callout_reset(&adapter->tx_fifo_timer, 1,
1609                                         em_82547_move_tail, adapter);
1610                                 break;
1611                         }
1612                         E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt);
1613                         em_82547_update_fifo_head(adapter, length);
1614                         length = 0;
1615                 }
1616         }
1617 }
1618
1619 static int
1620 em_82547_fifo_workaround(struct adapter *adapter, int len)
1621 {
1622         int fifo_space, fifo_pkt_len;
1623
1624         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1625
1626         if (adapter->link_duplex == HALF_DUPLEX) {
1627                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1628
1629                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1630                         if (em_82547_tx_fifo_reset(adapter))
1631                                 return (0);
1632                         else
1633                                 return (1);
1634                 }
1635         }
1636
1637         return (0);
1638 }
1639
1640 static void
1641 em_82547_update_fifo_head(struct adapter *adapter, int len)
1642 {
1643         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1644
1645         /* tx_fifo_head is always 16 byte aligned */
1646         adapter->tx_fifo_head += fifo_pkt_len;
1647         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1648                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1649 }
1650
1651 static int
1652 em_82547_tx_fifo_reset(struct adapter *adapter)
1653 {
1654         uint32_t tctl;
1655
1656         if (E1000_READ_REG(&adapter->hw, TDT) == E1000_READ_REG(&adapter->hw, TDH) &&
1657             E1000_READ_REG(&adapter->hw, TDFT) == E1000_READ_REG(&adapter->hw, TDFH) &&
1658             E1000_READ_REG(&adapter->hw, TDFTS) == E1000_READ_REG(&adapter->hw, TDFHS) &&
1659             E1000_READ_REG(&adapter->hw, TDFPC) == 0) {
1660                 /* Disable TX unit */
1661                 tctl = E1000_READ_REG(&adapter->hw, TCTL);
1662                 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN);
1663
1664                 /* Reset FIFO pointers */
1665                 E1000_WRITE_REG(&adapter->hw, TDFT,  adapter->tx_head_addr);
1666                 E1000_WRITE_REG(&adapter->hw, TDFH,  adapter->tx_head_addr);
1667                 E1000_WRITE_REG(&adapter->hw, TDFTS, adapter->tx_head_addr);
1668                 E1000_WRITE_REG(&adapter->hw, TDFHS, adapter->tx_head_addr);
1669
1670                 /* Re-enable TX unit */
1671                 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
1672                 E1000_WRITE_FLUSH(&adapter->hw);
1673
1674                 adapter->tx_fifo_head = 0;
1675                 adapter->tx_fifo_reset_cnt++;
1676
1677                 return (TRUE);
1678         } else {
1679                 return (FALSE);
1680         }
1681 }
1682
1683 static void
1684 em_set_promisc(struct adapter *adapter)
1685 {
1686         uint32_t reg_rctl;
1687         struct ifnet *ifp = &adapter->interface_data.ac_if;
1688
1689         reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1690
1691         adapter->em_insert_vlan_header = 0;
1692         if (ifp->if_flags & IFF_PROMISC) {
1693                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1694                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1695
1696                 /*
1697                  * Disable VLAN stripping in promiscous mode.
1698                  * This enables bridging of vlan tagged frames to occur
1699                  * and also allows vlan tags to be seen in tcpdump.
1700                  */
1701                 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1702                         em_disable_vlans(adapter);
1703                 adapter->em_insert_vlan_header = 1;
1704         } else if (ifp->if_flags & IFF_ALLMULTI) {
1705                 reg_rctl |= E1000_RCTL_MPE;
1706                 reg_rctl &= ~E1000_RCTL_UPE;
1707                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1708         }
1709 }
1710
1711 static void
1712 em_disable_promisc(struct adapter *adapter)
1713 {
1714         struct ifnet *ifp = &adapter->interface_data.ac_if;
1715
1716         uint32_t reg_rctl;
1717
1718         reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1719
1720         reg_rctl &= (~E1000_RCTL_UPE);
1721         reg_rctl &= (~E1000_RCTL_MPE);
1722         E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1723
1724         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1725                 em_enable_vlans(adapter);
1726         adapter->em_insert_vlan_header = 0;
1727 }
1728
1729 /*********************************************************************
1730  *  Multicast Update
1731  *
1732  *  This routine is called whenever multicast address list is updated.
1733  *
1734  **********************************************************************/
1735
1736 static void
1737 em_set_multi(struct adapter *adapter)
1738 {
1739         uint32_t reg_rctl = 0;
1740         uint8_t mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_LENGTH_OF_ADDRESS];
1741         struct ifmultiaddr *ifma;
1742         int mcnt = 0;
1743         struct ifnet *ifp = &adapter->interface_data.ac_if;
1744
1745         IOCTL_DEBUGOUT("em_set_multi: begin");
1746
1747         if (adapter->hw.mac_type == em_82542_rev2_0) {
1748                 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1749                 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1750                         em_pci_clear_mwi(&adapter->hw);
1751                 reg_rctl |= E1000_RCTL_RST;
1752                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1753                 msec_delay(5);
1754         }
1755
1756         LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1757                 if (ifma->ifma_addr->sa_family != AF_LINK)
1758                         continue;
1759
1760                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1761                         break;
1762
1763                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1764                       &mta[mcnt*ETH_LENGTH_OF_ADDRESS], ETH_LENGTH_OF_ADDRESS);
1765                 mcnt++;
1766         }
1767
1768         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1769                 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1770                 reg_rctl |= E1000_RCTL_MPE;
1771                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1772         } else {
1773                 em_mc_addr_list_update(&adapter->hw, mta, mcnt, 0, 1);
1774         }
1775
1776         if (adapter->hw.mac_type == em_82542_rev2_0) {
1777                 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1778                 reg_rctl &= ~E1000_RCTL_RST;
1779                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1780                 msec_delay(5);
1781                 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1782                         em_pci_set_mwi(&adapter->hw);
1783         }
1784 }
1785
1786 /*********************************************************************
1787  *  Timer routine
1788  *
1789  *  This routine checks for link status and updates statistics.
1790  *
1791  **********************************************************************/
1792
1793 static void
1794 em_local_timer(void *arg)
1795 {
1796         struct ifnet *ifp;
1797         struct adapter *adapter = arg;
1798         ifp = &adapter->interface_data.ac_if;
1799
1800         lwkt_serialize_enter(ifp->if_serializer);
1801
1802         em_check_for_link(&adapter->hw);
1803         em_update_link_status(adapter);
1804         em_update_stats_counters(adapter);
1805         if (em_display_debug_stats && ifp->if_flags & IFF_RUNNING)
1806                 em_print_hw_stats(adapter);
1807         em_smartspeed(adapter);
1808
1809         callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1810
1811         lwkt_serialize_exit(ifp->if_serializer);
1812 }
1813
1814 static void
1815 em_update_link_status(struct adapter *adapter)
1816 {
1817         struct ifnet *ifp;
1818         ifp = &adapter->interface_data.ac_if;
1819
1820         if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
1821                 if (adapter->link_active == 0) {
1822                         em_get_speed_and_duplex(&adapter->hw,
1823                                                 &adapter->link_speed,
1824                                                 &adapter->link_duplex);
1825                         /* Check if we may set SPEED_MODE bit on PCI-E */
1826                         if (adapter->link_speed == SPEED_1000 &&
1827                             (adapter->hw.mac_type == em_82571 ||
1828                              adapter->hw.mac_type == em_82572)) {
1829                                 int tarc0;
1830
1831                                 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
1832                                 tarc0 |= SPEED_MODE_BIT;
1833                                 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
1834                         }
1835                         if (bootverbose) {
1836                                 if_printf(&adapter->interface_data.ac_if,
1837                                           "Link is up %d Mbps %s\n",
1838                                           adapter->link_speed,
1839                                           adapter->link_duplex == FULL_DUPLEX ?
1840                                                 "Full Duplex" : "Half Duplex");
1841                         }
1842                         adapter->link_active = 1;
1843                         adapter->smartspeed = 0;
1844                         ifp->if_baudrate = adapter->link_speed * 1000000;
1845                         ifp->if_link_state = LINK_STATE_UP;
1846                         if_link_state_change(ifp);
1847                 }
1848         } else {
1849                 if (adapter->link_active == 1) {
1850                         ifp->if_baudrate = 0;
1851                         adapter->link_speed = 0;
1852                         adapter->link_duplex = 0;
1853                         if (bootverbose) {
1854                                 if_printf(&adapter->interface_data.ac_if,
1855                                           "Link is Down\n");
1856                         }
1857                         adapter->link_active = 0;
1858                         ifp->if_link_state = LINK_STATE_DOWN;
1859                         if_link_state_change(ifp);
1860                 }
1861         }
1862 }
1863
1864 /*********************************************************************
1865  *
1866  *  This routine disables all traffic on the adapter by issuing a
1867  *  global reset on the MAC and deallocates TX/RX buffers.
1868  *
1869  **********************************************************************/
1870
1871 static void
1872 em_stop(void *arg)
1873 {
1874         struct ifnet   *ifp;
1875         struct adapter * adapter = arg;
1876         ifp = &adapter->interface_data.ac_if;
1877
1878         ASSERT_SERIALIZED(ifp->if_serializer);
1879
1880         INIT_DEBUGOUT("em_stop: begin");
1881         em_disable_intr(adapter);
1882         em_reset_hw(&adapter->hw);
1883         callout_stop(&adapter->timer);
1884         callout_stop(&adapter->tx_fifo_timer);
1885         em_free_transmit_structures(adapter);
1886         em_free_receive_structures(adapter);
1887
1888         /* Tell the stack that the interface is no longer active */
1889         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1890         ifp->if_timer = 0;
1891 }
1892
1893 /*********************************************************************
1894  *
1895  *  Determine hardware revision.
1896  *
1897  **********************************************************************/
1898 static void
1899 em_identify_hardware(struct adapter *adapter)
1900 {
1901         device_t dev = adapter->dev;
1902
1903         /* Make sure our PCI config space has the necessary stuff set */
1904         adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
1905         if (!((adapter->hw.pci_cmd_word & PCIM_CMD_BUSMASTEREN) &&
1906               (adapter->hw.pci_cmd_word & PCIM_CMD_MEMEN))) {
1907                 device_printf(dev, "Memory Access and/or Bus Master bits "
1908                               "were not set!\n");
1909                 adapter->hw.pci_cmd_word |= PCIM_CMD_BUSMASTEREN |
1910                                             PCIM_CMD_MEMEN;
1911                 pci_write_config(dev, PCIR_COMMAND,
1912                                  adapter->hw.pci_cmd_word, 2);
1913         }
1914
1915         /* Save off the information about this board */
1916         adapter->hw.vendor_id = pci_get_vendor(dev);
1917         adapter->hw.device_id = pci_get_device(dev);
1918         adapter->hw.revision_id = pci_get_revid(dev);
1919         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
1920         adapter->hw.subsystem_id = pci_get_subdevice(dev);
1921
1922         /* Identify the MAC */
1923         if (em_set_mac_type(&adapter->hw))
1924                 device_printf(dev, "Unknown MAC Type\n");
1925
1926         if (adapter->hw.mac_type == em_82541 ||
1927             adapter->hw.mac_type == em_82541_rev_2 ||
1928             adapter->hw.mac_type == em_82547 ||
1929             adapter->hw.mac_type == em_82547_rev_2)
1930                 adapter->hw.phy_init_script = TRUE;
1931 }
1932
1933 static int
1934 em_allocate_pci_resources(device_t dev)
1935 {
1936         struct adapter *adapter = device_get_softc(dev);
1937         int rid;
1938
1939         rid = PCIR_BAR(0);
1940         adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
1941                                                      &rid, RF_ACTIVE);
1942         if (adapter->res_memory == NULL) {
1943                 device_printf(dev, "Unable to allocate bus resource: memory\n");
1944                 return ENXIO;
1945         }
1946         adapter->osdep.mem_bus_space_tag =
1947                 rman_get_bustag(adapter->res_memory);
1948         adapter->osdep.mem_bus_space_handle =
1949             rman_get_bushandle(adapter->res_memory);
1950         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
1951
1952         if (adapter->hw.mac_type > em_82543) {
1953                 /* Figure our where our IO BAR is ? */
1954                 for (rid = PCIR_BAR(0); rid < PCIR_CIS;) {
1955                         uint32_t val;
1956
1957                         val = pci_read_config(dev, rid, 4);
1958                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
1959                                 adapter->io_rid = rid;
1960                                 break;
1961                         }
1962                         rid += 4;
1963                         /* check for 64bit BAR */
1964                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
1965                                 rid += 4;
1966                 }
1967                 if (rid >= PCIR_CIS) {
1968                         device_printf(dev, "Unable to locate IO BAR\n");
1969                         return (ENXIO);
1970                 }
1971
1972                 adapter->res_ioport = bus_alloc_resource_any(dev,
1973                     SYS_RES_IOPORT, &adapter->io_rid, RF_ACTIVE);
1974                 if (!(adapter->res_ioport)) {
1975                         device_printf(dev, "Unable to allocate bus resource: "
1976                                       "ioport\n");
1977                         return ENXIO;
1978                 }
1979                 adapter->hw.io_base = 0;
1980                 adapter->osdep.io_bus_space_tag =
1981                         rman_get_bustag(adapter->res_ioport);
1982                 adapter->osdep.io_bus_space_handle =
1983                         rman_get_bushandle(adapter->res_ioport);
1984         }
1985
1986         /* For ICH8 we need to find the flash memory. */
1987         if ((adapter->hw.mac_type == em_ich8lan) ||
1988             (adapter->hw.mac_type == em_ich9lan)) {
1989                 rid = EM_FLASH;
1990                 adapter->flash_mem = bus_alloc_resource_any(dev,
1991                     SYS_RES_MEMORY, &rid, RF_ACTIVE);
1992                 if (adapter->flash_mem == NULL) {
1993                         device_printf(dev, "Unable to allocate bus resource: "
1994                                       "flash memory\n");
1995                         return ENXIO;
1996                 }
1997                 adapter->osdep.flash_bus_space_tag =
1998                     rman_get_bustag(adapter->flash_mem);
1999                 adapter->osdep.flash_bus_space_handle =
2000                     rman_get_bushandle(adapter->flash_mem);
2001         }
2002
2003         rid = 0x0;
2004         adapter->res_interrupt = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2005             &rid, RF_SHAREABLE | RF_ACTIVE);
2006         if (adapter->res_interrupt == NULL) {
2007                 device_printf(dev, "Unable to allocate bus resource: "
2008                               "interrupt\n");
2009                 return ENXIO;
2010         }
2011
2012         adapter->hw.back = &adapter->osdep;
2013
2014         return 0;
2015 }
2016
2017 static void
2018 em_free_pci_resources(device_t dev)
2019 {
2020         struct adapter *adapter = device_get_softc(dev);
2021
2022         if (adapter->res_interrupt != NULL) {
2023                 bus_release_resource(dev, SYS_RES_IRQ, 0,
2024                                      adapter->res_interrupt);
2025         }
2026         if (adapter->res_memory != NULL) {
2027                 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0),
2028                                      adapter->res_memory);
2029         }
2030
2031         if (adapter->res_ioport != NULL) {
2032                 bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid,
2033                                      adapter->res_ioport);
2034         }
2035
2036         if (adapter->flash_mem != NULL) {
2037                 bus_release_resource(dev, SYS_RES_MEMORY, EM_FLASH,
2038                                      adapter->flash_mem);
2039         }
2040 }
2041
2042 /*********************************************************************
2043  *
2044  *  Initialize the hardware to a configuration as specified by the
2045  *  adapter structure. The controller is reset, the EEPROM is
2046  *  verified, the MAC address is set, then the shared initialization
2047  *  routines are called.
2048  *
2049  **********************************************************************/
2050 static int
2051 em_hardware_init(struct adapter *adapter)
2052 {
2053         uint16_t        rx_buffer_size;
2054
2055         INIT_DEBUGOUT("em_hardware_init: begin");
2056         /* Issue a global reset */
2057         em_reset_hw(&adapter->hw);
2058
2059         /* When hardware is reset, fifo_head is also reset */
2060         adapter->tx_fifo_head = 0;
2061
2062         /* Make sure we have a good EEPROM before we read from it */
2063         if (em_validate_eeprom_checksum(&adapter->hw) < 0) {
2064                 if (em_validate_eeprom_checksum(&adapter->hw) < 0) {
2065                         device_printf(adapter->dev,
2066                                       "The EEPROM Checksum Is Not Valid\n");
2067                         return (EIO);
2068                 }
2069         }
2070
2071         if (em_read_part_num(&adapter->hw, &(adapter->part_num)) < 0) {
2072                 device_printf(adapter->dev,
2073                               "EEPROM read error while reading part number\n");
2074                 return (EIO);
2075         }
2076
2077         /* Set up smart power down as default off on newer adapters. */
2078         if (!em_smart_pwr_down &&
2079             (adapter->hw.mac_type == em_82571 ||
2080              adapter->hw.mac_type == em_82572)) {
2081                 uint16_t phy_tmp = 0;
2082
2083                 /* Speed up time to link by disabling smart power down. */
2084                 em_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
2085                                 &phy_tmp);
2086                 phy_tmp &= ~IGP02E1000_PM_SPD;
2087                 em_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
2088                                  phy_tmp);
2089         }
2090
2091         /*
2092          * These parameters control the automatic generation (Tx) and
2093          * response (Rx) to Ethernet PAUSE frames.
2094          * - High water mark should allow for at least two frames to be
2095          *   received after sending an XOFF.
2096          * - Low water mark works best when it is very near the high water mark.
2097          *   This allows the receiver to restart by sending XON when it has
2098          *   drained a bit.  Here we use an arbitary value of 1500 which will
2099          *   restart after one full frame is pulled from the buffer.  There
2100          *   could be several smaller frames in the buffer and if so they will
2101          *   not trigger the XON until their total number reduces the buffer
2102          *   by 1500.
2103          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2104          */
2105         rx_buffer_size = ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff) << 10);
2106
2107         adapter->hw.fc_high_water =
2108             rx_buffer_size - roundup2(adapter->hw.max_frame_size, 1024);
2109         adapter->hw.fc_low_water = adapter->hw.fc_high_water - 1500;
2110         if (adapter->hw.mac_type == em_80003es2lan)
2111                 adapter->hw.fc_pause_time = 0xFFFF;
2112         else
2113                 adapter->hw.fc_pause_time = 0x1000;
2114         adapter->hw.fc_send_xon = TRUE;
2115         adapter->hw.fc = E1000_FC_FULL;
2116
2117         if (em_init_hw(&adapter->hw) < 0) {
2118                 device_printf(adapter->dev, "Hardware Initialization Failed");
2119                 return (EIO);
2120         }
2121
2122         em_check_for_link(&adapter->hw);
2123
2124         return (0);
2125 }
2126
2127 /*********************************************************************
2128  *
2129  *  Setup networking device structure and register an interface.
2130  *
2131  **********************************************************************/
2132 static void
2133 em_setup_interface(device_t dev, struct adapter *adapter)
2134 {
2135         struct ifnet *ifp;
2136         u_char fiber_type = IFM_1000_SX;        /* default type */
2137         INIT_DEBUGOUT("em_setup_interface: begin");
2138
2139         ifp = &adapter->interface_data.ac_if;
2140         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2141         ifp->if_mtu = ETHERMTU;
2142         ifp->if_baudrate = 1000000000;
2143         ifp->if_init =  em_init;
2144         ifp->if_softc = adapter;
2145         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2146         ifp->if_ioctl = em_ioctl;
2147         ifp->if_start = em_start;
2148 #ifdef DEVICE_POLLING
2149         ifp->if_poll = em_poll;
2150 #endif
2151         ifp->if_watchdog = em_watchdog;
2152         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2153         ifq_set_ready(&ifp->if_snd);
2154
2155         if (adapter->hw.mac_type >= em_82543)
2156                 ifp->if_capabilities |= IFCAP_HWCSUM;
2157
2158         ifp->if_capenable = ifp->if_capabilities;
2159
2160         ether_ifattach(ifp, adapter->hw.mac_addr, NULL);
2161
2162         /*
2163          * Tell the upper layer(s) we support long frames.
2164          */
2165         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2166         ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2167 #if 0
2168         ifp->if_capenable |= IFCAP_VLAN_MTU;
2169 #endif
2170
2171         /*
2172          * Specify the media types supported by this adapter and register
2173          * callbacks to update media and link information
2174          */
2175         ifmedia_init(&adapter->media, IFM_IMASK, em_media_change,
2176                      em_media_status);
2177         if (adapter->hw.media_type == em_media_type_fiber ||
2178             adapter->hw.media_type == em_media_type_internal_serdes) {
2179                 if (adapter->hw.mac_type == em_82545)
2180                         fiber_type = IFM_1000_LX;
2181                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2182                             0, NULL);
2183                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2184         } else {
2185                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2186                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2187                             0, NULL);
2188                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2189                             0, NULL);
2190                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2191                             0, NULL);
2192                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T | IFM_FDX,
2193                             0, NULL);
2194                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL);
2195         }
2196         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2197         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2198 }
2199
2200 /*********************************************************************
2201  *
2202  *  Workaround for SmartSpeed on 82541 and 82547 controllers
2203  *
2204  **********************************************************************/
2205 static void
2206 em_smartspeed(struct adapter *adapter)
2207 {
2208         uint16_t phy_tmp;
2209
2210         if (adapter->link_active || (adapter->hw.phy_type != em_phy_igp) ||
2211             !adapter->hw.autoneg ||
2212             !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
2213                 return;
2214
2215         if (adapter->smartspeed == 0) {
2216                 /*
2217                  * If Master/Slave config fault is asserted twice,
2218                  * we assume back-to-back.
2219                  */
2220                 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2221                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2222                         return;
2223                 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2224                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2225                         em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2226                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2227                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2228                                 em_write_phy_reg(&adapter->hw,
2229                                                  PHY_1000T_CTRL, phy_tmp);
2230                                 adapter->smartspeed++;
2231                                 if (adapter->hw.autoneg &&
2232                                     !em_phy_setup_autoneg(&adapter->hw) &&
2233                                     !em_read_phy_reg(&adapter->hw, PHY_CTRL,
2234                                                      &phy_tmp)) {
2235                                         phy_tmp |= (MII_CR_AUTO_NEG_EN |
2236                                                     MII_CR_RESTART_AUTO_NEG);
2237                                         em_write_phy_reg(&adapter->hw,
2238                                                          PHY_CTRL, phy_tmp);
2239                                 }
2240                         }
2241                 }
2242                 return;
2243         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2244                 /* If still no link, perhaps using 2/3 pair cable */
2245                 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2246                 phy_tmp |= CR_1000T_MS_ENABLE;
2247                 em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2248                 if (adapter->hw.autoneg &&
2249                     !em_phy_setup_autoneg(&adapter->hw) &&
2250                     !em_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_tmp)) {
2251                         phy_tmp |= (MII_CR_AUTO_NEG_EN |
2252                                     MII_CR_RESTART_AUTO_NEG);
2253                         em_write_phy_reg(&adapter->hw, PHY_CTRL, phy_tmp);
2254                 }
2255         }
2256         /* Restart process after EM_SMARTSPEED_MAX iterations */
2257         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2258                 adapter->smartspeed = 0;
2259 }
2260
2261 /*
2262  * Manage DMA'able memory.
2263  */
2264 static void
2265 em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2266 {
2267         if (error)
2268                 return;
2269         *(bus_addr_t *)arg = segs->ds_addr;
2270 }
2271
2272 static int
2273 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2274               struct em_dma_alloc *dma)
2275 {
2276         device_t dev = adapter->dev;
2277         int error;
2278
2279         error = bus_dma_tag_create(NULL,                /* parent */
2280                                    EM_DBA_ALIGN, 0,     /* alignment, bounds */
2281                                    BUS_SPACE_MAXADDR,   /* lowaddr */
2282                                    BUS_SPACE_MAXADDR,   /* highaddr */
2283                                    NULL, NULL,          /* filter, filterarg */
2284                                    size,                /* maxsize */
2285                                    1,                   /* nsegments */
2286                                    size,                /* maxsegsize */
2287                                    0,                   /* flags */
2288                                    &dma->dma_tag);
2289         if (error) {
2290                 device_printf(dev, "%s: bus_dma_tag_create failed; error %d\n",
2291                               __func__, error);
2292                 return error;
2293         }
2294
2295         error = bus_dmamem_alloc(dma->dma_tag, (void**)&dma->dma_vaddr,
2296                                  BUS_DMA_WAITOK, &dma->dma_map);
2297         if (error) {
2298                 device_printf(dev, "%s: bus_dmammem_alloc failed; "
2299                               "size %llu, error %d\n",
2300                               __func__, (uintmax_t)size, error);
2301                 goto fail;
2302         }
2303
2304         error = bus_dmamap_load(dma->dma_tag, dma->dma_map,
2305                                 dma->dma_vaddr, size,
2306                                 em_dmamap_cb, &dma->dma_paddr,
2307                                 BUS_DMA_WAITOK);
2308         if (error) {
2309                 device_printf(dev, "%s: bus_dmamap_load failed; error %u\n",
2310                               __func__, error);
2311                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2312                 goto fail;
2313         }
2314
2315         return 0;
2316 fail:
2317         bus_dma_tag_destroy(dma->dma_tag);
2318         dma->dma_tag = NULL;
2319         return error;
2320 }
2321
2322 static void
2323 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2324 {
2325         if (dma->dma_tag != NULL) {
2326                 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2327                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2328                 bus_dma_tag_destroy(dma->dma_tag);
2329                 dma->dma_tag = NULL;
2330         }
2331 }
2332
2333 /*********************************************************************
2334  *
2335  *  Allocate and initialize transmit structures.
2336  *
2337  **********************************************************************/
2338 static int
2339 em_setup_transmit_structures(struct adapter *adapter)
2340 {
2341         struct em_buffer *tx_buffer;
2342         bus_size_t size;
2343         int error, i;
2344
2345         /*
2346          * Setup DMA descriptor areas.
2347          */
2348         size = roundup2(adapter->hw.max_frame_size, MCLBYTES);
2349         if (bus_dma_tag_create(NULL,                    /* parent */
2350                                1, 0,                    /* alignment, bounds */
2351                                BUS_SPACE_MAXADDR,       /* lowaddr */
2352                                BUS_SPACE_MAXADDR,       /* highaddr */
2353                                NULL, NULL,              /* filter, filterarg */
2354                                size,                    /* maxsize */
2355                                EM_MAX_SCATTER,          /* nsegments */
2356                                size,                    /* maxsegsize */
2357                                0,                       /* flags */
2358                                &adapter->txtag)) {
2359                 device_printf(adapter->dev, "Unable to allocate TX DMA tag\n");
2360                 return(ENOMEM);
2361         }
2362
2363         adapter->tx_buffer_area =
2364                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2365                         M_DEVBUF, M_WAITOK | M_ZERO);
2366
2367         bzero(adapter->tx_desc_base,
2368               sizeof(struct em_tx_desc) * adapter->num_tx_desc);
2369         tx_buffer = adapter->tx_buffer_area;
2370         for (i = 0; i < adapter->num_tx_desc; i++) {
2371                 error = bus_dmamap_create(adapter->txtag, 0, &tx_buffer->map);
2372                 if (error) {
2373                         device_printf(adapter->dev,
2374                                       "Unable to create TX DMA map\n");
2375                         goto fail;
2376                 }
2377                 tx_buffer++;
2378         }
2379
2380         adapter->next_avail_tx_desc = 0;
2381         adapter->next_tx_to_clean = 0;
2382
2383         /* Set number of descriptors available */
2384         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2385
2386         /* Set checksum context */
2387         adapter->active_checksum_context = OFFLOAD_NONE;
2388
2389         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2390                         BUS_DMASYNC_PREWRITE);
2391
2392         return (0);
2393 fail:
2394         em_free_transmit_structures(adapter);
2395         return (error);
2396 }
2397
2398 /*********************************************************************
2399  *
2400  *  Enable transmit unit.
2401  *
2402  **********************************************************************/
2403 static void
2404 em_initialize_transmit_unit(struct adapter *adapter)
2405 {
2406         uint32_t reg_tctl;
2407         uint32_t reg_tipg = 0;
2408         uint64_t bus_addr;
2409
2410         INIT_DEBUGOUT("em_initialize_transmit_unit: begin");
2411
2412         /* Setup the Base and Length of the Tx Descriptor Ring */
2413         bus_addr = adapter->txdma.dma_paddr;
2414         E1000_WRITE_REG(&adapter->hw, TDLEN,
2415                         adapter->num_tx_desc * sizeof(struct em_tx_desc));
2416         E1000_WRITE_REG(&adapter->hw, TDBAH, (uint32_t)(bus_addr >> 32));
2417         E1000_WRITE_REG(&adapter->hw, TDBAL, (uint32_t)bus_addr);
2418
2419         /* Setup the HW Tx Head and Tail descriptor pointers */
2420         E1000_WRITE_REG(&adapter->hw, TDT, 0);
2421         E1000_WRITE_REG(&adapter->hw, TDH, 0);
2422
2423         HW_DEBUGOUT2("Base = %x, Length = %x\n",
2424                      E1000_READ_REG(&adapter->hw, TDBAL),
2425                      E1000_READ_REG(&adapter->hw, TDLEN));
2426
2427         /* Set the default values for the Tx Inter Packet Gap timer */
2428         switch (adapter->hw.mac_type) {
2429         case em_82542_rev2_0:
2430         case em_82542_rev2_1:
2431                 reg_tipg = DEFAULT_82542_TIPG_IPGT;
2432                 reg_tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2433                 reg_tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2434                 break;
2435         case em_80003es2lan:
2436                 reg_tipg = DEFAULT_82543_TIPG_IPGR1;
2437                 reg_tipg |=
2438                     DEFAULT_80003ES2LAN_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2439                 break;
2440         default:
2441                 if (adapter->hw.media_type == em_media_type_fiber ||
2442                     adapter->hw.media_type == em_media_type_internal_serdes)
2443                         reg_tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2444                 else
2445                         reg_tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2446                 reg_tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2447                 reg_tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2448         }
2449
2450         E1000_WRITE_REG(&adapter->hw, TIPG, reg_tipg);
2451         E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay.value);
2452         if (adapter->hw.mac_type >= em_82540) {
2453                 E1000_WRITE_REG(&adapter->hw, TADV,
2454                                 adapter->tx_abs_int_delay.value);
2455         }
2456
2457         /* Program the Transmit Control Register */
2458         reg_tctl = E1000_TCTL_PSP | E1000_TCTL_EN |
2459                    (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2460         if (adapter->hw.mac_type >= em_82571)
2461                 reg_tctl |= E1000_TCTL_MULR;
2462         if (adapter->link_duplex == 1)
2463                 reg_tctl |= E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
2464         else
2465                 reg_tctl |= E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
2466
2467         /* This write will effectively turn on the transmit unit. */
2468         E1000_WRITE_REG(&adapter->hw, TCTL, reg_tctl);
2469
2470         /* Setup Transmit Descriptor Base Settings */
2471         adapter->txd_cmd = E1000_TXD_CMD_IFCS;
2472
2473         if (adapter->tx_int_delay.value > 0)
2474                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2475 }
2476
2477 /*********************************************************************
2478  *
2479  *  Free all transmit related data structures.
2480  *
2481  **********************************************************************/
2482 static void
2483 em_free_transmit_structures(struct adapter *adapter)
2484 {
2485         struct em_buffer *tx_buffer;
2486         int i;
2487
2488         INIT_DEBUGOUT("free_transmit_structures: begin");
2489
2490         if (adapter->tx_buffer_area != NULL) {
2491                 tx_buffer = adapter->tx_buffer_area;
2492                 for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) {
2493                         if (tx_buffer->m_head != NULL) {
2494                                 bus_dmamap_unload(adapter->txtag,
2495                                                   tx_buffer->map);
2496                                 m_freem(tx_buffer->m_head);
2497                         }
2498
2499                         if (tx_buffer->map != NULL) {
2500                                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2501                                 tx_buffer->map = NULL;
2502                         }
2503                         tx_buffer->m_head = NULL;
2504                 }
2505         }
2506         if (adapter->tx_buffer_area != NULL) {
2507                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2508                 adapter->tx_buffer_area = NULL;
2509         }
2510         if (adapter->txtag != NULL) {
2511                 bus_dma_tag_destroy(adapter->txtag);
2512                 adapter->txtag = NULL;
2513         }
2514 }
2515
2516 /*********************************************************************
2517  *
2518  *  The offload context needs to be set when we transfer the first
2519  *  packet of a particular protocol (TCP/UDP). We change the
2520  *  context only if the protocol type changes.
2521  *
2522  **********************************************************************/
2523 static void
2524 em_transmit_checksum_setup(struct adapter *adapter,
2525                            struct mbuf *mp,
2526                            uint32_t *txd_upper,
2527                            uint32_t *txd_lower)
2528 {
2529         struct em_context_desc *TXD;
2530         struct em_buffer *tx_buffer;
2531         int curr_txd;
2532
2533         if (mp->m_pkthdr.csum_flags) {
2534                 if (mp->m_pkthdr.csum_flags & CSUM_TCP) {
2535                         *txd_upper = E1000_TXD_POPTS_TXSM << 8;
2536                         *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2537                         if (adapter->active_checksum_context == OFFLOAD_TCP_IP)
2538                                 return;
2539                         else
2540                                 adapter->active_checksum_context = OFFLOAD_TCP_IP;
2541                 } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) {
2542                         *txd_upper = E1000_TXD_POPTS_TXSM << 8;
2543                         *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2544                         if (adapter->active_checksum_context == OFFLOAD_UDP_IP)
2545                                 return;
2546                         else
2547                                 adapter->active_checksum_context = OFFLOAD_UDP_IP;
2548                 } else {
2549                         *txd_upper = 0;
2550                         *txd_lower = 0;
2551                         return;
2552                 }
2553         } else {
2554                 *txd_upper = 0;
2555                 *txd_lower = 0;
2556                 return;
2557         }
2558
2559         /*
2560          * If we reach this point, the checksum offload context
2561          * needs to be reset.
2562          */
2563         curr_txd = adapter->next_avail_tx_desc;
2564         tx_buffer = &adapter->tx_buffer_area[curr_txd];
2565         TXD = (struct em_context_desc *) &adapter->tx_desc_base[curr_txd];
2566
2567         TXD->lower_setup.ip_fields.ipcss = ETHER_HDR_LEN;
2568         TXD->lower_setup.ip_fields.ipcso =
2569             ETHER_HDR_LEN + offsetof(struct ip, ip_sum);
2570         TXD->lower_setup.ip_fields.ipcse =
2571             htole16(ETHER_HDR_LEN + sizeof(struct ip) - 1);
2572
2573         TXD->upper_setup.tcp_fields.tucss =
2574             ETHER_HDR_LEN + sizeof(struct ip);
2575         TXD->upper_setup.tcp_fields.tucse = htole16(0);
2576
2577         if (adapter->active_checksum_context == OFFLOAD_TCP_IP) {
2578                 TXD->upper_setup.tcp_fields.tucso =
2579                         ETHER_HDR_LEN + sizeof(struct ip) +
2580                         offsetof(struct tcphdr, th_sum);
2581         } else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) {
2582                 TXD->upper_setup.tcp_fields.tucso =
2583                         ETHER_HDR_LEN + sizeof(struct ip) +
2584                         offsetof(struct udphdr, uh_sum);
2585         }
2586
2587         TXD->tcp_seg_setup.data = htole32(0);
2588         TXD->cmd_and_length = htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT);
2589
2590         tx_buffer->m_head = NULL;
2591         tx_buffer->next_eop = -1;
2592
2593         if (++curr_txd == adapter->num_tx_desc)
2594                 curr_txd = 0;
2595
2596         adapter->num_tx_desc_avail--;
2597         adapter->next_avail_tx_desc = curr_txd;
2598 }
2599
2600 /**********************************************************************
2601  *
2602  *  Examine each tx_buffer in the used queue. If the hardware is done
2603  *  processing the packet then free associated resources. The
2604  *  tx_buffer is put back on the free queue.
2605  *
2606  **********************************************************************/
2607
2608 static void
2609 em_txeof(struct adapter *adapter)
2610 {
2611         int first, last, done, num_avail;
2612         struct em_buffer *tx_buffer;
2613         struct em_tx_desc *tx_desc, *eop_desc;
2614         struct ifnet *ifp = &adapter->interface_data.ac_if;
2615
2616         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2617                 return;
2618
2619         num_avail = adapter->num_tx_desc_avail;
2620         first = adapter->next_tx_to_clean;
2621         tx_desc = &adapter->tx_desc_base[first];
2622         tx_buffer = &adapter->tx_buffer_area[first];
2623         last = tx_buffer->next_eop;
2624         KKASSERT(last >= 0 && last < adapter->num_tx_desc);
2625         eop_desc = &adapter->tx_desc_base[last];
2626
2627         /*
2628          * Now caculate the terminating index for the cleanup loop below
2629          */
2630         if (++last == adapter->num_tx_desc)
2631                 last = 0;
2632         done = last;
2633
2634         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2635                         BUS_DMASYNC_POSTREAD);
2636
2637         while (eop_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2638                 while (first != done) {
2639                         tx_desc->upper.data = 0;
2640                         tx_desc->lower.data = 0;
2641                         num_avail++;
2642
2643                         logif(pkt_txclean);
2644
2645                         if (tx_buffer->m_head) {
2646                                 ifp->if_opackets++;
2647                                 bus_dmamap_sync(adapter->txtag, tx_buffer->map,
2648                                                 BUS_DMASYNC_POSTWRITE);
2649                                 bus_dmamap_unload(adapter->txtag,
2650                                                   tx_buffer->map);
2651
2652                                 m_freem(tx_buffer->m_head);
2653                                 tx_buffer->m_head = NULL;
2654                         }
2655                         tx_buffer->next_eop = -1;
2656
2657                         if (++first == adapter->num_tx_desc)
2658                                 first = 0;
2659
2660                         tx_buffer = &adapter->tx_buffer_area[first];
2661                         tx_desc = &adapter->tx_desc_base[first];
2662                 }
2663                 /* See if we can continue to the next packet */
2664                 last = tx_buffer->next_eop;
2665                 if (last != -1) {
2666                         KKASSERT(last >= 0 && last < adapter->num_tx_desc);
2667                         eop_desc = &adapter->tx_desc_base[last];
2668                         if (++last == adapter->num_tx_desc)
2669                                 last = 0;
2670                         done = last;
2671                 } else {
2672                         break;
2673                 }
2674         }
2675
2676         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2677                         BUS_DMASYNC_PREWRITE);
2678
2679         adapter->next_tx_to_clean = first;
2680
2681         /*
2682          * If we have enough room, clear IFF_OACTIVE to tell the stack
2683          * that it is OK to send packets.
2684          * If there are no pending descriptors, clear the timeout. Otherwise,
2685          * if some descriptors have been freed, restart the timeout.
2686          */
2687         if (num_avail > EM_TX_CLEANUP_THRESHOLD) {
2688                 ifp->if_flags &= ~IFF_OACTIVE;
2689                 if (num_avail == adapter->num_tx_desc)
2690                         ifp->if_timer = 0;
2691                 else if (num_avail == adapter->num_tx_desc_avail)
2692                         ifp->if_timer = EM_TX_TIMEOUT;
2693         }
2694         adapter->num_tx_desc_avail = num_avail;
2695 }
2696
2697 /*********************************************************************
2698  *
2699  *  Get a buffer from system mbuf buffer pool.
2700  *
2701  **********************************************************************/
2702 static int
2703 em_get_buf(int i, struct adapter *adapter, struct mbuf *nmp, int how)
2704 {
2705         struct mbuf *mp = nmp;
2706         struct em_buffer *rx_buffer;
2707         struct ifnet *ifp;
2708         bus_addr_t paddr;
2709         int error;
2710
2711         ifp = &adapter->interface_data.ac_if;
2712
2713         if (mp == NULL) {
2714                 mp = m_getcl(how, MT_DATA, M_PKTHDR);
2715                 if (mp == NULL) {
2716                         adapter->mbuf_cluster_failed++;
2717                         return (ENOBUFS);
2718                 }
2719                 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2720         } else {
2721                 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2722                 mp->m_data = mp->m_ext.ext_buf;
2723                 mp->m_next = NULL;
2724         }
2725
2726         if (ifp->if_mtu <= ETHERMTU)
2727                 m_adj(mp, ETHER_ALIGN);
2728
2729         rx_buffer = &adapter->rx_buffer_area[i];
2730
2731         /*
2732          * Using memory from the mbuf cluster pool, invoke the
2733          * bus_dma machinery to arrange the memory mapping.
2734          */
2735         error = bus_dmamap_load(adapter->rxtag, rx_buffer->map,
2736                                 mtod(mp, void *), mp->m_len,
2737                                 em_dmamap_cb, &paddr, 0);
2738         if (error) {
2739                 m_freem(mp);
2740                 return (error);
2741         }
2742         rx_buffer->m_head = mp;
2743         adapter->rx_desc_base[i].buffer_addr = htole64(paddr);
2744         bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD);
2745
2746         return (0);
2747 }
2748
2749 /*********************************************************************
2750  *
2751  *  Allocate memory for rx_buffer structures. Since we use one
2752  *  rx_buffer per received packet, the maximum number of rx_buffer's
2753  *  that we'll need is equal to the number of receive descriptors
2754  *  that we've allocated.
2755  *
2756  **********************************************************************/
2757 static int
2758 em_allocate_receive_structures(struct adapter *adapter)
2759 {
2760         int i, error, size;
2761         struct em_buffer *rx_buffer;
2762
2763         size = adapter->num_rx_desc * sizeof(struct em_buffer);
2764         adapter->rx_buffer_area = kmalloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
2765
2766         error = bus_dma_tag_create(NULL,                /* parent */
2767                                    1, 0,                /* alignment, bounds */
2768                                    BUS_SPACE_MAXADDR,   /* lowaddr */
2769                                    BUS_SPACE_MAXADDR,   /* highaddr */
2770                                    NULL, NULL,          /* filter, filterarg */
2771                                    MCLBYTES,            /* maxsize */
2772                                    1,                   /* nsegments */
2773                                    MCLBYTES,            /* maxsegsize */
2774                                    0,                   /* flags */
2775                                    &adapter->rxtag);
2776         if (error) {
2777                 device_printf(adapter->dev, "%s: bus_dma_tag_create failed; "
2778                               "error %u\n", __func__, error);
2779                 goto fail;
2780         }
2781
2782         rx_buffer = adapter->rx_buffer_area;
2783         for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2784                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT,
2785                                           &rx_buffer->map);
2786                 if (error) {
2787                         device_printf(adapter->dev,
2788                                       "%s: bus_dmamap_create failed; "
2789                                       "error %u\n", __func__, error);
2790                         goto fail;
2791                 }
2792         }
2793
2794         for (i = 0; i < adapter->num_rx_desc; i++) {
2795                 error = em_get_buf(i, adapter, NULL, MB_DONTWAIT);
2796                 if (error)
2797                         goto fail;
2798         }
2799
2800         bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
2801                         BUS_DMASYNC_PREWRITE);
2802
2803         return (0);
2804 fail:
2805         em_free_receive_structures(adapter);
2806         return (error);
2807 }
2808
2809 /*********************************************************************
2810  *
2811  *  Allocate and initialize receive structures.
2812  *
2813  **********************************************************************/
2814 static int
2815 em_setup_receive_structures(struct adapter *adapter)
2816 {
2817         int error;
2818
2819         bzero(adapter->rx_desc_base,
2820               sizeof(struct em_rx_desc) * adapter->num_rx_desc);
2821
2822         error = em_allocate_receive_structures(adapter);
2823         if (error)
2824                 return (error);
2825
2826         /* Setup our descriptor pointers */
2827         adapter->next_rx_desc_to_check = 0;
2828
2829         return (0);
2830 }
2831
2832 /*********************************************************************
2833  *
2834  *  Enable receive unit.
2835  *
2836  **********************************************************************/
2837 static void
2838 em_initialize_receive_unit(struct adapter *adapter)
2839 {
2840         uint32_t reg_rctl;
2841         uint32_t reg_rxcsum;
2842         struct ifnet *ifp;
2843         uint64_t bus_addr;
2844
2845         INIT_DEBUGOUT("em_initialize_receive_unit: begin");
2846
2847         ifp = &adapter->interface_data.ac_if;
2848
2849         /*
2850          * Make sure receives are disabled while setting
2851          * up the descriptor ring
2852          */
2853         E1000_WRITE_REG(&adapter->hw, RCTL, 0);
2854
2855         /* Set the Receive Delay Timer Register */
2856         E1000_WRITE_REG(&adapter->hw, RDTR,
2857                         adapter->rx_int_delay.value | E1000_RDT_FPDB);
2858
2859         if(adapter->hw.mac_type >= em_82540) {
2860                 E1000_WRITE_REG(&adapter->hw, RADV,
2861                                 adapter->rx_abs_int_delay.value);
2862
2863                 /* Set the interrupt throttling rate in 256ns increments */
2864                 if (em_int_throttle_ceil) {
2865                         E1000_WRITE_REG(&adapter->hw, ITR,
2866                                 1000000000 / 256 / em_int_throttle_ceil);
2867                 } else {
2868                         E1000_WRITE_REG(&adapter->hw, ITR, 0);
2869                 }
2870         }
2871
2872         /* Setup the Base and Length of the Rx Descriptor Ring */
2873         bus_addr = adapter->rxdma.dma_paddr;
2874         E1000_WRITE_REG(&adapter->hw, RDLEN, adapter->num_rx_desc *
2875                         sizeof(struct em_rx_desc));
2876         E1000_WRITE_REG(&adapter->hw, RDBAH, (uint32_t)(bus_addr >> 32));
2877         E1000_WRITE_REG(&adapter->hw, RDBAL, (uint32_t)bus_addr);
2878
2879         /* Setup the Receive Control Register */
2880         reg_rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
2881                    E1000_RCTL_RDMTS_HALF |
2882                    (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
2883
2884         if (adapter->hw.tbi_compatibility_on == TRUE)
2885                 reg_rctl |= E1000_RCTL_SBP;
2886
2887         switch (adapter->rx_buffer_len) {
2888         default:
2889         case EM_RXBUFFER_2048:
2890                 reg_rctl |= E1000_RCTL_SZ_2048;
2891                 break;
2892         case EM_RXBUFFER_4096:
2893                 reg_rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX |
2894                             E1000_RCTL_LPE;
2895                 break;
2896         case EM_RXBUFFER_8192:
2897                 reg_rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX |
2898                             E1000_RCTL_LPE;
2899                 break;
2900         case EM_RXBUFFER_16384:
2901                 reg_rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX |
2902                             E1000_RCTL_LPE;
2903                 break;
2904         }
2905
2906         if (ifp->if_mtu > ETHERMTU)
2907                 reg_rctl |= E1000_RCTL_LPE;
2908
2909         /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2910         if ((adapter->hw.mac_type >= em_82543) &&
2911             (ifp->if_capenable & IFCAP_RXCSUM)) {
2912                 reg_rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM);
2913                 reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
2914                 E1000_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum);
2915         }
2916
2917 #ifdef EM_X60_WORKAROUND
2918         if (adapter->hw.mac_type == em_82573)
2919                 E1000_WRITE_REG(&adapter->hw, RDTR, 32);
2920 #endif
2921
2922         /* Enable Receives */
2923         E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
2924
2925         /* Setup the HW Rx Head and Tail Descriptor Pointers */
2926         E1000_WRITE_REG(&adapter->hw, RDH, 0);
2927         E1000_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1);
2928 }
2929
2930 /*********************************************************************
2931  *
2932  *  Free receive related data structures.
2933  *
2934  **********************************************************************/
2935 static void
2936 em_free_receive_structures(struct adapter *adapter)
2937 {
2938         struct em_buffer *rx_buffer;
2939         int i;
2940
2941         INIT_DEBUGOUT("free_receive_structures: begin");
2942
2943         if (adapter->rx_buffer_area != NULL) {
2944                 rx_buffer = adapter->rx_buffer_area;
2945                 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2946                         if (rx_buffer->m_head != NULL) {
2947                                 bus_dmamap_unload(adapter->rxtag,
2948                                                   rx_buffer->map);
2949                                 m_freem(rx_buffer->m_head);
2950                                 rx_buffer->m_head = NULL;
2951                         }
2952                         if (rx_buffer->map != NULL) {
2953                                 bus_dmamap_destroy(adapter->rxtag,
2954                                                    rx_buffer->map);
2955                                 rx_buffer->map = NULL;
2956                         }
2957                 }
2958         }
2959         if (adapter->rx_buffer_area != NULL) {
2960                 kfree(adapter->rx_buffer_area, M_DEVBUF);
2961                 adapter->rx_buffer_area = NULL;
2962         }
2963         if (adapter->rxtag != NULL) {
2964                 bus_dma_tag_destroy(adapter->rxtag);
2965                 adapter->rxtag = NULL;
2966         }
2967 }
2968
2969 /*********************************************************************
2970  *
2971  *  This routine executes in interrupt context. It replenishes
2972  *  the mbufs in the descriptor and sends data which has been
2973  *  dma'ed into host memory to upper layer.
2974  *
2975  *  We loop at most count times if count is > 0, or until done if
2976  *  count < 0.
2977  *
2978  *********************************************************************/
2979 static void
2980 em_rxeof(struct adapter *adapter, int count)
2981 {
2982         struct ifnet *ifp;
2983         struct mbuf *mp;
2984         uint8_t accept_frame = 0;
2985         uint8_t eop = 0;
2986         uint16_t len, desc_len, prev_len_adj;
2987         int i;
2988
2989         /* Pointer to the receive descriptor being examined. */
2990         struct em_rx_desc *current_desc;
2991
2992         ifp = &adapter->interface_data.ac_if;
2993         i = adapter->next_rx_desc_to_check;
2994         current_desc = &adapter->rx_desc_base[i];
2995
2996         bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
2997                         BUS_DMASYNC_POSTREAD);
2998
2999         if (!(current_desc->status & E1000_RXD_STAT_DD))
3000                 return;
3001
3002         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3003                 logif(pkt_receive);
3004                 mp = adapter->rx_buffer_area[i].m_head;
3005                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3006                                 BUS_DMASYNC_POSTREAD);
3007                 bus_dmamap_unload(adapter->rxtag,
3008                                   adapter->rx_buffer_area[i].map);
3009
3010                 accept_frame = 1;
3011                 prev_len_adj = 0;
3012                 desc_len = le16toh(current_desc->length);
3013                 if (current_desc->status & E1000_RXD_STAT_EOP) {
3014                         count--;
3015                         eop = 1;
3016                         if (desc_len < ETHER_CRC_LEN) {
3017                                 len = 0;
3018                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3019                         } else {
3020                                 len = desc_len - ETHER_CRC_LEN;
3021                         }
3022                 } else {
3023                         eop = 0;
3024                         len = desc_len;
3025                 }
3026
3027                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3028                         uint8_t last_byte;
3029                         uint32_t pkt_len = desc_len;
3030
3031                         if (adapter->fmp != NULL)
3032                                 pkt_len += adapter->fmp->m_pkthdr.len;
3033
3034                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3035
3036                         if (TBI_ACCEPT(&adapter->hw, current_desc->status,
3037                                        current_desc->errors,
3038                                        pkt_len, last_byte)) {
3039                                 em_tbi_adjust_stats(&adapter->hw,
3040                                                     &adapter->stats,
3041                                                     pkt_len,
3042                                                     adapter->hw.mac_addr);
3043                                 if (len > 0)
3044                                         len--;
3045                         } else {
3046                                 accept_frame = 0;
3047                         }
3048                 }
3049
3050                 if (accept_frame) {
3051                         if (em_get_buf(i, adapter, NULL, MB_DONTWAIT) == ENOBUFS) {
3052                                 adapter->dropped_pkts++;
3053                                 em_get_buf(i, adapter, mp, MB_DONTWAIT);
3054                                 if (adapter->fmp != NULL)
3055                                         m_freem(adapter->fmp);
3056                                 adapter->fmp = NULL;
3057                                 adapter->lmp = NULL;
3058                                 goto skip;
3059                         }
3060
3061                         /* Assign correct length to the current fragment */
3062                         mp->m_len = len;
3063
3064                         if (adapter->fmp == NULL) {
3065                                 mp->m_pkthdr.len = len;
3066                                 adapter->fmp = mp;       /* Store the first mbuf */
3067                                 adapter->lmp = mp;
3068                         } else {
3069                                 /* Chain mbuf's together */
3070                                 /*
3071                                  * Adjust length of previous mbuf in chain if
3072                                  * we received less than 4 bytes in the last
3073                                  * descriptor.
3074                                  */
3075                                 if (prev_len_adj > 0) {
3076                                         adapter->lmp->m_len -= prev_len_adj;
3077                                         adapter->fmp->m_pkthdr.len -= prev_len_adj;
3078                                 }
3079                                 adapter->lmp->m_next = mp;
3080                                 adapter->lmp = adapter->lmp->m_next;
3081                                 adapter->fmp->m_pkthdr.len += len;
3082                         }
3083
3084                         if (eop) {
3085                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3086                                 ifp->if_ipackets++;
3087
3088                                 em_receive_checksum(adapter, current_desc,
3089                                                     adapter->fmp);
3090                                 if (current_desc->status & E1000_RXD_STAT_VP) {
3091                                         VLAN_INPUT_TAG(adapter->fmp,
3092                                                        (current_desc->special &
3093                                                         E1000_RXD_SPC_VLAN_MASK));
3094                                 } else {
3095                                         ifp->if_input(ifp, adapter->fmp);
3096                                 }
3097                                 adapter->fmp = NULL;
3098                                 adapter->lmp = NULL;
3099                         }
3100                 } else {
3101                         adapter->dropped_pkts++;
3102                         em_get_buf(i, adapter, mp, MB_DONTWAIT);
3103                         if (adapter->fmp != NULL)
3104                                 m_freem(adapter->fmp);
3105                         adapter->fmp = NULL;
3106                         adapter->lmp = NULL;
3107                 }
3108
3109 skip:
3110                 /* Zero out the receive descriptors status. */
3111                 current_desc->status = 0;
3112
3113                 /* Advance our pointers to the next descriptor. */
3114                 if (++i == adapter->num_rx_desc) {
3115                         i = 0;
3116                         current_desc = adapter->rx_desc_base;
3117                 } else {
3118                         current_desc++;
3119                 }
3120         }
3121
3122         bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
3123                         BUS_DMASYNC_PREWRITE);
3124
3125         adapter->next_rx_desc_to_check = i;
3126
3127         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3128         if (--i < 0)
3129                 i = adapter->num_rx_desc - 1;
3130
3131         E1000_WRITE_REG(&adapter->hw, RDT, i);
3132 }
3133
3134 /*********************************************************************
3135  *
3136  *  Verify that the hardware indicated that the checksum is valid.
3137  *  Inform the stack about the status of checksum so that stack
3138  *  doesn't spend time verifying the checksum.
3139  *
3140  *********************************************************************/
3141 static void
3142 em_receive_checksum(struct adapter *adapter,
3143                     struct em_rx_desc *rx_desc,
3144                     struct mbuf *mp)
3145 {
3146         /* 82543 or newer only */
3147         if ((adapter->hw.mac_type < em_82543) ||
3148             /* Ignore Checksum bit is set */
3149             (rx_desc->status & E1000_RXD_STAT_IXSM)) {
3150                 mp->m_pkthdr.csum_flags = 0;
3151                 return;
3152         }
3153
3154         if (rx_desc->status & E1000_RXD_STAT_IPCS) {
3155                 /* Did it pass? */
3156                 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3157                         /* IP Checksum Good */
3158                         mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
3159                         mp->m_pkthdr.csum_flags |= CSUM_IP_VALID;
3160                 } else {
3161                         mp->m_pkthdr.csum_flags = 0;
3162                 }
3163         }
3164
3165         if (rx_desc->status & E1000_RXD_STAT_TCPCS) {
3166                 /* Did it pass? */
3167                 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3168                         mp->m_pkthdr.csum_flags |=
3169                         (CSUM_DATA_VALID | CSUM_PSEUDO_HDR |
3170                          CSUM_FRAG_NOT_CHECKED);
3171                         mp->m_pkthdr.csum_data = htons(0xffff);
3172                 }
3173         }
3174 }
3175
3176
3177 static void
3178 em_enable_vlans(struct adapter *adapter)
3179 {
3180         uint32_t ctrl;
3181
3182         E1000_WRITE_REG(&adapter->hw, VET, ETHERTYPE_VLAN);
3183
3184         ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3185         ctrl |= E1000_CTRL_VME;
3186         E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3187 }
3188
3189 static void
3190 em_disable_vlans(struct adapter *adapter)
3191 {
3192         uint32_t ctrl;
3193
3194         ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3195         ctrl &= ~E1000_CTRL_VME;
3196         E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3197 }
3198
3199 /*
3200  * note: we must call bus_enable_intr() prior to enabling the hardware
3201  * interrupt and bus_disable_intr() after disabling the hardware interrupt
3202  * in order to avoid handler execution races from scheduled interrupt
3203  * threads.
3204  */
3205 static void
3206 em_enable_intr(struct adapter *adapter)
3207 {
3208         struct ifnet *ifp = &adapter->interface_data.ac_if;
3209
3210         if ((ifp->if_flags & IFF_POLLING) == 0) {
3211                 lwkt_serialize_handler_enable(ifp->if_serializer);
3212                 E1000_WRITE_REG(&adapter->hw, IMS, (IMS_ENABLE_MASK));
3213         }
3214 }
3215
3216 static void
3217 em_disable_intr(struct adapter *adapter)
3218 {
3219         /*
3220          * The first version of 82542 had an errata where when link was forced
3221          * it would stay up even up even if the cable was disconnected.
3222          * Sequence errors were used to detect the disconnect and then the
3223          * driver would unforce the link.  This code in the in the ISR.  For
3224          * this to work correctly the Sequence error interrupt had to be
3225          * enabled all the time.
3226          */
3227         if (adapter->hw.mac_type == em_82542_rev2_0) {
3228                 E1000_WRITE_REG(&adapter->hw, IMC,
3229                                 (0xffffffff & ~E1000_IMC_RXSEQ));
3230         } else {
3231                 E1000_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
3232         }
3233
3234         lwkt_serialize_handler_disable(adapter->interface_data.ac_if.if_serializer);
3235 }
3236
3237 static int
3238 em_is_valid_ether_addr(uint8_t *addr)
3239 {
3240         static const char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
3241
3242         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3243                 return (FALSE);
3244         else
3245                 return (TRUE);
3246 }
3247
3248 void
3249 em_write_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value)
3250 {
3251         pci_write_config(((struct em_osdep *)hw->back)->dev, reg, *value, 2);
3252 }
3253
3254 void
3255 em_read_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value)
3256 {
3257         *value = pci_read_config(((struct em_osdep *)hw->back)->dev, reg, 2);
3258 }
3259
3260 void
3261 em_pci_set_mwi(struct em_hw *hw)
3262 {
3263         pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND,
3264                          (hw->pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2);
3265 }
3266
3267 void
3268 em_pci_clear_mwi(struct em_hw *hw)
3269 {
3270         pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND,
3271                          (hw->pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);
3272 }
3273
3274 uint32_t
3275 em_io_read(struct em_hw *hw, unsigned long port)
3276 {
3277         struct em_osdep *io = hw->back;
3278
3279         return bus_space_read_4(io->io_bus_space_tag,
3280                                 io->io_bus_space_handle, port);
3281 }
3282
3283 void
3284 em_io_write(struct em_hw *hw, unsigned long port, uint32_t value)
3285 {
3286         struct em_osdep *io = hw->back;
3287
3288         bus_space_write_4(io->io_bus_space_tag,
3289                           io->io_bus_space_handle, port, value);
3290 }
3291
3292 /*
3293  * We may eventually really do this, but its unnecessary
3294  * for now so we just return unsupported.
3295  */
3296 int32_t
3297 em_read_pcie_cap_reg(struct em_hw *hw, uint32_t reg, uint16_t *value)
3298 {
3299         return (0);
3300 }
3301
3302
3303 /*********************************************************************
3304  * 82544 Coexistence issue workaround.
3305  *    There are 2 issues.
3306  *      1. Transmit Hang issue.
3307  *    To detect this issue, following equation can be used...
3308  *          SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3309  *          If SUM[3:0] is in between 1 to 4, we will have this issue.
3310  *
3311  *      2. DAC issue.
3312  *    To detect this issue, following equation can be used...
3313  *          SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3314  *          If SUM[3:0] is in between 9 to c, we will have this issue.
3315  *
3316  *
3317  *    WORKAROUND:
3318  *          Make sure we do not have ending address as 1,2,3,4(Hang) or
3319  *          9,a,b,c (DAC)
3320  *
3321 *************************************************************************/
3322 static uint32_t
3323 em_fill_descriptors(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3324 {
3325         /* Since issue is sensitive to length and address.*/
3326         /* Let us first check the address...*/
3327         uint32_t safe_terminator;
3328         if (length <= 4) {
3329                 desc_array->descriptor[0].address = address;
3330                 desc_array->descriptor[0].length = length;
3331                 desc_array->elements = 1;
3332                 return (desc_array->elements);
3333         }
3334         safe_terminator = (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3335         /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3336         if (safe_terminator == 0 ||
3337             (safe_terminator > 4 && safe_terminator < 9) ||
3338             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3339                 desc_array->descriptor[0].address = address;
3340                 desc_array->descriptor[0].length = length;
3341                 desc_array->elements = 1;
3342                 return (desc_array->elements);
3343         }
3344
3345         desc_array->descriptor[0].address = address;
3346         desc_array->descriptor[0].length = length - 4;
3347         desc_array->descriptor[1].address = address + (length - 4);
3348         desc_array->descriptor[1].length = 4;
3349         desc_array->elements = 2;
3350         return (desc_array->elements);
3351 }
3352
3353 /**********************************************************************
3354  *
3355  *  Update the board statistics counters.
3356  *
3357  **********************************************************************/
3358 static void
3359 em_update_stats_counters(struct adapter *adapter)
3360 {
3361         struct ifnet   *ifp;
3362
3363         if (adapter->hw.media_type == em_media_type_copper ||
3364             (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
3365                 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, SYMERRS);
3366                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, SEC);
3367         }
3368         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, CRCERRS);
3369         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, MPC);
3370         adapter->stats.scc += E1000_READ_REG(&adapter->hw, SCC);
3371         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, ECOL);
3372
3373         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, MCC);
3374         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, LATECOL);
3375         adapter->stats.colc += E1000_READ_REG(&adapter->hw, COLC);
3376         adapter->stats.dc += E1000_READ_REG(&adapter->hw, DC);
3377         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, RLEC);
3378         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, XONRXC);
3379         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, XONTXC);
3380         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, XOFFRXC);
3381         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, XOFFTXC);
3382         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, FCRUC);
3383         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, PRC64);
3384         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, PRC127);
3385         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, PRC255);
3386         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, PRC511);
3387         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, PRC1023);
3388         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, PRC1522);
3389         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, GPRC);
3390         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, BPRC);
3391         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, MPRC);
3392         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, GPTC);
3393
3394         /* For the 64-bit byte counters the low dword must be read first. */
3395         /* Both registers clear on the read of the high dword */
3396
3397         adapter->stats.gorcl += E1000_READ_REG(&adapter->hw, GORCL);
3398         adapter->stats.gorch += E1000_READ_REG(&adapter->hw, GORCH);
3399         adapter->stats.gotcl += E1000_READ_REG(&adapter->hw, GOTCL);
3400         adapter->stats.gotch += E1000_READ_REG(&adapter->hw, GOTCH);
3401
3402         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, RNBC);
3403         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, RUC);
3404         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, RFC);
3405         adapter->stats.roc += E1000_READ_REG(&adapter->hw, ROC);
3406         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, RJC);
3407
3408         adapter->stats.torl += E1000_READ_REG(&adapter->hw, TORL);
3409         adapter->stats.torh += E1000_READ_REG(&adapter->hw, TORH);
3410         adapter->stats.totl += E1000_READ_REG(&adapter->hw, TOTL);
3411         adapter->stats.toth += E1000_READ_REG(&adapter->hw, TOTH);
3412
3413         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, TPR);
3414         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, TPT);
3415         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, PTC64);
3416         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, PTC127);
3417         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, PTC255);
3418         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, PTC511);
3419         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, PTC1023);
3420         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, PTC1522);
3421         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, MPTC);
3422         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, BPTC);
3423
3424         if (adapter->hw.mac_type >= em_82543) {
3425                 adapter->stats.algnerrc +=
3426                     E1000_READ_REG(&adapter->hw, ALGNERRC);
3427                 adapter->stats.rxerrc +=
3428                     E1000_READ_REG(&adapter->hw, RXERRC);
3429                 adapter->stats.tncrs +=
3430                     E1000_READ_REG(&adapter->hw, TNCRS);
3431                 adapter->stats.cexterr +=
3432                     E1000_READ_REG(&adapter->hw, CEXTERR);
3433                 adapter->stats.tsctc +=
3434                     E1000_READ_REG(&adapter->hw, TSCTC);
3435                 adapter->stats.tsctfc +=
3436                     E1000_READ_REG(&adapter->hw, TSCTFC);
3437         }
3438         ifp = &adapter->interface_data.ac_if;
3439
3440         /* Fill out the OS statistics structure */
3441         ifp->if_collisions = adapter->stats.colc;
3442
3443         /* Rx Errors */
3444         ifp->if_ierrors =
3445                 adapter->dropped_pkts +
3446                 adapter->stats.rxerrc +
3447                 adapter->stats.crcerrs +
3448                 adapter->stats.algnerrc +
3449                 adapter->stats.ruc + adapter->stats.roc +
3450                 adapter->stats.mpc + adapter->stats.cexterr +
3451                 adapter->rx_overruns;
3452
3453         /* Tx Errors */
3454         ifp->if_oerrors = adapter->stats.ecol + adapter->stats.latecol +
3455                           adapter->watchdog_timeouts;
3456 }
3457
3458
3459 /**********************************************************************
3460  *
3461  *  This routine is called only when em_display_debug_stats is enabled.
3462  *  This routine provides a way to take a look at important statistics
3463  *  maintained by the driver and hardware.
3464  *
3465  **********************************************************************/
3466 static void
3467 em_print_debug_info(struct adapter *adapter)
3468 {
3469         device_t dev= adapter->dev;
3470         uint8_t *hw_addr = adapter->hw.hw_addr;
3471
3472         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3473         device_printf(dev, "CTRL  = 0x%x RCTL = 0x%x\n",
3474                       E1000_READ_REG(&adapter->hw, CTRL),
3475                       E1000_READ_REG(&adapter->hw, RCTL));
3476         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk\n",
3477                       ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff0000) >> 16),
3478                       (E1000_READ_REG(&adapter->hw, PBA) & 0xffff));
3479         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3480                       adapter->hw.fc_high_water, adapter->hw.fc_low_water);
3481         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3482                       E1000_READ_REG(&adapter->hw, TIDV),
3483                       E1000_READ_REG(&adapter->hw, TADV));
3484         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3485                       E1000_READ_REG(&adapter->hw, RDTR),
3486                       E1000_READ_REG(&adapter->hw, RADV));
3487         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3488                       (long long)adapter->tx_fifo_wrk_cnt,
3489                       (long long)adapter->tx_fifo_reset_cnt);
3490         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3491                       E1000_READ_REG(&adapter->hw, TDH),
3492                       E1000_READ_REG(&adapter->hw, TDT));
3493         device_printf(dev, "Num Tx descriptors avail = %d\n",
3494                       adapter->num_tx_desc_avail);
3495         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3496                       adapter->no_tx_desc_avail1);
3497         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3498                       adapter->no_tx_desc_avail2);
3499         device_printf(dev, "Std mbuf failed = %ld\n",
3500                       adapter->mbuf_alloc_failed);
3501         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3502                       adapter->mbuf_cluster_failed);
3503         device_printf(dev, "Driver dropped packets = %ld\n",
3504                       adapter->dropped_pkts);
3505 }
3506
3507 static void
3508 em_print_hw_stats(struct adapter *adapter)
3509 {
3510         device_t dev= adapter->dev;
3511
3512         device_printf(dev, "Excessive collisions = %lld\n",
3513                       (long long)adapter->stats.ecol);
3514         device_printf(dev, "Symbol errors = %lld\n",
3515                       (long long)adapter->stats.symerrs);
3516         device_printf(dev, "Sequence errors = %lld\n",
3517                       (long long)adapter->stats.sec);
3518         device_printf(dev, "Defer count = %lld\n",
3519                       (long long)adapter->stats.dc);
3520
3521         device_printf(dev, "Missed Packets = %lld\n",
3522                       (long long)adapter->stats.mpc);
3523         device_printf(dev, "Receive No Buffers = %lld\n",
3524                       (long long)adapter->stats.rnbc);
3525         /* RLEC is inaccurate on some hardware, calculate our own. */
3526         device_printf(dev, "Receive Length errors = %lld\n",
3527                       (long long)adapter->stats.roc +
3528                       (long long)adapter->stats.ruc);
3529         device_printf(dev, "Receive errors = %lld\n",
3530                       (long long)adapter->stats.rxerrc);
3531         device_printf(dev, "Crc errors = %lld\n",
3532                       (long long)adapter->stats.crcerrs);
3533         device_printf(dev, "Alignment errors = %lld\n",
3534                       (long long)adapter->stats.algnerrc);
3535         device_printf(dev, "Carrier extension errors = %lld\n",
3536                       (long long)adapter->stats.cexterr);
3537         device_printf(dev, "RX overruns = %lu\n", adapter->rx_overruns);
3538         device_printf(dev, "Watchdog timeouts = %lu\n",
3539                       adapter->watchdog_timeouts);
3540
3541         device_printf(dev, "XON Rcvd = %lld\n",
3542                       (long long)adapter->stats.xonrxc);
3543         device_printf(dev, "XON Xmtd = %lld\n",
3544                       (long long)adapter->stats.xontxc);
3545         device_printf(dev, "XOFF Rcvd = %lld\n",
3546                       (long long)adapter->stats.xoffrxc);
3547         device_printf(dev, "XOFF Xmtd = %lld\n",
3548                       (long long)adapter->stats.xofftxc);
3549
3550         device_printf(dev, "Good Packets Rcvd = %lld\n",
3551                       (long long)adapter->stats.gprc);
3552         device_printf(dev, "Good Packets Xmtd = %lld\n",
3553                       (long long)adapter->stats.gptc);
3554 }
3555
3556 static int
3557 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3558 {
3559         int error;
3560         int result;
3561         struct adapter *adapter;
3562
3563         result = -1;
3564         error = sysctl_handle_int(oidp, &result, 0, req);
3565
3566         if (error || !req->newptr)
3567                 return (error);
3568
3569         if (result == 1) {
3570                 adapter = (struct adapter *)arg1;
3571                 em_print_debug_info(adapter);
3572         }
3573
3574         return (error);
3575 }
3576
3577 static int
3578 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3579 {
3580         int error;
3581         int result;
3582         struct adapter *adapter;
3583
3584         result = -1;
3585         error = sysctl_handle_int(oidp, &result, 0, req);
3586
3587         if (error || !req->newptr)
3588                 return (error);
3589
3590         if (result == 1) {
3591                 adapter = (struct adapter *)arg1;
3592                 em_print_hw_stats(adapter);
3593         }
3594
3595         return (error);
3596 }
3597
3598 static int
3599 em_sysctl_int_delay(SYSCTL_HANDLER_ARGS)
3600 {
3601         struct em_int_delay_info *info;
3602         struct adapter *adapter;
3603         uint32_t regval;
3604         int error;
3605         int usecs;
3606         int ticks;
3607
3608         info = (struct em_int_delay_info *)arg1;
3609         adapter = info->adapter;
3610         usecs = info->value;
3611         error = sysctl_handle_int(oidp, &usecs, 0, req);
3612         if (error != 0 || req->newptr == NULL)
3613                 return (error);
3614         if (usecs < 0 || usecs > E1000_TICKS_TO_USECS(65535))
3615                 return (EINVAL);
3616         info->value = usecs;
3617         ticks = E1000_USECS_TO_TICKS(usecs);
3618
3619         lwkt_serialize_enter(adapter->interface_data.ac_if.if_serializer);
3620         regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
3621         regval = (regval & ~0xffff) | (ticks & 0xffff);
3622         /* Handle a few special cases. */
3623         switch (info->offset) {
3624         case E1000_RDTR:
3625         case E1000_82542_RDTR:
3626                 regval |= E1000_RDT_FPDB;
3627                 break;
3628         case E1000_TIDV:
3629         case E1000_82542_TIDV:
3630                 if (ticks == 0) {
3631                         adapter->txd_cmd &= ~E1000_TXD_CMD_IDE;
3632                         /* Don't write 0 into the TIDV register. */
3633                         regval++;
3634                 } else
3635                         adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3636                 break;
3637         }
3638         E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
3639         lwkt_serialize_exit(adapter->interface_data.ac_if.if_serializer);
3640         return (0);
3641 }
3642
3643 static void
3644 em_add_int_delay_sysctl(struct adapter *adapter, const char *name,
3645                         const char *description, struct em_int_delay_info *info,
3646                         int offset, int value)
3647 {
3648         info->adapter = adapter;
3649         info->offset = offset;
3650         info->value = value;
3651         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3652                         SYSCTL_CHILDREN(adapter->sysctl_tree),
3653                         OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW,
3654                         info, 0, em_sysctl_int_delay, "I", description);
3655 }
3656
3657 static int
3658 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
3659 {
3660         struct adapter *adapter = (void *)arg1;
3661         int error;
3662         int throttle;
3663
3664         throttle = em_int_throttle_ceil;
3665         error = sysctl_handle_int(oidp, &throttle, 0, req);
3666         if (error || req->newptr == NULL)
3667                 return error;
3668         if (throttle < 0 || throttle > 1000000000 / 256)
3669                 return EINVAL;
3670         if (throttle) {
3671                 /*
3672                  * Set the interrupt throttling rate in 256ns increments,
3673                  * recalculate sysctl value assignment to get exact frequency.
3674                  */
3675                 throttle = 1000000000 / 256 / throttle;
3676                 lwkt_serialize_enter(adapter->interface_data.ac_if.if_serializer);
3677                 em_int_throttle_ceil = 1000000000 / 256 / throttle;
3678                 E1000_WRITE_REG(&adapter->hw, ITR, throttle);
3679                 lwkt_serialize_exit(adapter->interface_data.ac_if.if_serializer);
3680         } else {
3681                 lwkt_serialize_enter(adapter->interface_data.ac_if.if_serializer);
3682                 em_int_throttle_ceil = 0;
3683                 E1000_WRITE_REG(&adapter->hw, ITR, 0);
3684                 lwkt_serialize_exit(adapter->interface_data.ac_if.if_serializer);
3685         }
3686         device_printf(adapter->dev, "Interrupt moderation set to %d/sec\n",
3687                         em_int_throttle_ceil);
3688         return 0;
3689 }