2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/acpica/acpi_cpu.c,v 1.72 2008/04/12 12:06:00 rpaulo Exp $
31 #include <sys/param.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35 #include <sys/globaldata.h>
36 #include <sys/power.h>
39 #include <sys/thread2.h>
40 #include <sys/serialize.h>
41 #include <sys/msgport2.h>
42 #include <sys/microtime_pcpu.h>
44 #include <bus/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/globaldata.h>
47 #include <machine/md_var.h>
48 #include <machine/smp.h>
51 #include <net/netisr2.h>
52 #include <net/netmsg2.h>
53 #include <net/if_var.h>
60 * Support for ACPI Processor devices, including C[1-3+] sleep states.
63 /* Hooks for the ACPI CA debugging infrastructure */
64 #define _COMPONENT ACPI_PROCESSOR
65 ACPI_MODULE_NAME("PROCESSOR")
67 struct netmsg_acpi_cst {
68 struct netmsg_base base;
69 struct acpi_cst_softc *sc;
74 uint32_t type; /* C1-3+. */
75 uint32_t trans_lat; /* Transition latency (usec). */
77 bus_space_handle_t bhand;
79 struct resource *p_lvlx; /* Register to read to enter state. */
80 ACPI_GENERIC_ADDRESS gas;
81 int rid; /* rid of p_lvlx */
82 uint32_t power; /* Power consumed (mW). */
83 int res_type; /* Resource type for p_lvlx. */
85 #define MAX_CX_STATES 8
87 struct acpi_cst_softc {
89 struct acpi_cpux_softc *cst_parent;
90 ACPI_HANDLE cst_handle;
92 uint32_t cst_flags; /* ACPI_CST_FLAG_ */
93 uint32_t cst_p_blk; /* ACPI P_BLK location */
94 uint32_t cst_p_blk_len; /* P_BLK length (must be 6). */
95 struct acpi_cst_cx cst_cx_states[MAX_CX_STATES];
96 int cst_cx_count; /* Number of valid Cx states. */
97 int cst_prev_sleep; /* Last idle sleep duration. */
99 int cst_non_c3; /* Index of lowest non-C3 state. */
100 u_long cst_cx_stats[MAX_CX_STATES];/* Cx usage history. */
101 /* Values for sysctl. */
102 int cst_cx_lowest; /* Current Cx lowest */
103 int cst_cx_lowest_req; /* Requested Cx lowest */
104 char cst_cx_supported[64];
107 #define ACPI_CST_FLAG_PROBING 0x1
109 #define ACPI_CST_ENTER_IO(cx) bus_space_read_1((cx)->btag, (cx)->bhand, 0)
111 #define ACPI_CST_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
112 #define ACPI_CST_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
114 #define PCI_VENDOR_INTEL 0x8086
115 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
116 #define PCI_REVISION_A_STEP 0
117 #define PCI_REVISION_B_STEP 1
118 #define PCI_REVISION_4E 2
119 #define PCI_REVISION_4M 3
120 #define PIIX4_DEVACTB_REG 0x58
121 #define PIIX4_BRLD_EN_IRQ0 (1<<0)
122 #define PIIX4_BRLD_EN_IRQ (1<<1)
123 #define PIIX4_BRLD_EN_IRQ8 (1<<5)
124 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | \
125 PIIX4_BRLD_EN_IRQ | \
127 #define PIIX4_PCNTRL_BST_EN (1<<10)
129 /* Platform hardware resource information. */
130 static uint32_t acpi_cst_smi_cmd; /* Value to write to SMI_CMD. */
131 static uint8_t acpi_cst_ctrl; /* Indicate we are _CST aware. */
132 static int acpi_cst_quirks; /* Indicate any hardware bugs. */
133 static boolean_t acpi_cst_use_fadt;
136 static int acpi_cst_disable_idle;
137 /* Disable entry to idle function */
138 static int acpi_cst_cx_count; /* Number of valid Cx states */
140 /* Values for sysctl. */
141 static int acpi_cst_cx_lowest; /* Current Cx lowest */
142 static int acpi_cst_cx_lowest_req; /* Requested Cx lowest */
144 /* Number of C3 state requesters */
145 static int acpi_cst_c3_reqs;
147 static device_t *acpi_cst_devices;
148 static int acpi_cst_ndevices;
149 static struct acpi_cst_softc **acpi_cst_softc;
150 static struct lwkt_serialize acpi_cst_slize = LWKT_SERIALIZE_INITIALIZER;
152 static int acpi_cst_probe(device_t);
153 static int acpi_cst_attach(device_t);
154 static int acpi_cst_suspend(device_t);
155 static int acpi_cst_resume(device_t);
156 static int acpi_cst_shutdown(device_t);
158 static void acpi_cst_notify(device_t);
159 static void acpi_cst_postattach(void *);
160 static void acpi_cst_idle(void);
162 static void acpi_cst_cx_probe(struct acpi_cst_softc *);
163 static void acpi_cst_cx_probe_fadt(struct acpi_cst_softc *);
164 static int acpi_cst_cx_probe_cst(struct acpi_cst_softc *, int);
165 static int acpi_cst_cx_reprobe_cst(struct acpi_cst_softc *);
167 static void acpi_cst_startup(struct acpi_cst_softc *);
168 static void acpi_cst_support_list(struct acpi_cst_softc *);
169 static int acpi_cst_set_lowest(struct acpi_cst_softc *, int);
170 static int acpi_cst_set_lowest_oncpu(struct acpi_cst_softc *, int);
171 static void acpi_cst_non_c3(struct acpi_cst_softc *);
172 static void acpi_cst_global_cx_count(void);
173 static int acpi_cst_set_quirks(void);
174 static void acpi_cst_c3_bm_rld(struct acpi_cst_softc *);
175 static void acpi_cst_c1_halt(void); /* XXX */
177 static int acpi_cst_usage_sysctl(SYSCTL_HANDLER_ARGS);
178 static int acpi_cst_lowest_sysctl(SYSCTL_HANDLER_ARGS);
179 static int acpi_cst_lowest_use_sysctl(SYSCTL_HANDLER_ARGS);
180 static int acpi_cst_global_lowest_sysctl(SYSCTL_HANDLER_ARGS);
181 static int acpi_cst_global_lowest_use_sysctl(SYSCTL_HANDLER_ARGS);
183 static device_method_t acpi_cst_methods[] = {
184 /* Device interface */
185 DEVMETHOD(device_probe, acpi_cst_probe),
186 DEVMETHOD(device_attach, acpi_cst_attach),
187 DEVMETHOD(device_detach, bus_generic_detach),
188 DEVMETHOD(device_shutdown, acpi_cst_shutdown),
189 DEVMETHOD(device_suspend, acpi_cst_suspend),
190 DEVMETHOD(device_resume, acpi_cst_resume),
193 DEVMETHOD(bus_add_child, bus_generic_add_child),
194 DEVMETHOD(bus_read_ivar, bus_generic_read_ivar),
195 DEVMETHOD(bus_get_resource_list, bus_generic_get_resource_list),
196 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
197 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
198 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
199 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
200 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
201 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
202 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
203 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
204 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
208 static driver_t acpi_cst_driver = {
211 sizeof(struct acpi_cst_softc),
214 static devclass_t acpi_cst_devclass;
215 DRIVER_MODULE(cpu_cst, cpu, acpi_cst_driver, acpi_cst_devclass, NULL, NULL);
216 MODULE_DEPEND(cpu_cst, acpi, 1, 1, 1);
219 acpi_cst_probe(device_t dev)
223 if (acpi_disabled("cpu_cst") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
226 cpu_id = acpi_get_magic(dev);
228 if (acpi_cst_softc == NULL)
229 acpi_cst_softc = kmalloc(sizeof(struct acpi_cst_softc *) *
230 SMP_MAXCPU, M_TEMP /* XXX */, M_INTWAIT | M_ZERO);
233 * Check if we already probed this processor. We scan the bus twice
234 * so it's possible we've already seen this one.
236 if (acpi_cst_softc[cpu_id] != NULL) {
237 device_printf(dev, "CPU%d cstate already exist\n", cpu_id);
241 /* Mark this processor as in-use and save our derived id for attach. */
242 acpi_cst_softc[cpu_id] = (void *)1;
243 device_set_desc(dev, "ACPI CPU C-State");
249 acpi_cst_attach(device_t dev)
253 struct acpi_cst_softc *sc;
256 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
258 sc = device_get_softc(dev);
260 sc->cst_parent = device_get_softc(device_get_parent(dev));
261 sc->cst_handle = acpi_get_handle(dev);
262 sc->cst_cpuid = acpi_get_magic(dev);
263 acpi_cst_softc[sc->cst_cpuid] = sc;
264 acpi_cst_smi_cmd = AcpiGbl_FADT.SmiCommand;
265 acpi_cst_ctrl = AcpiGbl_FADT.CstControl;
268 buf.Length = ACPI_ALLOCATE_BUFFER;
269 status = AcpiEvaluateObject(sc->cst_handle, NULL, NULL, &buf);
270 if (ACPI_FAILURE(status)) {
271 device_printf(dev, "attach failed to get Processor obj - %s\n",
272 AcpiFormatException(status));
275 obj = (ACPI_OBJECT *)buf.Pointer;
276 sc->cst_p_blk = obj->Processor.PblkAddress;
277 sc->cst_p_blk_len = obj->Processor.PblkLength;
279 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "cpu_cst%d: P_BLK at %#x/%d\n",
280 device_get_unit(dev), sc->cst_p_blk, sc->cst_p_blk_len));
283 * If this is the first cpu we attach, create and initialize the generic
284 * resources that will be used by all acpi cpu devices.
286 if (device_get_unit(dev) == 0) {
287 /* Assume we won't be using FADT for Cx states by default */
288 acpi_cst_use_fadt = FALSE;
290 /* Queue post cpu-probing task handler */
291 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cst_postattach, NULL);
294 /* Probe for Cx state support. */
295 acpi_cst_cx_probe(sc);
297 /* Finally, call identify and probe/attach for child devices. */
298 bus_generic_probe(dev);
299 bus_generic_attach(dev);
305 * Disable any entry to the idle function during suspend and re-enable it
309 acpi_cst_suspend(device_t dev)
313 error = bus_generic_suspend(dev);
316 acpi_cst_disable_idle = TRUE;
321 acpi_cst_resume(device_t dev)
323 acpi_cst_disable_idle = FALSE;
324 return (bus_generic_resume(dev));
328 acpi_cst_shutdown(device_t dev)
330 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
332 /* Allow children to shutdown first. */
333 bus_generic_shutdown(dev);
336 * Disable any entry to the idle function. There is a small race where
337 * an idle thread have passed this check but not gone to sleep. This
338 * is ok since device_shutdown() does not free the softc, otherwise
339 * we'd have to be sure all threads were evicted before returning.
341 acpi_cst_disable_idle = TRUE;
347 acpi_cst_cx_probe(struct acpi_cst_softc *sc)
349 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
351 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
352 sc->cst_prev_sleep = 1000000;
353 sc->cst_cx_lowest = 0;
354 sc->cst_cx_lowest_req = 0;
357 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
358 * any, we'll revert to FADT/P_BLK Cx control method which will be
359 * handled by acpi_cst_postattach. We need to defer to after having
360 * probed all the cpus in the system before probing for Cx states from
361 * FADT as we may already have found cpus with valid _CST packages.
363 if (!acpi_cst_use_fadt && acpi_cst_cx_probe_cst(sc, 0) != 0) {
365 * We were unable to find a _CST package for this cpu or there
366 * was an error parsing it. Switch back to generic mode.
368 acpi_cst_use_fadt = TRUE;
370 device_printf(sc->cst_dev, "switching to FADT Cx mode\n");
374 * TODO: _CSD Package should be checked here.
379 acpi_cst_cx_probe_fadt(struct acpi_cst_softc *sc)
381 struct acpi_cst_cx *cx_ptr;
383 sc->cst_cx_count = 0;
384 cx_ptr = sc->cst_cx_states;
386 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
387 sc->cst_prev_sleep = 1000000;
389 /* C1 has been required since just after ACPI 1.0 */
390 cx_ptr->gas.SpaceId = ACPI_ADR_SPACE_FIXED_HARDWARE;
391 cx_ptr->type = ACPI_STATE_C1;
392 cx_ptr->trans_lat = 0;
396 /* C2(+) is not supported on MP system */
397 if (ncpus > 1 && (AcpiGbl_FADT.Flags & ACPI_FADT_C2_MP_SUPPORTED) == 0)
401 * The spec says P_BLK must be 6 bytes long. However, some systems
402 * use it to indicate a fractional set of features present so we
403 * take 5 as C2. Some may also have a value of 7 to indicate
404 * another C3 but most use _CST for this (as required) and having
405 * "only" C1-C3 is not a hardship.
407 if (sc->cst_p_blk_len < 5)
410 /* Validate and allocate resources for C2 (P_LVL2). */
411 if (AcpiGbl_FADT.C2Latency <= 100) {
412 cx_ptr->gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
413 cx_ptr->gas.BitWidth = 8;
414 cx_ptr->gas.Address = sc->cst_p_blk + 4;
416 cx_ptr->rid = sc->cst_parent->cpux_next_rid;
417 acpi_bus_alloc_gas(sc->cst_dev, &cx_ptr->res_type, &cx_ptr->rid,
418 &cx_ptr->gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
419 if (cx_ptr->p_lvlx != NULL) {
420 sc->cst_parent->cpux_next_rid++;
421 cx_ptr->type = ACPI_STATE_C2;
422 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
423 cx_ptr->btag = rman_get_bustag(cx_ptr->p_lvlx);
424 cx_ptr->bhand = rman_get_bushandle(cx_ptr->p_lvlx);
430 if (sc->cst_p_blk_len < 6)
433 /* Validate and allocate resources for C3 (P_LVL3). */
434 if (AcpiGbl_FADT.C3Latency <= 1000 &&
435 !(acpi_cst_quirks & ACPI_CST_QUIRK_NO_C3)) {
436 cx_ptr->gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
437 cx_ptr->gas.BitWidth = 8;
438 cx_ptr->gas.Address = sc->cst_p_blk + 5;
440 cx_ptr->rid = sc->cst_parent->cpux_next_rid;
441 acpi_bus_alloc_gas(sc->cst_dev, &cx_ptr->res_type, &cx_ptr->rid,
442 &cx_ptr->gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
443 if (cx_ptr->p_lvlx != NULL) {
444 sc->cst_parent->cpux_next_rid++;
445 cx_ptr->type = ACPI_STATE_C3;
446 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
447 cx_ptr->btag = rman_get_bustag(cx_ptr->p_lvlx);
448 cx_ptr->bhand = rman_get_bushandle(cx_ptr->p_lvlx);
456 * Parse a _CST package and set up its Cx states. Since the _CST object
457 * can change dynamically, our notify handler may call this function
458 * to clean up and probe the new _CST package.
461 acpi_cst_cx_probe_cst(struct acpi_cst_softc *sc, int reprobe)
463 struct acpi_cst_cx *cx_ptr;
471 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
474 KKASSERT(mycpuid == sc->cst_cpuid);
477 buf.Length = ACPI_ALLOCATE_BUFFER;
478 status = AcpiEvaluateObject(sc->cst_handle, "_CST", NULL, &buf);
479 if (ACPI_FAILURE(status))
482 /* _CST is a package with a count and at least one Cx package. */
483 top = (ACPI_OBJECT *)buf.Pointer;
484 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
485 device_printf(sc->cst_dev, "invalid _CST package\n");
486 AcpiOsFree(buf.Pointer);
489 if (count != top->Package.Count - 1) {
490 device_printf(sc->cst_dev, "invalid _CST state count (%d != %d)\n",
491 count, top->Package.Count - 1);
492 count = top->Package.Count - 1;
494 if (count > MAX_CX_STATES) {
495 device_printf(sc->cst_dev, "_CST has too many states (%d)\n", count);
496 count = MAX_CX_STATES;
499 sc->cst_flags |= ACPI_CST_FLAG_PROBING;
502 for (i = 0; i < sc->cst_cx_count; ++i) {
503 cx_ptr = &sc->cst_cx_states[i];
505 /* Free up any previous register. */
506 if (cx_ptr->p_lvlx != NULL) {
507 bus_release_resource(sc->cst_dev, cx_ptr->res_type, cx_ptr->rid,
509 cx_ptr->p_lvlx = NULL;
513 /* Set up all valid states. */
514 sc->cst_cx_count = 0;
515 cx_ptr = sc->cst_cx_states;
516 for (i = 0; i < count; i++) {
517 pkg = &top->Package.Elements[i + 1];
518 if (!ACPI_PKG_VALID(pkg, 4) ||
519 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
520 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
521 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
523 device_printf(sc->cst_dev, "skipping invalid Cx state package\n");
527 /* Validate the state to see if we should use it. */
528 switch (cx_ptr->type) {
539 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_C3) != 0) {
540 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
541 "cpu_cst%d: C3[%d] not available.\n",
542 device_get_unit(sc->cst_dev), i));
549 * Allocate the control register for C2 or C3(+).
551 KASSERT(cx_ptr->p_lvlx == NULL, ("still has lvlx"));
552 acpi_PkgRawGas(pkg, 0, &cx_ptr->gas);
554 cx_ptr->rid = sc->cst_parent->cpux_next_rid;
555 acpi_bus_alloc_gas(sc->cst_dev, &cx_ptr->res_type, &cx_ptr->rid,
556 &cx_ptr->gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
557 if (cx_ptr->p_lvlx != NULL) {
558 sc->cst_parent->cpux_next_rid++;
559 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
560 "cpu_cst%d: Got C%d - %d latency\n",
561 device_get_unit(sc->cst_dev), cx_ptr->type,
563 cx_ptr->btag = rman_get_bustag(cx_ptr->p_lvlx);
564 cx_ptr->bhand = rman_get_bushandle(cx_ptr->p_lvlx);
569 AcpiOsFree(buf.Pointer);
572 /* If there are C3(+) states, always enable bus master wakeup */
573 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM_CTRL) == 0) {
574 for (i = 0; i < sc->cst_cx_count; ++i) {
575 struct acpi_cst_cx *cx = &sc->cst_cx_states[i];
577 if (cx->type >= ACPI_STATE_C3) {
578 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
584 /* Fix up the lowest Cx being used */
585 acpi_cst_set_lowest_oncpu(sc, sc->cst_cx_lowest_req);
589 * Cache the lowest non-C3 state.
590 * NOTE: must after cst_cx_lowest is set.
595 sc->cst_flags &= ~ACPI_CST_FLAG_PROBING;
601 acpi_cst_cx_reprobe_cst_handler(netmsg_t msg)
603 struct netmsg_acpi_cst *rmsg = (struct netmsg_acpi_cst *)msg;
606 error = acpi_cst_cx_probe_cst(rmsg->sc, 1);
607 lwkt_replymsg(&rmsg->base.lmsg, error);
611 acpi_cst_cx_reprobe_cst(struct acpi_cst_softc *sc)
613 struct netmsg_acpi_cst msg;
615 netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
616 acpi_cst_cx_reprobe_cst_handler);
619 return lwkt_domsg(netisr_cpuport(sc->cst_cpuid), &msg.base.lmsg, 0);
623 * Call this *after* all CPUs Cx states have been attached.
626 acpi_cst_postattach(void *arg)
628 struct acpi_cst_softc *sc;
631 /* Get set of Cx state devices */
632 devclass_get_devices(acpi_cst_devclass, &acpi_cst_devices,
636 * Setup any quirks that might necessary now that we have probed
637 * all the CPUs' Cx states.
639 acpi_cst_set_quirks();
641 if (acpi_cst_use_fadt) {
643 * We are using Cx mode from FADT, probe for available Cx states
644 * for all processors.
646 for (i = 0; i < acpi_cst_ndevices; i++) {
647 sc = device_get_softc(acpi_cst_devices[i]);
648 acpi_cst_cx_probe_fadt(sc);
652 * We are using _CST mode, remove C3 state if necessary.
654 * As we now know for sure that we will be using _CST mode
655 * install our notify handler.
657 for (i = 0; i < acpi_cst_ndevices; i++) {
658 sc = device_get_softc(acpi_cst_devices[i]);
659 if (acpi_cst_quirks & ACPI_CST_QUIRK_NO_C3)
660 sc->cst_cx_count = sc->cst_non_c3 + 1;
661 sc->cst_parent->cpux_cst_notify = acpi_cst_notify;
664 acpi_cst_global_cx_count();
666 /* Perform Cx final initialization. */
667 for (i = 0; i < acpi_cst_ndevices; i++) {
668 sc = device_get_softc(acpi_cst_devices[i]);
669 acpi_cst_startup(sc);
671 if (sc->cst_parent->glob_sysctl_tree != NULL) {
672 struct acpi_cpux_softc *cpux = sc->cst_parent;
674 /* Add a sysctl handler to handle global Cx lowest setting */
675 SYSCTL_ADD_PROC(&cpux->glob_sysctl_ctx,
676 SYSCTL_CHILDREN(cpux->glob_sysctl_tree),
677 OID_AUTO, "cx_lowest",
678 CTLTYPE_STRING | CTLFLAG_RW, NULL, 0,
679 acpi_cst_global_lowest_sysctl, "A",
680 "Requested global lowest Cx sleep state");
681 SYSCTL_ADD_PROC(&cpux->glob_sysctl_ctx,
682 SYSCTL_CHILDREN(cpux->glob_sysctl_tree),
683 OID_AUTO, "cx_lowest_use",
684 CTLTYPE_STRING | CTLFLAG_RD, NULL, 0,
685 acpi_cst_global_lowest_use_sysctl, "A",
686 "Global lowest Cx sleep state to use");
690 /* Take over idling from cpu_idle_default(). */
691 acpi_cst_cx_lowest = 0;
692 acpi_cst_cx_lowest_req = 0;
693 acpi_cst_disable_idle = FALSE;
694 cpu_idle_hook = acpi_cst_idle;
698 acpi_cst_support_list(struct acpi_cst_softc *sc)
704 * Set up the list of Cx states
706 sbuf_new(&sb, sc->cst_cx_supported, sizeof(sc->cst_cx_supported),
708 for (i = 0; i < sc->cst_cx_count; i++)
709 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cst_cx_states[i].trans_lat);
715 acpi_cst_c3_bm_rld_handler(netmsg_t msg)
717 struct netmsg_acpi_cst *rmsg = (struct netmsg_acpi_cst *)msg;
719 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
720 lwkt_replymsg(&rmsg->base.lmsg, 0);
724 acpi_cst_c3_bm_rld(struct acpi_cst_softc *sc)
726 struct netmsg_acpi_cst msg;
728 netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
729 acpi_cst_c3_bm_rld_handler);
732 lwkt_domsg(netisr_cpuport(sc->cst_cpuid), &msg.base.lmsg, 0);
736 acpi_cst_startup(struct acpi_cst_softc *sc)
738 struct acpi_cpux_softc *cpux = sc->cst_parent;
740 /* If there are C3(+) states, always enable bus master wakeup */
741 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM_CTRL) == 0) {
744 for (i = 0; i < sc->cst_cx_count; ++i) {
745 struct acpi_cst_cx *cx = &sc->cst_cx_states[i];
747 if (cx->type >= ACPI_STATE_C3) {
748 acpi_cst_c3_bm_rld(sc);
754 acpi_cst_support_list(sc);
756 SYSCTL_ADD_STRING(&cpux->pcpu_sysctl_ctx,
757 SYSCTL_CHILDREN(cpux->pcpu_sysctl_tree),
758 OID_AUTO, "cx_supported", CTLFLAG_RD,
759 sc->cst_cx_supported, 0,
760 "Cx/microsecond values for supported Cx states");
761 SYSCTL_ADD_PROC(&cpux->pcpu_sysctl_ctx,
762 SYSCTL_CHILDREN(cpux->pcpu_sysctl_tree),
763 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
764 (void *)sc, 0, acpi_cst_lowest_sysctl, "A",
765 "requested lowest Cx sleep state");
766 SYSCTL_ADD_PROC(&cpux->pcpu_sysctl_ctx,
767 SYSCTL_CHILDREN(cpux->pcpu_sysctl_tree),
768 OID_AUTO, "cx_lowest_use", CTLTYPE_STRING | CTLFLAG_RD,
769 (void *)sc, 0, acpi_cst_lowest_use_sysctl, "A",
770 "lowest Cx sleep state to use");
771 SYSCTL_ADD_PROC(&cpux->pcpu_sysctl_ctx,
772 SYSCTL_CHILDREN(cpux->pcpu_sysctl_tree),
773 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
774 (void *)sc, 0, acpi_cst_usage_sysctl, "A",
775 "percent usage for each Cx state");
778 /* Signal platform that we can handle _CST notification. */
779 if (!acpi_cst_use_fadt && acpi_cst_ctrl != 0) {
781 AcpiOsWritePort(acpi_cst_smi_cmd, acpi_cst_ctrl, 8);
788 * Idle the CPU in the lowest state possible. This function is called with
789 * interrupts disabled. Note that once it re-enables interrupts, a task
790 * switch can occur so do not access shared data (i.e. the softc) after
791 * interrupts are re-enabled.
796 struct acpi_cst_softc *sc;
797 struct acpi_cst_cx *cx_next;
798 union microtime_pcpu start, end;
800 int bm_active, cx_next_idx, i, tdiff;
802 /* If disabled, return immediately. */
803 if (acpi_cst_disable_idle) {
809 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
810 * since there is no Cx state for this processor.
812 sc = acpi_cst_softc[mdcpu->mi.gd_cpuid];
818 /* Still probing; use C1 */
819 if (sc->cst_flags & ACPI_CST_FLAG_PROBING) {
824 /* Find the lowest state that has small enough latency. */
826 for (i = sc->cst_cx_lowest; i >= 0; i--) {
827 if (sc->cst_cx_states[i].trans_lat * 3 <= sc->cst_prev_sleep) {
834 * If C3(+) is to be entered, check for bus master activity.
835 * If there was activity, clear the bit and use the lowest
838 cx_next = &sc->cst_cx_states[cx_next_idx];
839 if (cx_next->type >= ACPI_STATE_C3 &&
840 (acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM_CTRL) == 0) {
841 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
842 if (bm_active != 0) {
843 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
844 cx_next_idx = sc->cst_non_c3;
848 /* Select the next state and update statistics. */
849 cx_next = &sc->cst_cx_states[cx_next_idx];
850 sc->cst_cx_stats[cx_next_idx]++;
851 KASSERT(cx_next->type != ACPI_STATE_C0, ("C0 sleep"));
854 * Execute HLT (or equivalent) and wait for an interrupt. We can't
855 * calculate the time spent in C1 since the place we wake up is an
856 * ISR. Assume we slept half of quantum and return.
858 if (cx_next->type == ACPI_STATE_C1) {
859 sc->cst_prev_sleep = (sc->cst_prev_sleep * 3 + 500000 / hz) / 4;
865 * For C3(+), disable bus master arbitration if BM control is
866 * available, otherwise flush the CPU cache.
868 if (cx_next->type >= ACPI_STATE_C3) {
869 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM_CTRL) == 0)
870 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1);
872 ACPI_FLUSH_CPU_CACHE();
876 * Read from P_LVLx to enter C2(+), checking time spent asleep.
878 microtime_pcpu_get(&start);
881 ACPI_CST_ENTER_IO(cx_next);
883 * Perform a dummy I/O read. Since it may take an arbitrary time
884 * to enter the idle state, this read makes sure that we are frozen.
886 AcpiRead(&dummy, &AcpiGbl_FADT.XPmTimerBlock);
889 microtime_pcpu_get(&end);
891 /* Enable bus master arbitration. */
892 if (cx_next->type >= ACPI_STATE_C3) {
893 if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM_CTRL) == 0)
894 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0);
898 /* Find the actual time asleep in microseconds. */
899 tdiff = microtime_pcpu_diff(&start, &end);
900 sc->cst_prev_sleep = (sc->cst_prev_sleep * 3 + tdiff) / 4;
904 * Re-evaluate the _CST object when we are notified that it changed.
907 acpi_cst_notify(device_t dev)
909 struct acpi_cst_softc *sc = device_get_softc(dev);
911 KASSERT(curthread->td_type != TD_TYPE_NETISR,
912 ("notify in netisr%d", mycpuid));
914 lwkt_serialize_enter(&acpi_cst_slize);
916 /* Update the list of Cx states. */
917 acpi_cst_cx_reprobe_cst(sc);
918 acpi_cst_support_list(sc);
920 /* Update the new lowest useable Cx state for all CPUs. */
921 acpi_cst_global_cx_count();
924 * Fix up the lowest Cx being used
926 if (acpi_cst_cx_lowest_req < acpi_cst_cx_count)
927 acpi_cst_cx_lowest = acpi_cst_cx_lowest_req;
928 if (acpi_cst_cx_lowest > acpi_cst_cx_count - 1)
929 acpi_cst_cx_lowest = acpi_cst_cx_count - 1;
931 lwkt_serialize_exit(&acpi_cst_slize);
935 acpi_cst_set_quirks(void)
940 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
943 * Bus mastering arbitration control is needed to keep caches coherent
944 * while sleeping in C3. If it's not present but a working flush cache
945 * instruction is present, flush the caches before entering C3 instead.
946 * Otherwise, just disable C3 completely.
948 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
949 AcpiGbl_FADT.Pm2ControlLength == 0) {
950 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
951 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
952 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_BM_CTRL;
953 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
954 "cpu_cst: no BM control, using flush cache method\n"));
956 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_C3;
957 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
958 "cpu_cst: no BM control, C3 not available\n"));
963 * If we are using FADT Cx mode, C3 on multiple CPUs requires using
964 * the expensive flush cache instruction.
966 if (acpi_cst_use_fadt && ncpus > 1) {
967 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_BM_CTRL;
968 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
969 "cpu_cst: SMP, using flush cache mode for C3\n"));
972 /* Look for various quirks of the PIIX4 part. */
973 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
974 if (acpi_dev != NULL) {
975 switch (pci_get_revid(acpi_dev)) {
977 * Disable C3 support for all PIIX4 chipsets. Some of these parts
978 * do not report the BMIDE status to the BM status register and
979 * others have a livelock bug if Type-F DMA is enabled. Linux
980 * works around the BMIDE bug by reading the BM status directly
981 * but we take the simpler approach of disabling C3 for these
984 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
985 * Livelock") from the January 2002 PIIX4 specification update.
986 * Applies to all PIIX4 models.
988 * Also, make sure that all interrupts cause a "Stop Break"
989 * event to exit from C2 state.
990 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak)
991 * should be set to zero, otherwise it causes C2 to short-sleep.
992 * PIIX4 doesn't properly support C3 and bus master activity
993 * need not break out of C2.
995 case PCI_REVISION_A_STEP:
996 case PCI_REVISION_B_STEP:
997 case PCI_REVISION_4E:
998 case PCI_REVISION_4M:
999 acpi_cst_quirks |= ACPI_CST_QUIRK_NO_C3;
1000 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1001 "cpu_cst: working around PIIX4 bug, disabling C3\n"));
1003 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
1004 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
1005 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1006 "cpu_cst: PIIX4: enabling IRQs to generate Stop Break\n"));
1007 val |= PIIX4_STOP_BREAK_MASK;
1008 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
1010 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val);
1012 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1013 "cpu_cst: PIIX4: reset BRLD_EN_BM\n"));
1014 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
1026 acpi_cst_usage_sysctl(SYSCTL_HANDLER_ARGS)
1028 struct acpi_cst_softc *sc;
1032 uintmax_t fract, sum, whole;
1034 sc = (struct acpi_cst_softc *) arg1;
1036 for (i = 0; i < sc->cst_cx_count; i++)
1037 sum += sc->cst_cx_stats[i];
1038 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1039 for (i = 0; i < sc->cst_cx_count; i++) {
1041 whole = (uintmax_t)sc->cst_cx_stats[i] * 100;
1042 fract = (whole % sum) * 100;
1043 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1044 (u_int)(fract / sum));
1046 sbuf_printf(&sb, "0.00%% ");
1048 sbuf_printf(&sb, "last %dus", sc->cst_prev_sleep);
1051 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1058 acpi_cst_set_lowest_oncpu(struct acpi_cst_softc *sc, int val)
1060 int old_lowest, error = 0, old_lowest_req;
1061 uint32_t old_type, type;
1063 KKASSERT(mycpuid == sc->cst_cpuid);
1065 old_lowest_req = sc->cst_cx_lowest_req;
1066 sc->cst_cx_lowest_req = val;
1068 if (val > sc->cst_cx_count - 1)
1069 val = sc->cst_cx_count - 1;
1070 old_lowest = atomic_swap_int(&sc->cst_cx_lowest, val);
1072 old_type = sc->cst_cx_states[old_lowest].type;
1073 type = sc->cst_cx_states[val].type;
1074 if (old_type >= ACPI_STATE_C3 && type < ACPI_STATE_C3) {
1075 KKASSERT(acpi_cst_c3_reqs > 0);
1076 if (atomic_fetchadd_int(&acpi_cst_c3_reqs, -1) == 1) {
1078 * All of the CPUs exit C3(+) state, use a better
1081 error = cputimer_intr_select_caps(CPUTIMER_INTR_CAP_NONE);
1082 KKASSERT(!error || error == ERESTART);
1083 if (error == ERESTART) {
1085 kprintf("disable C3(+), restart intr cputimer\n");
1086 cputimer_intr_restart();
1089 } else if (type >= ACPI_STATE_C3 && old_type < ACPI_STATE_C3) {
1090 if (atomic_fetchadd_int(&acpi_cst_c3_reqs, 1) == 0) {
1092 * When the first CPU enters C3(+) state, switch
1093 * to an one shot timer, which could handle
1094 * C3(+) state, i.e. the timer will not hang.
1096 error = cputimer_intr_select_caps(CPUTIMER_INTR_CAP_PS);
1097 if (error == ERESTART) {
1099 kprintf("enable C3(+), restart intr cputimer\n");
1100 cputimer_intr_restart();
1102 kprintf("no suitable intr cputimer found\n");
1105 sc->cst_cx_lowest_req = old_lowest_req;
1106 sc->cst_cx_lowest = old_lowest;
1107 atomic_fetchadd_int(&acpi_cst_c3_reqs, -1);
1115 /* Cache the new lowest non-C3 state. */
1116 acpi_cst_non_c3(sc);
1118 /* Reset the statistics counters. */
1119 bzero(sc->cst_cx_stats, sizeof(sc->cst_cx_stats));
1124 acpi_cst_set_lowest_handler(netmsg_t msg)
1126 struct netmsg_acpi_cst *rmsg = (struct netmsg_acpi_cst *)msg;
1129 error = acpi_cst_set_lowest_oncpu(rmsg->sc, rmsg->val);
1130 lwkt_replymsg(&rmsg->base.lmsg, error);
1134 acpi_cst_set_lowest(struct acpi_cst_softc *sc, int val)
1136 struct netmsg_acpi_cst msg;
1138 netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
1139 acpi_cst_set_lowest_handler);
1143 return lwkt_domsg(netisr_cpuport(sc->cst_cpuid), &msg.base.lmsg, 0);
1147 acpi_cst_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1149 struct acpi_cst_softc *sc;
1153 sc = (struct acpi_cst_softc *)arg1;
1154 ksnprintf(state, sizeof(state), "C%d", sc->cst_cx_lowest_req + 1);
1155 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1156 if (error != 0 || req->newptr == NULL)
1158 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1160 val = (int) strtol(state + 1, NULL, 10) - 1;
1164 lwkt_serialize_enter(&acpi_cst_slize);
1165 error = acpi_cst_set_lowest(sc, val);
1166 lwkt_serialize_exit(&acpi_cst_slize);
1172 acpi_cst_lowest_use_sysctl(SYSCTL_HANDLER_ARGS)
1174 struct acpi_cst_softc *sc;
1177 sc = (struct acpi_cst_softc *)arg1;
1178 ksnprintf(state, sizeof(state), "C%d", sc->cst_cx_lowest + 1);
1179 return sysctl_handle_string(oidp, state, sizeof(state), req);
1183 acpi_cst_global_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1185 struct acpi_cst_softc *sc;
1189 ksnprintf(state, sizeof(state), "C%d", acpi_cst_cx_lowest_req + 1);
1190 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1191 if (error != 0 || req->newptr == NULL)
1193 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1195 val = (int) strtol(state + 1, NULL, 10) - 1;
1199 lwkt_serialize_enter(&acpi_cst_slize);
1201 acpi_cst_cx_lowest_req = val;
1202 acpi_cst_cx_lowest = val;
1203 if (acpi_cst_cx_lowest > acpi_cst_cx_count - 1)
1204 acpi_cst_cx_lowest = acpi_cst_cx_count - 1;
1206 /* Update the new lowest useable Cx state for all CPUs. */
1207 for (i = 0; i < acpi_cst_ndevices; i++) {
1208 sc = device_get_softc(acpi_cst_devices[i]);
1209 error = acpi_cst_set_lowest(sc, val);
1216 lwkt_serialize_exit(&acpi_cst_slize);
1222 acpi_cst_global_lowest_use_sysctl(SYSCTL_HANDLER_ARGS)
1226 ksnprintf(state, sizeof(state), "C%d", acpi_cst_cx_lowest + 1);
1227 return sysctl_handle_string(oidp, state, sizeof(state), req);
1231 * Put the CPU in C1 in a machine-dependant way.
1232 * XXX: shouldn't be here!
1235 acpi_cst_c1_halt(void)
1238 if ((mycpu->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0)
1239 __asm __volatile("sti; hlt");
1241 __asm __volatile("sti; pause");
1245 acpi_cst_non_c3(struct acpi_cst_softc *sc)
1250 for (i = sc->cst_cx_lowest; i >= 0; i--) {
1251 if (sc->cst_cx_states[i].type < ACPI_STATE_C3) {
1257 device_printf(sc->cst_dev, "non-C3 %d\n", sc->cst_non_c3);
1261 * Update the largest Cx state supported in the global acpi_cst_cx_count.
1262 * It will be used in the global Cx sysctl handler.
1265 acpi_cst_global_cx_count(void)
1267 struct acpi_cst_softc *sc;
1270 if (acpi_cst_ndevices == 0) {
1271 acpi_cst_cx_count = 0;
1275 sc = device_get_softc(acpi_cst_devices[0]);
1276 acpi_cst_cx_count = sc->cst_cx_count;
1278 for (i = 1; i < acpi_cst_ndevices; i++) {
1279 struct acpi_cst_softc *sc = device_get_softc(acpi_cst_devices[i]);
1281 if (sc->cst_cx_count < acpi_cst_cx_count)
1282 acpi_cst_cx_count = sc->cst_cx_count;
1285 kprintf("cpu_cst: global Cx count %d\n", acpi_cst_cx_count);