2 * Copyright (c) 2011 Adrian Chadd, Xenion Pty Ltd
3 * Copyright (c) 2008 Sam Leffler, Errno Consulting
4 * Copyright (c) 2008 Atheros Communications, Inc.
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 #include "ah_internal.h"
26 #include "ar5416/ar5416.h"
27 #include "ar5416/ar5416reg.h"
28 #include "ar5416/ar5416phy.h"
30 #include "ar9001/ar9130reg.h"
31 #include "ar9001/ar9130_phy.h"
32 #include "ar9001/ar9130_eeprom.h"
34 #include "ar9001/ar9130.ini"
36 static const HAL_PERCAL_DATA ar9130_iq_cal = { /* multi sample */
37 .calName = "IQ", .calType = IQ_MISMATCH_CAL,
38 .calNumSamples = MAX_CAL_SAMPLES,
39 .calCountMax = PER_MIN_LOG_COUNT,
40 .calCollect = ar5416IQCalCollect,
41 .calPostProc = ar5416IQCalibration
43 static const HAL_PERCAL_DATA ar9130_adc_gain_cal = { /* multi sample */
44 .calName = "ADC Gain", .calType = ADC_GAIN_CAL,
45 .calNumSamples = MAX_CAL_SAMPLES,
46 .calCountMax = PER_MIN_LOG_COUNT,
47 .calCollect = ar5416AdcGainCalCollect,
48 .calPostProc = ar5416AdcGainCalibration
50 static const HAL_PERCAL_DATA ar9130_adc_dc_cal = { /* multi sample */
51 .calName = "ADC DC", .calType = ADC_DC_CAL,
52 .calNumSamples = MAX_CAL_SAMPLES,
53 .calCountMax = PER_MIN_LOG_COUNT,
54 .calCollect = ar5416AdcDcCalCollect,
55 .calPostProc = ar5416AdcDcCalibration
57 static const HAL_PERCAL_DATA ar9130_adc_init_dc_cal = {
58 .calName = "ADC Init DC", .calType = ADC_DC_INIT_CAL,
59 .calNumSamples = MIN_CAL_SAMPLES,
60 .calCountMax = INIT_LOG_COUNT,
61 .calCollect = ar5416AdcDcCalCollect,
62 .calPostProc = ar5416AdcDcCalibration
65 static HAL_BOOL ar9130FillCapabilityInfo(struct ath_hal *ah);
68 * Attach for an AR9130 part.
70 static struct ath_hal *
71 ar9130Attach(uint16_t devid, HAL_SOFTC sc,
72 HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
73 HAL_OPS_CONFIG *ah_config,
76 struct ath_hal_5416 *ahp5416;
77 struct ath_hal_5212 *ahp;
83 HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
84 __func__, sc, (void*) st, (void*) sh);
86 /* NB: memory is returned zero'd */
87 ahp5416 = ath_hal_malloc(sizeof (struct ath_hal_5416));
88 if (ahp5416 == AH_NULL) {
89 HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
90 "%s: cannot allocate memory for state block\n", __func__);
94 ar5416InitState(ahp5416, devid, sc, st, sh, status);
95 ahp = &ahp5416->ah_5212;
98 /* XXX override with 9100 specific state */
99 AH5416(ah)->ah_initPLL = ar9130InitPLL;
100 /* XXX should force chainmasks to 0x7, as per ath9k calibration bugs */
102 /* override 5416 methods for our needs */
104 AH5416(ah)->ah_cal.iqCalData.calData = &ar9130_iq_cal;
105 AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9130_adc_gain_cal;
106 AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9130_adc_dc_cal;
107 AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9130_adc_init_dc_cal;
108 AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL;
111 * This was hard-set because the initial ath9k port of this
112 * code kept their runtime conditional register #defines.
113 * AR_SREV and the RTC registers have shifted for Howl;
114 * they detected this and changed the values at runtime.
115 * The current port doesn't yet do this; it may do at a
116 * later stage, so this is set early so any routines which
117 * manipulate the registers have ah_macVersion set to base
118 * the above decision upon.
120 AH_PRIVATE((ah))->ah_macVersion = AR_XSREV_VERSION_HOWL;
123 * Use the "local" EEPROM data given to us by the higher layers.
124 * This is a private copy out of system flash.
125 * By this stage the SoC SPI flash may have disabled the memory-
126 * mapping and rely purely on port-based SPI IO.
128 AH_PRIVATE((ah))->ah_eepromRead = ath_hal_EepromDataRead;
129 AH_PRIVATE((ah))->ah_eepromWrite = NULL;
130 ah->ah_eepromdata = eepromdata;
132 if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) {
134 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n",
140 if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {
141 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",
146 /* Read Revisions from Chips before taking out of reset */
147 val = OS_REG_READ(ah, AR_SREV_CHIP_HOWL) & AR_SREV_CHIP_HOWL_ID;
149 /* XXX are these values even valid for the mac/radio revision? -adrian */
150 HALDEBUG(ah, HAL_DEBUG_ATTACH,
151 "%s: ID 0x%x VERSION 0x%x TYPE 0x%x REVISION 0x%x\n",
152 __func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),
153 MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));
154 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
155 AH_PRIVATE(ah)->ah_ispcie = 0;
157 /* setup common ini data; rf backends handle remainder */
158 HAL_INI_INIT(&ahp->ah_ini_modes, ar5416Modes_9100, 6);
159 HAL_INI_INIT(&ahp->ah_ini_common, ar5416Common_9100, 2);
161 HAL_INI_INIT(&AH5416(ah)->ah_ini_bb_rfgain, ar5416BB_RfGain_9100, 3);
162 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank0, ar5416Bank0_9100, 2);
163 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank1, ar5416Bank1_9100, 2);
164 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank2, ar5416Bank2_9100, 2);
165 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank3, ar5416Bank3_9100, 3);
166 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank6, ar5416Bank6TPC_9100, 3);
167 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank7, ar5416Bank7_9100, 2);
168 HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar5416Addac_9100, 2);
170 ecode = ath_hal_v14EepromAttach(ah);
174 if (!ar5416ChipReset(ah, AH_NULL)) { /* reset chip */
175 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
180 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
182 if (!ar5212ChipTest(ah)) {
183 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
185 ecode = HAL_ESELFTEST;
190 * Set correct Baseband to analog shift
191 * setting to access analog chips.
193 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
195 /* Read Radio Chip Rev Extract */
196 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah);
197 switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {
198 case AR_RAD2133_SREV_MAJOR: /* Sowl: 2G/3x3 */
199 case AR_RAD5133_SREV_MAJOR: /* Sowl: 2+5G/3x3 */
202 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {
203 AH_PRIVATE(ah)->ah_analog5GhzRev =
204 AR_RAD5133_SREV_MAJOR;
208 HALDEBUG(ah, HAL_DEBUG_ANY,
209 "%s: 5G Radio Chip Rev 0x%02X is not supported by "
210 "this driver\n", __func__,
211 AH_PRIVATE(ah)->ah_analog5GhzRev);
212 ecode = HAL_ENOTSUPP;
216 rfStatus = ar2133RfAttach(ah, &ecode);
218 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",
224 * Got everything we need now to setup the capabilities.
226 if (!ar9130FillCapabilityInfo(ah)) {
231 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
232 if (ecode != HAL_OK) {
233 HALDEBUG(ah, HAL_DEBUG_ANY,
234 "%s: error getting mac address from EEPROM\n", __func__);
237 /* XXX How about the serial number ? */
238 /* Read Reg Domain */
239 AH_PRIVATE(ah)->ah_currentRD =
240 ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL);
241 AH_PRIVATE(ah)->ah_currentRDext =
242 ath_hal_eepromGet(ah, AR_EEP_REGDMN_1, AH_NULL);
246 * ah_miscMode is populated by ar5416FillCapabilityInfo()
247 * starting from griffin. Set here to make sure that
248 * AR_MISC_MODE_MIC_NEW_LOC_ENABLE is set before a GTK is
249 * placed into hardware.
251 if (ahp->ah_miscMode != 0)
252 OS_REG_WRITE(ah, AR_MISC_MODE, ahp->ah_miscMode);
254 /* XXX no ANI for AR9130 */
255 AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ;
256 AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ;
257 AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_5416_2GHZ;
258 AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ;
259 AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ;
260 AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ;
262 ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist);
264 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
269 ar5416Detach((struct ath_hal *) ahp);
276 * Fill all software cached or static hardware state information.
277 * Return failure if capabilities are to come from EEPROM and
281 ar9130FillCapabilityInfo(struct ath_hal *ah)
283 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps;
285 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: begin\n", __func__);
286 if (!ar5416FillCapabilityInfo(ah))
288 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: fill'ed; now setting\n", __func__);
289 pCap->halCSTSupport = AH_TRUE;
290 pCap->halRifsRxSupport = AH_TRUE;
291 pCap->halRifsTxSupport = AH_TRUE;
292 pCap->halRtsAggrLimit = 64*1024; /* 802.11n max */
293 pCap->halExtChanDfsSupport = AH_TRUE;
294 pCap->halUseCombinedRadarRssi = AH_TRUE;
295 pCap->halAutoSleepSupport = AH_FALSE; /* XXX? */
297 * MBSSID aggregation is broken in Howl v1.1, v1.2, v1.3
298 * and works fine in v1.4.
299 * XXX todo, enable it for v1.4.
301 pCap->halMbssidAggrSupport = AH_FALSE;
302 pCap->hal4AddrAggrSupport = AH_TRUE;
304 pCap->halHasBBReadWar = AH_TRUE;
307 * Implement the PLL/config changes needed for half/quarter
308 * rates before re-enabling them here.
310 pCap->halChanHalfRate = AH_FALSE;
311 pCap->halChanQuarterRate = AH_FALSE;
317 ar9130Probe(uint16_t vendorid, uint16_t devid)
319 if (vendorid == ATHEROS_VENDOR_ID && devid == AR5416_AR9130_DEVID)
320 return "Atheros 9130";
323 AH_CHIP(AR9130, ar9130Probe, ar9130Attach);