2 * Copyright (c) 2004 David O'Brien <obrien@FreeBSD.org>
3 * Copyright (c) 2003 Orlando Bassotto <orlando.bassotto@ieo-research.it>
4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * $FreeBSD: src/sys/dev/sound/pci/emu10k1.c,v 1.55.2.1 2005/12/30 19:55:53 netchild Exp $
29 * $DragonFly: src/sys/dev/sound/pci/emu10k1.c,v 1.14 2008/01/06 16:55:51 swildner Exp $
32 #include <dev/sound/pcm/sound.h>
33 #include <dev/sound/pcm/ac97.h>
34 #include <dev/sound/pci/gnu/emu10k1.h>
35 #include "emu10k1-alsa%diked.h"
37 #include <bus/pci/pcireg.h>
38 #include <bus/pci/pcivar.h>
39 #include <sys/queue.h>
41 SND_DECLARE_FILE("$DragonFly: src/sys/dev/sound/pci/emu10k1.c,v 1.14 2008/01/06 16:55:51 swildner Exp $");
43 /* -------------------------------------------------------------------- */
45 #define NUM_G 64 /* use all channels */
46 #define WAVEOUT_MAXBUFSIZE 32768
47 #define EMUPAGESIZE 4096 /* don't change */
48 #define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE)
49 #define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */
50 #define EMU10K2_PCI_ID 0x00041102
51 #define EMU10K3_PCI_ID 0x00081102
52 #define EMU_DEFAULT_BUFSZ 4096
53 #define EMU_MAX_CHANS 8
56 #define MAXREQVOICES 8
61 #define TMEMSIZE 256*1024
64 #define ENABLE 0xffffffff
65 #define DISABLE 0x00000000
66 #define ENV_ON DCYSUSV_CHANNELENABLE_MASK
67 #define ENV_OFF 0x00 /* XXX: should this be 1? */
69 #define A_IOCFG_GPOUT_A 0x40 /* Analog Output */
70 #define A_IOCFG_GPOUT_D 0x04 /* Digital Output */
71 #define A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D) /* A_IOCFG_GPOUT0 */
74 SLIST_ENTRY(emu_memblk) link;
77 u_int32_t pte_start, pte_size;
81 u_int8_t bmap[EMUMAXPAGES / 8];
84 bus_addr_t silent_page_addr;
85 bus_addr_t ptb_pages_addr;
86 SLIST_HEAD(, emu_memblk) blocks;
91 int b16:1, stereo:1, busy:1, running:1, ismaster:1;
94 int fxrt1; /* FX routing */
95 int fxrt2; /* FX routing (only for audigy) */
97 struct emu_voice *slave;
98 struct pcm_channel *channel;
103 /* channel registers */
105 int spd, fmt, blksz, run;
106 struct emu_voice *master, *slave;
107 struct snd_dbuf *buffer;
108 struct pcm_channel *channel;
109 struct sc_info *parent;
113 int spd, fmt, run, blksz, num;
114 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask;
115 struct snd_dbuf *buffer;
116 struct pcm_channel *channel;
117 struct sc_info *parent;
120 /* device private data */
124 u_int32_t tos_link:1, APS:1, audigy:1, audigy2:1;
125 u_int32_t addrmask; /* wider if audigy */
128 bus_space_handle_t sh;
129 bus_dma_tag_t parent_dmat;
131 struct resource *reg, *irq;
136 int timer, timerinterval;
140 struct emu_voice voice[64];
141 struct sc_pchinfo pch[EMU_MAX_CHANS];
142 struct sc_rchinfo rch[3];
145 /* -------------------------------------------------------------------- */
152 static int emu_init(struct sc_info *);
153 static void emu_intr(void *);
154 static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
155 static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
156 static int emu_memfree(struct sc_info *sc, void *buf);
157 static int emu_memstart(struct sc_info *sc, void *buf);
159 static void emu_vdump(struct sc_info *sc, struct emu_voice *v);
162 /* talk to the card */
163 static u_int32_t emu_rd(struct sc_info *, int, int);
164 static void emu_wr(struct sc_info *, int, u_int32_t, int);
166 /* -------------------------------------------------------------------- */
168 static u_int32_t emu_rfmt_ac97[] = {
170 AFMT_STEREO | AFMT_S16_LE,
174 static u_int32_t emu_rfmt_mic[] = {
179 static u_int32_t emu_rfmt_efx[] = {
180 AFMT_STEREO | AFMT_S16_LE,
184 static struct pcmchan_caps emu_reccaps[3] = {
185 {8000, 48000, emu_rfmt_ac97, 0},
186 {8000, 8000, emu_rfmt_mic, 0},
187 {48000, 48000, emu_rfmt_efx, 0},
190 static u_int32_t emu_pfmt[] = {
192 AFMT_STEREO | AFMT_U8,
194 AFMT_STEREO | AFMT_S16_LE,
198 static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0};
200 static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000};
201 /* audigy supports 12kHz. */
202 static int audigy_adcspeed[9] = {
203 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000
206 /* -------------------------------------------------------------------- */
209 emu_rd(struct sc_info *sc, int regno, int size)
213 return bus_space_read_1(sc->st, sc->sh, regno);
215 return bus_space_read_2(sc->st, sc->sh, regno);
217 return bus_space_read_4(sc->st, sc->sh, regno);
224 emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size)
228 bus_space_write_1(sc->st, sc->sh, regno, data);
231 bus_space_write_2(sc->st, sc->sh, regno, data);
234 bus_space_write_4(sc->st, sc->sh, regno, data);
240 emu_rdptr(struct sc_info *sc, int chn, int reg)
242 u_int32_t ptr, val, mask, size, offset;
244 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
245 emu_wr(sc, PTR, ptr, 4);
246 val = emu_rd(sc, DATA, 4);
247 if (reg & 0xff000000) {
248 size = (reg >> 24) & 0x3f;
249 offset = (reg >> 16) & 0x1f;
250 mask = ((1 << size) - 1) << offset;
258 emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data)
260 u_int32_t ptr, mask, size, offset;
262 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
263 emu_wr(sc, PTR, ptr, 4);
264 if (reg & 0xff000000) {
265 size = (reg >> 24) & 0x3f;
266 offset = (reg >> 16) & 0x1f;
267 mask = ((1 << size) - 1) << offset;
270 data |= emu_rd(sc, DATA, 4) & ~mask;
272 emu_wr(sc, DATA, data, 4);
276 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data)
278 pc += sc->audigy ? AUDIGY_CODEBASE : MICROCODEBASE;
279 emu_wrptr(sc, 0, pc, data);
282 /* -------------------------------------------------------------------- */
284 /* no locking needed */
287 emu_rdcd(kobj_t obj, void *devinfo, int regno)
289 struct sc_info *sc = (struct sc_info *)devinfo;
291 emu_wr(sc, AC97ADDRESS, regno, 1);
292 return emu_rd(sc, AC97DATA, 2);
296 emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data)
298 struct sc_info *sc = (struct sc_info *)devinfo;
300 emu_wr(sc, AC97ADDRESS, regno, 1);
301 emu_wr(sc, AC97DATA, data, 2);
305 static kobj_method_t emu_ac97_methods[] = {
306 KOBJMETHOD(ac97_read, emu_rdcd),
307 KOBJMETHOD(ac97_write, emu_wrcd),
310 AC97_DECLARE(emu_ac97);
312 /* -------------------------------------------------------------------- */
315 emu_settimer(struct sc_info *sc)
317 struct sc_pchinfo *pch;
318 struct sc_rchinfo *rch;
322 for (i = 0; i < sc->nchans; i++) {
325 tmp = (pch->spd * sndbuf_getbps(pch->buffer))
332 for (i = 0; i < 3; i++) {
335 tmp = (rch->spd * sndbuf_getbps(rch->buffer))
341 RANGE(rate, 48, 9600);
342 sc->timerinterval = 48000 / rate;
343 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
345 return sc->timerinterval;
349 emu_enatimer(struct sc_info *sc, int go)
353 if (sc->timer++ == 0) {
354 x = emu_rd(sc, INTE, 4);
355 x |= INTE_INTERVALTIMERENB;
356 emu_wr(sc, INTE, x, 4);
360 x = emu_rd(sc, INTE, 4);
361 x &= ~INTE_INTERVALTIMERENB;
362 emu_wr(sc, INTE, x, 4);
368 emu_enastop(struct sc_info *sc, char channel, int enable)
370 int reg = (channel & 0x20) ? SOLEH : SOLEL;
373 reg |= channel << 16;
374 emu_wrptr(sc, 0, reg, enable);
378 emu_recval(int speed) {
382 while (val < 7 && speed < adcspeed[val])
388 audigy_recval(int speed) {
392 while (val < 8 && speed < audigy_adcspeed[val])
398 emu_rate_to_pitch(u_int32_t rate)
400 static u_int32_t logMagTable[128] = {
401 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
402 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
403 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
404 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
405 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
406 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
407 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
408 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
409 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
410 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
411 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
412 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
413 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
414 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
415 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
416 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
418 static char logSlopeTable[128] = {
419 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
420 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
421 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
422 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
423 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
424 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
425 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
426 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
427 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
428 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
429 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
430 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
431 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
432 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
433 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
434 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
439 return 0; /* Bail out if no leading "1" */
440 rate *= 11185; /* Scale 48000 to 0x20002380 */
441 for (i = 31; i > 0; i--) {
442 if (rate & 0x80000000) { /* Detect leading "1" */
443 return (((u_int32_t) (i - 15) << 20) +
444 logMagTable[0x7f & (rate >> 24)] +
445 (0x7f & (rate >> 17)) *
446 logSlopeTable[0x7f & (rate >> 24)]);
451 return 0; /* Should never reach this point */
455 emu_rate_to_linearpitch(u_int32_t rate)
457 rate = (rate << 8) / 375;
458 return (rate >> 1) + (rate & 1);
461 static struct emu_voice *
462 emu_valloc(struct sc_info *sc)
468 for (i = 0; i < 64 && sc->voice[i].busy; i++);
477 emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s,
478 u_int32_t sz, struct snd_dbuf *b)
483 buf = emu_memalloc(sc, sz, &tmp_addr);
487 sndbuf_setup(b, buf, sz);
488 m->start = emu_memstart(sc, buf) * EMUPAGESIZE;
489 m->end = m->start + sz;
500 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 8 |
501 FXBUS_PCM_LEFT << 16 | FXBUS_MIDI_REVERB << 24;
502 m->fxrt2 = 0x3f3f3f3f; /* No effects on second route */
504 m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 4 |
505 FXBUS_PCM_LEFT << 8 | FXBUS_MIDI_REVERB << 12;
528 emu_vsetup(struct sc_pchinfo *ch)
530 struct emu_voice *v = ch->master;
533 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0;
534 v->stereo = (ch->fmt & AFMT_STEREO) ? 1 : 0;
535 if (v->slave != NULL) {
536 v->slave->b16 = v->b16;
537 v->slave->stereo = v->stereo;
542 if (v->slave != NULL)
543 v->slave->speed = v->speed;
548 emu_vwrite(struct sc_info *sc, struct emu_voice *v)
552 u_int32_t sa, ea, start, val, silent_page;
554 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
559 l = r = x = y = v->vol;
561 l = v->ismaster ? l : 0;
562 r = v->ismaster ? 0 : r;
565 emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0);
566 val = v->stereo ? 28 : 30;
567 val *= v->b16 ? 1 : 2;
571 emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1);
572 emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2);
573 emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0);
576 emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16);
578 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r);
579 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24));
580 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24));
581 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
583 emu_wrptr(sc, v->vnum, Z1, 0);
584 emu_wrptr(sc, v->vnum, Z2, 0);
586 silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1)
588 emu_wrptr(sc, v->vnum, MAPA, silent_page);
589 emu_wrptr(sc, v->vnum, MAPB, silent_page);
591 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
592 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
593 emu_wrptr(sc, v->vnum, ATKHLDM, 0);
594 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
595 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
596 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
597 emu_wrptr(sc, v->vnum, FMMOD, 0);
598 emu_wrptr(sc, v->vnum, TREMFRQ, 0);
599 emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
600 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
602 emu_wrptr(sc, v->vnum, ATKHLDV,
603 ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
604 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
606 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
607 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
609 if (v->slave != NULL)
610 emu_vwrite(sc, v->slave);
614 emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go)
616 u_int32_t pitch_target, initial_pitch;
617 u_int32_t cra, cs, ccis;
622 cs = v->stereo ? 4 : 2;
623 ccis = v->stereo ? 28 : 30;
624 ccis *= v->b16 ? 1 : 2;
625 sample = v->b16 ? 0x00000000 : 0x80808080;
627 for (i = 0; i < cs; i++)
628 emu_wrptr(sc, v->vnum, CD0 + i, sample);
629 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
630 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
631 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
633 emu_wrptr(sc, v->vnum, IFATN, 0xff00);
634 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
635 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
636 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
637 emu_enastop(sc, v->vnum, 0);
639 pitch_target = emu_rate_to_linearpitch(v->speed);
640 initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
641 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
642 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
643 emu_wrptr(sc, v->vnum, IP, initial_pitch);
645 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
646 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
647 emu_wrptr(sc, v->vnum, IFATN, 0xffff);
648 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
649 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
650 emu_wrptr(sc, v->vnum, IP, 0);
651 emu_enastop(sc, v->vnum, 1);
653 if (v->slave != NULL)
654 emu_vtrigger(sc, v->slave, go);
658 emu_vpos(struct sc_info *sc, struct emu_voice *v)
662 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
663 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
664 return ptr & ~0x0000001f;
669 emu_vdump(struct sc_info *sc, struct emu_voice *v)
672 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl",
673 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL,
674 "envvol", "atkhldv", "dcysusv", "lfoval1",
675 "envval", "atkhldm", "dcysusm", "lfoval2",
676 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2",
680 "mudata1", "mustat1", "mudata2", "mustat2",
681 "fxwc1", "fxwc2", "spdrate", NULL, NULL,
682 NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1",
687 kprintf("voice number %d\n", v->vnum);
688 for (i = 0, x = 0; i <= 0x1e; i++) {
689 if (regname[i] == NULL)
691 kprintf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i));
692 kprintf("%s", (x == 2) ? "\n" : "\t");
698 /* Print out audigy extra registers */
700 for (i = 0; i <= 0xe; i++) {
701 if (regname2[i] == NULL)
703 kprintf("%s\t[%08x]", regname2[i],
704 emu_rdptr(sc, v->vnum, i + 0x70));
705 kprintf("%s", (x == 2)? "\n" : "\t");
715 /* channel interface */
717 emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
718 struct pcm_channel *c, int dir)
720 struct sc_info *sc = devinfo;
721 struct sc_pchinfo *ch;
724 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction"));
725 ch = &sc->pch[sc->pnum++];
729 ch->blksz = sc->bufsz / 2;
732 snd_mtxlock(sc->lock);
733 ch->master = emu_valloc(sc);
734 ch->slave = emu_valloc(sc);
735 snd_mtxunlock(sc->lock);
736 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer))
743 emupchan_free(kobj_t obj, void *data)
745 struct sc_pchinfo *ch = data;
746 struct sc_info *sc = ch->parent;
749 snd_mtxlock(sc->lock);
750 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer));
751 snd_mtxunlock(sc->lock);
757 emupchan_setformat(kobj_t obj, void *data, u_int32_t format)
759 struct sc_pchinfo *ch = data;
766 emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
768 struct sc_pchinfo *ch = data;
775 emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
777 struct sc_pchinfo *ch = data;
778 struct sc_info *sc = ch->parent;
781 ch->blksz = blocksize;
782 snd_mtxlock(sc->lock);
784 irqrate = 48000 / sc->timerinterval;
785 snd_mtxunlock(sc->lock);
786 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
791 emupchan_trigger(kobj_t obj, void *data, int go)
793 struct sc_pchinfo *ch = data;
794 struct sc_info *sc = ch->parent;
796 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
799 snd_mtxlock(sc->lock);
800 if (go == PCMTRIG_START) {
802 emu_vwrite(sc, ch->master);
806 kprintf("start [%d bit, %s, %d hz]\n",
807 ch->master->b16 ? 16 : 8,
808 ch->master->stereo ? "stereo" : "mono",
810 emu_vdump(sc, ch->master);
811 emu_vdump(sc, ch->slave);
814 ch->run = (go == PCMTRIG_START) ? 1 : 0;
815 emu_vtrigger(sc, ch->master, ch->run);
816 snd_mtxunlock(sc->lock);
821 emupchan_getptr(kobj_t obj, void *data)
823 struct sc_pchinfo *ch = data;
824 struct sc_info *sc = ch->parent;
827 snd_mtxlock(sc->lock);
828 r = emu_vpos(sc, ch->master);
829 snd_mtxunlock(sc->lock);
834 static struct pcmchan_caps *
835 emupchan_getcaps(kobj_t obj, void *data)
837 return &emu_playcaps;
840 static kobj_method_t emupchan_methods[] = {
841 KOBJMETHOD(channel_init, emupchan_init),
842 KOBJMETHOD(channel_free, emupchan_free),
843 KOBJMETHOD(channel_setformat, emupchan_setformat),
844 KOBJMETHOD(channel_setspeed, emupchan_setspeed),
845 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize),
846 KOBJMETHOD(channel_trigger, emupchan_trigger),
847 KOBJMETHOD(channel_getptr, emupchan_getptr),
848 KOBJMETHOD(channel_getcaps, emupchan_getcaps),
851 CHANNEL_DECLARE(emupchan);
853 /* channel interface */
855 emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
856 struct pcm_channel *c, int dir)
858 struct sc_info *sc = devinfo;
859 struct sc_rchinfo *ch;
861 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction"));
862 ch = &sc->rch[sc->rnum];
866 ch->blksz = sc->bufsz / 2;
872 ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX;
875 ch->setupreg = ADCCR;
876 ch->irqmask = INTE_ADCBUFENABLE;
884 ch->irqmask = INTE_EFXBUFENABLE;
892 ch->irqmask = INTE_MICBUFENABLE;
896 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) != 0)
899 snd_mtxlock(sc->lock);
900 emu_wrptr(sc, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer));
901 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */
902 snd_mtxunlock(sc->lock);
908 emurchan_setformat(kobj_t obj, void *data, u_int32_t format)
910 struct sc_rchinfo *ch = data;
917 emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
919 struct sc_rchinfo *ch = data;
922 if (ch->parent->audigy)
923 speed = audigy_adcspeed[audigy_recval(speed)];
925 speed = adcspeed[emu_recval(speed)];
936 emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
938 struct sc_rchinfo *ch = data;
939 struct sc_info *sc = ch->parent;
942 ch->blksz = blocksize;
943 snd_mtxlock(sc->lock);
945 irqrate = 48000 / sc->timerinterval;
946 snd_mtxunlock(sc->lock);
947 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
951 /* semantic note: must start at beginning of buffer */
953 emurchan_trigger(kobj_t obj, void *data, int go)
955 struct sc_rchinfo *ch = data;
956 struct sc_info *sc = ch->parent;
961 sz = ADCBS_BUFSIZE_4096;
965 sz = ADCBS_BUFSIZE_8192;
969 sz = ADCBS_BUFSIZE_16384;
973 sz = ADCBS_BUFSIZE_32768;
977 sz = ADCBS_BUFSIZE_65536;
981 sz = ADCBS_BUFSIZE_4096;
984 snd_mtxlock(sc->lock);
988 emu_wrptr(sc, 0, ch->sizereg, sz);
991 val = A_ADCCR_LCHANENABLE;
992 if (ch->fmt & AFMT_STEREO)
993 val |= A_ADCCR_RCHANENABLE;
994 val |= audigy_recval(ch->spd);
996 val = ADCCR_LCHANENABLE;
997 if (ch->fmt & AFMT_STEREO)
998 val |= ADCCR_RCHANENABLE;
999 val |= emu_recval(ch->spd);
1002 emu_wrptr(sc, 0, ch->setupreg, 0);
1003 emu_wrptr(sc, 0, ch->setupreg, val);
1005 val = emu_rd(sc, INTE, 4);
1007 emu_wr(sc, INTE, val, 4);
1013 emu_wrptr(sc, 0, ch->sizereg, 0);
1015 emu_wrptr(sc, 0, ch->setupreg, 0);
1016 val = emu_rd(sc, INTE, 4);
1017 val &= ~ch->irqmask;
1018 emu_wr(sc, INTE, val, 4);
1021 case PCMTRIG_EMLDMAWR:
1022 case PCMTRIG_EMLDMARD:
1026 snd_mtxunlock(sc->lock);
1032 emurchan_getptr(kobj_t obj, void *data)
1034 struct sc_rchinfo *ch = data;
1035 struct sc_info *sc = ch->parent;
1038 snd_mtxlock(sc->lock);
1039 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff;
1040 snd_mtxunlock(sc->lock);
1045 static struct pcmchan_caps *
1046 emurchan_getcaps(kobj_t obj, void *data)
1048 struct sc_rchinfo *ch = data;
1050 return &emu_reccaps[ch->num];
1053 static kobj_method_t emurchan_methods[] = {
1054 KOBJMETHOD(channel_init, emurchan_init),
1055 KOBJMETHOD(channel_setformat, emurchan_setformat),
1056 KOBJMETHOD(channel_setspeed, emurchan_setspeed),
1057 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize),
1058 KOBJMETHOD(channel_trigger, emurchan_trigger),
1059 KOBJMETHOD(channel_getptr, emurchan_getptr),
1060 KOBJMETHOD(channel_getcaps, emurchan_getcaps),
1063 CHANNEL_DECLARE(emurchan);
1065 /* -------------------------------------------------------------------- */
1066 /* The interrupt handler */
1068 emu_intr(void *data)
1070 struct sc_info *sc = data;
1071 u_int32_t stat, ack, i, x;
1073 snd_mtxlock(sc->lock);
1075 stat = emu_rd(sc, IPR, 4);
1081 if (stat & IPR_INTERVALTIMER)
1082 ack |= IPR_INTERVALTIMER;
1084 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL))
1085 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
1087 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL))
1088 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
1090 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL))
1091 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
1093 if (stat & IPR_PCIERROR) {
1094 ack |= IPR_PCIERROR;
1095 device_printf(sc->dev, "pci error\n");
1096 /* we still get an nmi with ecc ram even if we ack this */
1098 if (stat & IPR_SAMPLERATETRACKER) {
1099 ack |= IPR_SAMPLERATETRACKER;
1101 device_printf(sc->dev,
1102 "sample rate tracker lock status change\n");
1107 device_printf(sc->dev, "dodgy irq: %x (harmless)\n",
1110 emu_wr(sc, IPR, stat, 4);
1113 snd_mtxunlock(sc->lock);
1115 if (ack & IPR_INTERVALTIMER) {
1117 for (i = 0; i < sc->nchans; i++) {
1118 if (sc->pch[i].run) {
1120 chn_intr(sc->pch[i].channel);
1124 emu_enatimer(sc, 0);
1128 if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
1129 if (sc->rch[0].channel)
1130 chn_intr(sc->rch[0].channel);
1132 if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
1133 if (sc->rch[1].channel)
1134 chn_intr(sc->rch[1].channel);
1136 if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
1137 if (sc->rch[2].channel)
1138 chn_intr(sc->rch[2].channel);
1141 snd_mtxlock(sc->lock);
1144 snd_mtxunlock(sc->lock);
1147 /* -------------------------------------------------------------------- */
1150 emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1152 bus_addr_t *phys = arg;
1154 *phys = error ? 0 : (bus_addr_t)segs->ds_addr;
1157 kprintf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n",
1158 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
1164 emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
1170 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map))
1172 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, addr, 0)
1179 emu_free(struct sc_info *sc, void *buf)
1181 bus_dmamem_free(sc->parent_dmat, buf, NULL);
1185 emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
1187 u_int32_t blksz, start, idx, ofs, tmp, found;
1188 struct emu_mem *mem = &sc->mem;
1189 struct emu_memblk *blk;
1192 blksz = sz / EMUPAGESIZE;
1193 if (sz > (blksz * EMUPAGESIZE))
1195 /* find a kfree block in the bitmap */
1198 while (!found && start + blksz < EMUMAXPAGES) {
1200 for (idx = start; idx < start + blksz; idx++)
1201 if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
1208 blk = kmalloc(sizeof(*blk), M_DEVBUF, M_WAITOK);
1209 buf = emu_malloc(sc, sz, &blk->buf_addr);
1210 *addr = blk->buf_addr;
1212 kfree(blk, M_DEVBUF);
1216 blk->pte_start = start;
1217 blk->pte_size = blksz;
1219 kprintf("buf %p, pte_start %d, pte_size %d\n", blk->buf,
1220 blk->pte_start, blk->pte_size);
1223 for (idx = start; idx < start + blksz; idx++) {
1224 mem->bmap[idx >> 3] |= 1 << (idx & 7);
1225 tmp = (u_int32_t)(u_long)((u_int8_t *)blk->buf_addr + ofs);
1227 kprintf("pte[%d] -> %x phys, %x virt\n", idx, tmp,
1228 ((u_int32_t)buf) + ofs);
1230 mem->ptb_pages[idx] = (tmp << 1) | idx;
1233 SLIST_INSERT_HEAD(&mem->blocks, blk, link);
1238 emu_memfree(struct sc_info *sc, void *buf)
1241 struct emu_mem *mem = &sc->mem;
1242 struct emu_memblk *blk, *i;
1245 SLIST_FOREACH(i, &mem->blocks, link) {
1251 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
1253 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
1254 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
1255 mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
1256 mem->ptb_pages[idx] = tmp | idx;
1258 kfree(blk, M_DEVBUF);
1263 emu_memstart(struct sc_info *sc, void *buf)
1265 struct emu_mem *mem = &sc->mem;
1266 struct emu_memblk *blk, *i;
1269 SLIST_FOREACH(i, &mem->blocks, link) {
1275 return blk->pte_start;
1279 emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
1282 emu_wrefx(sc, (*pc) * 2, (x << 10) | y);
1283 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w);
1288 audigy_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
1291 emu_wrefx(sc, (*pc) * 2, (x << 12) | y);
1292 emu_wrefx(sc, (*pc) * 2 + 1, (op << 24) | (z << 12) | w);
1297 audigy_initefx(struct sc_info *sc)
1302 /* skip 0, 0, -1, 0 - NOPs */
1303 for (i = 0; i < 512; i++)
1304 audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc);
1306 for (i = 0; i < 512; i++)
1307 emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0);
1311 /* stop fx processor */
1312 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
1314 /* Audigy 2 (EMU10K2) DSP Registers:
1316 0x000-0x00f : 16 registers (???)
1318 0x040/0x041 : AC97 Codec (l/r)
1319 0x042/0x043 : ADC, S/PDIF (l/r)
1320 0x044/0x045 : Optical S/PDIF in (l/r)
1322 0x048/0x049 : Line/Mic 2 (l/r)
1323 0x04a/0x04b : RCA S/PDIF (l/r)
1324 0x04c/0x04d : Aux 2 (l/r)
1326 0x060/0x061 : Digital Front (l/r)
1327 0x062/0x063 : Digital Center/LFE
1328 0x064/0x065 : AudigyDrive Heaphone (l/r)
1329 0x066/0x067 : Digital Rear (l/r)
1330 0x068/0x069 : Analog Front (l/r)
1331 0x06a/0x06b : Analog Center/LFE
1333 0x06e/0x06f : Analog Rear (l/r)
1334 0x070/0x071 : AC97 Output (l/r)
1337 0x076/0x077 : ADC Recording Buffer (l/r)
1339 0x0c0 - 0x0c4 = 0 - 4
1340 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20
1341 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000
1342 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000
1343 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff
1344 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc
1345 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (???)
1347 0x0d6 : Accumulator (???)
1348 0x0d7 : Condition Register
1349 0x0d8 : Noise source
1350 0x0d9 : Noise source
1351 Tank Memory Data Registers
1353 Tank Memory Address Registers
1355 General Purpose Registers
1359 /* AC97Output[l/r] = FXBus PCM[l/r] */
1360 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000,
1361 A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc);
1362 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000,
1363 A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc);
1365 /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */
1366 audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000,
1367 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc);
1368 audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000,
1369 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc);
1371 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1372 audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1),
1373 A_C_40000000, A_GPR(0), &pc);
1375 /* Headphones[l/r] = GPR[0/1] */
1376 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L),
1377 A_C_00000000, A_C_00000000, A_GPR(0), &pc);
1378 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R),
1379 A_C_00000000, A_C_00000000, A_GPR(1), &pc);
1381 /* Analog Front[l/r] = GPR[0/1] */
1382 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000,
1383 A_C_00000000, A_GPR(0), &pc);
1384 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000,
1385 A_C_00000000, A_GPR(1), &pc);
1387 /* Digital Front[l/r] = GPR[0/1] */
1388 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000,
1389 A_C_00000000, A_GPR(0), &pc);
1390 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000,
1391 A_C_00000000, A_GPR(1), &pc);
1393 /* Center and Subwoofer configuration */
1394 /* Analog Center = GPR[0] + GPR[2] */
1395 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000,
1396 A_GPR(0), A_GPR(2), &pc);
1397 /* Analog Sub = GPR[1] + GPR[2] */
1398 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000,
1399 A_GPR(1), A_GPR(2), &pc);
1401 /* Digital Center = GPR[0] + GPR[2] */
1402 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000,
1403 A_GPR(0), A_GPR(2), &pc);
1404 /* Digital Sub = GPR[1] + GPR[2] */
1405 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000,
1406 A_GPR(1), A_GPR(2), &pc);
1409 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1410 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1411 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
1412 A_GPR(16), A_GPR(0), &pc);
1413 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
1414 A_GPR(17), A_GPR(1), &pc);
1416 /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1417 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1418 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
1419 A_GPR(16), A_GPR(0), &pc);
1420 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
1421 A_GPR(17), A_GPR(1), &pc);
1423 /* XXX This is just a copy to the channel, since we do not have
1424 * a patch manager, it is useful for have another output enabled.
1427 /* Analog Rear[l/r] = GPR[0/1] */
1428 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
1429 A_C_00000000, A_GPR(0), &pc);
1430 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
1431 A_C_00000000, A_GPR(1), &pc);
1433 /* Digital Rear[l/r] = GPR[0/1] */
1434 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
1435 A_C_00000000, A_GPR(0), &pc);
1436 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
1437 A_C_00000000, A_GPR(1), &pc);
1440 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1441 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000,
1442 A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc);
1443 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000,
1444 A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc);
1446 /* resume normal operations */
1447 emu_wrptr(sc, 0, A_DBG, 0);
1451 emu_initefx(struct sc_info *sc)
1456 /* acc3 0,0,0,0 - NOPs */
1457 for (i = 0; i < 512; i++) {
1458 emu_wrefx(sc, i * 2, 0x10040);
1459 emu_wrefx(sc, i * 2 + 1, 0x610040);
1462 for (i = 0; i < 256; i++)
1463 emu_wrptr(sc, 0, FXGPREGBASE + i, 0);
1465 /* FX-8010 DSP Registers:
1467 0x000-0x00f : 16 registers
1469 0x010/0x011 : AC97 Codec (l/r)
1470 0x012/0x013 : ADC, S/PDIF (l/r)
1471 0x014/0x015 : Mic(left), Zoom (l/r)
1472 0x016/0x017 : TOS link in (l/r)
1473 0x018/0x019 : Line/Mic 1 (l/r)
1474 0x01a/0x01b : COAX S/PDIF (l/r)
1475 0x01c/0x01d : Line/Mic 2 (l/r)
1477 0x020/0x021 : AC97 Output (l/r)
1478 0x022/0x023 : TOS link out (l/r)
1479 0x024/0x025 : Center/LFE
1480 0x026/0x027 : LiveDrive Headphone (l/r)
1481 0x028/0x029 : Rear Channel (l/r)
1482 0x02a/0x02b : ADC Recording Buffer (l/r)
1483 0x02c : Mic Recording Buffer
1484 0x031/0x032 : Analog Center/LFE
1486 0x040 - 0x044 = 0 - 4
1487 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20
1488 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000
1489 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000
1490 0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff
1491 0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc
1492 0x054 = 0x5a7ef9db, 0x055 = 0x00100000
1495 0x057 : Condition Register
1496 0x058 : Noise source
1497 0x059 : Noise source
1498 0x05a : IRQ Register
1499 0x05b : TRAM Delay Base Address Count
1500 General Purpose Registers
1502 Tank Memory Data Registers
1504 Tank Memory Address Registers
1508 /* Routing - this will be configurable in later version */
1510 /* GPR[0/1] = FX * 4 + SPDIF-in */
1511 emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L),
1512 FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc);
1513 emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R),
1514 FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc);
1516 /* GPR[0/1] += APS-input */
1517 emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000,
1518 sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc);
1519 emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000,
1520 sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc);
1522 /* FrontOut (AC97) = GPR[0/1] */
1523 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000,
1524 C_00000000, GPR(0), &pc);
1525 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000,
1526 C_00000001, GPR(1), &pc);
1528 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1529 emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc);
1532 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */
1533 /* RearVolume = GPR[0x10/0x11] */
1534 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_L), C_00000000,
1535 GPR(16), GPR(0), &pc);
1536 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_R), C_00000000,
1537 GPR(17), GPR(1), &pc);
1539 /* XXX This is just a copy to the channel, since we do not have
1540 * a patch manager, it is useful for have another output enabled.
1543 /* Rear[l/r] = GPR[0/1] */
1544 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000,
1545 C_00000000, GPR(0), &pc);
1546 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000,
1547 C_00000000, GPR(1), &pc);
1550 /* TOS out[l/r] = GPR[0/1] */
1551 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000,
1552 C_00000000, GPR(0), &pc);
1553 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000,
1554 C_00000000, GPR(1), &pc);
1556 /* Center and Subwoofer configuration */
1557 /* Analog Center = GPR[0] + GPR[2] */
1558 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000,
1559 GPR(0), GPR(2), &pc);
1560 /* Analog Sub = GPR[1] + GPR[2] */
1561 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000,
1562 GPR(1), GPR(2), &pc);
1563 /* Digital Center = GPR[0] + GPR[2] */
1564 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_CENTER), C_00000000,
1565 GPR(0), GPR(2), &pc);
1566 /* Digital Sub = GPR[1] + GPR[2] */
1567 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_LFE), C_00000000,
1568 GPR(1), GPR(2), &pc);
1570 /* Headphones[l/r] = GPR[0/1] */
1571 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000,
1572 C_00000000, GPR(0), &pc);
1573 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000,
1574 C_00000000, GPR(1), &pc);
1576 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1577 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000,
1578 C_00000000, EXTIN(EXTIN_AC97_L), &pc);
1579 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000,
1580 C_00000000, EXTIN(EXTIN_AC97_R), &pc);
1582 /* resume normal operations */
1583 emu_wrptr(sc, 0, DBG, 0);
1586 /* Probe and attach the card */
1588 emu_init(struct sc_info *sc)
1590 u_int32_t spcs, ch, tmp, i;
1593 /* enable additional AC97 slots */
1594 emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE);
1597 /* disable audio and lock cache */
1599 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
1602 /* reset recording buffers */
1603 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
1604 emu_wrptr(sc, 0, MICBA, 0);
1605 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
1606 emu_wrptr(sc, 0, FXBA, 0);
1607 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
1608 emu_wrptr(sc, 0, ADCBA, 0);
1610 /* disable channel interrupt */
1612 INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE,
1614 emu_wrptr(sc, 0, CLIEL, 0);
1615 emu_wrptr(sc, 0, CLIEH, 0);
1616 emu_wrptr(sc, 0, SOLEL, 0);
1617 emu_wrptr(sc, 0, SOLEH, 0);
1619 /* wonder what these do... */
1621 emu_wrptr(sc, 0, SPBYPASS, 0xf00);
1622 emu_wrptr(sc, 0, AC97SLOT, 0x3);
1625 /* init envelope engine */
1626 for (ch = 0; ch < NUM_G; ch++) {
1627 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
1628 emu_wrptr(sc, ch, IP, 0);
1629 emu_wrptr(sc, ch, VTFT, 0xffff);
1630 emu_wrptr(sc, ch, CVCF, 0xffff);
1631 emu_wrptr(sc, ch, PTRX, 0);
1632 emu_wrptr(sc, ch, CPF, 0);
1633 emu_wrptr(sc, ch, CCR, 0);
1635 emu_wrptr(sc, ch, PSST, 0);
1636 emu_wrptr(sc, ch, DSL, 0x10);
1637 emu_wrptr(sc, ch, CCCA, 0);
1638 emu_wrptr(sc, ch, Z1, 0);
1639 emu_wrptr(sc, ch, Z2, 0);
1640 emu_wrptr(sc, ch, FXRT, 0xd01c0000);
1642 emu_wrptr(sc, ch, ATKHLDM, 0);
1643 emu_wrptr(sc, ch, DCYSUSM, 0);
1644 emu_wrptr(sc, ch, IFATN, 0xffff);
1645 emu_wrptr(sc, ch, PEFE, 0);
1646 emu_wrptr(sc, ch, FMMOD, 0);
1647 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */
1648 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */
1649 emu_wrptr(sc, ch, TEMPENV, 0);
1651 /*** these are last so OFF prevents writing ***/
1652 emu_wrptr(sc, ch, LFOVAL2, 0);
1653 emu_wrptr(sc, ch, LFOVAL1, 0);
1654 emu_wrptr(sc, ch, ATKHLDV, 0);
1655 emu_wrptr(sc, ch, ENVVOL, 0);
1656 emu_wrptr(sc, ch, ENVVAL, 0);
1659 /* audigy cards need this to initialize correctly */
1660 emu_wrptr(sc, ch, 0x4c, 0);
1661 emu_wrptr(sc, ch, 0x4d, 0);
1662 emu_wrptr(sc, ch, 0x4e, 0);
1663 emu_wrptr(sc, ch, 0x4f, 0);
1664 /* set default routing */
1665 emu_wrptr(sc, ch, A_FXRT1, 0x03020100);
1666 emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
1667 emu_wrptr(sc, ch, A_SENDAMOUNTS, 0);
1670 sc->voice[ch].vnum = ch;
1671 sc->voice[ch].slave = NULL;
1672 sc->voice[ch].busy = 0;
1673 sc->voice[ch].ismaster = 0;
1674 sc->voice[ch].running = 0;
1675 sc->voice[ch].b16 = 0;
1676 sc->voice[ch].stereo = 0;
1677 sc->voice[ch].speed = 0;
1678 sc->voice[ch].start = 0;
1679 sc->voice[ch].end = 0;
1680 sc->voice[ch].channel = NULL;
1682 sc->pnum = sc->rnum = 0;
1685 * Init to 0x02109204 :
1686 * Clock accuracy = 0 (1000ppm)
1687 * Sample Rate = 2 (48kHz)
1688 * Audio Channel = 1 (Left of 2)
1689 * Source Number = 0 (Unspecified)
1690 * Generation Status = 1 (Original for Cat Code 12)
1691 * Cat Code = 12 (Digital Signal Mixer)
1693 * Emphasis = 0 (None)
1694 * CP = 1 (Copyright unasserted)
1695 * AN = 0 (Audio data)
1698 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1699 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1700 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
1701 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1702 emu_wrptr(sc, 0, SPCS0, spcs);
1703 emu_wrptr(sc, 0, SPCS1, spcs);
1704 emu_wrptr(sc, 0, SPCS2, spcs);
1708 else if (sc->audigy2) { /* Audigy 2 */
1709 /* from ALSA initialization code: */
1711 /* Hack for Alice3 to work independent of haP16V driver */
1714 /* Setup SRCMulti_I2S SamplingRate */
1715 tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff;
1716 emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400);
1718 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
1719 emu_wr(sc, 0x20, 0x00600000, 4);
1720 emu_wr(sc, 0x24, 0x00000014, 4);
1722 /* Setup SRCMulti Input Audio Enable */
1723 emu_wr(sc, 0x20, 0x006e0000, 4);
1724 emu_wr(sc, 0x24, 0xff00ff00, 4);
1727 SLIST_INIT(&sc->mem.blocks);
1728 sc->mem.ptb_pages = emu_malloc(sc, EMUMAXPAGES * sizeof(u_int32_t),
1729 &sc->mem.ptb_pages_addr);
1730 if (sc->mem.ptb_pages == NULL)
1733 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE,
1734 &sc->mem.silent_page_addr);
1735 if (sc->mem.silent_page == NULL) {
1736 emu_free(sc, sc->mem.ptb_pages);
1739 /* Clear page with silence & setup all pointers to this page */
1740 bzero(sc->mem.silent_page, EMUPAGESIZE);
1741 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
1742 for (i = 0; i < EMUMAXPAGES; i++)
1743 sc->mem.ptb_pages[i] = tmp | i;
1745 emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
1746 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */
1747 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */
1749 for (ch = 0; ch < NUM_G; ch++) {
1750 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
1751 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
1754 /* emu_memalloc(sc, EMUPAGESIZE); */
1756 * Hokay, now enable the AUD bit
1759 * Enable Audio = 0 (enabled after fx processor initialization)
1760 * Mute Disable Audio = 0
1765 * Mute Disable Audio = 0
1767 * GP S/PDIF AC3 Enable = 1
1768 * CD S/PDIF AC3 Enable = 1
1772 * Mute Disable Audio = 0
1773 * Lock Tank Memory = 1
1774 * Lock Sound Memory = 0
1779 tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE;
1780 if (sc->audigy2) /* Audigy 2 */
1781 tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF |
1782 HCFG_AC3ENABLE_GPSPDIF;
1783 emu_wr(sc, HCFG, tmp, 4);
1787 /* from ALSA initialization code: */
1789 /* enable audio and disable both audio/digital outputs */
1790 emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4);
1791 emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD,
1793 if (sc->audigy2) { /* Audigy 2 */
1795 * Set GPO6 to 1 for Apollo. This has to be done after
1796 * init Alice3 I2SOut beyond 48kHz.
1797 * So, sequence is important.
1800 emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4);
1803 /* EMU10K1 initialization code */
1804 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK
1807 tmp |= HCFG_JOYENABLE;
1809 emu_wr(sc, HCFG, tmp, 4);
1811 /* TOSLink detection */
1813 tmp = emu_rd(sc, HCFG, 4);
1814 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
1815 emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4);
1817 if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) {
1819 emu_wr(sc, HCFG, tmp, 4);
1828 emu_uninit(struct sc_info *sc)
1832 emu_wr(sc, INTE, 0, 4);
1833 for (ch = 0; ch < NUM_G; ch++)
1834 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
1835 for (ch = 0; ch < NUM_G; ch++) {
1836 emu_wrptr(sc, ch, VTFT, 0);
1837 emu_wrptr(sc, ch, CVCF, 0);
1838 emu_wrptr(sc, ch, PTRX, 0);
1839 emu_wrptr(sc, ch, CPF, 0);
1842 if (sc->audigy) { /* stop fx processor */
1843 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
1846 /* disable audio and lock cache */
1848 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
1851 emu_wrptr(sc, 0, PTB, 0);
1852 /* reset recording buffers */
1853 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
1854 emu_wrptr(sc, 0, MICBA, 0);
1855 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
1856 emu_wrptr(sc, 0, FXBA, 0);
1857 emu_wrptr(sc, 0, FXWC, 0);
1858 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
1859 emu_wrptr(sc, 0, ADCBA, 0);
1860 emu_wrptr(sc, 0, TCB, 0);
1861 emu_wrptr(sc, 0, TCBS, 0);
1863 /* disable channel interrupt */
1864 emu_wrptr(sc, 0, CLIEL, 0);
1865 emu_wrptr(sc, 0, CLIEH, 0);
1866 emu_wrptr(sc, 0, SOLEL, 0);
1867 emu_wrptr(sc, 0, SOLEH, 0);
1869 /* init envelope engine */
1870 if (!SLIST_EMPTY(&sc->mem.blocks))
1871 device_printf(sc->dev, "warning: memblock list not empty\n");
1872 emu_free(sc, sc->mem.ptb_pages);
1873 emu_free(sc, sc->mem.silent_page);
1879 emu_pci_probe(device_t dev)
1883 switch (pci_get_devid(dev)) {
1884 case EMU10K1_PCI_ID:
1885 s = "Creative EMU10K1";
1888 case EMU10K2_PCI_ID:
1889 if (pci_get_revid(dev) == 0x04)
1890 s = "Creative Audigy 2 (EMU10K2)";
1892 s = "Creative Audigy (EMU10K2)";
1895 case EMU10K3_PCI_ID:
1896 s = "Creative Audigy 2 (EMU10K3)";
1903 device_set_desc(dev, s);
1904 return BUS_PROBE_DEFAULT;
1908 emu_pci_attach(device_t dev)
1910 struct ac97_info *codec = NULL;
1914 char status[SND_STATUSLEN];
1916 sc = kmalloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
1918 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc");
1920 sc->type = pci_get_devid(dev);
1921 sc->rev = pci_get_revid(dev);
1922 sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID;
1923 sc->audigy2 = (sc->audigy && sc->rev == 0x04);
1924 sc->nchans = sc->audigy ? 8 : 4;
1925 sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
1927 data = pci_read_config(dev, PCIR_COMMAND, 2);
1928 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
1929 pci_write_config(dev, PCIR_COMMAND, data, 2);
1930 data = pci_read_config(dev, PCIR_COMMAND, 2);
1933 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
1934 if (sc->reg == NULL) {
1935 device_printf(dev, "unable to map register space\n");
1938 sc->st = rman_get_bustag(sc->reg);
1939 sc->sh = rman_get_bushandle(sc->reg);
1941 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536);
1943 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
1944 /*lowaddr*/1 << 31, /* can only access 0-2gb */
1945 /*highaddr*/BUS_SPACE_MAXADDR,
1946 /*filter*/NULL, /*filterarg*/NULL,
1947 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1949 &sc->parent_dmat) != 0) {
1950 device_printf(dev, "unable to create dma tag\n");
1954 if (emu_init(sc) == -1) {
1955 device_printf(dev, "unable to initialize the card\n");
1959 codec = AC97_CREATE(dev, sc, emu_ac97);
1960 if (codec == NULL) goto bad;
1961 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0;
1962 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad;
1965 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
1966 RF_ACTIVE | RF_SHAREABLE);
1968 snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) {
1969 device_printf(dev, "unable to map interrupt\n");
1973 ksnprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s",
1974 rman_get_start(sc->reg), rman_get_start(sc->irq),
1975 PCM_KLDSTRING(snd_emu10k1));
1977 if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad;
1978 for (i = 0; i < sc->nchans; i++)
1979 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc);
1980 for (i = 0; i < (gotmic ? 3 : 2); i++)
1981 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc);
1983 pcm_setstatus(dev, status);
1988 if (codec) ac97_destroy(codec);
1989 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
1990 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih);
1991 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
1992 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat);
1993 if (sc->lock) snd_mtxfree(sc->lock);
1994 kfree(sc, M_DEVBUF);
1999 emu_pci_detach(device_t dev)
2004 r = pcm_unregister(dev);
2008 sc = pcm_getdevinfo(dev);
2012 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
2013 bus_teardown_intr(dev, sc->irq, sc->ih);
2014 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
2015 bus_dma_tag_destroy(sc->parent_dmat);
2016 snd_mtxfree(sc->lock);
2017 kfree(sc, M_DEVBUF);
2022 /* add suspend, resume */
2023 static device_method_t emu_methods[] = {
2024 /* Device interface */
2025 DEVMETHOD(device_probe, emu_pci_probe),
2026 DEVMETHOD(device_attach, emu_pci_attach),
2027 DEVMETHOD(device_detach, emu_pci_detach),
2032 static driver_t emu_driver = {
2038 DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0);
2039 DRIVER_MODULE(snd_emu10k1, cardbus, emu_driver, pcm_devclass, 0, 0);
2040 MODULE_DEPEND(snd_emu10k1, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
2041 MODULE_VERSION(snd_emu10k1, 1);
2043 /* dummy driver to silence the joystick device */
2045 emujoy_pci_probe(device_t dev)
2049 switch (pci_get_devid(dev)) {
2051 s = "Creative EMU10K1 Joystick";
2055 s = "Creative EMU10K2 Joystick";
2060 if (s) device_set_desc(dev, s);
2061 return s ? -1000 : ENXIO;
2065 emujoy_pci_attach(device_t dev)
2071 emujoy_pci_detach(device_t dev)
2076 static device_method_t emujoy_methods[] = {
2077 DEVMETHOD(device_probe, emujoy_pci_probe),
2078 DEVMETHOD(device_attach, emujoy_pci_attach),
2079 DEVMETHOD(device_detach, emujoy_pci_detach),
2084 static driver_t emujoy_driver = {
2090 static devclass_t emujoy_devclass;
2092 DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0);