Initial import from FreeBSD RELENG_4:
[dragonfly.git] / sys / net / i4b / layer1 / isic / i4b_usr_sti.c
1 /*
2  * Copyright (c) 1997, 2001 Hellmuth Michaelis. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  *
25  *---------------------------------------------------------------------------
26  *
27  *      i4b_usr_sti.c - USRobotics Sportster ISDN TA intern (Tina-pp)
28  *      -------------------------------------------------------------
29  *
30  * $FreeBSD: src/sys/i4b/layer1/isic/i4b_usr_sti.c,v 1.5.2.1 2001/08/10 14:08:39 obrien Exp $
31  *
32  *      last edit-date: [Wed Jan 24 09:28:12 2001]
33  *
34  *---------------------------------------------------------------------------*/
35
36 #include "isic.h"
37 #include "opt_i4b.h"
38
39 #if (NISIC > 0) && defined(USR_STI)
40
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/bus.h>
44 #include <machine/bus.h>
45 #include <sys/rman.h>
46
47 #include <sys/socket.h>
48 #include <net/if.h>
49
50 #include <machine/i4b_ioctl.h>
51 #include <machine/i4b_trace.h>
52
53 #include <i4b/layer1/i4b_l1.h>
54 #include <i4b/layer1/isic/i4b_isic.h>
55 #include <i4b/layer1/isic/i4b_hscx.h>
56
57 /*---------------------------------------------------------------------------*
58  *      USR Sportster TA intern special registers
59  *---------------------------------------------------------------------------*/
60 #define USR_HSCXA_OFF   0x0000
61 #define USR_HSCXB_OFF   0x4000
62 #define USR_INTL_OFF    0x8000
63 #define USR_ISAC_OFF    0xc000
64
65 #define USR_RES_BIT     0x80    /* 0 = normal, 1 = reset ISAC/HSCX      */
66 #define USR_INTE_BIT    0x40    /* 0 = IRQ disabled, 1 = IRQ's enabled  */
67 #define USR_IL_MASK     0x07    /* IRQ level config                     */
68
69 static u_char intr_no[] = { 0, 0, 0, 0, 0, 1, 0, 2, 0, 0, 3, 4, 5, 0, 6, 7 };
70
71 #define ADDR(reg)       \
72         (((reg/4) * 1024) + ((reg%4) * 2))
73
74 #ifdef USRTA_DEBUG_PORTACCESS
75 int debugcntr;
76 #define USRTA_DEBUG(fmt) \
77                 if (++debugcntr < 1000) printf fmt;
78 #else
79 #define USRTA_DEBUG(fmt)
80 #endif
81
82 /*---------------------------------------------------------------------------*
83  *      USRobotics read fifo routine
84  *---------------------------------------------------------------------------*/
85 static void             
86 usrtai_read_fifo(struct l1_softc *sc, int what, void *buf, size_t size)
87 {
88         register int offset = 0;
89         register unsigned int base = 0;
90
91 USRTA_DEBUG(("usrtai_read_fifo: what %d size %d\n", what, size))
92         switch (what)
93         {
94                 case ISIC_WHAT_ISAC:
95                         base = (unsigned int)ISAC_BASE;
96                         break;
97                 case ISIC_WHAT_HSCXA:
98                         base = (unsigned int)HSCX_A_BASE;
99                         break;
100                 case ISIC_WHAT_HSCXB:
101                         base = (unsigned int)HSCX_B_BASE;
102                         break;
103                 default:
104                         printf("usrtai_read_fifo: invalid what %d\n", what);
105                         return;
106         }
107
108         for(;size > 0; size--, offset++)        
109         {
110                 *((u_char *)buf + offset) = inb(base + ADDR(offset));
111         }
112 }
113
114 /*---------------------------------------------------------------------------*
115  *      USRobotics write fifo routine
116  *---------------------------------------------------------------------------*/
117 static void
118 usrtai_write_fifo(struct l1_softc *sc, int what, void *data, size_t size)
119 {
120         register int offset = 0;
121         register unsigned int base = 0;
122
123 USRTA_DEBUG(("usrtai_write_fifo: what %d size %d\n", what, size))
124         switch (what)
125         {
126                 case ISIC_WHAT_ISAC:
127                         base = (unsigned int)ISAC_BASE;
128                         break;
129                 case ISIC_WHAT_HSCXA:
130                         base = (unsigned int)HSCX_A_BASE;
131                         break;
132                 case ISIC_WHAT_HSCXB:
133                         base = (unsigned int)HSCX_B_BASE;
134                         break;
135                 default:
136                         printf("usrtai_write_fifo: invalid what %d\n", what);
137                         return;
138         }
139
140         
141         for(;size > 0; size--, offset++)
142         {
143                 outb(base + ADDR(offset), *((u_char *)data + offset));
144         }
145 }
146
147 /*---------------------------------------------------------------------------*
148  *      USRobotics write register routine
149  *---------------------------------------------------------------------------*/
150 static void
151 usrtai_write_reg(struct l1_softc *sc, int what, bus_size_t offs, u_int8_t data)
152 {
153         register unsigned int base = 0;
154
155 USRTA_DEBUG(("usrtai_write_reg: what %d ADDR(%d) %d data %#x\n", what, offs, ADDR(offs), data))
156         switch (what)
157         {
158                 case ISIC_WHAT_ISAC:
159                         base = (unsigned int)ISAC_BASE;
160                         break;
161                 case ISIC_WHAT_HSCXA:
162                         base = (unsigned int)HSCX_A_BASE;
163                         break;
164                 case ISIC_WHAT_HSCXB:
165                         base = (unsigned int)HSCX_B_BASE;
166                         break;
167                 default:
168                         printf("usrtai_write_reg invalid what %d\n", what);
169                         return;
170         }
171
172         outb(base + ADDR(offs), (u_char)data);
173 }
174
175 /*---------------------------------------------------------------------------*
176  *      USRobotics read register routine
177  *---------------------------------------------------------------------------*/
178 static u_int8_t
179 usrtai_read_reg(struct l1_softc *sc, int what, bus_size_t offs)
180 {
181         register unsigned int base = 0;
182         u_int8_t byte;
183
184 USRTA_DEBUG(("usrtai_read_reg: what %d ADDR(%d) %d..", what, offs, ADDR(offs)))
185         switch (what)
186         {
187                 case ISIC_WHAT_ISAC:
188                         base = (unsigned int)ISAC_BASE;
189                         break;
190                 case ISIC_WHAT_HSCXA:
191                         base = (unsigned int)HSCX_A_BASE;
192                         break;
193                 case ISIC_WHAT_HSCXB:
194                         base = (unsigned int)HSCX_B_BASE;
195                         break;
196                 default:
197                         printf("usrtai_read_reg: invalid what %d\n", what);
198                         return(0);
199         }
200
201         byte = inb(base + ADDR(offs));
202 USRTA_DEBUG(("usrtai_read_reg: got %#x\n", byte))
203         return(byte);
204 }
205
206 /*---------------------------------------------------------------------------*
207  *      allocate an io port - based on code in isa_isic.c
208  *---------------------------------------------------------------------------*/
209 static int
210 usrtai_alloc_port(device_t dev)
211
212         size_t unit = device_get_unit(dev);
213         struct l1_softc *sc = &l1_sc[unit];
214         int i, num = 0;
215         bus_size_t base;
216
217         /* 49 io mappings: 1 config and 48x8 registers */
218
219         /* config at offset 0x8000 */
220         base = sc->sc_port + 0x8000;
221         if (base < 0 || base > 0x0ffff)
222                 return 1;
223         sc->sc_resources.io_rid[num] = num;
224
225         bus_set_resource(dev, SYS_RES_IOPORT, num, base, 1);
226
227         if(!(sc->sc_resources.io_base[num] =
228                 bus_alloc_resource(dev, SYS_RES_IOPORT,
229                                    &sc->sc_resources.io_rid[num],
230                                    0ul, ~0ul, 1, RF_ACTIVE)))
231         {
232                 printf("isic%d: Error, failed to reserve io #%dport %#x!\n", unit, num, base);
233                 isic_detach_common(dev);
234                 return(ENXIO);
235         }
236         num++;
237
238         /* HSCX A at offset 0 */
239         base = sc->sc_port;
240         for (i = 0; i < 16; i++) {
241                 if (base+i*1024 < 0 || base+i*1024+8 > 0x0ffff)
242                         return 1;
243                 sc->sc_resources.io_rid[num] = num;
244
245                 bus_set_resource(dev, SYS_RES_IOPORT, num, base+i*1024, 8);
246
247                 if(!(sc->sc_resources.io_base[num] =
248                         bus_alloc_resource(dev, SYS_RES_IOPORT,
249                                            &sc->sc_resources.io_rid[num],
250                                            0ul, ~0ul, 1, RF_ACTIVE)))
251                 {
252                         printf("isic%d: Error, failed to reserve io #%d port %#x!\n", unit, num, base+i*1024);
253                         isic_detach_common(dev);
254                         return(ENXIO);
255                 }
256                 ++num;
257         }
258
259         /* HSCX B at offset 0x4000 */
260         base = sc->sc_port + 0x4000;
261         for (i = 0; i < 16; i++) {
262                 if (base+i*1024 < 0 || base+i*1024+8 > 0x0ffff)
263                         return 1;
264                 sc->sc_resources.io_rid[num] = num;
265
266                 bus_set_resource(dev, SYS_RES_IOPORT, num, base+i*1024, 8);
267
268                 if(!(sc->sc_resources.io_base[num] =
269                         bus_alloc_resource(dev, SYS_RES_IOPORT,
270                                            &sc->sc_resources.io_rid[num],
271                                            0ul, ~0ul, 1, RF_ACTIVE)))
272                 {
273                         printf("isic%d: Error, failed to reserve io #%d port %#x!\n", unit, num, base+i*1024);
274                         isic_detach_common(dev);
275                         return(ENXIO);
276                 }
277                 ++num;
278         }
279
280         /* ISAC at offset 0xc000 */
281         base = sc->sc_port + 0xc000;
282         for (i = 0; i < 16; i++) {
283                 if (base+i*1024 < 0 || base+i*1024+8 > 0x0ffff)
284                         return 1;
285                 sc->sc_resources.io_rid[num] = num;
286
287                 bus_set_resource(dev, SYS_RES_IOPORT, num, base+i*1024, 8);
288
289                 if(!(sc->sc_resources.io_base[num] =
290                         bus_alloc_resource(dev, SYS_RES_IOPORT,
291                                            &sc->sc_resources.io_rid[num],
292                                            0ul, ~0ul, 1, RF_ACTIVE)))
293                 {
294                         printf("isic%d: Error, failed to reserve io #%d port %#x!\n", unit, num, base+i*1024);
295                         isic_detach_common(dev);
296                         return(ENXIO);
297                 }
298                 ++num;
299         }
300
301         return(0);
302 }
303
304 /*---------------------------------------------------------------------------*
305  *      isic_probe_usrtai - probe for USR
306  *---------------------------------------------------------------------------*/
307 int
308 isic_probe_usrtai(device_t dev)
309 {
310         size_t unit = device_get_unit(dev);     /* get unit */
311         struct l1_softc *sc = 0;        /* pointer to softc */
312         void *ih = 0;                   /* dummy */
313
314         /* check max unit range */
315
316         if(unit >= ISIC_MAXUNIT)
317         {
318                 printf("isic%d: Error, unit %d >= ISIC_MAXUNIT for USR Sportster TA!\n",
319                                 unit, unit);
320                 return(ENXIO);  
321         }
322
323         sc = &l1_sc[unit];                      /* get pointer to softc */
324         sc->sc_unit = unit;                     /* set unit */
325
326         /* see if an io base was supplied */
327         
328         if(!(sc->sc_resources.io_base[0] =
329                         bus_alloc_resource(dev, SYS_RES_IOPORT,
330                                            &sc->sc_resources.io_rid[0],
331                                            0ul, ~0ul, 1, RF_ACTIVE)))
332         {
333                 printf("isic%d: Could not get iobase for USR Sportster TA!\n",
334                                 unit);
335                 return(ENXIO);
336         }
337
338         /* set io base */
339
340         sc->sc_port = rman_get_start(sc->sc_resources.io_base[0]);
341         
342         /* release io base */
343         
344         bus_release_resource(dev, SYS_RES_IOPORT, sc->sc_resources.io_rid[0],
345                 sc->sc_resources.io_base[0]);
346
347
348         /* check if we got an iobase */
349
350         switch(sc->sc_port)
351         {
352                 case 0x200:
353                 case 0x208:
354                 case 0x210:
355                 case 0x218:
356                 case 0x220:
357                 case 0x228:
358                 case 0x230:
359                 case 0x238:
360                 case 0x240:
361                 case 0x248:
362                 case 0x250:
363                 case 0x258:
364                 case 0x260:
365                 case 0x268:
366                 case 0x270:
367                 case 0x278:
368                         break;
369                         
370                 default:
371                         printf("isic%d: Error, invalid iobase 0x%x specified for USR Sportster TA!\n",
372                                 unit, sc->sc_port);
373                         return(0);
374                         break;
375         }
376
377         /* allocate all the ports needed */
378
379         if(usrtai_alloc_port(dev))
380         {
381                 printf("isic%d: Could not get the ports for USR Sportster TA!\n", unit);
382                 isic_detach_common(dev);
383                 return(ENXIO);
384         }
385
386         /* get our irq */
387
388         if(!(sc->sc_resources.irq =
389                 bus_alloc_resource(dev, SYS_RES_IRQ,
390                                    &sc->sc_resources.irq_rid,
391                                    0ul, ~0ul, 1, RF_ACTIVE)))
392         {
393                 printf("isic%d: Could not get an irq for USR Sportster TA!\n",unit);
394                 isic_detach_common(dev);
395                 return ENXIO;
396         }
397
398         /* get the irq number */
399         sc->sc_irq = rman_get_start(sc->sc_resources.irq);
400
401         /* register interrupt routine */
402         bus_setup_intr(dev, sc->sc_resources.irq, INTR_TYPE_NET,
403                         (void(*)(void *))(isicintr),
404                         sc, &ih);
405
406         /* check IRQ validity */
407
408         if(intr_no[sc->sc_irq] == 0)
409         {
410                 printf("isic%d: Error, invalid IRQ [%d] specified for USR Sportster TA!\n",
411                         unit, sc->sc_irq);
412                 return(1);
413         }
414
415         /* setup ISAC access routines */
416
417         sc->clearirq = NULL;
418         sc->readreg = usrtai_read_reg;
419         sc->writereg = usrtai_write_reg;
420
421         sc->readfifo = usrtai_read_fifo;
422         sc->writefifo = usrtai_write_fifo;
423
424         /* setup card type */
425
426         sc->sc_cardtyp = CARD_TYPEP_USRTA;
427
428         /* setup IOM bus type */
429         
430         sc->sc_bustyp = BUS_TYPE_IOM2;
431
432         sc->sc_ipac = 0;
433         sc->sc_bfifolen = HSCX_FIFO_LEN;
434         
435         /* setup ISAC and HSCX base addr */
436         
437         ISAC_BASE   = (caddr_t)sc->sc_port + USR_ISAC_OFF;
438         HSCX_A_BASE = (caddr_t)sc->sc_port + USR_HSCXA_OFF;
439         HSCX_B_BASE = (caddr_t)sc->sc_port + USR_HSCXB_OFF;
440
441         /* 
442          * Read HSCX A/B VSTR.  Expected value for USR Sportster TA based
443          * boards is 0x05 in the least significant bits.
444          */
445
446         if( ((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) ||
447             ((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) )
448         {
449                 printf("isic%d: HSCX VSTR test failed for USR Sportster TA\n",
450                         unit);
451                 printf("isic%d: HSC0: VSTR: %#x\n",
452                         unit, HSCX_READ(0, H_VSTR));
453                 printf("isic%d: HSC1: VSTR: %#x\n",
454                         unit, HSCX_READ(1, H_VSTR));
455                 return (1);
456         }                   
457         
458         return (0);
459 }
460
461 /*---------------------------------------------------------------------------*
462  *      isic_attach_usrtai - attach USR
463  *---------------------------------------------------------------------------*/
464 int
465 isic_attach_usrtai(device_t dev)
466 {
467         u_char irq = 0;
468         size_t unit = device_get_unit(dev);     /* get unit */
469         struct l1_softc *sc = 0;        /* pointer to softc */
470         
471         sc = &l1_sc[unit];                      /* get pointer to softc */
472
473         /* reset the HSCX and ISAC chips */
474         
475         outb(sc->sc_port + USR_INTL_OFF, USR_RES_BIT);
476         DELAY(SEC_DELAY / 10);
477
478         outb(sc->sc_port + USR_INTL_OFF, 0x00);
479         DELAY(SEC_DELAY / 10);
480
481         /* setup IRQ */
482
483         if((irq = intr_no[sc->sc_irq]) == 0)
484         {
485                 printf("isic%d: Attach error, invalid IRQ [%d] specified for USR Sportster TA!\n",
486                         unit, sc->sc_irq);
487                 return(1);
488         }
489
490         /* configure and enable irq */
491
492         outb(sc->sc_port + USR_INTL_OFF, irq | USR_INTE_BIT);
493         DELAY(SEC_DELAY / 10);
494
495         return (0);
496 }
497
498 #endif /* ISIC > 0 */