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32 .\" $FreeBSD: src/share/man/man4/ixgbe.4,v 1.2 2008/06/17 21:14:02 brueffer Exp $
39 .Nd "Intel(R) 10Gb Ethernet driver"
41 To compile this driver into the kernel,
42 place the following line in your
43 kernel configuration file:
44 .Bd -ragged -offset indent
48 Alternatively, to load the driver as a
49 module at boot time, place the following line in
51 .Bd -literal -offset indent
57 driver provides support for PCI Express 10Gb Ethernet adapters based on
63 Ethernet controller chips.
68 .Bl -item -offset indent -compact
70 Transmit/Receive checksum offload for IP/UDP/TCP.
75 TCP segmentation offload (TSO)
77 Receive side scaling (RSS)
79 Multiple tranmission queues
83 VLAN tag stripping and inserting
92 driver will try enabling as many reception queues and transmission queues
93 as are allowed by the number of CPUs in the system.
95 If multiple transmission queues are used,
96 the round-robin arbitration is performed among the transmission queues.
97 And if both TSO and multiple tranmission queues are used,
98 the round-robin arbitration between transmission queues is done at the
99 TCP segment boundary after the hardware segmentation is performed.
101 82598 supports 16 reception queues and 32 transmission queues.
102 MSI-X is not enabled due to hardware errata.
103 Under MSI or legacy interrupt mode,
104 2 reception queues are enabled for hardware RSS hash
105 and only 1 transmission queue is enable.
107 82599 and X540 supports 16 reception queues and 64 transmission queues.
108 MSI-X is enable by default.
110 due to the number of MSI-X vectors is 64,
111 at most 16 reception queues and 32 transmission queues will be enabled
114 For more information on configuring this device, see
123 driver supports Gigabit Ethernet adapters based on the Intel
132 Intel 10 Gigabit AF DA Dual Port Server Adapter
134 Intel 10 Gigabit AT Server Adapter
136 Intel 10 Gigabit AT2 Server Adapter
138 Intel 10 Gigabit CX4 Dual Port Server Adapter
140 Intel 10 Gigabit XF LR Server Adapter
142 Intel 10 Gigabit XF SR Dual Port Server Adapter
144 Intel 10 Gigabit XF SR Server Adapter
146 Intel 82598 10 Gigabit Ethernet Controller
148 Intel 82599 10 Gigabit Ethernet Controller
150 Intel Ethernet Controller X540-AT2
152 Intel Ethernet Converged Network Adapter X520 Series
154 Intel Ethernet Converged Network Adapter X540-T1
156 Intel Ethernet Converged Network Adapter X540-T2
158 Intel Ethernet Server Adapter X520 Series
160 Intel Ethernet Server Adapter X520-DA2
162 Intel Ethernet Server Adapter X520-LR1
164 Intel Ethernet Server Adapter X520-SR1
166 Intel Ethernet Server Adapter X520-SR2
168 Intel Ethernet Server Adapter X520-T2
171 Tunables can be set at the
173 prompt before booting the kernel or stored in
176 is the device unit number.
177 .Bl -tag -width ".Va hw.ixX.unsupported_sfp"
178 .It Va hw.ix.rxd Va hw.ixX.rxd
179 Number of receive descriptors allocated by the driver.
180 The default value is 2048.
182 and the maximum is 4096.
183 .It Va hw.ix.txd Va hw.ixX.txd
184 Number of transmit descriptors allocated by the driver.
185 The default value is 2048.
187 and the maximum is 4096.
188 .It Va hw.ix.rxr Va hw.ixX.rxr
189 This tunable specifies the number of reception queues could be enabled.
190 Maximum allowed value for these tunables is device specific
191 and it must be power of 2 aligned.
192 Setting these tunables to 0 allows the driver to make
193 as many reception queues ready-for-use as allowed by the number of CPUs.
194 .It Va hw.ix.txr Va hw.ixX.txr
195 This tunable specifies the number of transmission queues could be enabled.
196 Maximum allowed value for these tunables is device specific
197 and it must be power of 2 aligned.
198 Setting these tunables to 0 allows the driver to make
199 as many transmission queues ready-for-use as allowed by the number of CPUs.
200 .It Va hw.ix.msix.enable Va hw.ixX.msix.enable
202 the driver will use MSI-X if it is supported.
203 This behaviour can be turned off by setting this tunable to 0.
204 .It Va hw.ix.msix.agg_rxtx Va hw.ixX.msix.agg_rxtx
206 the driver aggregates transmission queue and reception queue processing
208 This behaviour could be turned off by setting this tunable to 0.
209 If the number of MSI-X vectors is not enough to
210 put transmission queue processing and reception queue processing
211 onto independent MSI-X vector,
212 then transmission queue and reception queue processing are always
214 .It Va hw.ixX.msix.off
216 and transmission queue and reception queue processing are aggregated,
217 this tunable specifies the leading target CPU for
218 transmission and reception queues processing.
219 The value specificed must be aligned to the maximum of
220 the number of reception queues
221 and the number of transmission queues enabled,
222 and must be less than the power of 2 number of CPUs.
223 .It Va hw.ixX.msix.rxoff
225 and transmission queue and reception queue processing are not aggregated,
226 this tunable specifies the leading target CPU for reception queues processing.
227 The value specificed must be aligned to the number of reception queues enabled
228 and must be less than the power of 2 number of CPUs.
229 .It Va hw.ixX.msix.txoff
231 and transmission queue and reception queue processing are not aggregated,
232 this tunable specifies the leading target CPU
233 for transmission queues processing.
234 The value specificed must be aligned to
235 the number of transmission queues enabled
236 and must be less than the power of 2 number of CPUs.
237 .It Va hw.ix.msi.enable Va hw.ixX.msi.enable
238 If MSI-X is disabled and MSI is supported,
239 the driver will use MSI.
240 This behavior can be turned off by setting this tunable to 0.
241 .It Va hw.ixX.msi.cpu
243 it specifies the MSI's target CPU.
244 .It Va hw.ixX.npoll.txoff
245 This tunable specifies the leading target CPU for
249 The value specificed must be aligned to the number of transmission queues
250 enabled and must be less than the power of 2 number of CPUs.
251 .It Va hw.ixX.npoll.rxoff
252 This tunable specifies the leading target CPU for
256 The value specificed must be aligned to the number of reception queues
257 enabled and must be less than the power of 2 number of CPUs.
258 .It Va hw.ix.unsupported_sfp
260 this driver does not allow "unsupported" SFP modules.
261 This behavior can be changed by setting this tunable to 1.
264 A number of per-interface variables are implemented in the
269 .Bl -tag -width "rxtx_intr_rate"
271 Number of reception queues could be enabled (read-only).
278 Number of reception queues being used (read-only).
280 Number of transmission queues could be enabled (read-only).
287 Number of transmission queues being used (read-only).
289 Number of descriptors per reception queue (read-only).
296 Number of descriptors per transmission queue (read-only).
302 .It Va rxtx_intr_rate
303 If MSI or legacy interrupt is used,
304 this sysctl controls the highest possible frequency
305 that interrupt could be generated by the device.
307 this sysctl controls the highest possible frequency
308 that interrupt could be generated by the MSI-X vectors,
309 which aggregate transmission queue and reception queue procecssing.
310 It is 8000 by default (125us).
313 this sysctl controls the highest possible frequency
314 that interrupt could be generated by the MSI-X vectors,
315 which only process reception queue.
316 It is 8000 by default (125us).
319 this sysctl controls the highest possible frequency
320 that interrupt could be generated by the MSI-X vectors,
321 which only process transmission queue.
322 It is 6000 by default (~150us).
325 this sysctl controls the highest possible frequency
326 that interrupt could be generated by the MSI-X vectors,
327 which only process chip status changes.
328 It is 8000 by default (125us).
330 Transmission interrupt is asked to be generated upon every
332 transmission descritors having been setup.
333 The default value is 1/16 of the number of transmission descriptors per queue.
335 The number of transmission descriptors should be setup
336 before the hardware register is written.
337 Setting this value too high will have negative effect
338 on transmission timeliness.
339 Setting this value too low will hurt overall transmission performance
340 due to the frequent hardware register writing.
341 The default value is 8.
343 The number of reception descriptors should be setup
344 before the hardware register is written.
345 Setting this value too high will make device drop incoming packets.
346 Setting this value too low will hurt overall reception performance
347 due to the frequent hardware register writing.
348 The default value is 32.
351 .Va hw.ixX.npoll.rxoff .
352 The set value will take effect the next time
354 is enabled on the device.
357 .Va hw.ixX.npoll.txoff .
358 The set value will take effect the next time
360 is enabled on the device.
362 Flow control setting.
363 Set it to 0 to turn off flow control.
364 Set it to 1 to enable only the reception of pause frames.
365 Set it to 2 to enable only the generation of pause frames.
366 Set it to 3 to enable both the reception of pause frames
367 and generation of pause frames,
368 i.e. full flow control.
382 device driver first appeared in
387 driver was written by
388 .An Intel Corporation Aq Mt freebsdnic@mailbox.intel.com .