2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "opt_compat.h"
46 #include "opt_directio.h"
49 #include "opt_maxmem.h"
50 #include "opt_msgbuf.h"
51 #include "opt_perfmon.h"
53 #include "opt_userconfig.h"
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/sysproto.h>
58 #include <sys/signalvar.h>
59 #include <sys/kernel.h>
60 #include <sys/linker.h>
61 #include <sys/malloc.h>
65 #include <sys/reboot.h>
67 #include <sys/msgbuf.h>
68 #include <sys/sysent.h>
69 #include <sys/sysctl.h>
70 #include <sys/vmmeter.h>
72 #include <sys/upcall.h>
73 #include <sys/usched.h>
77 #include <vm/vm_param.h>
79 #include <vm/vm_kern.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_map.h>
83 #include <vm/vm_pager.h>
84 #include <vm/vm_extern.h>
86 #include <sys/thread2.h>
87 #include <sys/mplock2.h>
88 #include <sys/mutex2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
100 #include <machine/md_var.h>
101 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
102 #include <machine/globaldata.h> /* CPU_prvspace */
103 #include <machine/smp.h>
105 #include <machine/perfmon.h>
107 #include <machine/cputypes.h>
108 #include <machine/intr_machdep.h>
111 #include <bus/isa/isa_device.h>
113 #include <machine_base/isa/isa_intr.h>
114 #include <bus/isa/rtc.h>
115 #include <machine/vm86.h>
116 #include <sys/random.h>
117 #include <sys/ptrace.h>
118 #include <machine/sigframe.h>
120 #include <sys/machintr.h>
121 #include <machine_base/icu/icu_abi.h>
122 #include <machine_base/icu/elcr_var.h>
123 #include <machine_base/apic/lapic.h>
124 #include <machine_base/apic/ioapic.h>
125 #include <machine_base/apic/ioapic_abi.h>
126 #include <machine/mptable.h>
128 #define PHYSMAP_ENTRIES 10
130 extern void init386(int first);
131 extern void dblfault_handler(void);
133 extern void printcpuinfo(void); /* XXX header file */
134 extern void finishidentcpu(void);
135 extern void panicifcpuunsupported(void);
136 extern void initializecpu(void);
138 static void cpu_startup(void *);
139 static void pic_finish(void *);
140 static void cpu_finish(void *);
141 #ifndef CPU_DISABLE_SSE
142 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
143 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
144 #endif /* CPU_DISABLE_SSE */
146 extern void ffs_rawread_setup(void);
147 #endif /* DIRECTIO */
148 static void init_locks(void);
150 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
151 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL)
152 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL)
154 int _udatasel, _ucodesel;
157 int64_t tsc_offsets[MAXCPU];
159 int64_t tsc_offsets[1];
162 #if defined(SWTCH_OPTIM_STATS)
163 extern int swtch_optim_stats;
164 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
165 CTLFLAG_RD, &swtch_optim_stats, 0, "");
166 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
167 CTLFLAG_RD, &tlb_flush_count, 0, "");
172 u_long ebda_addr = 0;
174 int imcr_present = 0;
176 int naps = 0; /* # of Applications processors */
177 struct mtx dt_lock; /* lock for GDT and LDT */
182 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
184 u_long pmem = ctob(physmem);
186 int error = sysctl_handle_long(oidp, &pmem, 0, req);
190 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
191 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
194 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
196 int error = sysctl_handle_int(oidp, 0,
197 ctob(physmem - vmstats.v_wire_count), req);
201 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
202 0, 0, sysctl_hw_usermem, "IU", "");
205 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
207 int error = sysctl_handle_int(oidp, 0,
208 i386_btop(avail_end - avail_start), req);
212 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
213 0, 0, sysctl_hw_availpages, "I", "");
218 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
219 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
222 static vm_offset_t buffer_sva, buffer_eva;
223 vm_offset_t clean_sva, clean_eva;
224 static vm_offset_t pager_sva, pager_eva;
225 static struct trapframe proc0_tf;
228 cpu_startup(void *dummy)
232 vm_offset_t firstaddr;
235 * Good {morning,afternoon,evening,night}.
237 kprintf("%s", version);
240 panicifcpuunsupported();
244 kprintf("real memory = %ju (%ju MB)\n",
246 (intmax_t)Realmem / 1024 / 1024);
248 * Display any holes after the first chunk of extended memory.
253 kprintf("Physical memory chunk(s):\n");
254 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
255 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
257 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
258 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
264 * Allocate space for system data structures.
265 * The first available kernel virtual address is in "v".
266 * As pages of kernel virtual memory are allocated, "v" is incremented.
267 * As pages of memory are allocated and cleared,
268 * "firstaddr" is incremented.
269 * An index into the kernel page table corresponding to the
270 * virtual memory address maintained in "v" is kept in "mapaddr".
274 * Make two passes. The first pass calculates how much memory is
275 * needed and allocates it. The second pass assigns virtual
276 * addresses to the various data structures.
280 v = (caddr_t)firstaddr;
282 #define valloc(name, type, num) \
283 (name) = (type *)v; v = (caddr_t)((name)+(num))
284 #define valloclim(name, type, num, lim) \
285 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
288 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
289 * For the first 64MB of ram nominally allocate sufficient buffers to
290 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
291 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
292 * the buffer cache we limit the eventual kva reservation to
295 * factor represents the 1/4 x ram conversion.
298 int factor = 4 * BKVASIZE / 1024;
299 int kbytes = physmem * (PAGE_SIZE / 1024);
303 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
305 nbuf += (kbytes - 65536) * 2 / (factor * 5);
306 if (maxbcache && nbuf > maxbcache / BKVASIZE)
307 nbuf = maxbcache / BKVASIZE;
311 * Do not allow the buffer_map to be more then 1/2 the size of the
314 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
315 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
316 kprintf("Warning: nbufs capped at %d\n", nbuf);
319 /* limit to 128 on i386 */
320 nswbuf = max(min(nbuf/4, 128), 16);
322 if (nswbuf < NSWBUF_MIN)
329 valloc(swbuf, struct buf, nswbuf);
330 valloc(buf, struct buf, nbuf);
333 * End of first pass, size has been calculated so allocate memory
335 if (firstaddr == 0) {
336 size = (vm_size_t)(v - firstaddr);
337 firstaddr = kmem_alloc(&kernel_map, round_page(size));
339 panic("startup: no room for tables");
344 * End of second pass, addresses have been assigned
346 if ((vm_size_t)(v - firstaddr) != size)
347 panic("startup: table size inconsistency");
349 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
350 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
351 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
353 buffer_map.system_map = 1;
354 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
355 (nswbuf*MAXPHYS) + pager_map_size);
356 pager_map.system_map = 1;
358 #if defined(USERCONFIG)
360 cninit(); /* the preferred console may have changed */
363 kprintf("avail memory = %ju (%ju MB)\n",
364 (intmax_t)ptoa(vmstats.v_free_count),
365 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
368 * Set up buffers, so they can be used to read disk labels.
371 vm_pager_bufferinit();
375 cpu_finish(void *dummy __unused)
381 pic_finish(void *dummy __unused)
383 /* Log ELCR information */
386 /* Log MPTABLE information */
387 mptable_pci_int_dump();
390 MachIntrABI.finalize();
394 * Send an interrupt to process.
396 * Stack is set up to allow sigcode stored
397 * at top to call routine, followed by kcall
398 * to sigreturn routine below. After sigreturn
399 * resets the signal mask, the stack, and the
400 * frame pointer, it returns to the user
404 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
406 struct lwp *lp = curthread->td_lwp;
407 struct proc *p = lp->lwp_proc;
408 struct trapframe *regs;
409 struct sigacts *psp = p->p_sigacts;
410 struct sigframe sf, *sfp;
413 regs = lp->lwp_md.md_regs;
414 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
416 /* save user context */
417 bzero(&sf, sizeof(struct sigframe));
418 sf.sf_uc.uc_sigmask = *mask;
419 sf.sf_uc.uc_stack = lp->lwp_sigstk;
420 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
421 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
423 /* make the size of the saved context visible to userland */
424 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
426 /* Allocate and validate space for the signal handler context. */
427 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack &&
428 SIGISMEMBER(psp->ps_sigonstack, sig)) {
429 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
430 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
431 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
433 sfp = (struct sigframe *)regs->tf_esp - 1;
436 /* Translate the signal is appropriate */
437 if (p->p_sysent->sv_sigtbl) {
438 if (sig <= p->p_sysent->sv_sigsize)
439 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
442 /* Build the argument list for the signal handler. */
444 sf.sf_ucontext = (register_t)&sfp->sf_uc;
445 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
446 /* Signal handler installed with SA_SIGINFO. */
447 sf.sf_siginfo = (register_t)&sfp->sf_si;
448 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
450 /* fill siginfo structure */
451 sf.sf_si.si_signo = sig;
452 sf.sf_si.si_code = code;
453 sf.sf_si.si_addr = (void*)regs->tf_err;
456 /* Old FreeBSD-style arguments. */
457 sf.sf_siginfo = code;
458 sf.sf_addr = regs->tf_err;
459 sf.sf_ahu.sf_handler = catcher;
463 * If we're a vm86 process, we want to save the segment registers.
464 * We also change eflags to be our emulated eflags, not the actual
467 if (regs->tf_eflags & PSL_VM) {
468 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
469 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
471 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
472 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
473 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
474 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
476 if (vm86->vm86_has_vme == 0)
477 sf.sf_uc.uc_mcontext.mc_eflags =
478 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
479 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
482 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
483 * syscalls made by the signal handler. This just avoids
484 * wasting time for our lazy fixup of such faults. PSL_NT
485 * does nothing in vm86 mode, but vm86 programs can set it
486 * almost legitimately in probes for old cpu types.
488 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
492 * Save the FPU state and reinit the FP unit
494 npxpush(&sf.sf_uc.uc_mcontext);
497 * Copy the sigframe out to the user's stack.
499 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
501 * Something is wrong with the stack pointer.
502 * ...Kill the process.
507 regs->tf_esp = (int)sfp;
508 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
511 * i386 abi specifies that the direction flag must be cleared
514 regs->tf_eflags &= ~(PSL_T|PSL_D);
516 regs->tf_cs = _ucodesel;
517 regs->tf_ds = _udatasel;
518 regs->tf_es = _udatasel;
521 * Allow the signal handler to inherit %fs in addition to %gs as
522 * the userland program might be using both.
524 * However, if a T_PROTFLT occured the segment registers could be
525 * totally broken. They must be reset in order to be able to
526 * return to userland.
528 if (regs->tf_trapno == T_PROTFLT) {
529 regs->tf_fs = _udatasel;
530 regs->tf_gs = _udatasel;
532 regs->tf_ss = _udatasel;
536 * Sanitize the trapframe for a virtual kernel passing control to a custom
537 * VM context. Remove any items that would otherwise create a privilage
540 * XXX at the moment we allow userland to set the resume flag. Is this a
544 cpu_sanitize_frame(struct trapframe *frame)
546 frame->tf_cs = _ucodesel;
547 frame->tf_ds = _udatasel;
548 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
550 frame->tf_fs = _udatasel;
551 frame->tf_gs = _udatasel;
553 frame->tf_ss = _udatasel;
554 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
555 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
560 cpu_sanitize_tls(struct savetls *tls)
562 struct segment_descriptor *desc;
565 for (i = 0; i < NGTLS; ++i) {
567 if (desc->sd_dpl == 0 && desc->sd_type == 0)
569 if (desc->sd_def32 == 0)
571 if (desc->sd_type != SDT_MEMRWA)
573 if (desc->sd_dpl != SEL_UPL)
575 if (desc->sd_xx != 0 || desc->sd_p != 1)
582 * sigreturn(ucontext_t *sigcntxp)
584 * System call to cleanup state after a signal
585 * has been taken. Reset signal mask and
586 * stack state from context left by sendsig (above).
587 * Return to previous pc and psl as specified by
588 * context left by sendsig. Check carefully to
589 * make sure that the user has not modified the
590 * state to gain improper privileges.
594 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
595 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
598 sys_sigreturn(struct sigreturn_args *uap)
600 struct lwp *lp = curthread->td_lwp;
601 struct trapframe *regs;
609 * We have to copy the information into kernel space so userland
610 * can't modify it while we are sniffing it.
612 regs = lp->lwp_md.md_regs;
613 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
617 eflags = ucp->uc_mcontext.mc_eflags;
619 if (eflags & PSL_VM) {
620 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
621 struct vm86_kernel *vm86;
624 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
625 * set up the vm86 area, and we can't enter vm86 mode.
627 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
629 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
630 if (vm86->vm86_inited == 0)
633 /* go back to user mode if both flags are set */
634 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
635 trapsignal(lp, SIGBUS, 0);
637 if (vm86->vm86_has_vme) {
638 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
639 (eflags & VME_USERCHANGE) | PSL_VM;
641 vm86->vm86_eflags = eflags; /* save VIF, VIP */
642 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
643 (eflags & VM_USERCHANGE) | PSL_VM;
645 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
646 tf->tf_eflags = eflags;
647 tf->tf_vm86_ds = tf->tf_ds;
648 tf->tf_vm86_es = tf->tf_es;
649 tf->tf_vm86_fs = tf->tf_fs;
650 tf->tf_vm86_gs = tf->tf_gs;
651 tf->tf_ds = _udatasel;
652 tf->tf_es = _udatasel;
654 tf->tf_fs = _udatasel;
655 tf->tf_gs = _udatasel;
659 * Don't allow users to change privileged or reserved flags.
662 * XXX do allow users to change the privileged flag PSL_RF.
663 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
664 * should sometimes set it there too. tf_eflags is kept in
665 * the signal context during signal handling and there is no
666 * other place to remember it, so the PSL_RF bit may be
667 * corrupted by the signal handler without us knowing.
668 * Corruption of the PSL_RF bit at worst causes one more or
669 * one less debugger trap, so allowing it is fairly harmless.
671 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
672 kprintf("sigreturn: eflags = 0x%x\n", eflags);
677 * Don't allow users to load a valid privileged %cs. Let the
678 * hardware check for invalid selectors, excess privilege in
679 * other selectors, invalid %eip's and invalid %esp's.
681 cs = ucp->uc_mcontext.mc_cs;
682 if (!CS_SECURE(cs)) {
683 kprintf("sigreturn: cs = 0x%x\n", cs);
684 trapsignal(lp, SIGBUS, T_PROTFLT);
687 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
691 * Restore the FPU state from the frame
694 npxpop(&ucp->uc_mcontext);
696 if (ucp->uc_mcontext.mc_onstack & 1)
697 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
699 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
701 lp->lwp_sigmask = ucp->uc_sigmask;
702 SIG_CANTMASK(lp->lwp_sigmask);
708 * Stack frame on entry to function. %eax will contain the function vector,
709 * %ecx will contain the function data. flags, ecx, and eax will have
710 * already been pushed on the stack.
721 sendupcall(struct vmupcall *vu, int morepending)
723 struct lwp *lp = curthread->td_lwp;
724 struct trapframe *regs;
725 struct upcall upcall;
726 struct upc_frame upc_frame;
730 * If we are a virtual kernel running an emulated user process
731 * context, switch back to the virtual kernel context before
732 * trying to post the signal.
734 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
735 lp->lwp_md.md_regs->tf_trapno = 0;
736 vkernel_trap(lp, lp->lwp_md.md_regs);
740 * Get the upcall data structure
742 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
743 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
746 kprintf("bad upcall address\n");
751 * If the data structure is already marked pending or has a critical
752 * section count, mark the data structure as pending and return
753 * without doing an upcall. vu_pending is left set.
755 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
756 if (upcall.upc_pending < vu->vu_pending) {
757 upcall.upc_pending = vu->vu_pending;
758 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
759 sizeof(upcall.upc_pending));
765 * We can run this upcall now, clear vu_pending.
767 * Bump our critical section count and set or clear the
768 * user pending flag depending on whether more upcalls are
769 * pending. The user will be responsible for calling
770 * upc_dispatch(-1) to process remaining upcalls.
773 upcall.upc_pending = morepending;
775 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
776 sizeof(upcall.upc_pending));
777 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
781 * Construct a stack frame and issue the upcall
783 regs = lp->lwp_md.md_regs;
784 upc_frame.eax = regs->tf_eax;
785 upc_frame.ecx = regs->tf_ecx;
786 upc_frame.edx = regs->tf_edx;
787 upc_frame.flags = regs->tf_eflags;
788 upc_frame.oldip = regs->tf_eip;
789 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
790 sizeof(upc_frame)) != 0) {
791 kprintf("bad stack on upcall\n");
793 regs->tf_eax = (register_t)vu->vu_func;
794 regs->tf_ecx = (register_t)vu->vu_data;
795 regs->tf_edx = (register_t)lp->lwp_upcall;
796 regs->tf_eip = (register_t)vu->vu_ctx;
797 regs->tf_esp -= sizeof(upc_frame);
802 * fetchupcall occurs in the context of a system call, which means that
803 * we have to return EJUSTRETURN in order to prevent eax and edx from
804 * being overwritten by the syscall return value.
806 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
807 * and the function pointer in %eax.
810 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
812 struct upc_frame upc_frame;
813 struct lwp *lp = curthread->td_lwp;
814 struct trapframe *regs;
816 struct upcall upcall;
819 regs = lp->lwp_md.md_regs;
821 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
825 * This jumps us to the next ready context.
828 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
831 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
834 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
835 regs->tf_eax = (register_t)vu->vu_func;
836 regs->tf_ecx = (register_t)vu->vu_data;
837 regs->tf_edx = (register_t)lp->lwp_upcall;
838 regs->tf_eip = (register_t)vu->vu_ctx;
839 regs->tf_esp = (register_t)rsp;
842 * This returns us to the originally interrupted code.
844 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
845 regs->tf_eax = upc_frame.eax;
846 regs->tf_ecx = upc_frame.ecx;
847 regs->tf_edx = upc_frame.edx;
848 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
849 (upc_frame.flags & PSL_USERCHANGE);
850 regs->tf_eip = upc_frame.oldip;
851 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
860 * Machine dependent boot() routine
862 * I haven't seen anything to put here yet
863 * Possibly some stuff might be grafted back here from boot()
871 * Shutdown the CPU as much as possible
877 __asm__ __volatile("hlt");
881 * cpu_idle() represents the idle LWKT. You cannot return from this function
882 * (unless you want to blow things up!). Instead we look for runnable threads
883 * and loop or halt as appropriate. Giant is not held on entry to the thread.
885 * The main loop is entered with a critical section held, we must release
886 * the critical section before doing anything else. lwkt_switch() will
887 * check for pending interrupts due to entering and exiting its own
890 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
892 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
893 * 1 to just use hlt and for debugging purposes.
895 static int cpu_idle_hlt = 2;
896 static int cpu_idle_hltcnt;
897 static int cpu_idle_spincnt;
898 static u_int cpu_idle_repeat = 4;
899 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
900 &cpu_idle_hlt, 0, "Idle loop HLT enable");
901 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
902 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
903 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
904 &cpu_idle_spincnt, 0, "Idle loop entry spins");
905 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
906 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
909 cpu_idle_default_hook(void)
912 * We must guarentee that hlt is exactly the instruction
915 __asm __volatile("sti; hlt");
918 /* Other subsystems (e.g., ACPI) can hook this later. */
919 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
924 globaldata_t gd = mycpu;
925 struct thread *td __debugvar = gd->gd_curthread;
930 KKASSERT(td->td_critcount == 0);
933 * See if there are any LWKTs ready to go.
938 * When halting inside a cli we must check for reqflags
939 * races, particularly [re]schedule requests. Running
940 * splz() does the job.
943 * 0 Never halt, just spin
945 * 1 Always use HLT (or MONITOR/MWAIT if avail).
946 * This typically eats more power than the
949 * 2 Use HLT/MONITOR/MWAIT up to a point and then
950 * use the ACPI halt (default). This is a hybrid
951 * approach. See machdep.cpu_idle_repeat.
953 * 3 Always use the ACPI halt. This typically
954 * eats the least amount of power but the cpu
955 * will be slow waking up. Slows down e.g.
956 * compiles and other pipe/event oriented stuff.
959 * NOTE: Interrupts are enabled and we are not in a critical
962 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
963 * don't bother capping gd_idle_repeat, it is ok if
966 ++gd->gd_idle_repeat;
967 reqflags = gd->gd_reqflags;
968 quick = (cpu_idle_hlt == 1) ||
970 gd->gd_idle_repeat < cpu_idle_repeat);
972 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
973 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
974 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
976 } else if (cpu_idle_hlt) {
977 __asm __volatile("cli");
979 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
981 cpu_idle_default_hook();
985 __asm __volatile("sti");
989 __asm __volatile("sti");
998 * This routine is called if a spinlock has been held through the
999 * exponential backoff period and is seriously contested. On a real cpu
1003 cpu_spinlock_contested(void)
1011 * Clear registers on exec
1014 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1016 struct thread *td = curthread;
1017 struct lwp *lp = td->td_lwp;
1018 struct pcb *pcb = td->td_pcb;
1019 struct trapframe *regs = lp->lwp_md.md_regs;
1021 /* was i386_user_cleanup() in NetBSD */
1024 bzero((char *)regs, sizeof(struct trapframe));
1025 regs->tf_eip = entry;
1026 regs->tf_esp = stack;
1027 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1028 regs->tf_ss = _udatasel;
1029 regs->tf_ds = _udatasel;
1030 regs->tf_es = _udatasel;
1031 regs->tf_fs = _udatasel;
1032 regs->tf_gs = _udatasel;
1033 regs->tf_cs = _ucodesel;
1035 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1036 regs->tf_ebx = ps_strings;
1039 * Reset the hardware debug registers if they were in use.
1040 * They won't have any meaning for the newly exec'd process.
1042 if (pcb->pcb_flags & PCB_DBREGS) {
1049 if (pcb == td->td_pcb) {
1051 * Clear the debug registers on the running
1052 * CPU, otherwise they will end up affecting
1053 * the next process we switch to.
1057 pcb->pcb_flags &= ~PCB_DBREGS;
1061 * Initialize the math emulator (if any) for the current process.
1062 * Actually, just clear the bit that says that the emulator has
1063 * been initialized. Initialization is delayed until the process
1064 * traps to the emulator (if it is done at all) mainly because
1065 * emulators don't provide an entry point for initialization.
1067 pcb->pcb_flags &= ~FP_SOFTFP;
1070 * note: do not set CR0_TS here. npxinit() must do it after clearing
1071 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1075 load_cr0(rcr0() | CR0_MP);
1078 /* Initialize the npx (if any) for the current process. */
1079 npxinit(__INITIAL_NPXCW__);
1084 * note: linux emulator needs edx to be 0x0 on entry, which is
1085 * handled in execve simply by setting the 64 bit syscall
1086 * return value to 0.
1096 cr0 |= CR0_NE; /* Done by npxinit() */
1097 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1098 cr0 |= CR0_WP | CR0_AM;
1104 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1107 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1109 if (!error && req->newptr)
1114 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1115 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1117 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1118 CTLFLAG_RW, &disable_rtc_set, 0, "");
1120 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1121 CTLFLAG_RD, &bootinfo, bootinfo, "");
1123 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1124 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1126 extern u_long bootdev; /* not a cdev_t - encoding is different */
1127 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1128 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1131 * Initialize 386 and configure to run kernel
1135 * Initialize segments & interrupt table
1139 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1140 static struct gate_descriptor idt0[NIDT];
1141 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1142 union descriptor ldt[NLDT]; /* local descriptor table */
1144 /* table descriptors - used to load tables by cpu */
1145 struct region_descriptor r_gdt, r_idt;
1147 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1148 extern int has_f00f_bug;
1151 static struct i386tss dblfault_tss;
1152 static char dblfault_stack[PAGE_SIZE];
1154 extern struct user *proc0paddr;
1157 /* software prototypes -- in more palatable form */
1158 struct soft_segment_descriptor gdt_segs[] = {
1159 /* GNULL_SEL 0 Null Descriptor */
1160 { 0x0, /* segment base address */
1162 0, /* segment type */
1163 0, /* segment descriptor priority level */
1164 0, /* segment descriptor present */
1166 0, /* default 32 vs 16 bit size */
1167 0 /* limit granularity (byte/page units)*/ },
1168 /* GCODE_SEL 1 Code Descriptor for kernel */
1169 { 0x0, /* segment base address */
1170 0xfffff, /* length - all address space */
1171 SDT_MEMERA, /* segment type */
1172 0, /* segment descriptor priority level */
1173 1, /* segment descriptor present */
1175 1, /* default 32 vs 16 bit size */
1176 1 /* limit granularity (byte/page units)*/ },
1177 /* GDATA_SEL 2 Data Descriptor for kernel */
1178 { 0x0, /* segment base address */
1179 0xfffff, /* length - all address space */
1180 SDT_MEMRWA, /* segment type */
1181 0, /* segment descriptor priority level */
1182 1, /* segment descriptor present */
1184 1, /* default 32 vs 16 bit size */
1185 1 /* limit granularity (byte/page units)*/ },
1186 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1187 { 0x0, /* segment base address */
1188 0xfffff, /* length - all address space */
1189 SDT_MEMRWA, /* segment type */
1190 0, /* segment descriptor priority level */
1191 1, /* segment descriptor present */
1193 1, /* default 32 vs 16 bit size */
1194 1 /* limit granularity (byte/page units)*/ },
1195 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1197 0x0, /* segment base address */
1198 sizeof(struct i386tss)-1,/* length - all address space */
1199 SDT_SYS386TSS, /* segment type */
1200 0, /* segment descriptor priority level */
1201 1, /* segment descriptor present */
1203 0, /* unused - default 32 vs 16 bit size */
1204 0 /* limit granularity (byte/page units)*/ },
1205 /* GLDT_SEL 5 LDT Descriptor */
1206 { (int) ldt, /* segment base address */
1207 sizeof(ldt)-1, /* length - all address space */
1208 SDT_SYSLDT, /* segment type */
1209 SEL_UPL, /* segment descriptor priority level */
1210 1, /* segment descriptor present */
1212 0, /* unused - default 32 vs 16 bit size */
1213 0 /* limit granularity (byte/page units)*/ },
1214 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1215 { (int) ldt, /* segment base address */
1216 (512 * sizeof(union descriptor)-1), /* length */
1217 SDT_SYSLDT, /* segment type */
1218 0, /* segment descriptor priority level */
1219 1, /* segment descriptor present */
1221 0, /* unused - default 32 vs 16 bit size */
1222 0 /* limit granularity (byte/page units)*/ },
1223 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1224 { 0x0, /* segment base address */
1225 0x0, /* length - all address space */
1226 0, /* segment type */
1227 0, /* segment descriptor priority level */
1228 0, /* segment descriptor present */
1230 0, /* default 32 vs 16 bit size */
1231 0 /* limit granularity (byte/page units)*/ },
1232 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1233 { 0x400, /* segment base address */
1234 0xfffff, /* length */
1235 SDT_MEMRWA, /* segment type */
1236 0, /* segment descriptor priority level */
1237 1, /* segment descriptor present */
1239 1, /* default 32 vs 16 bit size */
1240 1 /* limit granularity (byte/page units)*/ },
1241 /* GPANIC_SEL 9 Panic Tss Descriptor */
1242 { (int) &dblfault_tss, /* segment base address */
1243 sizeof(struct i386tss)-1,/* length - all address space */
1244 SDT_SYS386TSS, /* segment type */
1245 0, /* segment descriptor priority level */
1246 1, /* segment descriptor present */
1248 0, /* unused - default 32 vs 16 bit size */
1249 0 /* limit granularity (byte/page units)*/ },
1250 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1251 { 0, /* segment base address (overwritten) */
1252 0xfffff, /* length */
1253 SDT_MEMERA, /* segment type */
1254 0, /* segment descriptor priority level */
1255 1, /* segment descriptor present */
1257 0, /* default 32 vs 16 bit size */
1258 1 /* limit granularity (byte/page units)*/ },
1259 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1260 { 0, /* segment base address (overwritten) */
1261 0xfffff, /* length */
1262 SDT_MEMERA, /* segment type */
1263 0, /* segment descriptor priority level */
1264 1, /* segment descriptor present */
1266 0, /* default 32 vs 16 bit size */
1267 1 /* limit granularity (byte/page units)*/ },
1268 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1269 { 0, /* segment base address (overwritten) */
1270 0xfffff, /* length */
1271 SDT_MEMRWA, /* segment type */
1272 0, /* segment descriptor priority level */
1273 1, /* segment descriptor present */
1275 1, /* default 32 vs 16 bit size */
1276 1 /* limit granularity (byte/page units)*/ },
1277 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1278 { 0, /* segment base address (overwritten) */
1279 0xfffff, /* length */
1280 SDT_MEMRWA, /* segment type */
1281 0, /* segment descriptor priority level */
1282 1, /* segment descriptor present */
1284 0, /* default 32 vs 16 bit size */
1285 1 /* limit granularity (byte/page units)*/ },
1286 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1287 { 0, /* segment base address (overwritten) */
1288 0xfffff, /* length */
1289 SDT_MEMRWA, /* segment type */
1290 0, /* segment descriptor priority level */
1291 1, /* segment descriptor present */
1293 0, /* default 32 vs 16 bit size */
1294 1 /* limit granularity (byte/page units)*/ },
1295 /* GTLS_START 15 TLS */
1296 { 0x0, /* segment base address */
1298 0, /* segment type */
1299 0, /* segment descriptor priority level */
1300 0, /* segment descriptor present */
1302 0, /* default 32 vs 16 bit size */
1303 0 /* limit granularity (byte/page units)*/ },
1304 /* GTLS_START+1 16 TLS */
1305 { 0x0, /* segment base address */
1307 0, /* segment type */
1308 0, /* segment descriptor priority level */
1309 0, /* segment descriptor present */
1311 0, /* default 32 vs 16 bit size */
1312 0 /* limit granularity (byte/page units)*/ },
1313 /* GTLS_END 17 TLS */
1314 { 0x0, /* segment base address */
1316 0, /* segment type */
1317 0, /* segment descriptor priority level */
1318 0, /* segment descriptor present */
1320 0, /* default 32 vs 16 bit size */
1321 0 /* limit granularity (byte/page units)*/ },
1322 /* GNDIS_SEL 18 NDIS Descriptor */
1323 { 0x0, /* segment base address */
1325 0, /* segment type */
1326 0, /* segment descriptor priority level */
1327 0, /* segment descriptor present */
1329 0, /* default 32 vs 16 bit size */
1330 0 /* limit granularity (byte/page units)*/ },
1333 static struct soft_segment_descriptor ldt_segs[] = {
1334 /* Null Descriptor - overwritten by call gate */
1335 { 0x0, /* segment base address */
1336 0x0, /* length - all address space */
1337 0, /* segment type */
1338 0, /* segment descriptor priority level */
1339 0, /* segment descriptor present */
1341 0, /* default 32 vs 16 bit size */
1342 0 /* limit granularity (byte/page units)*/ },
1343 /* Null Descriptor - overwritten by call gate */
1344 { 0x0, /* segment base address */
1345 0x0, /* length - all address space */
1346 0, /* segment type */
1347 0, /* segment descriptor priority level */
1348 0, /* segment descriptor present */
1350 0, /* default 32 vs 16 bit size */
1351 0 /* limit granularity (byte/page units)*/ },
1352 /* Null Descriptor - overwritten by call gate */
1353 { 0x0, /* segment base address */
1354 0x0, /* length - all address space */
1355 0, /* segment type */
1356 0, /* segment descriptor priority level */
1357 0, /* segment descriptor present */
1359 0, /* default 32 vs 16 bit size */
1360 0 /* limit granularity (byte/page units)*/ },
1361 /* Code Descriptor for user */
1362 { 0x0, /* segment base address */
1363 0xfffff, /* length - all address space */
1364 SDT_MEMERA, /* segment type */
1365 SEL_UPL, /* segment descriptor priority level */
1366 1, /* segment descriptor present */
1368 1, /* default 32 vs 16 bit size */
1369 1 /* limit granularity (byte/page units)*/ },
1370 /* Null Descriptor - overwritten by call gate */
1371 { 0x0, /* segment base address */
1372 0x0, /* length - all address space */
1373 0, /* segment type */
1374 0, /* segment descriptor priority level */
1375 0, /* segment descriptor present */
1377 0, /* default 32 vs 16 bit size */
1378 0 /* limit granularity (byte/page units)*/ },
1379 /* Data Descriptor for user */
1380 { 0x0, /* segment base address */
1381 0xfffff, /* length - all address space */
1382 SDT_MEMRWA, /* segment type */
1383 SEL_UPL, /* segment descriptor priority level */
1384 1, /* segment descriptor present */
1386 1, /* default 32 vs 16 bit size */
1387 1 /* limit granularity (byte/page units)*/ },
1391 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1393 struct gate_descriptor *ip;
1396 ip->gd_looffset = (int)func;
1397 ip->gd_selector = selec;
1403 ip->gd_hioffset = ((int)func)>>16 ;
1406 #define IDTVEC(name) __CONCAT(X,name)
1409 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1410 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1411 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1412 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1413 IDTVEC(xmm), IDTVEC(syscall),
1416 IDTVEC(int0x80_syscall);
1418 #ifdef DEBUG_INTERRUPTS
1419 extern inthand_t *Xrsvdary[256];
1423 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1425 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1426 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1427 ssd->ssd_type = sd->sd_type;
1428 ssd->ssd_dpl = sd->sd_dpl;
1429 ssd->ssd_p = sd->sd_p;
1430 ssd->ssd_def32 = sd->sd_def32;
1431 ssd->ssd_gran = sd->sd_gran;
1435 * Populate the (physmap) array with base/bound pairs describing the
1436 * available physical memory in the system, then test this memory and
1437 * build the phys_avail array describing the actually-available memory.
1439 * If we cannot accurately determine the physical memory map, then use
1440 * value from the 0xE801 call, and failing that, the RTC.
1442 * Total memory size may be set by the kernel environment variable
1443 * hw.physmem or the compile-time define MAXMEM.
1446 getmemsize(int first)
1448 int i, physmap_idx, pa_indx, da_indx;
1450 u_int basemem, extmem;
1451 struct vm86frame vmf;
1452 struct vm86context vmc;
1454 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1462 quad_t dcons_addr, dcons_size;
1464 bzero(&vmf, sizeof(struct vm86frame));
1465 bzero(physmap, sizeof(physmap));
1469 * Some newer BIOSes has broken INT 12H implementation which cause
1470 * kernel panic immediately. In this case, we need to scan SMAP
1471 * with INT 15:E820 first, then determine base memory size.
1474 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1475 if (hasbrokenint12) {
1480 * Perform "base memory" related probes & setup. If we get a crazy
1481 * value give the bios some scribble space just in case.
1483 vm86_intcall(0x12, &vmf);
1484 basemem = vmf.vmf_ax;
1485 if (basemem > 640) {
1486 kprintf("Preposterous BIOS basemem of %uK, "
1487 "truncating to < 640K\n", basemem);
1492 * XXX if biosbasemem is now < 640, there is a `hole'
1493 * between the end of base memory and the start of
1494 * ISA memory. The hole may be empty or it may
1495 * contain BIOS code or data. Map it read/write so
1496 * that the BIOS can write to it. (Memory from 0 to
1497 * the physical end of the kernel is mapped read-only
1498 * to begin with and then parts of it are remapped.
1499 * The parts that aren't remapped form holes that
1500 * remain read-only and are unused by the kernel.
1501 * The base memory area is below the physical end of
1502 * the kernel and right now forms a read-only hole.
1503 * The part of it from PAGE_SIZE to
1504 * (trunc_page(biosbasemem * 1024) - 1) will be
1505 * remapped and used by the kernel later.)
1507 * This code is similar to the code used in
1508 * pmap_mapdev, but since no memory needs to be
1509 * allocated we simply change the mapping.
1511 for (pa = trunc_page(basemem * 1024);
1512 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1513 pte = vtopte(pa + KERNBASE);
1514 *pte = pa | PG_RW | PG_V;
1518 * if basemem != 640, map pages r/w into vm86 page table so
1519 * that the bios can scribble on it.
1522 for (i = basemem / 4; i < 160; i++)
1523 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1527 * map page 1 R/W into the kernel page table so we can use it
1528 * as a buffer. The kernel will unmap this page later.
1530 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1531 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1534 * get memory map with INT 15:E820
1536 #define SMAPSIZ sizeof(*smap)
1537 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1540 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1541 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1546 vmf.vmf_eax = 0xE820;
1547 vmf.vmf_edx = SMAP_SIG;
1548 vmf.vmf_ecx = SMAPSIZ;
1549 i = vm86_datacall(0x15, &vmf, &vmc);
1550 if (i || vmf.vmf_eax != SMAP_SIG)
1552 if (boothowto & RB_VERBOSE)
1553 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1555 *(u_int32_t *)((char *)&smap->base + 4),
1556 (u_int32_t)smap->base,
1557 *(u_int32_t *)((char *)&smap->length + 4),
1558 (u_int32_t)smap->length);
1560 if (smap->type != 0x01)
1563 if (smap->length == 0)
1566 Realmem += smap->length;
1568 if (smap->base >= 0xffffffffLLU) {
1569 kprintf("%ju MB of memory above 4GB ignored\n",
1570 (uintmax_t)(smap->length / 1024 / 1024));
1574 for (i = 0; i <= physmap_idx; i += 2) {
1575 if (smap->base < physmap[i + 1]) {
1576 if (boothowto & RB_VERBOSE) {
1577 kprintf("Overlapping or non-montonic "
1578 "memory region, ignoring "
1581 Realmem -= smap->length;
1586 if (smap->base == physmap[physmap_idx + 1]) {
1587 physmap[physmap_idx + 1] += smap->length;
1592 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1593 kprintf("Too many segments in the physical "
1594 "address map, giving up\n");
1597 physmap[physmap_idx] = smap->base;
1598 physmap[physmap_idx + 1] = smap->base + smap->length;
1600 ; /* fix GCC3.x warning */
1601 } while (vmf.vmf_ebx != 0);
1604 * Perform "base memory" related probes & setup based on SMAP
1607 for (i = 0; i <= physmap_idx; i += 2) {
1608 if (physmap[i] == 0x00000000) {
1609 basemem = physmap[i + 1] / 1024;
1618 if (basemem > 640) {
1619 kprintf("Preposterous BIOS basemem of %uK, "
1620 "truncating to 640K\n", basemem);
1624 for (pa = trunc_page(basemem * 1024);
1625 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1626 pte = vtopte(pa + KERNBASE);
1627 *pte = pa | PG_RW | PG_V;
1631 for (i = basemem / 4; i < 160; i++)
1632 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1635 if (physmap[1] != 0)
1639 * If we failed above, try memory map with INT 15:E801
1641 vmf.vmf_ax = 0xE801;
1642 if (vm86_intcall(0x15, &vmf) == 0) {
1643 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1647 vm86_intcall(0x15, &vmf);
1648 extmem = vmf.vmf_ax;
1651 * Prefer the RTC value for extended memory.
1653 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1658 * Special hack for chipsets that still remap the 384k hole when
1659 * there's 16MB of memory - this really confuses people that
1660 * are trying to use bus mastering ISA controllers with the
1661 * "16MB limit"; they only have 16MB, but the remapping puts
1662 * them beyond the limit.
1664 * If extended memory is between 15-16MB (16-17MB phys address range),
1667 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1671 physmap[1] = basemem * 1024;
1673 physmap[physmap_idx] = 0x100000;
1674 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1678 * Now, physmap contains a map of physical memory.
1681 base_memory = physmap[1];
1683 /* make hole for AP bootstrap code YYY */
1684 physmap[1] = mp_bootaddress(base_memory);
1687 /* Save EBDA address, if any */
1688 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1692 * Maxmem isn't the "maximum memory", it's one larger than the
1693 * highest page of the physical address space. It should be
1694 * called something like "Maxphyspage". We may adjust this
1695 * based on ``hw.physmem'' and the results of the memory test.
1697 Maxmem = atop(physmap[physmap_idx + 1]);
1700 Maxmem = MAXMEM / 4;
1703 if (kgetenv_quad("hw.physmem", &maxmem))
1704 Maxmem = atop(maxmem);
1706 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1707 (boothowto & RB_VERBOSE))
1708 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1711 * If Maxmem has been increased beyond what the system has detected,
1712 * extend the last memory segment to the new limit.
1714 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1715 physmap[physmap_idx + 1] = ptoa(Maxmem);
1717 /* call pmap initialization to make new kernel address space */
1718 pmap_bootstrap(first, 0);
1721 * Size up each available chunk of physical memory.
1723 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1726 phys_avail[pa_indx++] = physmap[0];
1727 phys_avail[pa_indx] = physmap[0];
1728 dump_avail[da_indx] = physmap[0];
1733 * Get dcons buffer address
1735 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1736 kgetenv_quad("dcons.size", &dcons_size) == 0)
1740 * physmap is in bytes, so when converting to page boundaries,
1741 * round up the start address and round down the end address.
1743 for (i = 0; i <= physmap_idx; i += 2) {
1747 if (physmap[i + 1] < end)
1748 end = trunc_page(physmap[i + 1]);
1749 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1750 int tmp, page_bad, full;
1754 int *ptr = (int *)CADDR1;
1759 * block out kernel memory as not available.
1761 if (pa >= 0x100000 && pa < first)
1765 * block out dcons buffer
1768 && pa >= trunc_page(dcons_addr)
1769 && pa < dcons_addr + dcons_size)
1775 * map page into kernel: valid, read/write,non-cacheable
1777 *pte = pa | PG_V | PG_RW | PG_N;
1782 * Test for alternating 1's and 0's
1784 *(volatile int *)ptr = 0xaaaaaaaa;
1785 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1789 * Test for alternating 0's and 1's
1791 *(volatile int *)ptr = 0x55555555;
1792 if (*(volatile int *)ptr != 0x55555555) {
1798 *(volatile int *)ptr = 0xffffffff;
1799 if (*(volatile int *)ptr != 0xffffffff) {
1805 *(volatile int *)ptr = 0x0;
1806 if (*(volatile int *)ptr != 0x0) {
1810 * Restore original value.
1815 * Adjust array of valid/good pages.
1817 if (page_bad == TRUE) {
1821 * If this good page is a continuation of the
1822 * previous set of good pages, then just increase
1823 * the end pointer. Otherwise start a new chunk.
1824 * Note that "end" points one higher than end,
1825 * making the range >= start and < end.
1826 * If we're also doing a speculative memory
1827 * test and we at or past the end, bump up Maxmem
1828 * so that we keep going. The first bad page
1829 * will terminate the loop.
1831 if (phys_avail[pa_indx] == pa) {
1832 phys_avail[pa_indx] += PAGE_SIZE;
1835 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1836 kprintf("Too many holes in the physical address space, giving up\n");
1841 phys_avail[pa_indx++] = pa; /* start */
1842 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1846 if (dump_avail[da_indx] == pa) {
1847 dump_avail[da_indx] += PAGE_SIZE;
1850 if (da_indx >= PHYSMAP_ENTRIES*2) {
1854 dump_avail[da_indx++] = pa; /* start */
1855 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1868 * The last chunk must contain at least one page plus the message
1869 * buffer to avoid complicating other code (message buffer address
1870 * calculation, etc.).
1872 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1873 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1874 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1875 phys_avail[pa_indx--] = 0;
1876 phys_avail[pa_indx--] = 0;
1879 Maxmem = atop(phys_avail[pa_indx]);
1881 /* Trim off space for the message buffer. */
1882 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1884 avail_end = phys_avail[pa_indx];
1887 struct machintr_abi MachIntrABI;
1898 * 7 Device Not Available (x87)
1900 * 9 Coprocessor Segment overrun (unsupported, reserved)
1902 * 11 Segment not present
1904 * 13 General Protection
1907 * 16 x87 FP Exception pending
1908 * 17 Alignment Check
1910 * 19 SIMD floating point
1912 * 32-255 INTn/external sources
1917 struct gate_descriptor *gdp;
1918 int gsel_tss, metadata_missing, off, x;
1919 struct mdglobaldata *gd;
1922 * Prevent lowering of the ipl if we call tsleep() early.
1924 gd = &CPU_prvspace[0].mdglobaldata;
1925 bzero(gd, sizeof(*gd));
1927 gd->mi.gd_curthread = &thread0;
1928 thread0.td_gd = &gd->mi;
1930 atdevbase = ISA_HOLE_START + KERNBASE;
1932 metadata_missing = 0;
1933 if (bootinfo.bi_modulep) {
1934 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1935 preload_bootstrap_relocate(KERNBASE);
1937 metadata_missing = 1;
1939 if (bootinfo.bi_envp)
1940 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1942 if (boothowto & RB_VERBOSE)
1946 * Default MachIntrABI to ICU
1948 MachIntrABI = MachIntrABI_ICU;
1950 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1951 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1952 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
1955 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1956 * and ncpus_fit_mask remain 0.
1961 /* Init basic tunables, hz etc */
1965 * make gdt memory segments, the code segment goes up to end of the
1966 * page with etext in it, the data segment goes to the end of
1970 * XXX text protection is temporarily (?) disabled. The limit was
1971 * i386_btop(round_page(etext)) - 1.
1973 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1974 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1976 gdt_segs[GPRIV_SEL].ssd_limit =
1977 atop(sizeof(struct privatespace) - 1);
1978 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1979 gdt_segs[GPROC0_SEL].ssd_base =
1980 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1982 gd->mi.gd_prvspace = &CPU_prvspace[0];
1985 * Note: on both UP and SMP curthread must be set non-NULL
1986 * early in the boot sequence because the system assumes
1987 * that 'curthread' is never NULL.
1990 for (x = 0; x < NGDT; x++) {
1992 /* avoid overwriting db entries with APM ones */
1993 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1996 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1999 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2000 r_gdt.rd_base = (int) gdt;
2003 mi_gdinit(&gd->mi, 0);
2005 mi_proc0init(&gd->mi, proc0paddr);
2006 safepri = TDPRI_MAX;
2008 /* make ldt memory segments */
2010 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
2011 * should be spelled ...MAX_USER...
2013 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2014 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2015 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2016 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2018 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2020 gd->gd_currentldt = _default_ldt;
2021 /* spinlocks and the BGL */
2025 * Setup the hardware exception table. Most exceptions use
2026 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
2027 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
2028 * an 'interrupt trap gate', which disables interrupts on entry,
2029 * in order to be able to poll the appropriate CRn register to
2030 * determine the fault address.
2032 for (x = 0; x < NIDT; x++) {
2033 #ifdef DEBUG_INTERRUPTS
2034 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2036 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2039 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2040 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2041 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2042 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2043 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2044 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2045 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2046 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2047 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2048 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2049 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2050 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2051 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2052 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2053 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2054 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2055 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2056 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2057 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2058 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2059 setidt(0x80, &IDTVEC(int0x80_syscall),
2060 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2062 r_idt.rd_limit = sizeof(idt0) - 1;
2063 r_idt.rd_base = (int) idt;
2067 * Initialize the console before we print anything out.
2071 if (metadata_missing)
2072 kprintf("WARNING: loader(8) metadata is missing!\n");
2081 * Initialize IRQ mapping
2084 * SHOULD be after elcr_probe()
2086 MachIntrABI_ICU.initmap();
2088 MachIntrABI_IOAPIC.initmap();
2093 if (boothowto & RB_KDB)
2094 Debugger("Boot flags requested debugger");
2097 finishidentcpu(); /* Final stage of CPU initialization */
2098 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2099 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2100 initializecpu(); /* Initialize CPU registers */
2103 * make an initial tss so cpu can get interrupt stack on syscall!
2104 * The 16 bytes is to save room for a VM86 context.
2106 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2107 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2108 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2109 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2110 gd->gd_common_tssd = *gd->gd_tss_gdt;
2111 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2114 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2115 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2116 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2117 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2118 dblfault_tss.tss_cr3 = (int)IdlePTD;
2119 dblfault_tss.tss_eip = (int) dblfault_handler;
2120 dblfault_tss.tss_eflags = PSL_KERNEL;
2121 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2122 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2123 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2124 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2125 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2129 init_param2(physmem);
2131 /* now running on new page tables, configured,and u/iom is accessible */
2133 /* Map the message buffer. */
2134 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2135 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2137 msgbufinit(msgbufp, MSGBUF_SIZE);
2139 /* make a call gate to reenter kernel with */
2140 gdp = &ldt[LSYS5CALLS_SEL].gd;
2142 x = (int) &IDTVEC(syscall);
2143 gdp->gd_looffset = x++;
2144 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2146 gdp->gd_type = SDT_SYS386CGT;
2147 gdp->gd_dpl = SEL_UPL;
2149 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2151 /* XXX does this work? */
2152 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2153 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2155 /* transfer to user mode */
2157 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2158 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2160 /* setup proc 0's pcb */
2161 thread0.td_pcb->pcb_flags = 0;
2162 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2163 thread0.td_pcb->pcb_ext = 0;
2164 lwp0.lwp_md.md_regs = &proc0_tf;
2168 * Initialize machine-dependant portions of the global data structure.
2169 * Note that the global data area and cpu0's idlestack in the private
2170 * data space were allocated in locore.
2172 * Note: the idlethread's cpl is 0
2174 * WARNING! Called from early boot, 'mycpu' may not work yet.
2177 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2180 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2182 lwkt_init_thread(&gd->mi.gd_idlethread,
2183 gd->mi.gd_prvspace->idlestack,
2184 sizeof(gd->mi.gd_prvspace->idlestack),
2186 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2187 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2188 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2189 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2193 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2195 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2196 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2203 globaldata_find(int cpu)
2205 KKASSERT(cpu >= 0 && cpu < ncpus);
2206 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2209 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2210 static void f00f_hack(void *unused);
2211 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2214 f00f_hack(void *unused)
2216 struct gate_descriptor *new_idt;
2222 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2224 r_idt.rd_limit = sizeof(idt0) - 1;
2226 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2228 panic("kmem_alloc returned 0");
2229 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2230 panic("kmem_alloc returned non-page-aligned memory");
2231 /* Put the first seven entries in the lower page */
2232 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2233 bcopy(idt, new_idt, sizeof(idt0));
2234 r_idt.rd_base = (int)new_idt;
2237 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2238 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2239 panic("vm_map_protect failed");
2242 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2245 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2247 lp->lwp_md.md_regs->tf_eip = addr;
2252 ptrace_single_step(struct lwp *lp)
2254 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2259 fill_regs(struct lwp *lp, struct reg *regs)
2261 struct trapframe *tp;
2263 if ((tp = lp->lwp_md.md_regs) == NULL)
2265 regs->r_gs = tp->tf_gs;
2266 regs->r_fs = tp->tf_fs;
2267 regs->r_es = tp->tf_es;
2268 regs->r_ds = tp->tf_ds;
2269 regs->r_edi = tp->tf_edi;
2270 regs->r_esi = tp->tf_esi;
2271 regs->r_ebp = tp->tf_ebp;
2272 regs->r_ebx = tp->tf_ebx;
2273 regs->r_edx = tp->tf_edx;
2274 regs->r_ecx = tp->tf_ecx;
2275 regs->r_eax = tp->tf_eax;
2276 regs->r_eip = tp->tf_eip;
2277 regs->r_cs = tp->tf_cs;
2278 regs->r_eflags = tp->tf_eflags;
2279 regs->r_esp = tp->tf_esp;
2280 regs->r_ss = tp->tf_ss;
2285 set_regs(struct lwp *lp, struct reg *regs)
2287 struct trapframe *tp;
2289 tp = lp->lwp_md.md_regs;
2290 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2291 !CS_SECURE(regs->r_cs))
2293 tp->tf_gs = regs->r_gs;
2294 tp->tf_fs = regs->r_fs;
2295 tp->tf_es = regs->r_es;
2296 tp->tf_ds = regs->r_ds;
2297 tp->tf_edi = regs->r_edi;
2298 tp->tf_esi = regs->r_esi;
2299 tp->tf_ebp = regs->r_ebp;
2300 tp->tf_ebx = regs->r_ebx;
2301 tp->tf_edx = regs->r_edx;
2302 tp->tf_ecx = regs->r_ecx;
2303 tp->tf_eax = regs->r_eax;
2304 tp->tf_eip = regs->r_eip;
2305 tp->tf_cs = regs->r_cs;
2306 tp->tf_eflags = regs->r_eflags;
2307 tp->tf_esp = regs->r_esp;
2308 tp->tf_ss = regs->r_ss;
2312 #ifndef CPU_DISABLE_SSE
2314 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2316 struct env87 *penv_87 = &sv_87->sv_env;
2317 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2320 /* FPU control/status */
2321 penv_87->en_cw = penv_xmm->en_cw;
2322 penv_87->en_sw = penv_xmm->en_sw;
2323 penv_87->en_tw = penv_xmm->en_tw;
2324 penv_87->en_fip = penv_xmm->en_fip;
2325 penv_87->en_fcs = penv_xmm->en_fcs;
2326 penv_87->en_opcode = penv_xmm->en_opcode;
2327 penv_87->en_foo = penv_xmm->en_foo;
2328 penv_87->en_fos = penv_xmm->en_fos;
2331 for (i = 0; i < 8; ++i)
2332 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2336 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2338 struct env87 *penv_87 = &sv_87->sv_env;
2339 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2342 /* FPU control/status */
2343 penv_xmm->en_cw = penv_87->en_cw;
2344 penv_xmm->en_sw = penv_87->en_sw;
2345 penv_xmm->en_tw = penv_87->en_tw;
2346 penv_xmm->en_fip = penv_87->en_fip;
2347 penv_xmm->en_fcs = penv_87->en_fcs;
2348 penv_xmm->en_opcode = penv_87->en_opcode;
2349 penv_xmm->en_foo = penv_87->en_foo;
2350 penv_xmm->en_fos = penv_87->en_fos;
2353 for (i = 0; i < 8; ++i)
2354 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2356 #endif /* CPU_DISABLE_SSE */
2359 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2361 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL)
2363 #ifndef CPU_DISABLE_SSE
2365 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2366 (struct save87 *)fpregs);
2369 #endif /* CPU_DISABLE_SSE */
2370 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2375 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2377 #ifndef CPU_DISABLE_SSE
2379 set_fpregs_xmm((struct save87 *)fpregs,
2380 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2383 #endif /* CPU_DISABLE_SSE */
2384 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2389 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2394 dbregs->dr0 = rdr0();
2395 dbregs->dr1 = rdr1();
2396 dbregs->dr2 = rdr2();
2397 dbregs->dr3 = rdr3();
2398 dbregs->dr4 = rdr4();
2399 dbregs->dr5 = rdr5();
2400 dbregs->dr6 = rdr6();
2401 dbregs->dr7 = rdr7();
2404 if (lp->lwp_thread == NULL || (pcb = lp->lwp_thread->td_pcb) == NULL)
2406 dbregs->dr0 = pcb->pcb_dr0;
2407 dbregs->dr1 = pcb->pcb_dr1;
2408 dbregs->dr2 = pcb->pcb_dr2;
2409 dbregs->dr3 = pcb->pcb_dr3;
2412 dbregs->dr6 = pcb->pcb_dr6;
2413 dbregs->dr7 = pcb->pcb_dr7;
2418 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2421 load_dr0(dbregs->dr0);
2422 load_dr1(dbregs->dr1);
2423 load_dr2(dbregs->dr2);
2424 load_dr3(dbregs->dr3);
2425 load_dr4(dbregs->dr4);
2426 load_dr5(dbregs->dr5);
2427 load_dr6(dbregs->dr6);
2428 load_dr7(dbregs->dr7);
2431 struct ucred *ucred;
2433 uint32_t mask1, mask2;
2436 * Don't let an illegal value for dr7 get set. Specifically,
2437 * check for undefined settings. Setting these bit patterns
2438 * result in undefined behaviour and can lead to an unexpected
2441 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2442 i++, mask1 <<= 2, mask2 <<= 2)
2443 if ((dbregs->dr7 & mask1) == mask2)
2446 pcb = lp->lwp_thread->td_pcb;
2447 ucred = lp->lwp_proc->p_ucred;
2450 * Don't let a process set a breakpoint that is not within the
2451 * process's address space. If a process could do this, it
2452 * could halt the system by setting a breakpoint in the kernel
2453 * (if ddb was enabled). Thus, we need to check to make sure
2454 * that no breakpoints are being enabled for addresses outside
2455 * process's address space, unless, perhaps, we were called by
2458 * XXX - what about when the watched area of the user's
2459 * address space is written into from within the kernel
2460 * ... wouldn't that still cause a breakpoint to be generated
2461 * from within kernel mode?
2464 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2465 if (dbregs->dr7 & 0x3) {
2466 /* dr0 is enabled */
2467 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2471 if (dbregs->dr7 & (0x3<<2)) {
2472 /* dr1 is enabled */
2473 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2477 if (dbregs->dr7 & (0x3<<4)) {
2478 /* dr2 is enabled */
2479 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2483 if (dbregs->dr7 & (0x3<<6)) {
2484 /* dr3 is enabled */
2485 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2490 pcb->pcb_dr0 = dbregs->dr0;
2491 pcb->pcb_dr1 = dbregs->dr1;
2492 pcb->pcb_dr2 = dbregs->dr2;
2493 pcb->pcb_dr3 = dbregs->dr3;
2494 pcb->pcb_dr6 = dbregs->dr6;
2495 pcb->pcb_dr7 = dbregs->dr7;
2497 pcb->pcb_flags |= PCB_DBREGS;
2504 * Return > 0 if a hardware breakpoint has been hit, and the
2505 * breakpoint was in user space. Return 0, otherwise.
2508 user_dbreg_trap(void)
2510 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2511 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2512 int nbp; /* number of breakpoints that triggered */
2513 caddr_t addr[4]; /* breakpoint addresses */
2517 if ((dr7 & 0x000000ff) == 0) {
2519 * all GE and LE bits in the dr7 register are zero,
2520 * thus the trap couldn't have been caused by the
2521 * hardware debug registers
2528 bp = dr6 & 0x0000000f;
2532 * None of the breakpoint bits are set meaning this
2533 * trap was not caused by any of the debug registers
2539 * at least one of the breakpoints were hit, check to see
2540 * which ones and if any of them are user space addresses
2544 addr[nbp++] = (caddr_t)rdr0();
2547 addr[nbp++] = (caddr_t)rdr1();
2550 addr[nbp++] = (caddr_t)rdr2();
2553 addr[nbp++] = (caddr_t)rdr3();
2556 for (i=0; i<nbp; i++) {
2558 (caddr_t)VM_MAX_USER_ADDRESS) {
2560 * addr[i] is in user space
2567 * None of the breakpoints are in user space.
2575 Debugger(const char *msg)
2577 kprintf("Debugger(\"%s\") called.\n", msg);
2584 * Provide inb() and outb() as functions. They are normally only
2585 * available as macros calling inlined functions, thus cannot be
2586 * called inside DDB.
2588 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2594 /* silence compiler warnings */
2596 void outb(u_int, u_char);
2603 * We use %%dx and not %1 here because i/o is done at %dx and not at
2604 * %edx, while gcc generates inferior code (movw instead of movl)
2605 * if we tell it to load (u_short) port.
2607 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2612 outb(u_int port, u_char data)
2616 * Use an unnecessary assignment to help gcc's register allocator.
2617 * This make a large difference for gcc-1.40 and a tiny difference
2618 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2619 * best results. gcc-2.6.0 can't handle this.
2622 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2629 #include "opt_cpu.h"
2633 * initialize all the SMP locks
2636 /* critical region when masking or unmasking interupts */
2637 struct spinlock_deprecated imen_spinlock;
2639 /* critical region for old style disable_intr/enable_intr */
2640 struct spinlock_deprecated mpintr_spinlock;
2642 /* critical region around INTR() routines */
2643 struct spinlock_deprecated intr_spinlock;
2645 /* lock region used by kernel profiling */
2646 struct spinlock_deprecated mcount_spinlock;
2648 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2649 struct spinlock_deprecated com_spinlock;
2651 /* lock regions around the clock hardware */
2652 struct spinlock_deprecated clock_spinlock;
2654 /* lock around the MP rendezvous */
2655 struct spinlock_deprecated smp_rv_spinlock;
2662 * Get the initial mplock with a count of 1 for the BSP.
2663 * This uses a LOGICAL cpu ID, ie BSP == 0.
2665 cpu_get_initial_mplock();
2668 spin_lock_init(&mcount_spinlock);
2669 spin_lock_init(&intr_spinlock);
2670 spin_lock_init(&mpintr_spinlock);
2671 spin_lock_init(&imen_spinlock);
2672 spin_lock_init(&smp_rv_spinlock);
2673 spin_lock_init(&com_spinlock);
2674 spin_lock_init(&clock_spinlock);
2676 /* our token pool needs to work early */
2677 lwkt_token_pool_init();