sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2014, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  71  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  72  *   the hardware interrupt in order to avoid handler execution races from
  73  *   scheduled interrupt threads.
  74  */
  75
  76 #include "opt_ifpoll.h"
  77
  78 #include <sys/param.h>
  79 #include <sys/bus.h>
  80 #include <sys/endian.h>
  81 #include <sys/interrupt.h>
  82 #include <sys/kernel.h>
  83 #include <sys/ktr.h>
  84 #include <sys/malloc.h>
  85 #include <sys/mbuf.h>
  86 #include <sys/proc.h>
  87 #include <sys/rman.h>
  88 #include <sys/serialize.h>
  89 #include <sys/socket.h>
  90 #include <sys/sockio.h>
  91 #include <sys/sysctl.h>
  92 #include <sys/systm.h>
  93
  94 #include <net/bpf.h>
  95 #include <net/ethernet.h>
  96 #include <net/if.h>
  97 #include <net/if_arp.h>
  98 #include <net/if_dl.h>
  99 #include <net/if_media.h>
 100 #include <net/if_poll.h>
 101 #include <net/ifq_var.h>
 102 #include <net/vlan/if_vlan_var.h>
 103 #include <net/vlan/if_vlan_ether.h>
 104
 105 #include <netinet/ip.h>
 106 #include <netinet/tcp.h>
 107 #include <netinet/udp.h>
 108
 109 #include <bus/pci/pcivar.h>
 110 #include <bus/pci/pcireg.h>
 111
 112 #include <dev/netif/ig_hal/e1000_api.h>
 113 #include <dev/netif/ig_hal/e1000_82571.h>
 114 #include <dev/netif/em/if_em.h>
 115
 116 #define DEBUG_HW 0
 117
 118 #define EM_FLOWCTRL_STRLEN      16
 119
 120 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 121 #define EM_VER  " 7.4.2"
 122
 123 #define _EM_DEVICE(id, ret)     \
 124         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 125 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 126 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 127 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 128
 129 static const struct em_vendor_info em_vendor_info_array[] = {
 130         EM_DEVICE(82540EM),
 131         EM_DEVICE(82540EM_LOM),
 132         EM_DEVICE(82540EP),
 133         EM_DEVICE(82540EP_LOM),
 134         EM_DEVICE(82540EP_LP),
 135
 136         EM_DEVICE(82541EI),
 137         EM_DEVICE(82541ER),
 138         EM_DEVICE(82541ER_LOM),
 139         EM_DEVICE(82541EI_MOBILE),
 140         EM_DEVICE(82541GI),
 141         EM_DEVICE(82541GI_LF),
 142         EM_DEVICE(82541GI_MOBILE),
 143
 144         EM_DEVICE(82542),
 145
 146         EM_DEVICE(82543GC_FIBER),
 147         EM_DEVICE(82543GC_COPPER),
 148
 149         EM_DEVICE(82544EI_COPPER),
 150         EM_DEVICE(82544EI_FIBER),
 151         EM_DEVICE(82544GC_COPPER),
 152         EM_DEVICE(82544GC_LOM),
 153
 154         EM_DEVICE(82545EM_COPPER),
 155         EM_DEVICE(82545EM_FIBER),
 156         EM_DEVICE(82545GM_COPPER),
 157         EM_DEVICE(82545GM_FIBER),
 158         EM_DEVICE(82545GM_SERDES),
 159
 160         EM_DEVICE(82546EB_COPPER),
 161         EM_DEVICE(82546EB_FIBER),
 162         EM_DEVICE(82546EB_QUAD_COPPER),
 163         EM_DEVICE(82546GB_COPPER),
 164         EM_DEVICE(82546GB_FIBER),
 165         EM_DEVICE(82546GB_SERDES),
 166         EM_DEVICE(82546GB_PCIE),
 167         EM_DEVICE(82546GB_QUAD_COPPER),
 168         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 169
 170         EM_DEVICE(82547EI),
 171         EM_DEVICE(82547EI_MOBILE),
 172         EM_DEVICE(82547GI),
 173
 174         EM_EMX_DEVICE(82571EB_COPPER),
 175         EM_EMX_DEVICE(82571EB_FIBER),
 176         EM_EMX_DEVICE(82571EB_SERDES),
 177         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 178         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 179         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 180         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 181         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 182         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 183         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 184
 185         EM_EMX_DEVICE(82572EI_COPPER),
 186         EM_EMX_DEVICE(82572EI_FIBER),
 187         EM_EMX_DEVICE(82572EI_SERDES),
 188         EM_EMX_DEVICE(82572EI),
 189
 190         EM_EMX_DEVICE(82573E),
 191         EM_EMX_DEVICE(82573E_IAMT),
 192         EM_EMX_DEVICE(82573L),
 193
 194         EM_DEVICE(82583V),
 195
 196         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 197         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 198         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 199         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 200
 201         EM_DEVICE(ICH8_IGP_M_AMT),
 202         EM_DEVICE(ICH8_IGP_AMT),
 203         EM_DEVICE(ICH8_IGP_C),
 204         EM_DEVICE(ICH8_IFE),
 205         EM_DEVICE(ICH8_IFE_GT),
 206         EM_DEVICE(ICH8_IFE_G),
 207         EM_DEVICE(ICH8_IGP_M),
 208         EM_DEVICE(ICH8_82567V_3),
 209
 210         EM_DEVICE(ICH9_IGP_M_AMT),
 211         EM_DEVICE(ICH9_IGP_AMT),
 212         EM_DEVICE(ICH9_IGP_C),
 213         EM_DEVICE(ICH9_IGP_M),
 214         EM_DEVICE(ICH9_IGP_M_V),
 215         EM_DEVICE(ICH9_IFE),
 216         EM_DEVICE(ICH9_IFE_GT),
 217         EM_DEVICE(ICH9_IFE_G),
 218         EM_DEVICE(ICH9_BM),
 219
 220         EM_EMX_DEVICE(82574L),
 221         EM_EMX_DEVICE(82574LA),
 222
 223         EM_DEVICE(ICH10_R_BM_LM),
 224         EM_DEVICE(ICH10_R_BM_LF),
 225         EM_DEVICE(ICH10_R_BM_V),
 226         EM_DEVICE(ICH10_D_BM_LM),
 227         EM_DEVICE(ICH10_D_BM_LF),
 228         EM_DEVICE(ICH10_D_BM_V),
 229
 230         EM_DEVICE(PCH_M_HV_LM),
 231         EM_DEVICE(PCH_M_HV_LC),
 232         EM_DEVICE(PCH_D_HV_DM),
 233         EM_DEVICE(PCH_D_HV_DC),
 234
 235         EM_DEVICE(PCH2_LV_LM),
 236         EM_DEVICE(PCH2_LV_V),
 237
 238         EM_EMX_DEVICE(PCH_LPT_I217_LM),
 239         EM_EMX_DEVICE(PCH_LPT_I217_V),
 240         EM_EMX_DEVICE(PCH_LPTLP_I218_LM),
 241         EM_EMX_DEVICE(PCH_LPTLP_I218_V),
 242         EM_EMX_DEVICE(PCH_I218_LM2),
 243         EM_EMX_DEVICE(PCH_I218_V2),
 244         EM_EMX_DEVICE(PCH_I218_LM3),
 245         EM_EMX_DEVICE(PCH_I218_V3),
 246
 247         /* required last entry */
 248         EM_DEVICE_NULL
 249 };
 250
 251 static int      em_probe(device_t);
 252 static int      em_attach(device_t);
 253 static int      em_detach(device_t);
 254 static int      em_shutdown(device_t);
 255 static int      em_suspend(device_t);
 256 static int      em_resume(device_t);
 257
 258 static void     em_init(void *);
 259 static void     em_stop(struct adapter *);
 260 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 261 static void     em_start(struct ifnet *, struct ifaltq_subque *);
 262 #ifdef IFPOLL_ENABLE
 263 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 264 static void     em_npoll_compat(struct ifnet *, void *, int);
 265 #endif
 266 static void     em_watchdog(struct ifnet *);
 267 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 268 static int      em_media_change(struct ifnet *);
 269 static void     em_timer(void *);
 270
 271 static void     em_intr(void *);
 272 static void     em_intr_mask(void *);
 273 static void     em_intr_body(struct adapter *, boolean_t);
 274 static void     em_rxeof(struct adapter *, int);
 275 static void     em_txeof(struct adapter *);
 276 static void     em_tx_collect(struct adapter *);
 277 static void     em_tx_purge(struct adapter *);
 278 static void     em_enable_intr(struct adapter *);
 279 static void     em_disable_intr(struct adapter *);
 280
 281 static int      em_dma_malloc(struct adapter *, bus_size_t,
 282                     struct em_dma_alloc *);
 283 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 284 static void     em_init_tx_ring(struct adapter *);
 285 static int      em_init_rx_ring(struct adapter *);
 286 static int      em_create_tx_ring(struct adapter *);
 287 static int      em_create_rx_ring(struct adapter *);
 288 static void     em_destroy_tx_ring(struct adapter *, int);
 289 static void     em_destroy_rx_ring(struct adapter *, int);
 290 static int      em_newbuf(struct adapter *, int, int);
 291 static int      em_encap(struct adapter *, struct mbuf **, int *, int *);
 292 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 293                     struct mbuf *);
 294 static int      em_txcsum(struct adapter *, struct mbuf *,
 295                     uint32_t *, uint32_t *);
 296 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 297 static int      em_tso_setup(struct adapter *, struct mbuf *,
 298                     uint32_t *, uint32_t *);
 299
 300 static int      em_get_hw_info(struct adapter *);
 301 static int      em_is_valid_eaddr(const uint8_t *);
 302 static int      em_alloc_pci_res(struct adapter *);
 303 static void     em_free_pci_res(struct adapter *);
 304 static int      em_reset(struct adapter *);
 305 static void     em_setup_ifp(struct adapter *);
 306 static void     em_init_tx_unit(struct adapter *);
 307 static void     em_init_rx_unit(struct adapter *);
 308 static void     em_update_stats(struct adapter *);
 309 static void     em_set_promisc(struct adapter *);
 310 static void     em_disable_promisc(struct adapter *);
 311 static void     em_set_multi(struct adapter *);
 312 static void     em_update_link_status(struct adapter *);
 313 static void     em_smartspeed(struct adapter *);
 314 static void     em_set_itr(struct adapter *, uint32_t);
 315 static void     em_disable_aspm(struct adapter *);
 316 static enum e1000_fc_mode em_str2fc(const char *);
 317 static void     em_fc2str(enum e1000_fc_mode, char *, int);
 318
 319 /* Hardware workarounds */
 320 static int      em_82547_fifo_workaround(struct adapter *, int);
 321 static void     em_82547_update_fifo_head(struct adapter *, int);
 322 static int      em_82547_tx_fifo_reset(struct adapter *);
 323 static void     em_82547_move_tail(void *);
 324 static void     em_82547_move_tail_serialized(struct adapter *);
 325 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 326
 327 static void     em_print_debug_info(struct adapter *);
 328 static void     em_print_nvm_info(struct adapter *);
 329 static void     em_print_hw_stats(struct adapter *);
 330
 331 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 332 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 333 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 334 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 335 static int      em_sysctl_flowctrl(SYSCTL_HANDLER_ARGS);
 336 static void     em_add_sysctl(struct adapter *adapter);
 337
 338 /* Management and WOL Support */
 339 static void     em_get_mgmt(struct adapter *);
 340 static void     em_rel_mgmt(struct adapter *);
 341 static void     em_get_hw_control(struct adapter *);
 342 static void     em_rel_hw_control(struct adapter *);
 343 static void     em_enable_wol(device_t);
 344
 345 static device_method_t em_methods[] = {
 346         /* Device interface */
 347         DEVMETHOD(device_probe,         em_probe),
 348         DEVMETHOD(device_attach,        em_attach),
 349         DEVMETHOD(device_detach,        em_detach),
 350         DEVMETHOD(device_shutdown,      em_shutdown),
 351         DEVMETHOD(device_suspend,       em_suspend),
 352         DEVMETHOD(device_resume,        em_resume),
 353         DEVMETHOD_END
 354 };
 355
 356 static driver_t em_driver = {
 357         "em",
 358         em_methods,
 359         sizeof(struct adapter),
 360 };
 361
 362 static devclass_t em_devclass;
 363
 364 DECLARE_DUMMY_MODULE(if_em);
 365 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 366 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 367
 368 /*
 369  * Tunables
 370  */
 371 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 372 static int      em_rxd = EM_DEFAULT_RXD;
 373 static int      em_txd = EM_DEFAULT_TXD;
 374 static int      em_smart_pwr_down = 0;
 375
 376 /* Controls whether promiscuous also shows bad packets */
 377 static int      em_debug_sbp = FALSE;
 378
 379 static int      em_82573_workaround = 1;
 380 static int      em_msi_enable = 1;
 381
 382 static char     em_flowctrl[EM_FLOWCTRL_STRLEN] = "rx_pause";
 383
 384 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 385 TUNABLE_INT("hw.em.rxd", &em_rxd);
 386 TUNABLE_INT("hw.em.txd", &em_txd);
 387 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 388 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 389 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 390 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 391 TUNABLE_STR("hw.em.flow_ctrl", em_flowctrl, sizeof(em_flowctrl));
 392
 393 /* Global used in WOL setup with multiport cards */
 394 static int      em_global_quad_port_a = 0;
 395
 396 /* Set this to one to display debug statistics */
 397 static int      em_display_debug_stats = 0;
 398
 399 #if !defined(KTR_IF_EM)
 400 #define KTR_IF_EM       KTR_ALL
 401 #endif
 402 KTR_INFO_MASTER(if_em);
 403 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 404 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 405 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 406 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 407 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 408 #define logif(name)     KTR_LOG(if_em_ ## name)
 409
 410 static int
 411 em_probe(device_t dev)
 412 {
 413         const struct em_vendor_info *ent;
 414         uint16_t vid, did;
 415
 416         vid = pci_get_vendor(dev);
 417         did = pci_get_device(dev);
 418
 419         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 420                 if (vid == ent->vendor_id && did == ent->device_id) {
 421                         device_set_desc(dev, ent->desc);
 422                         device_set_async_attach(dev, TRUE);
 423                         return (ent->ret);
 424                 }
 425         }
 426         return (ENXIO);
 427 }
 428
 429 static int
 430 em_attach(device_t dev)
 431 {
 432         struct adapter *adapter = device_get_softc(dev);
 433         struct ifnet *ifp = &adapter->arpcom.ac_if;
 434         int tsize, rsize;
 435         int error = 0;
 436         uint16_t eeprom_data, device_id, apme_mask;
 437         driver_intr_t *intr_func;
 438         char flowctrl[EM_FLOWCTRL_STRLEN];
 439
 440         adapter->dev = adapter->osdep.dev = dev;
 441
 442         callout_init_mp(&adapter->timer);
 443         callout_init_mp(&adapter->tx_fifo_timer);
 444
 445         ifmedia_init(&adapter->media, IFM_IMASK,
 446             em_media_change, em_media_status);
 447
 448         /* Determine hardware and mac info */
 449         error = em_get_hw_info(adapter);
 450         if (error) {
 451                 device_printf(dev, "Identify hardware failed\n");
 452                 goto fail;
 453         }
 454
 455         /* Setup PCI resources */
 456         error = em_alloc_pci_res(adapter);
 457         if (error) {
 458                 device_printf(dev, "Allocation of PCI resources failed\n");
 459                 goto fail;
 460         }
 461
 462         /*
 463          * For ICH8 and family we need to map the flash memory,
 464          * and this must happen after the MAC is identified.
 465          */
 466         if (adapter->hw.mac.type == e1000_ich8lan ||
 467             adapter->hw.mac.type == e1000_ich9lan ||
 468             adapter->hw.mac.type == e1000_ich10lan ||
 469             adapter->hw.mac.type == e1000_pchlan ||
 470             adapter->hw.mac.type == e1000_pch2lan ||
 471             adapter->hw.mac.type == e1000_pch_lpt) {
 472                 adapter->flash_rid = EM_BAR_FLASH;
 473
 474                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 475                                         &adapter->flash_rid, RF_ACTIVE);
 476                 if (adapter->flash == NULL) {
 477                         device_printf(dev, "Mapping of Flash failed\n");
 478                         error = ENXIO;
 479                         goto fail;
 480                 }
 481                 adapter->osdep.flash_bus_space_tag =
 482                     rman_get_bustag(adapter->flash);
 483                 adapter->osdep.flash_bus_space_handle =
 484                     rman_get_bushandle(adapter->flash);
 485
 486                 /*
 487                  * This is used in the shared code
 488                  * XXX this goof is actually not used.
 489                  */
 490                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 491         }
 492
 493         switch (adapter->hw.mac.type) {
 494         case e1000_82571:
 495         case e1000_82572:
 496         case e1000_pch_lpt:
 497                 /*
 498                  * Pullup extra 4bytes into the first data segment for
 499                  * TSO, see:
 500                  * 82571/82572 specification update errata #7
 501                  *
 502                  * Same applies to I217 (and maybe I218).
 503                  *
 504                  * NOTE:
 505                  * 4bytes instead of 2bytes, which are mentioned in the
 506                  * errata, are pulled; mainly to keep rest of the data
 507                  * properly aligned.
 508                  */
 509                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 510                 /* FALL THROUGH */
 511
 512         default:
 513                 if (pci_is_pcie(dev))
 514                         adapter->flags |= EM_FLAG_TSO;
 515                 break;
 516         }
 517
 518         /* Do Shared Code initialization */
 519         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 520                 device_printf(dev, "Setup of Shared code failed\n");
 521                 error = ENXIO;
 522                 goto fail;
 523         }
 524
 525         e1000_get_bus_info(&adapter->hw);
 526
 527         /*
 528          * Validate number of transmit and receive descriptors.  It
 529          * must not exceed hardware maximum, and must be multiple
 530          * of E1000_DBA_ALIGN.
 531          */
 532         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 533             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 534             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 535             em_txd < EM_MIN_TXD) {
 536                 if (adapter->hw.mac.type < e1000_82544)
 537                         adapter->num_tx_desc = EM_MAX_TXD_82543;
 538                 else
 539                         adapter->num_tx_desc = EM_DEFAULT_TXD;
 540                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 541                     adapter->num_tx_desc, em_txd);
 542         } else {
 543                 adapter->num_tx_desc = em_txd;
 544         }
 545         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 546             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 547             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 548             em_rxd < EM_MIN_RXD) {
 549                 if (adapter->hw.mac.type < e1000_82544)
 550                         adapter->num_rx_desc = EM_MAX_RXD_82543;
 551                 else
 552                         adapter->num_rx_desc = EM_DEFAULT_RXD;
 553                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 554                     adapter->num_rx_desc, em_rxd);
 555         } else {
 556                 adapter->num_rx_desc = em_rxd;
 557         }
 558
 559         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 560         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 561         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 562         adapter->rx_buffer_len = MCLBYTES;
 563
 564         /*
 565          * Interrupt throttle rate
 566          */
 567         if (em_int_throttle_ceil == 0) {
 568                 adapter->int_throttle_ceil = 0;
 569         } else {
 570                 int throttle = em_int_throttle_ceil;
 571
 572                 if (throttle < 0)
 573                         throttle = EM_DEFAULT_ITR;
 574
 575                 /* Recalculate the tunable value to get the exact frequency. */
 576                 throttle = 1000000000 / 256 / throttle;
 577
 578                 /* Upper 16bits of ITR is reserved and should be zero */
 579                 if (throttle & 0xffff0000)
 580                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 581
 582                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 583         }
 584
 585         e1000_init_script_state_82541(&adapter->hw, TRUE);
 586         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 587
 588         /* Copper options */
 589         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 590                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 591                 adapter->hw.phy.disable_polarity_correction = FALSE;
 592                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 593         }
 594
 595         /* Set the frame limits assuming standard ethernet sized frames. */
 596         adapter->hw.mac.max_frame_size =
 597             ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 598         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 599
 600         /* This controls when hardware reports transmit completion status. */
 601         adapter->hw.mac.report_tx_early = 1;
 602
 603         /*
 604          * Create top level busdma tag
 605          */
 606         error = bus_dma_tag_create(NULL, 1, 0,
 607                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 608                         NULL, NULL,
 609                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 610                         0, &adapter->parent_dtag);
 611         if (error) {
 612                 device_printf(dev, "could not create top level DMA tag\n");
 613                 goto fail;
 614         }
 615
 616         /*
 617          * Allocate Transmit Descriptor ring
 618          */
 619         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 620                          EM_DBA_ALIGN);
 621         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 622         if (error) {
 623                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 624                 goto fail;
 625         }
 626         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 627
 628         /*
 629          * Allocate Receive Descriptor ring
 630          */
 631         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 632                          EM_DBA_ALIGN);
 633         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 634         if (error) {
 635                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 636                 goto fail;
 637         }
 638         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 639
 640         /* Allocate multicast array memory. */
 641         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 642             M_DEVBUF, M_WAITOK);
 643
 644         /* Indicate SOL/IDER usage */
 645         if (e1000_check_reset_block(&adapter->hw)) {
 646                 device_printf(dev,
 647                     "PHY reset is blocked due to SOL/IDER session.\n");
 648         }
 649
 650         /* Disable EEE */
 651         adapter->hw.dev_spec.ich8lan.eee_disable = 1;
 652
 653         /*
 654          * Start from a known state, this is important in reading the
 655          * nvm and mac from that.
 656          */
 657         e1000_reset_hw(&adapter->hw);
 658
 659         /* Make sure we have a good EEPROM before we read from it */
 660         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 661                 /*
 662                  * Some PCI-E parts fail the first check due to
 663                  * the link being in sleep state, call it again,
 664                  * if it fails a second time its a real issue.
 665                  */
 666                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 667                         device_printf(dev,
 668                             "The EEPROM Checksum Is Not Valid\n");
 669                         error = EIO;
 670                         goto fail;
 671                 }
 672         }
 673
 674         /* Copy the permanent MAC address out of the EEPROM */
 675         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 676                 device_printf(dev, "EEPROM read error while reading MAC"
 677                     " address\n");
 678                 error = EIO;
 679                 goto fail;
 680         }
 681         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 682                 device_printf(dev, "Invalid MAC address\n");
 683                 error = EIO;
 684                 goto fail;
 685         }
 686
 687         /* Disable ULP support */
 688         e1000_disable_ulp_lpt_lp(&adapter->hw, TRUE);
 689
 690         /* Allocate transmit descriptors and buffers */
 691         error = em_create_tx_ring(adapter);
 692         if (error) {
 693                 device_printf(dev, "Could not setup transmit structures\n");
 694                 goto fail;
 695         }
 696
 697         /* Allocate receive descriptors and buffers */
 698         error = em_create_rx_ring(adapter);
 699         if (error) {
 700                 device_printf(dev, "Could not setup receive structures\n");
 701                 goto fail;
 702         }
 703
 704         /* Manually turn off all interrupts */
 705         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 706
 707         /* Determine if we have to control management hardware */
 708         if (e1000_enable_mng_pass_thru(&adapter->hw))
 709                 adapter->flags |= EM_FLAG_HAS_MGMT;
 710
 711         /*
 712          * Setup Wake-on-Lan
 713          */
 714         apme_mask = EM_EEPROM_APME;
 715         eeprom_data = 0;
 716         switch (adapter->hw.mac.type) {
 717         case e1000_82542:
 718         case e1000_82543:
 719                 break;
 720
 721         case e1000_82573:
 722         case e1000_82583:
 723                 adapter->flags |= EM_FLAG_HAS_AMT;
 724                 /* FALL THROUGH */
 725
 726         case e1000_82546:
 727         case e1000_82546_rev_3:
 728         case e1000_82571:
 729         case e1000_82572:
 730         case e1000_80003es2lan:
 731                 if (adapter->hw.bus.func == 1) {
 732                         e1000_read_nvm(&adapter->hw,
 733                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 734                 } else {
 735                         e1000_read_nvm(&adapter->hw,
 736                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 737                 }
 738                 break;
 739
 740         case e1000_ich8lan:
 741         case e1000_ich9lan:
 742         case e1000_ich10lan:
 743         case e1000_pchlan:
 744         case e1000_pch2lan:
 745                 apme_mask = E1000_WUC_APME;
 746                 adapter->flags |= EM_FLAG_HAS_AMT;
 747                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 748                 break;
 749
 750         default:
 751                 e1000_read_nvm(&adapter->hw,
 752                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 753                 break;
 754         }
 755         if (eeprom_data & apme_mask)
 756                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 757
 758         /*
 759          * We have the eeprom settings, now apply the special cases
 760          * where the eeprom may be wrong or the board won't support
 761          * wake on lan on a particular port
 762          */
 763         device_id = pci_get_device(dev);
 764         switch (device_id) {
 765         case E1000_DEV_ID_82546GB_PCIE:
 766                 adapter->wol = 0;
 767                 break;
 768
 769         case E1000_DEV_ID_82546EB_FIBER:
 770         case E1000_DEV_ID_82546GB_FIBER:
 771         case E1000_DEV_ID_82571EB_FIBER:
 772                 /*
 773                  * Wake events only supported on port A for dual fiber
 774                  * regardless of eeprom setting
 775                  */
 776                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 777                     E1000_STATUS_FUNC_1)
 778                         adapter->wol = 0;
 779                 break;
 780
 781         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 782         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 783         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 784         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 785                 /* if quad port adapter, disable WoL on all but port A */
 786                 if (em_global_quad_port_a != 0)
 787                         adapter->wol = 0;
 788                 /* Reset for multiple quad port adapters */
 789                 if (++em_global_quad_port_a == 4)
 790                         em_global_quad_port_a = 0;
 791                 break;
 792         }
 793
 794         /* XXX disable wol */
 795         adapter->wol = 0;
 796
 797         /* Setup flow control. */
 798         device_getenv_string(dev, "flow_ctrl", flowctrl, sizeof(flowctrl),
 799             em_flowctrl);
 800         adapter->flow_ctrl = em_str2fc(flowctrl);
 801         if (adapter->hw.mac.type == e1000_pchlan) {
 802                 /* Only pause reception is supported */
 803                 adapter->flow_ctrl = e1000_fc_rx_pause;
 804         }
 805
 806         /* Setup OS specific network interface */
 807         em_setup_ifp(adapter);
 808
 809         /* Add sysctl tree, must after em_setup_ifp() */
 810         em_add_sysctl(adapter);
 811
 812 #ifdef IFPOLL_ENABLE
 813         /* Polling setup */
 814         ifpoll_compat_setup(&adapter->npoll,
 815             device_get_sysctl_ctx(dev), device_get_sysctl_tree(dev),
 816             device_get_unit(dev), ifp->if_serializer);
 817 #endif
 818
 819         /* Reset the hardware */
 820         error = em_reset(adapter);
 821         if (error) {
 822                 /*
 823                  * Some 82573 parts fail the first reset, call it again,
 824                  * if it fails a second time its a real issue.
 825                  */
 826                 error = em_reset(adapter);
 827                 if (error) {
 828                         device_printf(dev, "Unable to reset the hardware\n");
 829                         ether_ifdetach(ifp);
 830                         goto fail;
 831                 }
 832         }
 833
 834         /* Initialize statistics */
 835         em_update_stats(adapter);
 836
 837         adapter->hw.mac.get_link_status = 1;
 838         em_update_link_status(adapter);
 839
 840         /* Do we need workaround for 82544 PCI-X adapter? */
 841         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 842             adapter->hw.mac.type == e1000_82544)
 843                 adapter->pcix_82544 = TRUE;
 844         else
 845                 adapter->pcix_82544 = FALSE;
 846
 847         if (adapter->pcix_82544) {
 848                 /*
 849                  * 82544 on PCI-X may split one TX segment
 850                  * into two TX descs, so we double its number
 851                  * of spare TX desc here.
 852                  */
 853                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 854         } else {
 855                 adapter->spare_tx_desc = EM_TX_SPARE;
 856         }
 857         if (adapter->flags & EM_FLAG_TSO)
 858                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 859         adapter->tx_wreg_nsegs = EM_DEFAULT_TXWREG;
 860
 861         /*
 862          * Keep following relationship between spare_tx_desc, oact_tx_desc
 863          * and tx_int_nsegs:
 864          * (spare_tx_desc + EM_TX_RESERVED) <=
 865          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 866          */
 867         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 868         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 869                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 870         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 871                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 872
 873         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 874         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 875                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 876
 877         /* Non-AMT based hardware can now take control from firmware */
 878         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 879             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 880                 em_get_hw_control(adapter);
 881
 882         ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
 883
 884         /*
 885          * Missing Interrupt Following ICR read:
 886          *
 887          * 82571/82572 specification update errata #76
 888          * 82573 specification update errata #31
 889          * 82574 specification update errata #12
 890          * 82583 specification update errata #4
 891          */
 892         intr_func = em_intr;
 893         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 894             (adapter->hw.mac.type == e1000_82571 ||
 895              adapter->hw.mac.type == e1000_82572 ||
 896              adapter->hw.mac.type == e1000_82573 ||
 897              adapter->hw.mac.type == e1000_82574 ||
 898              adapter->hw.mac.type == e1000_82583))
 899                 intr_func = em_intr_mask;
 900
 901         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 902                                intr_func, adapter, &adapter->intr_tag,
 903                                ifp->if_serializer);
 904         if (error) {
 905                 device_printf(dev, "Failed to register interrupt handler");
 906                 ether_ifdetach(ifp);
 907                 goto fail;
 908         }
 909         return (0);
 910 fail:
 911         em_detach(dev);
 912         return (error);
 913 }
 914
 915 static int
 916 em_detach(device_t dev)
 917 {
 918         struct adapter *adapter = device_get_softc(dev);
 919
 920         if (device_is_attached(dev)) {
 921                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 922
 923                 lwkt_serialize_enter(ifp->if_serializer);
 924
 925                 em_stop(adapter);
 926
 927                 e1000_phy_hw_reset(&adapter->hw);
 928
 929                 em_rel_mgmt(adapter);
 930                 em_rel_hw_control(adapter);
 931
 932                 if (adapter->wol) {
 933                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 934                                         E1000_WUC_PME_EN);
 935                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 936                         em_enable_wol(dev);
 937                 }
 938
 939                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 940
 941                 lwkt_serialize_exit(ifp->if_serializer);
 942
 943                 ether_ifdetach(ifp);
 944         } else if (adapter->memory != NULL) {
 945                 em_rel_hw_control(adapter);
 946         }
 947
 948         ifmedia_removeall(&adapter->media);
 949         bus_generic_detach(dev);
 950
 951         em_free_pci_res(adapter);
 952
 953         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 954         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 955
 956         /* Free Transmit Descriptor ring */
 957         if (adapter->tx_desc_base)
 958                 em_dma_free(adapter, &adapter->txdma);
 959
 960         /* Free Receive Descriptor ring */
 961         if (adapter->rx_desc_base)
 962                 em_dma_free(adapter, &adapter->rxdma);
 963
 964         /* Free top level busdma tag */
 965         if (adapter->parent_dtag != NULL)
 966                 bus_dma_tag_destroy(adapter->parent_dtag);
 967
 968         if (adapter->mta != NULL)
 969                 kfree(adapter->mta, M_DEVBUF);
 970
 971         return (0);
 972 }
 973
 974 static int
 975 em_shutdown(device_t dev)
 976 {
 977         return em_suspend(dev);
 978 }
 979
 980 static int
 981 em_suspend(device_t dev)
 982 {
 983         struct adapter *adapter = device_get_softc(dev);
 984         struct ifnet *ifp = &adapter->arpcom.ac_if;
 985
 986         lwkt_serialize_enter(ifp->if_serializer);
 987
 988         em_stop(adapter);
 989
 990         em_rel_mgmt(adapter);
 991         em_rel_hw_control(adapter);
 992
 993         if (adapter->wol) {
 994                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 995                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 996                 em_enable_wol(dev);
 997         }
 998
 999         lwkt_serialize_exit(ifp->if_serializer);
1000
1001         return bus_generic_suspend(dev);
1002 }
1003
1004 static int
1005 em_resume(device_t dev)
1006 {
1007         struct adapter *adapter = device_get_softc(dev);
1008         struct ifnet *ifp = &adapter->arpcom.ac_if;
1009
1010         lwkt_serialize_enter(ifp->if_serializer);
1011
1012         if (adapter->hw.mac.type == e1000_pch2lan)
1013                 e1000_resume_workarounds_pchlan(&adapter->hw);
1014
1015         em_init(adapter);
1016         em_get_mgmt(adapter);
1017         if_devstart(ifp);
1018
1019         lwkt_serialize_exit(ifp->if_serializer);
1020
1021         return bus_generic_resume(dev);
1022 }
1023
1024 static void
1025 em_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
1026 {
1027         struct adapter *adapter = ifp->if_softc;
1028         struct mbuf *m_head;
1029         int idx = -1, nsegs = 0;
1030
1031         ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1032         ASSERT_SERIALIZED(ifp->if_serializer);
1033
1034         if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
1035                 return;
1036
1037         if (!adapter->link_active) {
1038                 ifq_purge(&ifp->if_snd);
1039                 return;
1040         }
1041
1042         while (!ifq_is_empty(&ifp->if_snd)) {
1043                 /* Now do we at least have a minimal? */
1044                 if (EM_IS_OACTIVE(adapter)) {
1045                         em_tx_collect(adapter);
1046                         if (EM_IS_OACTIVE(adapter)) {
1047                                 ifq_set_oactive(&ifp->if_snd);
1048                                 adapter->no_tx_desc_avail1++;
1049                                 break;
1050                         }
1051                 }
1052
1053                 logif(pkt_txqueue);
1054                 m_head = ifq_dequeue(&ifp->if_snd);
1055                 if (m_head == NULL)
1056                         break;
1057
1058                 if (em_encap(adapter, &m_head, &nsegs, &idx)) {
1059                         IFNET_STAT_INC(ifp, oerrors, 1);
1060                         em_tx_collect(adapter);
1061                         continue;
1062                 }
1063
1064                 /*
1065                  * TX interrupt are aggressively aggregated, so increasing
1066                  * opackets at TX interrupt time will make the opackets
1067                  * statistics vastly inaccurate; we do the opackets increment
1068                  * now.
1069                  */
1070                 IFNET_STAT_INC(ifp, opackets, 1);
1071
1072                 if (nsegs >= adapter->tx_wreg_nsegs && idx >= 0) {
1073                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1074                         nsegs = 0;
1075                         idx = -1;
1076                 }
1077
1078                 /* Send a copy of the frame to the BPF listener */
1079                 ETHER_BPF_MTAP(ifp, m_head);
1080
1081                 /* Set timeout in case hardware has problems transmitting. */
1082                 ifp->if_timer = EM_TX_TIMEOUT;
1083         }
1084         if (idx >= 0)
1085                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1086 }
1087
1088 static int
1089 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1090 {
1091         struct adapter *adapter = ifp->if_softc;
1092         struct ifreq *ifr = (struct ifreq *)data;
1093         uint16_t eeprom_data = 0;
1094         int max_frame_size, mask, reinit;
1095         int error = 0;
1096
1097         ASSERT_SERIALIZED(ifp->if_serializer);
1098
1099         switch (command) {
1100         case SIOCSIFMTU:
1101                 switch (adapter->hw.mac.type) {
1102                 case e1000_82573:
1103                         /*
1104                          * 82573 only supports jumbo frames
1105                          * if ASPM is disabled.
1106                          */
1107                         e1000_read_nvm(&adapter->hw,
1108                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1109                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1110                                 max_frame_size = ETHER_MAX_LEN;
1111                                 break;
1112                         }
1113                         /* FALL THROUGH */
1114
1115                 /* Limit Jumbo Frame size */
1116                 case e1000_82571:
1117                 case e1000_82572:
1118                 case e1000_ich9lan:
1119                 case e1000_ich10lan:
1120                 case e1000_pch2lan:
1121                 case e1000_pch_lpt:
1122                 case e1000_82574:
1123                 case e1000_82583:
1124                 case e1000_80003es2lan:
1125                         max_frame_size = 9234;
1126                         break;
1127
1128                 case e1000_pchlan:
1129                         max_frame_size = 4096;
1130                         break;
1131
1132                 /* Adapters that do not support jumbo frames */
1133                 case e1000_82542:
1134                 case e1000_ich8lan:
1135                         max_frame_size = ETHER_MAX_LEN;
1136                         break;
1137
1138                 default:
1139                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1140                         break;
1141                 }
1142                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1143                     ETHER_CRC_LEN) {
1144                         error = EINVAL;
1145                         break;
1146                 }
1147
1148                 ifp->if_mtu = ifr->ifr_mtu;
1149                 adapter->hw.mac.max_frame_size =
1150                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1151
1152                 if (ifp->if_flags & IFF_RUNNING)
1153                         em_init(adapter);
1154                 break;
1155
1156         case SIOCSIFFLAGS:
1157                 if (ifp->if_flags & IFF_UP) {
1158                         if ((ifp->if_flags & IFF_RUNNING)) {
1159                                 if ((ifp->if_flags ^ adapter->if_flags) &
1160                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1161                                         em_disable_promisc(adapter);
1162                                         em_set_promisc(adapter);
1163                                 }
1164                         } else {
1165                                 em_init(adapter);
1166                         }
1167                 } else if (ifp->if_flags & IFF_RUNNING) {
1168                         em_stop(adapter);
1169                 }
1170                 adapter->if_flags = ifp->if_flags;
1171                 break;
1172
1173         case SIOCADDMULTI:
1174         case SIOCDELMULTI:
1175                 if (ifp->if_flags & IFF_RUNNING) {
1176                         em_disable_intr(adapter);
1177                         em_set_multi(adapter);
1178                         if (adapter->hw.mac.type == e1000_82542 &&
1179                             adapter->hw.revision_id == E1000_REVISION_2)
1180                                 em_init_rx_unit(adapter);
1181 #ifdef IFPOLL_ENABLE
1182                         if (!(ifp->if_flags & IFF_NPOLLING))
1183 #endif
1184                                 em_enable_intr(adapter);
1185                 }
1186                 break;
1187
1188         case SIOCSIFMEDIA:
1189                 /* Check SOL/IDER usage */
1190                 if (e1000_check_reset_block(&adapter->hw)) {
1191                         device_printf(adapter->dev, "Media change is"
1192                             " blocked due to SOL/IDER session.\n");
1193                         break;
1194                 }
1195                 /* FALL THROUGH */
1196
1197         case SIOCGIFMEDIA:
1198                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1199                 break;
1200
1201         case SIOCSIFCAP:
1202                 reinit = 0;
1203                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1204                 if (mask & IFCAP_RXCSUM) {
1205                         ifp->if_capenable ^= IFCAP_RXCSUM;
1206                         reinit = 1;
1207                 }
1208                 if (mask & IFCAP_TXCSUM) {
1209                         ifp->if_capenable ^= IFCAP_TXCSUM;
1210                         if (ifp->if_capenable & IFCAP_TXCSUM)
1211                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1212                         else
1213                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1214                 }
1215                 if (mask & IFCAP_TSO) {
1216                         ifp->if_capenable ^= IFCAP_TSO;
1217                         if (ifp->if_capenable & IFCAP_TSO)
1218                                 ifp->if_hwassist |= CSUM_TSO;
1219                         else
1220                                 ifp->if_hwassist &= ~CSUM_TSO;
1221                 }
1222                 if (mask & IFCAP_VLAN_HWTAGGING) {
1223                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1224                         reinit = 1;
1225                 }
1226                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1227                         em_init(adapter);
1228                 break;
1229
1230         default:
1231                 error = ether_ioctl(ifp, command, data);
1232                 break;
1233         }
1234         return (error);
1235 }
1236
1237 static void
1238 em_watchdog(struct ifnet *ifp)
1239 {
1240         struct adapter *adapter = ifp->if_softc;
1241
1242         ASSERT_SERIALIZED(ifp->if_serializer);
1243
1244         /*
1245          * The timer is set to 5 every time start queues a packet.
1246          * Then txeof keeps resetting it as long as it cleans at
1247          * least one descriptor.
1248          * Finally, anytime all descriptors are clean the timer is
1249          * set to 0.
1250          */
1251
1252         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1253             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1254                 /*
1255                  * If we reach here, all TX jobs are completed and
1256                  * the TX engine should have been idled for some time.
1257                  * We don't need to call if_devstart() here.
1258                  */
1259                 ifq_clr_oactive(&ifp->if_snd);
1260                 ifp->if_timer = 0;
1261                 return;
1262         }
1263
1264         /*
1265          * If we are in this routine because of pause frames, then
1266          * don't reset the hardware.
1267          */
1268         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1269             E1000_STATUS_TXOFF) {
1270                 ifp->if_timer = EM_TX_TIMEOUT;
1271                 return;
1272         }
1273
1274         if (e1000_check_for_link(&adapter->hw) == 0)
1275                 if_printf(ifp, "watchdog timeout -- resetting\n");
1276
1277         IFNET_STAT_INC(ifp, oerrors, 1);
1278         adapter->watchdog_events++;
1279
1280         em_init(adapter);
1281
1282         if (!ifq_is_empty(&ifp->if_snd))
1283                 if_devstart(ifp);
1284 }
1285
1286 static void
1287 em_init(void *xsc)
1288 {
1289         struct adapter *adapter = xsc;
1290         struct ifnet *ifp = &adapter->arpcom.ac_if;
1291         device_t dev = adapter->dev;
1292
1293         ASSERT_SERIALIZED(ifp->if_serializer);
1294
1295         em_stop(adapter);
1296
1297         /* Get the latest mac address, User can use a LAA */
1298         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1299
1300         /* Put the address into the Receive Address Array */
1301         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1302
1303         /*
1304          * With the 82571 adapter, RAR[0] may be overwritten
1305          * when the other port is reset, we make a duplicate
1306          * in RAR[14] for that eventuality, this assures
1307          * the interface continues to function.
1308          */
1309         if (adapter->hw.mac.type == e1000_82571) {
1310                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1311                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1312                     E1000_RAR_ENTRIES - 1);
1313         }
1314
1315         /* Reset the hardware */
1316         if (em_reset(adapter)) {
1317                 device_printf(dev, "Unable to reset the hardware\n");
1318                 /* XXX em_stop()? */
1319                 return;
1320         }
1321         em_update_link_status(adapter);
1322
1323         /* Setup VLAN support, basic and offload if available */
1324         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1325
1326         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1327                 uint32_t ctrl;
1328
1329                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1330                 ctrl |= E1000_CTRL_VME;
1331                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1332         }
1333
1334         /* Configure for OS presence */
1335         em_get_mgmt(adapter);
1336
1337         /* Prepare transmit descriptors and buffers */
1338         em_init_tx_ring(adapter);
1339         em_init_tx_unit(adapter);
1340
1341         /* Setup Multicast table */
1342         em_set_multi(adapter);
1343
1344         /* Prepare receive descriptors and buffers */
1345         if (em_init_rx_ring(adapter)) {
1346                 device_printf(dev, "Could not setup receive structures\n");
1347                 em_stop(adapter);
1348                 return;
1349         }
1350         em_init_rx_unit(adapter);
1351
1352         /* Don't lose promiscuous settings */
1353         em_set_promisc(adapter);
1354
1355         ifp->if_flags |= IFF_RUNNING;
1356         ifq_clr_oactive(&ifp->if_snd);
1357
1358         callout_reset(&adapter->timer, hz, em_timer, adapter);
1359         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1360
1361         /* MSI/X configuration for 82574 */
1362         if (adapter->hw.mac.type == e1000_82574) {
1363                 int tmp;
1364
1365                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1366                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1367                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1368                 /*
1369                  * XXX MSIX
1370                  * Set the IVAR - interrupt vector routing.
1371                  * Each nibble represents a vector, high bit
1372                  * is enable, other 3 bits are the MSIX table
1373                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1374                  * Link (other) to 2, hence the magic number.
1375                  */
1376                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1377         }
1378
1379 #ifdef IFPOLL_ENABLE
1380         /*
1381          * Only enable interrupts if we are not polling, make sure
1382          * they are off otherwise.
1383          */
1384         if (ifp->if_flags & IFF_NPOLLING)
1385                 em_disable_intr(adapter);
1386         else
1387 #endif /* IFPOLL_ENABLE */
1388                 em_enable_intr(adapter);
1389
1390         /* AMT based hardware can now take control from firmware */
1391         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1392             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1393             adapter->hw.mac.type >= e1000_82571)
1394                 em_get_hw_control(adapter);
1395 }
1396
1397 #ifdef IFPOLL_ENABLE
1398
1399 static void
1400 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1401 {
1402         struct adapter *adapter = ifp->if_softc;
1403
1404         ASSERT_SERIALIZED(ifp->if_serializer);
1405
1406         if (adapter->npoll.ifpc_stcount-- == 0) {
1407                 uint32_t reg_icr;
1408
1409                 adapter->npoll.ifpc_stcount = adapter->npoll.ifpc_stfrac;
1410
1411                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1412                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1413                         callout_stop(&adapter->timer);
1414                         adapter->hw.mac.get_link_status = 1;
1415                         em_update_link_status(adapter);
1416                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1417                 }
1418         }
1419
1420         em_rxeof(adapter, count);
1421         em_txeof(adapter);
1422
1423         if (!ifq_is_empty(&ifp->if_snd))
1424                 if_devstart(ifp);
1425 }
1426
1427 static void
1428 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1429 {
1430         struct adapter *adapter = ifp->if_softc;
1431
1432         ASSERT_SERIALIZED(ifp->if_serializer);
1433
1434         if (info != NULL) {
1435                 int cpuid = adapter->npoll.ifpc_cpuid;
1436
1437                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1438                 info->ifpi_rx[cpuid].arg = NULL;
1439                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1440
1441                 if (ifp->if_flags & IFF_RUNNING)
1442                         em_disable_intr(adapter);
1443                 ifq_set_cpuid(&ifp->if_snd, cpuid);
1444         } else {
1445                 if (ifp->if_flags & IFF_RUNNING)
1446                         em_enable_intr(adapter);
1447                 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
1448         }
1449 }
1450
1451 #endif /* IFPOLL_ENABLE */
1452
1453 static void
1454 em_intr(void *xsc)
1455 {
1456         em_intr_body(xsc, TRUE);
1457 }
1458
1459 static void
1460 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1461 {
1462         struct ifnet *ifp = &adapter->arpcom.ac_if;
1463         uint32_t reg_icr;
1464
1465         logif(intr_beg);
1466         ASSERT_SERIALIZED(ifp->if_serializer);
1467
1468         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1469
1470         if (chk_asserted &&
1471             ((adapter->hw.mac.type >= e1000_82571 &&
1472               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1473              reg_icr == 0)) {
1474                 logif(intr_end);
1475                 return;
1476         }
1477
1478         /*
1479          * XXX: some laptops trigger several spurious interrupts
1480          * on em(4) when in the resume cycle. The ICR register
1481          * reports all-ones value in this case. Processing such
1482          * interrupts would lead to a freeze. I don't know why.
1483          */
1484         if (reg_icr == 0xffffffff) {
1485                 logif(intr_end);
1486                 return;
1487         }
1488
1489         if (ifp->if_flags & IFF_RUNNING) {
1490                 if (reg_icr &
1491                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1492                         em_rxeof(adapter, -1);
1493                 if (reg_icr & E1000_ICR_TXDW) {
1494                         em_txeof(adapter);
1495                         if (!ifq_is_empty(&ifp->if_snd))
1496                                 if_devstart(ifp);
1497                 }
1498         }
1499
1500         /* Link status change */
1501         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1502                 callout_stop(&adapter->timer);
1503                 adapter->hw.mac.get_link_status = 1;
1504                 em_update_link_status(adapter);
1505
1506                 /* Deal with TX cruft when link lost */
1507                 em_tx_purge(adapter);
1508
1509                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1510         }
1511
1512         if (reg_icr & E1000_ICR_RXO)
1513                 adapter->rx_overruns++;
1514
1515         logif(intr_end);
1516 }
1517
1518 static void
1519 em_intr_mask(void *xsc)
1520 {
1521         struct adapter *adapter = xsc;
1522
1523         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1524         /*
1525          * NOTE:
1526          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1527          * so don't check it.
1528          */
1529         em_intr_body(adapter, FALSE);
1530         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1531 }
1532
1533 static void
1534 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1535 {
1536         struct adapter *adapter = ifp->if_softc;
1537         u_char fiber_type = IFM_1000_SX;
1538
1539         ASSERT_SERIALIZED(ifp->if_serializer);
1540
1541         em_update_link_status(adapter);
1542
1543         ifmr->ifm_status = IFM_AVALID;
1544         ifmr->ifm_active = IFM_ETHER;
1545
1546         if (!adapter->link_active)
1547                 return;
1548
1549         ifmr->ifm_status |= IFM_ACTIVE;
1550
1551         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1552             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1553                 if (adapter->hw.mac.type == e1000_82545)
1554                         fiber_type = IFM_1000_LX;
1555                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1556         } else {
1557                 switch (adapter->link_speed) {
1558                 case 10:
1559                         ifmr->ifm_active |= IFM_10_T;
1560                         break;
1561                 case 100:
1562                         ifmr->ifm_active |= IFM_100_TX;
1563                         break;
1564
1565                 case 1000:
1566                         ifmr->ifm_active |= IFM_1000_T;
1567                         break;
1568                 }
1569                 if (adapter->link_duplex == FULL_DUPLEX)
1570                         ifmr->ifm_active |= IFM_FDX;
1571                 else
1572                         ifmr->ifm_active |= IFM_HDX;
1573         }
1574 }
1575
1576 static int
1577 em_media_change(struct ifnet *ifp)
1578 {
1579         struct adapter *adapter = ifp->if_softc;
1580         struct ifmedia *ifm = &adapter->media;
1581
1582         ASSERT_SERIALIZED(ifp->if_serializer);
1583
1584         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1585                 return (EINVAL);
1586
1587         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1588         case IFM_AUTO:
1589                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1590                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1591                 break;
1592
1593         case IFM_1000_LX:
1594         case IFM_1000_SX:
1595         case IFM_1000_T:
1596                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1597                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1598                 break;
1599
1600         case IFM_100_TX:
1601                 adapter->hw.mac.autoneg = FALSE;
1602                 adapter->hw.phy.autoneg_advertised = 0;
1603                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1604                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1605                 else
1606                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1607                 break;
1608
1609         case IFM_10_T:
1610                 adapter->hw.mac.autoneg = FALSE;
1611                 adapter->hw.phy.autoneg_advertised = 0;
1612                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1613                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1614                 else
1615                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1616                 break;
1617
1618         default:
1619                 if_printf(ifp, "Unsupported media type\n");
1620                 break;
1621         }
1622
1623         em_init(adapter);
1624
1625         return (0);
1626 }
1627
1628 static int
1629 em_encap(struct adapter *adapter, struct mbuf **m_headp,
1630     int *segs_used, int *idx)
1631 {
1632         bus_dma_segment_t segs[EM_MAX_SCATTER];
1633         bus_dmamap_t map;
1634         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1635         struct e1000_tx_desc *ctxd = NULL;
1636         struct mbuf *m_head = *m_headp;
1637         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1638         int maxsegs, nsegs, i, j, first, last = 0, error;
1639
1640         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1641                 error = em_tso_pullup(adapter, m_headp);
1642                 if (error)
1643                         return error;
1644                 m_head = *m_headp;
1645         }
1646
1647         txd_upper = txd_lower = 0;
1648         txd_used = 0;
1649
1650         /*
1651          * Capture the first descriptor index, this descriptor
1652          * will have the index of the EOP which is the only one
1653          * that now gets a DONE bit writeback.
1654          */
1655         first = adapter->next_avail_tx_desc;
1656         tx_buffer = &adapter->tx_buffer_area[first];
1657         tx_buffer_mapped = tx_buffer;
1658         map = tx_buffer->map;
1659
1660         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1661         KASSERT(maxsegs >= adapter->spare_tx_desc,
1662                 ("not enough spare TX desc"));
1663         if (adapter->pcix_82544) {
1664                 /* Half it; see the comment in em_attach() */
1665                 maxsegs >>= 1;
1666         }
1667         if (maxsegs > EM_MAX_SCATTER)
1668                 maxsegs = EM_MAX_SCATTER;
1669
1670         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1671                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1672         if (error) {
1673                 if (error == ENOBUFS)
1674                         adapter->mbuf_alloc_failed++;
1675                 else
1676                         adapter->no_tx_dma_setup++;
1677
1678                 m_freem(*m_headp);
1679                 *m_headp = NULL;
1680                 return error;
1681         }
1682         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1683
1684         m_head = *m_headp;
1685         adapter->tx_nsegs += nsegs;
1686         *segs_used += nsegs;
1687
1688         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1689                 /* TSO will consume one TX desc */
1690                 i = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower);
1691                 adapter->tx_nsegs += i;
1692                 *segs_used += i;
1693         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1694                 /* TX csum offloading will consume one TX desc */
1695                 i = em_txcsum(adapter, m_head, &txd_upper, &txd_lower);
1696                 adapter->tx_nsegs += i;
1697                 *segs_used += i;
1698         }
1699
1700         /* Handle VLAN tag */
1701         if (m_head->m_flags & M_VLANTAG) {
1702                 /* Set the vlan id. */
1703                 txd_upper |= (htole16(m_head->m_pkthdr.ether_vlantag) << 16);
1704                 /* Tell hardware to add tag */
1705                 txd_lower |= htole32(E1000_TXD_CMD_VLE);
1706         }
1707
1708         i = adapter->next_avail_tx_desc;
1709
1710         /* Set up our transmit descriptors */
1711         for (j = 0; j < nsegs; j++) {
1712                 /* If adapter is 82544 and on PCIX bus */
1713                 if(adapter->pcix_82544) {
1714                         DESC_ARRAY desc_array;
1715                         uint32_t array_elements, counter;
1716
1717                         /*
1718                          * Check the Address and Length combination and
1719                          * split the data accordingly
1720                          */
1721                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1722                                                 segs[j].ds_len, &desc_array);
1723                         for (counter = 0; counter < array_elements; counter++) {
1724                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1725
1726                                 tx_buffer = &adapter->tx_buffer_area[i];
1727                                 ctxd = &adapter->tx_desc_base[i];
1728
1729                                 ctxd->buffer_addr = htole64(
1730                                     desc_array.descriptor[counter].address);
1731                                 ctxd->lower.data = htole32(
1732                                     E1000_TXD_CMD_IFCS | txd_lower |
1733                                     desc_array.descriptor[counter].length);
1734                                 ctxd->upper.data = htole32(txd_upper);
1735
1736                                 last = i;
1737                                 if (++i == adapter->num_tx_desc)
1738                                         i = 0;
1739
1740                                 txd_used++;
1741                         }
1742                 } else {
1743                         tx_buffer = &adapter->tx_buffer_area[i];
1744                         ctxd = &adapter->tx_desc_base[i];
1745
1746                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1747                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1748                                                    txd_lower | segs[j].ds_len);
1749                         ctxd->upper.data = htole32(txd_upper);
1750
1751                         last = i;
1752                         if (++i == adapter->num_tx_desc)
1753                                 i = 0;
1754                 }
1755         }
1756
1757         adapter->next_avail_tx_desc = i;
1758         if (adapter->pcix_82544) {
1759                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1760                 adapter->num_tx_desc_avail -= txd_used;
1761         } else {
1762                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1763                 adapter->num_tx_desc_avail -= nsegs;
1764         }
1765
1766         tx_buffer->m_head = m_head;
1767         tx_buffer_mapped->map = tx_buffer->map;
1768         tx_buffer->map = map;
1769
1770         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1771                 adapter->tx_nsegs = 0;
1772
1773                 /*
1774                  * Report Status (RS) is turned on
1775                  * every tx_int_nsegs descriptors.
1776                  */
1777                 cmd = E1000_TXD_CMD_RS;
1778
1779                 /*
1780                  * Keep track of the descriptor, which will
1781                  * be written back by hardware.
1782                  */
1783                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1784                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1785                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1786         }
1787
1788         /*
1789          * Last Descriptor of Packet needs End Of Packet (EOP)
1790          */
1791         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1792
1793         if (adapter->hw.mac.type == e1000_82547) {
1794                 /*
1795                  * Advance the Transmit Descriptor Tail (TDT), this tells the
1796                  * E1000 that this frame is available to transmit.
1797                  */
1798                 if (adapter->link_duplex == HALF_DUPLEX) {
1799                         em_82547_move_tail_serialized(adapter);
1800                 } else {
1801                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1802                         em_82547_update_fifo_head(adapter,
1803                             m_head->m_pkthdr.len);
1804                 }
1805         } else {
1806                 /*
1807                  * Defer TDT updating, until enough descriptors are setup
1808                  */
1809                 *idx = i;
1810         }
1811         return (0);
1812 }
1813
1814 /*
1815  * 82547 workaround to avoid controller hang in half-duplex environment.
1816  * The workaround is to avoid queuing a large packet that would span
1817  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1818  * in this case.  We do that only when FIFO is quiescent.
1819  */
1820 static void
1821 em_82547_move_tail_serialized(struct adapter *adapter)
1822 {
1823         struct e1000_tx_desc *tx_desc;
1824         uint16_t hw_tdt, sw_tdt, length = 0;
1825         bool eop = 0;
1826
1827         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1828
1829         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1830         sw_tdt = adapter->next_avail_tx_desc;
1831
1832         while (hw_tdt != sw_tdt) {
1833                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1834                 length += tx_desc->lower.flags.length;
1835                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1836                 if (++hw_tdt == adapter->num_tx_desc)
1837                         hw_tdt = 0;
1838
1839                 if (eop) {
1840                         if (em_82547_fifo_workaround(adapter, length)) {
1841                                 adapter->tx_fifo_wrk_cnt++;
1842                                 callout_reset(&adapter->tx_fifo_timer, 1,
1843                                         em_82547_move_tail, adapter);
1844                                 break;
1845                         }
1846                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1847                         em_82547_update_fifo_head(adapter, length);
1848                         length = 0;
1849                 }
1850         }
1851 }
1852
1853 static void
1854 em_82547_move_tail(void *xsc)
1855 {
1856         struct adapter *adapter = xsc;
1857         struct ifnet *ifp = &adapter->arpcom.ac_if;
1858
1859         lwkt_serialize_enter(ifp->if_serializer);
1860         em_82547_move_tail_serialized(adapter);
1861         lwkt_serialize_exit(ifp->if_serializer);
1862 }
1863
1864 static int
1865 em_82547_fifo_workaround(struct adapter *adapter, int len)
1866 {
1867         int fifo_space, fifo_pkt_len;
1868
1869         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1870
1871         if (adapter->link_duplex == HALF_DUPLEX) {
1872                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1873
1874                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1875                         if (em_82547_tx_fifo_reset(adapter))
1876                                 return (0);
1877                         else
1878                                 return (1);
1879                 }
1880         }
1881         return (0);
1882 }
1883
1884 static void
1885 em_82547_update_fifo_head(struct adapter *adapter, int len)
1886 {
1887         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1888
1889         /* tx_fifo_head is always 16 byte aligned */
1890         adapter->tx_fifo_head += fifo_pkt_len;
1891         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1892                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1893 }
1894
1895 static int
1896 em_82547_tx_fifo_reset(struct adapter *adapter)
1897 {
1898         uint32_t tctl;
1899
1900         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1901              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1902             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1903              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1904             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1905              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1906             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1907                 /* Disable TX unit */
1908                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1909                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1910                     tctl & ~E1000_TCTL_EN);
1911
1912                 /* Reset FIFO pointers */
1913                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1914                     adapter->tx_head_addr);
1915                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1916                     adapter->tx_head_addr);
1917                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1918                     adapter->tx_head_addr);
1919                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1920                     adapter->tx_head_addr);
1921
1922                 /* Re-enable TX unit */
1923                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1924                 E1000_WRITE_FLUSH(&adapter->hw);
1925
1926                 adapter->tx_fifo_head = 0;
1927                 adapter->tx_fifo_reset_cnt++;
1928
1929                 return (TRUE);
1930         } else {
1931                 return (FALSE);
1932         }
1933 }
1934
1935 static void
1936 em_set_promisc(struct adapter *adapter)
1937 {
1938         struct ifnet *ifp = &adapter->arpcom.ac_if;
1939         uint32_t reg_rctl;
1940
1941         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1942
1943         if (ifp->if_flags & IFF_PROMISC) {
1944                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1945                 /* Turn this on if you want to see bad packets */
1946                 if (em_debug_sbp)
1947                         reg_rctl |= E1000_RCTL_SBP;
1948                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1949         } else if (ifp->if_flags & IFF_ALLMULTI) {
1950                 reg_rctl |= E1000_RCTL_MPE;
1951                 reg_rctl &= ~E1000_RCTL_UPE;
1952                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1953         }
1954 }
1955
1956 static void
1957 em_disable_promisc(struct adapter *adapter)
1958 {
1959         uint32_t reg_rctl;
1960
1961         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1962
1963         reg_rctl &= ~E1000_RCTL_UPE;
1964         reg_rctl &= ~E1000_RCTL_MPE;
1965         reg_rctl &= ~E1000_RCTL_SBP;
1966         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1967 }
1968
1969 static void
1970 em_set_multi(struct adapter *adapter)
1971 {
1972         struct ifnet *ifp = &adapter->arpcom.ac_if;
1973         struct ifmultiaddr *ifma;
1974         uint32_t reg_rctl = 0;
1975         uint8_t *mta;
1976         int mcnt = 0;
1977
1978         mta = adapter->mta;
1979         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1980
1981         if (adapter->hw.mac.type == e1000_82542 &&
1982             adapter->hw.revision_id == E1000_REVISION_2) {
1983                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1984                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1985                         e1000_pci_clear_mwi(&adapter->hw);
1986                 reg_rctl |= E1000_RCTL_RST;
1987                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1988                 msec_delay(5);
1989         }
1990
1991         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1992                 if (ifma->ifma_addr->sa_family != AF_LINK)
1993                         continue;
1994
1995                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1996                         break;
1997
1998                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1999                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
2000                 mcnt++;
2001         }
2002
2003         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
2004                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2005                 reg_rctl |= E1000_RCTL_MPE;
2006                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2007         } else {
2008                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
2009         }
2010
2011         if (adapter->hw.mac.type == e1000_82542 &&
2012             adapter->hw.revision_id == E1000_REVISION_2) {
2013                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2014                 reg_rctl &= ~E1000_RCTL_RST;
2015                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2016                 msec_delay(5);
2017                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2018                         e1000_pci_set_mwi(&adapter->hw);
2019         }
2020 }
2021
2022 /*
2023  * This routine checks for link status and updates statistics.
2024  */
2025 static void
2026 em_timer(void *xsc)
2027 {
2028         struct adapter *adapter = xsc;
2029         struct ifnet *ifp = &adapter->arpcom.ac_if;
2030
2031         lwkt_serialize_enter(ifp->if_serializer);
2032
2033         em_update_link_status(adapter);
2034         em_update_stats(adapter);
2035
2036         /* Reset LAA into RAR[0] on 82571 */
2037         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
2038                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2039
2040         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
2041                 em_print_hw_stats(adapter);
2042
2043         em_smartspeed(adapter);
2044
2045         callout_reset(&adapter->timer, hz, em_timer, adapter);
2046
2047         lwkt_serialize_exit(ifp->if_serializer);
2048 }
2049
2050 static void
2051 em_update_link_status(struct adapter *adapter)
2052 {
2053         struct e1000_hw *hw = &adapter->hw;
2054         struct ifnet *ifp = &adapter->arpcom.ac_if;
2055         device_t dev = adapter->dev;
2056         uint32_t link_check = 0;
2057
2058         /* Get the cached link value or read phy for real */
2059         switch (hw->phy.media_type) {
2060         case e1000_media_type_copper:
2061                 if (hw->mac.get_link_status) {
2062                         /* Do the work to read phy */
2063                         e1000_check_for_link(hw);
2064                         link_check = !hw->mac.get_link_status;
2065                         if (link_check) /* ESB2 fix */
2066                                 e1000_cfg_on_link_up(hw);
2067                 } else {
2068                         link_check = TRUE;
2069                 }
2070                 break;
2071
2072         case e1000_media_type_fiber:
2073                 e1000_check_for_link(hw);
2074                 link_check =
2075                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2076                 break;
2077
2078         case e1000_media_type_internal_serdes:
2079                 e1000_check_for_link(hw);
2080                 link_check = adapter->hw.mac.serdes_has_link;
2081                 break;
2082
2083         case e1000_media_type_unknown:
2084         default:
2085                 break;
2086         }
2087
2088         /* Now check for a transition */
2089         if (link_check && adapter->link_active == 0) {
2090                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2091                     &adapter->link_duplex);
2092
2093                 /*
2094                  * Check if we should enable/disable SPEED_MODE bit on
2095                  * 82571/82572
2096                  */
2097                 if (adapter->link_speed != SPEED_1000 &&
2098                     (hw->mac.type == e1000_82571 ||
2099                      hw->mac.type == e1000_82572)) {
2100                         int tarc0;
2101
2102                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2103                         tarc0 &= ~SPEED_MODE_BIT;
2104                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2105                 }
2106                 if (bootverbose) {
2107                         device_printf(dev, "Link is up %d Mbps %s\n",
2108                             adapter->link_speed,
2109                             ((adapter->link_duplex == FULL_DUPLEX) ?
2110                             "Full Duplex" : "Half Duplex"));
2111                 }
2112                 adapter->link_active = 1;
2113                 adapter->smartspeed = 0;
2114                 ifp->if_baudrate = adapter->link_speed * 1000000;
2115                 ifp->if_link_state = LINK_STATE_UP;
2116                 if_link_state_change(ifp);
2117         } else if (!link_check && adapter->link_active == 1) {
2118                 ifp->if_baudrate = adapter->link_speed = 0;
2119                 adapter->link_duplex = 0;
2120                 if (bootverbose)
2121                         device_printf(dev, "Link is Down\n");
2122                 adapter->link_active = 0;
2123 #if 0
2124                 /* Link down, disable watchdog */
2125                 if->if_timer = 0;
2126 #endif
2127                 ifp->if_link_state = LINK_STATE_DOWN;
2128                 if_link_state_change(ifp);
2129         }
2130 }
2131
2132 static void
2133 em_stop(struct adapter *adapter)
2134 {
2135         struct ifnet *ifp = &adapter->arpcom.ac_if;
2136         int i;
2137
2138         ASSERT_SERIALIZED(ifp->if_serializer);
2139
2140         em_disable_intr(adapter);
2141
2142         callout_stop(&adapter->timer);
2143         callout_stop(&adapter->tx_fifo_timer);
2144
2145         ifp->if_flags &= ~IFF_RUNNING;
2146         ifq_clr_oactive(&ifp->if_snd);
2147         ifp->if_timer = 0;
2148
2149         e1000_reset_hw(&adapter->hw);
2150         if (adapter->hw.mac.type >= e1000_82544)
2151                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2152
2153         for (i = 0; i < adapter->num_tx_desc; i++) {
2154                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2155
2156                 if (tx_buffer->m_head != NULL) {
2157                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2158                         m_freem(tx_buffer->m_head);
2159                         tx_buffer->m_head = NULL;
2160                 }
2161         }
2162
2163         for (i = 0; i < adapter->num_rx_desc; i++) {
2164                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2165
2166                 if (rx_buffer->m_head != NULL) {
2167                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2168                         m_freem(rx_buffer->m_head);
2169                         rx_buffer->m_head = NULL;
2170                 }
2171         }
2172
2173         if (adapter->fmp != NULL)
2174                 m_freem(adapter->fmp);
2175         adapter->fmp = NULL;
2176         adapter->lmp = NULL;
2177
2178         adapter->csum_flags = 0;
2179         adapter->csum_lhlen = 0;
2180         adapter->csum_iphlen = 0;
2181         adapter->csum_thlen = 0;
2182         adapter->csum_mss = 0;
2183         adapter->csum_pktlen = 0;
2184
2185         adapter->tx_dd_head = 0;
2186         adapter->tx_dd_tail = 0;
2187         adapter->tx_nsegs = 0;
2188 }
2189
2190 static int
2191 em_get_hw_info(struct adapter *adapter)
2192 {
2193         device_t dev = adapter->dev;
2194
2195         /* Save off the information about this board */
2196         adapter->hw.vendor_id = pci_get_vendor(dev);
2197         adapter->hw.device_id = pci_get_device(dev);
2198         adapter->hw.revision_id = pci_get_revid(dev);
2199         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2200         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2201
2202         /* Do Shared Code Init and Setup */
2203         if (e1000_set_mac_type(&adapter->hw))
2204                 return ENXIO;
2205         return 0;
2206 }
2207
2208 static int
2209 em_alloc_pci_res(struct adapter *adapter)
2210 {
2211         device_t dev = adapter->dev;
2212         u_int intr_flags;
2213         int val, rid, msi_enable;
2214
2215         /* Enable bus mastering */
2216         pci_enable_busmaster(dev);
2217
2218         adapter->memory_rid = EM_BAR_MEM;
2219         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2220                                 &adapter->memory_rid, RF_ACTIVE);
2221         if (adapter->memory == NULL) {
2222                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2223                 return (ENXIO);
2224         }
2225         adapter->osdep.mem_bus_space_tag =
2226             rman_get_bustag(adapter->memory);
2227         adapter->osdep.mem_bus_space_handle =
2228             rman_get_bushandle(adapter->memory);
2229
2230         /* XXX This is quite goofy, it is not actually used */
2231         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2232
2233         /* Only older adapters use IO mapping */
2234         if (adapter->hw.mac.type > e1000_82543 &&
2235             adapter->hw.mac.type < e1000_82571) {
2236                 /* Figure our where our IO BAR is ? */
2237                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2238                         val = pci_read_config(dev, rid, 4);
2239                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2240                                 adapter->io_rid = rid;
2241                                 break;
2242                         }
2243                         rid += 4;
2244                         /* check for 64bit BAR */
2245                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2246                                 rid += 4;
2247                 }
2248                 if (rid >= PCIR_CARDBUSCIS) {
2249                         device_printf(dev, "Unable to locate IO BAR\n");
2250                         return (ENXIO);
2251                 }
2252                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2253                                         &adapter->io_rid, RF_ACTIVE);
2254                 if (adapter->ioport == NULL) {
2255                         device_printf(dev, "Unable to allocate bus resource: "
2256                             "ioport\n");
2257                         return (ENXIO);
2258                 }
2259                 adapter->hw.io_base = 0;
2260                 adapter->osdep.io_bus_space_tag =
2261                     rman_get_bustag(adapter->ioport);
2262                 adapter->osdep.io_bus_space_handle =
2263                     rman_get_bushandle(adapter->ioport);
2264         }
2265
2266         /*
2267          * Don't enable MSI-X on 82574, see:
2268          * 82574 specification update errata #15
2269          *
2270          * Don't enable MSI on PCI/PCI-X chips, see:
2271          * 82540 specification update errata #6
2272          * 82545 specification update errata #4
2273          *
2274          * Don't enable MSI on 82571/82572, see:
2275          * 82571/82572 specification update errata #63
2276          */
2277         msi_enable = em_msi_enable;
2278         if (msi_enable &&
2279             (!pci_is_pcie(dev) ||
2280              adapter->hw.mac.type == e1000_82571 ||
2281              adapter->hw.mac.type == e1000_82572))
2282                 msi_enable = 0;
2283
2284         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2285             &adapter->intr_rid, &intr_flags);
2286
2287         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2288                 int unshared;
2289
2290                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2291                 if (!unshared) {
2292                         adapter->flags |= EM_FLAG_SHARED_INTR;
2293                         if (bootverbose)
2294                                 device_printf(dev, "IRQ shared\n");
2295                 } else {
2296                         intr_flags &= ~RF_SHAREABLE;
2297                         if (bootverbose)
2298                                 device_printf(dev, "IRQ unshared\n");
2299                 }
2300         }
2301
2302         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2303             &adapter->intr_rid, intr_flags);
2304         if (adapter->intr_res == NULL) {
2305                 device_printf(dev, "Unable to allocate bus resource: "
2306                     "interrupt\n");
2307                 return (ENXIO);
2308         }
2309
2310         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2311         adapter->hw.back = &adapter->osdep;
2312         return (0);
2313 }
2314
2315 static void
2316 em_free_pci_res(struct adapter *adapter)
2317 {
2318         device_t dev = adapter->dev;
2319
2320         if (adapter->intr_res != NULL) {
2321                 bus_release_resource(dev, SYS_RES_IRQ,
2322                     adapter->intr_rid, adapter->intr_res);
2323         }
2324
2325         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2326                 pci_release_msi(dev);
2327
2328         if (adapter->memory != NULL) {
2329                 bus_release_resource(dev, SYS_RES_MEMORY,
2330                     adapter->memory_rid, adapter->memory);
2331         }
2332
2333         if (adapter->flash != NULL) {
2334                 bus_release_resource(dev, SYS_RES_MEMORY,
2335                     adapter->flash_rid, adapter->flash);
2336         }
2337
2338         if (adapter->ioport != NULL) {
2339                 bus_release_resource(dev, SYS_RES_IOPORT,
2340                     adapter->io_rid, adapter->ioport);
2341         }
2342 }
2343
2344 static int
2345 em_reset(struct adapter *adapter)
2346 {
2347         device_t dev = adapter->dev;
2348         uint16_t rx_buffer_size;
2349         uint32_t pba;
2350
2351         /* When hardware is reset, fifo_head is also reset */
2352         adapter->tx_fifo_head = 0;
2353
2354         /* Set up smart power down as default off on newer adapters. */
2355         if (!em_smart_pwr_down &&
2356             (adapter->hw.mac.type == e1000_82571 ||
2357              adapter->hw.mac.type == e1000_82572)) {
2358                 uint16_t phy_tmp = 0;
2359
2360                 /* Speed up time to link by disabling smart power down. */
2361                 e1000_read_phy_reg(&adapter->hw,
2362                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2363                 phy_tmp &= ~IGP02E1000_PM_SPD;
2364                 e1000_write_phy_reg(&adapter->hw,
2365                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2366         }
2367
2368         /*
2369          * Packet Buffer Allocation (PBA)
2370          * Writing PBA sets the receive portion of the buffer
2371          * the remainder is used for the transmit buffer.
2372          *
2373          * Devices before the 82547 had a Packet Buffer of 64K.
2374          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
2375          * After the 82547 the buffer was reduced to 40K.
2376          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
2377          *   Note: default does not leave enough room for Jumbo Frame >10k.
2378          */
2379         switch (adapter->hw.mac.type) {
2380         case e1000_82547:
2381         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
2382                 if (adapter->hw.mac.max_frame_size > 8192)
2383                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
2384                 else
2385                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
2386                 adapter->tx_fifo_head = 0;
2387                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
2388                 adapter->tx_fifo_size =
2389                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
2390                 break;
2391
2392         /* Total Packet Buffer on these is 48K */
2393         case e1000_82571:
2394         case e1000_82572:
2395         case e1000_80003es2lan:
2396                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
2397                 break;
2398
2399         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
2400                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
2401                 break;
2402
2403         case e1000_82574:
2404         case e1000_82583:
2405                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
2406                 break;
2407
2408         case e1000_ich8lan:
2409                 pba = E1000_PBA_8K;
2410                 break;
2411
2412         case e1000_ich9lan:
2413         case e1000_ich10lan:
2414 #define E1000_PBA_10K   0x000A
2415                 pba = E1000_PBA_10K;
2416                 break;
2417
2418         case e1000_pchlan:
2419         case e1000_pch2lan:
2420         case e1000_pch_lpt:
2421                 pba = E1000_PBA_26K;
2422                 break;
2423
2424         default:
2425                 /* Devices before 82547 had a Packet Buffer of 64K.   */
2426                 if (adapter->hw.mac.max_frame_size > 8192)
2427                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
2428                 else
2429                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
2430         }
2431         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
2432
2433         /*
2434          * These parameters control the automatic generation (Tx) and
2435          * response (Rx) to Ethernet PAUSE frames.
2436          * - High water mark should allow for at least two frames to be
2437          *   received after sending an XOFF.
2438          * - Low water mark works best when it is very near the high water mark.
2439          *   This allows the receiver to restart by sending XON when it has
2440          *   drained a bit. Here we use an arbitary value of 1500 which will
2441          *   restart after one full frame is pulled from the buffer. There
2442          *   could be several smaller frames in the buffer and if so they will
2443          *   not trigger the XON until their total number reduces the buffer
2444          *   by 1500.
2445          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2446          */
2447         rx_buffer_size =
2448                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2449
2450         adapter->hw.fc.high_water = rx_buffer_size -
2451             roundup2(adapter->hw.mac.max_frame_size, 1024);
2452         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2453
2454         if (adapter->hw.mac.type == e1000_80003es2lan)
2455                 adapter->hw.fc.pause_time = 0xFFFF;
2456         else
2457                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2458
2459         adapter->hw.fc.send_xon = TRUE;
2460
2461         adapter->hw.fc.requested_mode = adapter->flow_ctrl;
2462
2463         /*
2464          * Device specific overrides/settings
2465          */
2466         switch (adapter->hw.mac.type) {
2467         case e1000_pchlan:
2468                 /* Workaround: no TX flow ctrl for PCH */
2469                 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2470                 adapter->hw.fc.pause_time = 0xFFFF; /* override */
2471                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2472                         adapter->hw.fc.high_water = 0x3500;
2473                         adapter->hw.fc.low_water = 0x1500;
2474                 } else {
2475                         adapter->hw.fc.high_water = 0x5000;
2476                         adapter->hw.fc.low_water = 0x3000;
2477                 }
2478                 adapter->hw.fc.refresh_time = 0x1000;
2479                 break;
2480
2481         case e1000_pch2lan:
2482         case e1000_pch_lpt:
2483                 adapter->hw.fc.high_water = 0x5C20;
2484                 adapter->hw.fc.low_water = 0x5048;
2485                 adapter->hw.fc.pause_time = 0x0650;
2486                 adapter->hw.fc.refresh_time = 0x0400;
2487                 /* Jumbos need adjusted PBA */
2488                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2489                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2490                 else
2491                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2492                 break;
2493
2494         case e1000_ich9lan:
2495         case e1000_ich10lan:
2496                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2497                         adapter->hw.fc.high_water = 0x2800;
2498                         adapter->hw.fc.low_water =
2499                             adapter->hw.fc.high_water - 8;
2500                         break;
2501                 }
2502                 /* FALL THROUGH */
2503         default:
2504                 if (adapter->hw.mac.type == e1000_80003es2lan)
2505                         adapter->hw.fc.pause_time = 0xFFFF;
2506                 break;
2507         }
2508
2509         /* Issue a global reset */
2510         e1000_reset_hw(&adapter->hw);
2511         if (adapter->hw.mac.type >= e1000_82544)
2512                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2513         em_disable_aspm(adapter);
2514
2515         if (e1000_init_hw(&adapter->hw) < 0) {
2516                 device_printf(dev, "Hardware Initialization Failed\n");
2517                 return (EIO);
2518         }
2519
2520         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2521         e1000_get_phy_info(&adapter->hw);
2522         e1000_check_for_link(&adapter->hw);
2523
2524         return (0);
2525 }
2526
2527 static void
2528 em_setup_ifp(struct adapter *adapter)
2529 {
2530         struct ifnet *ifp = &adapter->arpcom.ac_if;
2531
2532         if_initname(ifp, device_get_name(adapter->dev),
2533                     device_get_unit(adapter->dev));
2534         ifp->if_softc = adapter;
2535         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2536         ifp->if_init =  em_init;
2537         ifp->if_ioctl = em_ioctl;
2538         ifp->if_start = em_start;
2539 #ifdef IFPOLL_ENABLE
2540         ifp->if_npoll = em_npoll;
2541 #endif
2542         ifp->if_watchdog = em_watchdog;
2543         ifp->if_nmbclusters = adapter->num_rx_desc;
2544         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2545         ifq_set_ready(&ifp->if_snd);
2546
2547         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2548
2549         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2550         if (adapter->hw.mac.type >= e1000_82543)
2551                 ifp->if_capabilities |= IFCAP_HWCSUM;
2552         if (adapter->flags & EM_FLAG_TSO)
2553                 ifp->if_capabilities |= IFCAP_TSO;
2554         ifp->if_capenable = ifp->if_capabilities;
2555
2556         if (ifp->if_capenable & IFCAP_TXCSUM)
2557                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2558         if (ifp->if_capenable & IFCAP_TSO)
2559                 ifp->if_hwassist |= CSUM_TSO;
2560
2561         /*
2562          * Tell the upper layer(s) we support long frames.
2563          */
2564         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2565
2566         /*
2567          * Specify the media types supported by this adapter and register
2568          * callbacks to update media and link information
2569          */
2570         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2571             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2572                 u_char fiber_type = IFM_1000_SX; /* default type */
2573
2574                 if (adapter->hw.mac.type == e1000_82545)
2575                         fiber_type = IFM_1000_LX;
2576                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2577                             0, NULL);
2578                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2579         } else {
2580                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2581                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2582                             0, NULL);
2583                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2584                             0, NULL);
2585                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2586                             0, NULL);
2587                 if (adapter->hw.phy.type != e1000_phy_ife) {
2588                         ifmedia_add(&adapter->media,
2589                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2590                         ifmedia_add(&adapter->media,
2591                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2592                 }
2593         }
2594         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2595         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2596 }
2597
2598
2599 /*
2600  * Workaround for SmartSpeed on 82541 and 82547 controllers
2601  */
2602 static void
2603 em_smartspeed(struct adapter *adapter)
2604 {
2605         uint16_t phy_tmp;
2606
2607         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2608             adapter->hw.mac.autoneg == 0 ||
2609             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2610                 return;
2611
2612         if (adapter->smartspeed == 0) {
2613                 /*
2614                  * If Master/Slave config fault is asserted twice,
2615                  * we assume back-to-back
2616                  */
2617                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2618                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2619                         return;
2620                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2621                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2622                         e1000_read_phy_reg(&adapter->hw,
2623                             PHY_1000T_CTRL, &phy_tmp);
2624                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2625                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2626                                 e1000_write_phy_reg(&adapter->hw,
2627                                     PHY_1000T_CTRL, phy_tmp);
2628                                 adapter->smartspeed++;
2629                                 if (adapter->hw.mac.autoneg &&
2630                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2631                                     !e1000_read_phy_reg(&adapter->hw,
2632                                      PHY_CONTROL, &phy_tmp)) {
2633                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2634                                                    MII_CR_RESTART_AUTO_NEG;
2635                                         e1000_write_phy_reg(&adapter->hw,
2636                                             PHY_CONTROL, phy_tmp);
2637                                 }
2638                         }
2639                 }
2640                 return;
2641         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2642                 /* If still no link, perhaps using 2/3 pair cable */
2643                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2644                 phy_tmp |= CR_1000T_MS_ENABLE;
2645                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2646                 if (adapter->hw.mac.autoneg &&
2647                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2648                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2649                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2650                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2651                 }
2652         }
2653
2654         /* Restart process after EM_SMARTSPEED_MAX iterations */
2655         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2656                 adapter->smartspeed = 0;
2657 }
2658
2659 static int
2660 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2661               struct em_dma_alloc *dma)
2662 {
2663         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2664                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2665                                 &dma->dma_tag, &dma->dma_map,
2666                                 &dma->dma_paddr);
2667         if (dma->dma_vaddr == NULL)
2668                 return ENOMEM;
2669         else
2670                 return 0;
2671 }
2672
2673 static void
2674 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2675 {
2676         if (dma->dma_tag == NULL)
2677                 return;
2678         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2679         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2680         bus_dma_tag_destroy(dma->dma_tag);
2681 }
2682
2683 static int
2684 em_create_tx_ring(struct adapter *adapter)
2685 {
2686         device_t dev = adapter->dev;
2687         struct em_buffer *tx_buffer;
2688         int error, i;
2689
2690         adapter->tx_buffer_area =
2691                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2692                         M_DEVBUF, M_WAITOK | M_ZERO);
2693
2694         /*
2695          * Create DMA tags for tx buffers
2696          */
2697         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2698                         1, 0,                   /* alignment, bounds */
2699                         BUS_SPACE_MAXADDR,      /* lowaddr */
2700                         BUS_SPACE_MAXADDR,      /* highaddr */
2701                         NULL, NULL,             /* filter, filterarg */
2702                         EM_TSO_SIZE,            /* maxsize */
2703                         EM_MAX_SCATTER,         /* nsegments */
2704                         PAGE_SIZE,              /* maxsegsize */
2705                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2706                         BUS_DMA_ONEBPAGE,       /* flags */
2707                         &adapter->txtag);
2708         if (error) {
2709                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2710                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2711                 adapter->tx_buffer_area = NULL;
2712                 return error;
2713         }
2714
2715         /*
2716          * Create DMA maps for tx buffers
2717          */
2718         for (i = 0; i < adapter->num_tx_desc; i++) {
2719                 tx_buffer = &adapter->tx_buffer_area[i];
2720
2721                 error = bus_dmamap_create(adapter->txtag,
2722                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2723                                           &tx_buffer->map);
2724                 if (error) {
2725                         device_printf(dev, "Unable to create TX DMA map\n");
2726                         em_destroy_tx_ring(adapter, i);
2727                         return error;
2728                 }
2729         }
2730         return (0);
2731 }
2732
2733 static void
2734 em_init_tx_ring(struct adapter *adapter)
2735 {
2736         /* Clear the old ring contents */
2737         bzero(adapter->tx_desc_base,
2738             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2739
2740         /* Reset state */
2741         adapter->next_avail_tx_desc = 0;
2742         adapter->next_tx_to_clean = 0;
2743         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2744 }
2745
2746 static void
2747 em_init_tx_unit(struct adapter *adapter)
2748 {
2749         uint32_t tctl, tarc, tipg = 0;
2750         uint64_t bus_addr;
2751
2752         /* Setup the Base and Length of the Tx Descriptor Ring */
2753         bus_addr = adapter->txdma.dma_paddr;
2754         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2755             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2756         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2757             (uint32_t)(bus_addr >> 32));
2758         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2759             (uint32_t)bus_addr);
2760         /* Setup the HW Tx Head and Tail descriptor pointers */
2761         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2762         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2763
2764         /* Set the default values for the Tx Inter Packet Gap timer */
2765         switch (adapter->hw.mac.type) {
2766         case e1000_82542:
2767                 tipg = DEFAULT_82542_TIPG_IPGT;
2768                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2769                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2770                 break;
2771
2772         case e1000_80003es2lan:
2773                 tipg = DEFAULT_82543_TIPG_IPGR1;
2774                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2775                     E1000_TIPG_IPGR2_SHIFT;
2776                 break;
2777
2778         default:
2779                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2780                     adapter->hw.phy.media_type ==
2781                     e1000_media_type_internal_serdes)
2782                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2783                 else
2784                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2785                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2786                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2787                 break;
2788         }
2789
2790         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2791
2792         /* NOTE: 0 is not allowed for TIDV */
2793         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2794         if(adapter->hw.mac.type >= e1000_82540)
2795                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2796
2797         if (adapter->hw.mac.type == e1000_82571 ||
2798             adapter->hw.mac.type == e1000_82572) {
2799                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2800                 tarc |= SPEED_MODE_BIT;
2801                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2802         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2803                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2804                 tarc |= 1;
2805                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2806                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2807                 tarc |= 1;
2808                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2809         }
2810
2811         /* Program the Transmit Control Register */
2812         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2813         tctl &= ~E1000_TCTL_CT;
2814         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2815                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2816
2817         if (adapter->hw.mac.type >= e1000_82571)
2818                 tctl |= E1000_TCTL_MULR;
2819
2820         /* This write will effectively turn on the transmit unit. */
2821         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2822
2823         if (adapter->hw.mac.type == e1000_82571 ||
2824             adapter->hw.mac.type == e1000_82572 ||
2825             adapter->hw.mac.type == e1000_80003es2lan) {
2826                 /* Bit 28 of TARC1 must be cleared when MULR is enabled */
2827                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2828                 tarc &= ~(1 << 28);
2829                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2830         }
2831 }
2832
2833 static void
2834 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2835 {
2836         struct em_buffer *tx_buffer;
2837         int i;
2838
2839         if (adapter->tx_buffer_area == NULL)
2840                 return;
2841
2842         for (i = 0; i < ndesc; i++) {
2843                 tx_buffer = &adapter->tx_buffer_area[i];
2844
2845                 KKASSERT(tx_buffer->m_head == NULL);
2846                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2847         }
2848         bus_dma_tag_destroy(adapter->txtag);
2849
2850         kfree(adapter->tx_buffer_area, M_DEVBUF);
2851         adapter->tx_buffer_area = NULL;
2852 }
2853
2854 /*
2855  * The offload context needs to be set when we transfer the first
2856  * packet of a particular protocol (TCP/UDP).  This routine has been
2857  * enhanced to deal with inserted VLAN headers.
2858  *
2859  * If the new packet's ether header length, ip header length and
2860  * csum offloading type are same as the previous packet, we should
2861  * avoid allocating a new csum context descriptor; mainly to take
2862  * advantage of the pipeline effect of the TX data read request.
2863  *
2864  * This function returns number of TX descrptors allocated for
2865  * csum context.
2866  */
2867 static int
2868 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2869           uint32_t *txd_upper, uint32_t *txd_lower)
2870 {
2871         struct e1000_context_desc *TXD;
2872         int curr_txd, ehdrlen, csum_flags;
2873         uint32_t cmd, hdr_len, ip_hlen;
2874
2875         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2876         ip_hlen = mp->m_pkthdr.csum_iphlen;
2877         ehdrlen = mp->m_pkthdr.csum_lhlen;
2878
2879         if (adapter->csum_lhlen == ehdrlen &&
2880             adapter->csum_iphlen == ip_hlen &&
2881             adapter->csum_flags == csum_flags) {
2882                 /*
2883                  * Same csum offload context as the previous packets;
2884                  * just return.
2885                  */
2886                 *txd_upper = adapter->csum_txd_upper;
2887                 *txd_lower = adapter->csum_txd_lower;
2888                 return 0;
2889         }
2890
2891         /*
2892          * Setup a new csum offload context.
2893          */
2894
2895         curr_txd = adapter->next_avail_tx_desc;
2896         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2897
2898         cmd = 0;
2899
2900         /* Setup of IP header checksum. */
2901         if (csum_flags & CSUM_IP) {
2902                 /*
2903                  * Start offset for header checksum calculation.
2904                  * End offset for header checksum calculation.
2905                  * Offset of place to put the checksum.
2906                  */
2907                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2908                 TXD->lower_setup.ip_fields.ipcse =
2909                     htole16(ehdrlen + ip_hlen - 1);
2910                 TXD->lower_setup.ip_fields.ipcso =
2911                     ehdrlen + offsetof(struct ip, ip_sum);
2912                 cmd |= E1000_TXD_CMD_IP;
2913                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2914         }
2915         hdr_len = ehdrlen + ip_hlen;
2916
2917         if (csum_flags & CSUM_TCP) {
2918                 /*
2919                  * Start offset for payload checksum calculation.
2920                  * End offset for payload checksum calculation.
2921                  * Offset of place to put the checksum.
2922                  */
2923                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2924                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2925                 TXD->upper_setup.tcp_fields.tucso =
2926                     hdr_len + offsetof(struct tcphdr, th_sum);
2927                 cmd |= E1000_TXD_CMD_TCP;
2928                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2929         } else if (csum_flags & CSUM_UDP) {
2930                 /*
2931                  * Start offset for header checksum calculation.
2932                  * End offset for header checksum calculation.
2933                  * Offset of place to put the checksum.
2934                  */
2935                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2936                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2937                 TXD->upper_setup.tcp_fields.tucso =
2938                     hdr_len + offsetof(struct udphdr, uh_sum);
2939                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2940         }
2941
2942         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2943                      E1000_TXD_DTYP_D;          /* Data descr */
2944
2945         /* Save the information for this csum offloading context */
2946         adapter->csum_lhlen = ehdrlen;
2947         adapter->csum_iphlen = ip_hlen;
2948         adapter->csum_flags = csum_flags;
2949         adapter->csum_txd_upper = *txd_upper;
2950         adapter->csum_txd_lower = *txd_lower;
2951
2952         TXD->tcp_seg_setup.data = htole32(0);
2953         TXD->cmd_and_length =
2954             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2955
2956         if (++curr_txd == adapter->num_tx_desc)
2957                 curr_txd = 0;
2958
2959         KKASSERT(adapter->num_tx_desc_avail > 0);
2960         adapter->num_tx_desc_avail--;
2961
2962         adapter->next_avail_tx_desc = curr_txd;
2963         return 1;
2964 }
2965
2966 static void
2967 em_txeof(struct adapter *adapter)
2968 {
2969         struct ifnet *ifp = &adapter->arpcom.ac_if;
2970         struct em_buffer *tx_buffer;
2971         int first, num_avail;
2972
2973         if (adapter->tx_dd_head == adapter->tx_dd_tail)
2974                 return;
2975
2976         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2977                 return;
2978
2979         num_avail = adapter->num_tx_desc_avail;
2980         first = adapter->next_tx_to_clean;
2981
2982         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2983                 struct e1000_tx_desc *tx_desc;
2984                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2985
2986                 tx_desc = &adapter->tx_desc_base[dd_idx];
2987                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2988                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2989
2990                         if (++dd_idx == adapter->num_tx_desc)
2991                                 dd_idx = 0;
2992
2993                         while (first != dd_idx) {
2994                                 logif(pkt_txclean);
2995
2996                                 num_avail++;
2997
2998                                 tx_buffer = &adapter->tx_buffer_area[first];
2999                                 if (tx_buffer->m_head) {
3000                                         bus_dmamap_unload(adapter->txtag,
3001                                                           tx_buffer->map);
3002                                         m_freem(tx_buffer->m_head);
3003                                         tx_buffer->m_head = NULL;
3004                                 }
3005
3006                                 if (++first == adapter->num_tx_desc)
3007                                         first = 0;
3008                         }
3009                 } else {
3010                         break;
3011                 }
3012         }
3013         adapter->next_tx_to_clean = first;
3014         adapter->num_tx_desc_avail = num_avail;
3015
3016         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3017                 adapter->tx_dd_head = 0;
3018                 adapter->tx_dd_tail = 0;
3019         }
3020
3021         if (!EM_IS_OACTIVE(adapter)) {
3022                 ifq_clr_oactive(&ifp->if_snd);
3023
3024                 /* All clean, turn off the timer */
3025                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3026                         ifp->if_timer = 0;
3027         }
3028 }
3029
3030 static void
3031 em_tx_collect(struct adapter *adapter)
3032 {
3033         struct ifnet *ifp = &adapter->arpcom.ac_if;
3034         struct em_buffer *tx_buffer;
3035         int tdh, first, num_avail, dd_idx = -1;
3036
3037         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3038                 return;
3039
3040         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
3041         if (tdh == adapter->next_tx_to_clean)
3042                 return;
3043
3044         if (adapter->tx_dd_head != adapter->tx_dd_tail)
3045                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3046
3047         num_avail = adapter->num_tx_desc_avail;
3048         first = adapter->next_tx_to_clean;
3049
3050         while (first != tdh) {
3051                 logif(pkt_txclean);
3052
3053                 num_avail++;
3054
3055                 tx_buffer = &adapter->tx_buffer_area[first];
3056                 if (tx_buffer->m_head) {
3057                         bus_dmamap_unload(adapter->txtag,
3058                                           tx_buffer->map);
3059                         m_freem(tx_buffer->m_head);
3060                         tx_buffer->m_head = NULL;
3061                 }
3062
3063                 if (first == dd_idx) {
3064                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3065                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3066                                 adapter->tx_dd_head = 0;
3067                                 adapter->tx_dd_tail = 0;
3068                                 dd_idx = -1;
3069                         } else {
3070                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3071                         }
3072                 }
3073
3074                 if (++first == adapter->num_tx_desc)
3075                         first = 0;
3076         }
3077         adapter->next_tx_to_clean = first;
3078         adapter->num_tx_desc_avail = num_avail;
3079
3080         if (!EM_IS_OACTIVE(adapter)) {
3081                 ifq_clr_oactive(&ifp->if_snd);
3082
3083                 /* All clean, turn off the timer */
3084                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3085                         ifp->if_timer = 0;
3086         }
3087 }
3088
3089 /*
3090  * When Link is lost sometimes there is work still in the TX ring
3091  * which will result in a watchdog, rather than allow that do an
3092  * attempted cleanup and then reinit here.  Note that this has been
3093  * seens mostly with fiber adapters.
3094  */
3095 static void
3096 em_tx_purge(struct adapter *adapter)
3097 {
3098         struct ifnet *ifp = &adapter->arpcom.ac_if;
3099
3100         if (!adapter->link_active && ifp->if_timer) {
3101                 em_tx_collect(adapter);
3102                 if (ifp->if_timer) {
3103                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3104                         ifp->if_timer = 0;
3105                         em_init(adapter);
3106                 }
3107         }
3108 }
3109
3110 static int
3111 em_newbuf(struct adapter *adapter, int i, int init)
3112 {
3113         struct mbuf *m;
3114         bus_dma_segment_t seg;
3115         bus_dmamap_t map;
3116         struct em_buffer *rx_buffer;
3117         int error, nseg;
3118
3119         m = m_getcl(init ? M_WAITOK : M_NOWAIT, MT_DATA, M_PKTHDR);
3120         if (m == NULL) {
3121                 adapter->mbuf_cluster_failed++;
3122                 if (init) {
3123                         if_printf(&adapter->arpcom.ac_if,
3124                                   "Unable to allocate RX mbuf\n");
3125                 }
3126                 return (ENOBUFS);
3127         }
3128         m->m_len = m->m_pkthdr.len = MCLBYTES;
3129
3130         if (adapter->hw.mac.max_frame_size <= MCLBYTES - ETHER_ALIGN)
3131                 m_adj(m, ETHER_ALIGN);
3132
3133         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3134                         adapter->rx_sparemap, m,
3135                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3136         if (error) {
3137                 m_freem(m);
3138                 if (init) {
3139                         if_printf(&adapter->arpcom.ac_if,
3140                                   "Unable to load RX mbuf\n");
3141                 }
3142                 return (error);
3143         }
3144
3145         rx_buffer = &adapter->rx_buffer_area[i];
3146         if (rx_buffer->m_head != NULL)
3147                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3148
3149         map = rx_buffer->map;
3150         rx_buffer->map = adapter->rx_sparemap;
3151         adapter->rx_sparemap = map;
3152
3153         rx_buffer->m_head = m;
3154
3155         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3156         return (0);
3157 }
3158
3159 static int
3160 em_create_rx_ring(struct adapter *adapter)
3161 {
3162         device_t dev = adapter->dev;
3163         struct em_buffer *rx_buffer;
3164         int i, error;
3165
3166         adapter->rx_buffer_area =
3167                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3168                         M_DEVBUF, M_WAITOK | M_ZERO);
3169
3170         /*
3171          * Create DMA tag for rx buffers
3172          */
3173         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3174                         1, 0,                   /* alignment, bounds */
3175                         BUS_SPACE_MAXADDR,      /* lowaddr */
3176                         BUS_SPACE_MAXADDR,      /* highaddr */
3177                         NULL, NULL,             /* filter, filterarg */
3178                         MCLBYTES,               /* maxsize */
3179                         1,                      /* nsegments */
3180                         MCLBYTES,               /* maxsegsize */
3181                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3182                         &adapter->rxtag);
3183         if (error) {
3184                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3185                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3186                 adapter->rx_buffer_area = NULL;
3187                 return error;
3188         }
3189
3190         /*
3191          * Create spare DMA map for rx buffers
3192          */
3193         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3194                                   &adapter->rx_sparemap);
3195         if (error) {
3196                 device_printf(dev, "Unable to create spare RX DMA map\n");
3197                 bus_dma_tag_destroy(adapter->rxtag);
3198                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3199                 adapter->rx_buffer_area = NULL;
3200                 return error;
3201         }
3202
3203         /*
3204          * Create DMA maps for rx buffers
3205          */
3206         for (i = 0; i < adapter->num_rx_desc; i++) {
3207                 rx_buffer = &adapter->rx_buffer_area[i];
3208
3209                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3210                                           &rx_buffer->map);
3211                 if (error) {
3212                         device_printf(dev, "Unable to create RX DMA map\n");
3213                         em_destroy_rx_ring(adapter, i);
3214                         return error;
3215                 }
3216         }
3217         return (0);
3218 }
3219
3220 static int
3221 em_init_rx_ring(struct adapter *adapter)
3222 {
3223         int i, error;
3224
3225         /* Reset descriptor ring */
3226         bzero(adapter->rx_desc_base,
3227             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3228
3229         /* Allocate new ones. */
3230         for (i = 0; i < adapter->num_rx_desc; i++) {
3231                 error = em_newbuf(adapter, i, 1);
3232                 if (error)
3233                         return (error);
3234         }
3235
3236         /* Setup our descriptor pointers */
3237         adapter->next_rx_desc_to_check = 0;
3238
3239         return (0);
3240 }
3241
3242 static void
3243 em_init_rx_unit(struct adapter *adapter)
3244 {
3245         struct ifnet *ifp = &adapter->arpcom.ac_if;
3246         uint64_t bus_addr;
3247         uint32_t rctl;
3248
3249         /*
3250          * Make sure receives are disabled while setting
3251          * up the descriptor ring
3252          */
3253         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3254         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3255
3256         if (adapter->hw.mac.type >= e1000_82540) {
3257                 uint32_t itr;
3258
3259                 /*
3260                  * Set the interrupt throttling rate. Value is calculated
3261                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3262                  */
3263                 if (adapter->int_throttle_ceil)
3264                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3265                 else
3266                         itr = 0;
3267                 em_set_itr(adapter, itr);
3268         }
3269
3270         /* Disable accelerated ackknowledge */
3271         if (adapter->hw.mac.type == e1000_82574) {
3272                 E1000_WRITE_REG(&adapter->hw,
3273                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3274         }
3275
3276         /* Receive Checksum Offload for TCP and UDP */
3277         if (ifp->if_capenable & IFCAP_RXCSUM) {
3278                 uint32_t rxcsum;
3279
3280                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3281                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3282                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3283         }
3284
3285         /*
3286          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3287          * long latencies are observed, like Lenovo X60. This
3288          * change eliminates the problem, but since having positive
3289          * values in RDTR is a known source of problems on other
3290          * platforms another solution is being sought.
3291          */
3292         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3293                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3294                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3295         }
3296
3297         /*
3298          * Setup the Base and Length of the Rx Descriptor Ring
3299          */
3300         bus_addr = adapter->rxdma.dma_paddr;
3301         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3302             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3303         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3304             (uint32_t)(bus_addr >> 32));
3305         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3306             (uint32_t)bus_addr);
3307
3308         /*
3309          * Setup the HW Rx Head and Tail Descriptor Pointers
3310          */
3311         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3312         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3313
3314         /* Set PTHRESH for improved jumbo performance */
3315         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3316             (adapter->hw.mac.type == e1000_pch2lan) ||
3317             (adapter->hw.mac.type == e1000_ich10lan)) &&
3318             (ifp->if_mtu > ETHERMTU)) {
3319                 uint32_t rxdctl;
3320
3321                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3322                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3323         }
3324
3325         if (adapter->hw.mac.type >= e1000_pch2lan) {
3326                 if (ifp->if_mtu > ETHERMTU)
3327                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3328                 else
3329                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3330         }
3331
3332         /* Setup the Receive Control Register */
3333         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3334         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3335                 E1000_RCTL_RDMTS_HALF |
3336                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3337
3338         /* Make sure VLAN Filters are off */
3339         rctl &= ~E1000_RCTL_VFE;
3340
3341         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3342                 rctl |= E1000_RCTL_SBP;
3343         else
3344                 rctl &= ~E1000_RCTL_SBP;
3345
3346         switch (adapter->rx_buffer_len) {
3347         default:
3348         case 2048:
3349                 rctl |= E1000_RCTL_SZ_2048;
3350                 break;
3351
3352         case 4096:
3353                 rctl |= E1000_RCTL_SZ_4096 |
3354                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3355                 break;
3356
3357         case 8192:
3358                 rctl |= E1000_RCTL_SZ_8192 |
3359                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3360                 break;
3361
3362         case 16384:
3363                 rctl |= E1000_RCTL_SZ_16384 |
3364                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3365                 break;
3366         }
3367
3368         if (ifp->if_mtu > ETHERMTU)
3369                 rctl |= E1000_RCTL_LPE;
3370         else
3371                 rctl &= ~E1000_RCTL_LPE;
3372
3373         /* Enable Receives */
3374         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3375 }
3376
3377 static void
3378 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3379 {
3380         struct em_buffer *rx_buffer;
3381         int i;
3382
3383         if (adapter->rx_buffer_area == NULL)
3384                 return;
3385
3386         for (i = 0; i < ndesc; i++) {
3387                 rx_buffer = &adapter->rx_buffer_area[i];
3388
3389                 KKASSERT(rx_buffer->m_head == NULL);
3390                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3391         }
3392         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3393         bus_dma_tag_destroy(adapter->rxtag);
3394
3395         kfree(adapter->rx_buffer_area, M_DEVBUF);
3396         adapter->rx_buffer_area = NULL;
3397 }
3398
3399 static void
3400 em_rxeof(struct adapter *adapter, int count)
3401 {
3402         struct ifnet *ifp = &adapter->arpcom.ac_if;
3403         uint8_t status, accept_frame = 0, eop = 0;
3404         uint16_t len, desc_len, prev_len_adj;
3405         struct e1000_rx_desc *current_desc;
3406         struct mbuf *mp;
3407         int i;
3408
3409         i = adapter->next_rx_desc_to_check;
3410         current_desc = &adapter->rx_desc_base[i];
3411
3412         if (!(current_desc->status & E1000_RXD_STAT_DD))
3413                 return;
3414
3415         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3416                 struct mbuf *m = NULL;
3417
3418                 logif(pkt_receive);
3419
3420                 mp = adapter->rx_buffer_area[i].m_head;
3421
3422                 /*
3423                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3424                  * needs to access the last received byte in the mbuf.
3425                  */
3426                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3427                                 BUS_DMASYNC_POSTREAD);
3428
3429                 accept_frame = 1;
3430                 prev_len_adj = 0;
3431                 desc_len = le16toh(current_desc->length);
3432                 status = current_desc->status;
3433                 if (status & E1000_RXD_STAT_EOP) {
3434                         count--;
3435                         eop = 1;
3436                         if (desc_len < ETHER_CRC_LEN) {
3437                                 len = 0;
3438                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3439                         } else {
3440                                 len = desc_len - ETHER_CRC_LEN;
3441                         }
3442                 } else {
3443                         eop = 0;
3444                         len = desc_len;
3445                 }
3446
3447                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3448                         uint8_t last_byte;
3449                         uint32_t pkt_len = desc_len;
3450
3451                         if (adapter->fmp != NULL)
3452                                 pkt_len += adapter->fmp->m_pkthdr.len;
3453
3454                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3455                         if (TBI_ACCEPT(&adapter->hw, status,
3456                             current_desc->errors, pkt_len, last_byte,
3457                             adapter->min_frame_size,
3458                             adapter->hw.mac.max_frame_size)) {
3459                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3460                                     &adapter->stats, pkt_len,
3461                                     adapter->hw.mac.addr,
3462                                     adapter->hw.mac.max_frame_size);
3463                                 if (len > 0)
3464                                         len--;
3465                         } else {
3466                                 accept_frame = 0;
3467                         }
3468                 }
3469
3470                 if (accept_frame) {
3471                         if (em_newbuf(adapter, i, 0) != 0) {
3472                                 IFNET_STAT_INC(ifp, iqdrops, 1);
3473                                 goto discard;
3474                         }
3475
3476                         /* Assign correct length to the current fragment */
3477                         mp->m_len = len;
3478
3479                         if (adapter->fmp == NULL) {
3480                                 mp->m_pkthdr.len = len;
3481                                 adapter->fmp = mp; /* Store the first mbuf */
3482                                 adapter->lmp = mp;
3483                         } else {
3484                                 /*
3485                                  * Chain mbuf's together
3486                                  */
3487
3488                                 /*
3489                                  * Adjust length of previous mbuf in chain if
3490                                  * we received less than 4 bytes in the last
3491                                  * descriptor.
3492                                  */
3493                                 if (prev_len_adj > 0) {
3494                                         adapter->lmp->m_len -= prev_len_adj;
3495                                         adapter->fmp->m_pkthdr.len -=
3496                                             prev_len_adj;
3497                                 }
3498                                 adapter->lmp->m_next = mp;
3499                                 adapter->lmp = adapter->lmp->m_next;
3500                                 adapter->fmp->m_pkthdr.len += len;
3501                         }
3502
3503                         if (eop) {
3504                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3505                                 IFNET_STAT_INC(ifp, ipackets, 1);
3506
3507                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3508                                         em_rxcsum(adapter, current_desc,
3509                                                   adapter->fmp);
3510                                 }
3511
3512                                 if (status & E1000_RXD_STAT_VP) {
3513                                         adapter->fmp->m_pkthdr.ether_vlantag =
3514                                             (le16toh(current_desc->special) &
3515                                             E1000_RXD_SPC_VLAN_MASK);
3516                                         adapter->fmp->m_flags |= M_VLANTAG;
3517                                 }
3518                                 m = adapter->fmp;
3519                                 adapter->fmp = NULL;
3520                                 adapter->lmp = NULL;
3521                         }
3522                 } else {
3523                         IFNET_STAT_INC(ifp, ierrors, 1);
3524 discard:
3525 #ifdef foo
3526                         /* Reuse loaded DMA map and just update mbuf chain */
3527                         mp = adapter->rx_buffer_area[i].m_head;
3528                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3529                         mp->m_data = mp->m_ext.ext_buf;
3530                         mp->m_next = NULL;
3531                         if (adapter->hw.mac.max_frame_size <=
3532                             (MCLBYTES - ETHER_ALIGN))
3533                                 m_adj(mp, ETHER_ALIGN);
3534 #endif
3535                         if (adapter->fmp != NULL) {
3536                                 m_freem(adapter->fmp);
3537                                 adapter->fmp = NULL;
3538                                 adapter->lmp = NULL;
3539                         }
3540                         m = NULL;
3541                 }
3542
3543                 /* Zero out the receive descriptors status. */
3544                 current_desc->status = 0;
3545
3546                 if (m != NULL)
3547                         ifp->if_input(ifp, m, NULL, -1);
3548
3549                 /* Advance our pointers to the next descriptor. */
3550                 if (++i == adapter->num_rx_desc)
3551                         i = 0;
3552                 current_desc = &adapter->rx_desc_base[i];
3553         }
3554         adapter->next_rx_desc_to_check = i;
3555
3556         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3557         if (--i < 0)
3558                 i = adapter->num_rx_desc - 1;
3559         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3560 }
3561
3562 static void
3563 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3564           struct mbuf *mp)
3565 {
3566         /* 82543 or newer only */
3567         if (adapter->hw.mac.type < e1000_82543 ||
3568             /* Ignore Checksum bit is set */
3569             (rx_desc->status & E1000_RXD_STAT_IXSM))
3570                 return;
3571
3572         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3573             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3574                 /* IP Checksum Good */
3575                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3576         }
3577
3578         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3579             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3580                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3581                                            CSUM_PSEUDO_HDR |
3582                                            CSUM_FRAG_NOT_CHECKED;
3583                 mp->m_pkthdr.csum_data = htons(0xffff);
3584         }
3585 }
3586
3587 static void
3588 em_enable_intr(struct adapter *adapter)
3589 {
3590         uint32_t ims_mask = IMS_ENABLE_MASK;
3591
3592         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3593
3594 #if 0
3595         /* XXX MSIX */
3596         if (adapter->hw.mac.type == e1000_82574) {
3597                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3598                 ims_mask |= EM_MSIX_MASK;
3599         }
3600 #endif
3601         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3602 }
3603
3604 static void
3605 em_disable_intr(struct adapter *adapter)
3606 {
3607         uint32_t clear = 0xffffffff;
3608
3609         /*
3610          * The first version of 82542 had an errata where when link was forced
3611          * it would stay up even up even if the cable was disconnected.
3612          * Sequence errors were used to detect the disconnect and then the
3613          * driver would unforce the link.  This code in the in the ISR.  For
3614          * this to work correctly the Sequence error interrupt had to be
3615          * enabled all the time.
3616          */
3617         if (adapter->hw.mac.type == e1000_82542 &&
3618             adapter->hw.revision_id == E1000_REVISION_2)
3619                 clear &= ~E1000_ICR_RXSEQ;
3620         else if (adapter->hw.mac.type == e1000_82574)
3621                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3622
3623         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3624
3625         adapter->npoll.ifpc_stcount = 0;
3626
3627         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3628 }
3629
3630 /*
3631  * Bit of a misnomer, what this really means is
3632  * to enable OS management of the system... aka
3633  * to disable special hardware management features
3634  */
3635 static void
3636 em_get_mgmt(struct adapter *adapter)
3637 {
3638         /* A shared code workaround */
3639 #define E1000_82542_MANC2H E1000_MANC2H
3640         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3641                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3642                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3643
3644                 /* disable hardware interception of ARP */
3645                 manc &= ~(E1000_MANC_ARP_EN);
3646
3647                 /* enable receiving management packets to the host */
3648                 if (adapter->hw.mac.type >= e1000_82571) {
3649                         manc |= E1000_MANC_EN_MNG2HOST;
3650 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3651 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3652                         manc2h |= E1000_MNG2HOST_PORT_623;
3653                         manc2h |= E1000_MNG2HOST_PORT_664;
3654                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3655                 }
3656
3657                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3658         }
3659 }
3660
3661 /*
3662  * Give control back to hardware management
3663  * controller if there is one.
3664  */
3665 static void
3666 em_rel_mgmt(struct adapter *adapter)
3667 {
3668         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3669                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3670
3671                 /* re-enable hardware interception of ARP */
3672                 manc |= E1000_MANC_ARP_EN;
3673
3674                 if (adapter->hw.mac.type >= e1000_82571)
3675                         manc &= ~E1000_MANC_EN_MNG2HOST;
3676
3677                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3678         }
3679 }
3680
3681 /*
3682  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3683  * For ASF and Pass Through versions of f/w this means that
3684  * the driver is loaded.  For AMT version (only with 82573)
3685  * of the f/w this means that the network i/f is open.
3686  */
3687 static void
3688 em_get_hw_control(struct adapter *adapter)
3689 {
3690         /* Let firmware know the driver has taken over */
3691         if (adapter->hw.mac.type == e1000_82573) {
3692                 uint32_t swsm;
3693
3694                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3695                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3696                     swsm | E1000_SWSM_DRV_LOAD);
3697         } else {
3698                 uint32_t ctrl_ext;
3699
3700                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3701                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3702                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3703         }
3704         adapter->flags |= EM_FLAG_HW_CTRL;
3705 }
3706
3707 /*
3708  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3709  * For ASF and Pass Through versions of f/w this means that the
3710  * driver is no longer loaded.  For AMT version (only with 82573)
3711  * of the f/w this means that the network i/f is closed.
3712  */
3713 static void
3714 em_rel_hw_control(struct adapter *adapter)
3715 {
3716         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3717                 return;
3718         adapter->flags &= ~EM_FLAG_HW_CTRL;
3719
3720         /* Let firmware taken over control of h/w */
3721         if (adapter->hw.mac.type == e1000_82573) {
3722                 uint32_t swsm;
3723
3724                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3725                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3726                     swsm & ~E1000_SWSM_DRV_LOAD);
3727         } else {
3728                 uint32_t ctrl_ext;
3729
3730                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3731                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3732                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3733         }
3734 }
3735
3736 static int
3737 em_is_valid_eaddr(const uint8_t *addr)
3738 {
3739         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3740
3741         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3742                 return (FALSE);
3743
3744         return (TRUE);
3745 }
3746
3747 /*
3748  * Enable PCI Wake On Lan capability
3749  */
3750 void
3751 em_enable_wol(device_t dev)
3752 {
3753         uint16_t cap, status;
3754         uint8_t id;
3755
3756         /* First find the capabilities pointer*/
3757         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3758
3759         /* Read the PM Capabilities */
3760         id = pci_read_config(dev, cap, 1);
3761         if (id != PCIY_PMG)     /* Something wrong */
3762                 return;
3763
3764         /*
3765          * OK, we have the power capabilities,
3766          * so now get the status register
3767          */
3768         cap += PCIR_POWER_STATUS;
3769         status = pci_read_config(dev, cap, 2);
3770         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3771         pci_write_config(dev, cap, status, 2);
3772 }
3773
3774
3775 /*
3776  * 82544 Coexistence issue workaround.
3777  *    There are 2 issues.
3778  *       1. Transmit Hang issue.
3779  *    To detect this issue, following equation can be used...
3780  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3781  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3782  *
3783  *       2. DAC issue.
3784  *    To detect this issue, following equation can be used...
3785  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3786  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3787  *
3788  *    WORKAROUND:
3789  *        Make sure we do not have ending address
3790  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3791  */
3792 static uint32_t
3793 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3794 {
3795         uint32_t safe_terminator;
3796
3797         /*
3798          * Since issue is sensitive to length and address.
3799          * Let us first check the address...
3800          */
3801         if (length <= 4) {
3802                 desc_array->descriptor[0].address = address;
3803                 desc_array->descriptor[0].length = length;
3804                 desc_array->elements = 1;
3805                 return (desc_array->elements);
3806         }
3807
3808         safe_terminator =
3809         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3810
3811         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3812         if (safe_terminator == 0 ||
3813             (safe_terminator > 4 && safe_terminator < 9) ||
3814             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3815                 desc_array->descriptor[0].address = address;
3816                 desc_array->descriptor[0].length = length;
3817                 desc_array->elements = 1;
3818                 return (desc_array->elements);
3819         }
3820
3821         desc_array->descriptor[0].address = address;
3822         desc_array->descriptor[0].length = length - 4;
3823         desc_array->descriptor[1].address = address + (length - 4);
3824         desc_array->descriptor[1].length = 4;
3825         desc_array->elements = 2;
3826         return (desc_array->elements);
3827 }
3828
3829 static void
3830 em_update_stats(struct adapter *adapter)
3831 {
3832         struct ifnet *ifp = &adapter->arpcom.ac_if;
3833
3834         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3835             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3836                 adapter->stats.symerrs +=
3837                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3838                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3839         }
3840         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3841         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3842         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3843         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3844
3845         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3846         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3847         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3848         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3849         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3850         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3851         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3852         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3853         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3854         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3855         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3856         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3857         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3858         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3859         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3860         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3861         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3862         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3863         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3864         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3865
3866         /* For the 64-bit byte counters the low dword must be read first. */
3867         /* Both registers clear on the read of the high dword */
3868
3869         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3870         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3871
3872         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3873         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3874         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3875         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3876         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3877
3878         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3879         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3880
3881         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3882         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3883         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3884         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3885         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3886         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3887         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3888         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3889         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3890         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3891
3892         if (adapter->hw.mac.type >= e1000_82543) {
3893                 adapter->stats.algnerrc +=
3894                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3895                 adapter->stats.rxerrc +=
3896                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3897                 adapter->stats.tncrs +=
3898                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3899                 adapter->stats.cexterr +=
3900                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3901                 adapter->stats.tsctc +=
3902                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3903                 adapter->stats.tsctfc +=
3904                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3905         }
3906
3907         IFNET_STAT_SET(ifp, collisions, adapter->stats.colc);
3908
3909         /* Rx Errors */
3910         IFNET_STAT_SET(ifp, ierrors,
3911             adapter->dropped_pkts + adapter->stats.rxerrc +
3912             adapter->stats.crcerrs + adapter->stats.algnerrc +
3913             adapter->stats.ruc + adapter->stats.roc +
3914             adapter->stats.mpc + adapter->stats.cexterr);
3915
3916         /* Tx Errors */
3917         IFNET_STAT_SET(ifp, oerrors,
3918             adapter->stats.ecol + adapter->stats.latecol +
3919             adapter->watchdog_events);
3920 }
3921
3922 static void
3923 em_print_debug_info(struct adapter *adapter)
3924 {
3925         device_t dev = adapter->dev;
3926         uint8_t *hw_addr = adapter->hw.hw_addr;
3927
3928         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3929         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3930             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3931             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3932         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3933             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3934             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3935         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3936             adapter->hw.fc.high_water,
3937             adapter->hw.fc.low_water);
3938         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3939             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3940             E1000_READ_REG(&adapter->hw, E1000_TADV));
3941         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3942             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3943             E1000_READ_REG(&adapter->hw, E1000_RADV));
3944         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3945             (long long)adapter->tx_fifo_wrk_cnt,
3946             (long long)adapter->tx_fifo_reset_cnt);
3947         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3948             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3949             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3950         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3951             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3952             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3953         device_printf(dev, "Num Tx descriptors avail = %d\n",
3954             adapter->num_tx_desc_avail);
3955         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3956             adapter->no_tx_desc_avail1);
3957         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3958             adapter->no_tx_desc_avail2);
3959         device_printf(dev, "Std mbuf failed = %ld\n",
3960             adapter->mbuf_alloc_failed);
3961         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3962             adapter->mbuf_cluster_failed);
3963         device_printf(dev, "Driver dropped packets = %ld\n",
3964             adapter->dropped_pkts);
3965         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3966             adapter->no_tx_dma_setup);
3967 }
3968
3969 static void
3970 em_print_hw_stats(struct adapter *adapter)
3971 {
3972         device_t dev = adapter->dev;
3973
3974         device_printf(dev, "Excessive collisions = %lld\n",
3975             (long long)adapter->stats.ecol);
3976 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3977         device_printf(dev, "Symbol errors = %lld\n",
3978             (long long)adapter->stats.symerrs);
3979 #endif
3980         device_printf(dev, "Sequence errors = %lld\n",
3981             (long long)adapter->stats.sec);
3982         device_printf(dev, "Defer count = %lld\n",
3983             (long long)adapter->stats.dc);
3984         device_printf(dev, "Missed Packets = %lld\n",
3985             (long long)adapter->stats.mpc);
3986         device_printf(dev, "Receive No Buffers = %lld\n",
3987             (long long)adapter->stats.rnbc);
3988         /* RLEC is inaccurate on some hardware, calculate our own. */
3989         device_printf(dev, "Receive Length Errors = %lld\n",
3990             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3991         device_printf(dev, "Receive errors = %lld\n",
3992             (long long)adapter->stats.rxerrc);
3993         device_printf(dev, "Crc errors = %lld\n",
3994             (long long)adapter->stats.crcerrs);
3995         device_printf(dev, "Alignment errors = %lld\n",
3996             (long long)adapter->stats.algnerrc);
3997         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3998             (long long)adapter->stats.cexterr);
3999         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
4000         device_printf(dev, "watchdog timeouts = %ld\n",
4001             adapter->watchdog_events);
4002         device_printf(dev, "XON Rcvd = %lld\n",
4003             (long long)adapter->stats.xonrxc);
4004         device_printf(dev, "XON Xmtd = %lld\n",
4005             (long long)adapter->stats.xontxc);
4006         device_printf(dev, "XOFF Rcvd = %lld\n",
4007             (long long)adapter->stats.xoffrxc);
4008         device_printf(dev, "XOFF Xmtd = %lld\n",
4009             (long long)adapter->stats.xofftxc);
4010         device_printf(dev, "Good Packets Rcvd = %lld\n",
4011             (long long)adapter->stats.gprc);
4012         device_printf(dev, "Good Packets Xmtd = %lld\n",
4013             (long long)adapter->stats.gptc);
4014 }
4015
4016 static void
4017 em_print_nvm_info(struct adapter *adapter)
4018 {
4019         uint16_t eeprom_data;
4020         int i, j, row = 0;
4021
4022         /* Its a bit crude, but it gets the job done */
4023         kprintf("\nInterface EEPROM Dump:\n");
4024         kprintf("Offset\n0x0000  ");
4025         for (i = 0, j = 0; i < 32; i++, j++) {
4026                 if (j == 8) { /* Make the offset block */
4027                         j = 0; ++row;
4028                         kprintf("\n0x00%x0  ",row);
4029                 }
4030                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
4031                 kprintf("%04x ", eeprom_data);
4032         }
4033         kprintf("\n");
4034 }
4035
4036 static int
4037 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
4038 {
4039         struct adapter *adapter;
4040         struct ifnet *ifp;
4041         int error, result;
4042
4043         result = -1;
4044         error = sysctl_handle_int(oidp, &result, 0, req);
4045         if (error || !req->newptr)
4046                 return (error);
4047
4048         adapter = (struct adapter *)arg1;
4049         ifp = &adapter->arpcom.ac_if;
4050
4051         lwkt_serialize_enter(ifp->if_serializer);
4052
4053         if (result == 1)
4054                 em_print_debug_info(adapter);
4055
4056         /*
4057          * This value will cause a hex dump of the
4058          * first 32 16-bit words of the EEPROM to
4059          * the screen.
4060          */
4061         if (result == 2)
4062                 em_print_nvm_info(adapter);
4063
4064         lwkt_serialize_exit(ifp->if_serializer);
4065
4066         return (error);
4067 }
4068
4069 static int
4070 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
4071 {
4072         int error, result;
4073
4074         result = -1;
4075         error = sysctl_handle_int(oidp, &result, 0, req);
4076         if (error || !req->newptr)
4077                 return (error);
4078
4079         if (result == 1) {
4080                 struct adapter *adapter = (struct adapter *)arg1;
4081                 struct ifnet *ifp = &adapter->arpcom.ac_if;
4082
4083                 lwkt_serialize_enter(ifp->if_serializer);
4084                 em_print_hw_stats(adapter);
4085                 lwkt_serialize_exit(ifp->if_serializer);
4086         }
4087         return (error);
4088 }
4089
4090 static void
4091 em_add_sysctl(struct adapter *adapter)
4092 {
4093         struct sysctl_ctx_list *ctx;
4094         struct sysctl_oid *tree;
4095         int access;
4096
4097         ctx = device_get_sysctl_ctx(adapter->dev);
4098         tree = device_get_sysctl_tree(adapter->dev);
4099         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4100             OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4101             em_sysctl_debug_info, "I", "Debug Information");
4102
4103         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4104             OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4105             em_sysctl_stats, "I", "Statistics");
4106
4107         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4108             OID_AUTO, "rxd", CTLFLAG_RD,
4109             &adapter->num_rx_desc, 0, NULL);
4110         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4111             OID_AUTO, "txd", CTLFLAG_RD,
4112             &adapter->num_tx_desc, 0, NULL);
4113
4114         if (adapter->hw.mac.type >= e1000_82540) {
4115                 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4116                     OID_AUTO, "int_throttle_ceil",
4117                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4118                     em_sysctl_int_throttle, "I",
4119                     "interrupt throttling rate");
4120         }
4121         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4122             OID_AUTO, "int_tx_nsegs",
4123             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4124             em_sysctl_int_tx_nsegs, "I",
4125             "# segments per TX interrupt");
4126         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4127             OID_AUTO, "wreg_tx_nsegs", CTLFLAG_RW,
4128             &adapter->tx_wreg_nsegs, 0,
4129             "# segments before write to hardware register");
4130
4131         access = CTLFLAG_RW;
4132         if (adapter->hw.mac.type == e1000_pchlan) {
4133                 /*
4134                  * Only pause reception is supported, so make this
4135                  * sysctl read-only for PCH.
4136                  */
4137                 access = CTLFLAG_RD;
4138         }
4139         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4140             OID_AUTO, "flow_ctrl", CTLTYPE_STRING|access, adapter, 0,
4141             em_sysctl_flowctrl, "A",
4142             "flow control: full, rx_pause, tx_pause, none");
4143 }
4144
4145 static int
4146 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4147 {
4148         struct adapter *adapter = (void *)arg1;
4149         struct ifnet *ifp = &adapter->arpcom.ac_if;
4150         int error, throttle;
4151
4152         throttle = adapter->int_throttle_ceil;
4153         error = sysctl_handle_int(oidp, &throttle, 0, req);
4154         if (error || req->newptr == NULL)
4155                 return error;
4156         if (throttle < 0 || throttle > 1000000000 / 256)
4157                 return EINVAL;
4158
4159         if (throttle) {
4160                 /*
4161                  * Set the interrupt throttling rate in 256ns increments,
4162                  * recalculate sysctl value assignment to get exact frequency.
4163                  */
4164                 throttle = 1000000000 / 256 / throttle;
4165
4166                 /* Upper 16bits of ITR is reserved and should be zero */
4167                 if (throttle & 0xffff0000)
4168                         return EINVAL;
4169         }
4170
4171         lwkt_serialize_enter(ifp->if_serializer);
4172
4173         if (throttle)
4174                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4175         else
4176                 adapter->int_throttle_ceil = 0;
4177
4178         if (ifp->if_flags & IFF_RUNNING)
4179                 em_set_itr(adapter, throttle);
4180
4181         lwkt_serialize_exit(ifp->if_serializer);
4182
4183         if (bootverbose) {
4184                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4185                           adapter->int_throttle_ceil);
4186         }
4187         return 0;
4188 }
4189
4190 static int
4191 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4192 {
4193         struct adapter *adapter = (void *)arg1;
4194         struct ifnet *ifp = &adapter->arpcom.ac_if;
4195         int error, segs;
4196
4197         segs = adapter->tx_int_nsegs;
4198         error = sysctl_handle_int(oidp, &segs, 0, req);
4199         if (error || req->newptr == NULL)
4200                 return error;
4201         if (segs <= 0)
4202                 return EINVAL;
4203
4204         lwkt_serialize_enter(ifp->if_serializer);
4205
4206         /*
4207          * Don't allow int_tx_nsegs to become:
4208          * o  Less the oact_tx_desc
4209          * o  Too large that no TX desc will cause TX interrupt to
4210          *    be generated (OACTIVE will never recover)
4211          * o  Too small that will cause tx_dd[] overflow
4212          */
4213         if (segs < adapter->oact_tx_desc ||
4214             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4215             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4216                 error = EINVAL;
4217         } else {
4218                 error = 0;
4219                 adapter->tx_int_nsegs = segs;
4220         }
4221
4222         lwkt_serialize_exit(ifp->if_serializer);
4223
4224         return error;
4225 }
4226
4227 static void
4228 em_set_itr(struct adapter *adapter, uint32_t itr)
4229 {
4230         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4231         if (adapter->hw.mac.type == e1000_82574) {
4232                 int i;
4233
4234                 /*
4235                  * When using MSIX interrupts we need to
4236                  * throttle using the EITR register
4237                  */
4238                 for (i = 0; i < 4; ++i) {
4239                         E1000_WRITE_REG(&adapter->hw,
4240                             E1000_EITR_82574(i), itr);
4241                 }
4242         }
4243 }
4244
4245 static void
4246 em_disable_aspm(struct adapter *adapter)
4247 {
4248         uint16_t link_cap, link_ctrl, disable;
4249         uint8_t pcie_ptr, reg;
4250         device_t dev = adapter->dev;
4251
4252         switch (adapter->hw.mac.type) {
4253         case e1000_82571:
4254         case e1000_82572:
4255         case e1000_82573:
4256                 /*
4257                  * 82573 specification update
4258                  * errata #8 disable L0s
4259                  * errata #41 disable L1
4260                  *
4261                  * 82571/82572 specification update
4262                  # errata #13 disable L1
4263                  * errata #68 disable L0s
4264                  */
4265                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4266                 break;
4267
4268         case e1000_82574:
4269         case e1000_82583:
4270                 /*
4271                  * 82574 specification update errata #20
4272                  * 82583 specification update errata #9
4273                  *
4274                  * There is no need to disable L1
4275                  */
4276                 disable = PCIEM_LNKCTL_ASPM_L0S;
4277                 break;
4278
4279         default:
4280                 return;
4281         }
4282
4283         pcie_ptr = pci_get_pciecap_ptr(dev);
4284         if (pcie_ptr == 0)
4285                 return;
4286
4287         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4288         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4289                 return;
4290
4291         if (bootverbose) {
4292                 if_printf(&adapter->arpcom.ac_if,
4293                     "disable ASPM %#02x\n", disable);
4294         }
4295
4296         reg = pcie_ptr + PCIER_LINKCTRL;
4297         link_ctrl = pci_read_config(dev, reg, 2);
4298         link_ctrl &= ~disable;
4299         pci_write_config(dev, reg, link_ctrl, 2);
4300 }
4301
4302 static int
4303 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4304 {
4305         int iphlen, hoff, thoff, ex = 0;
4306         struct mbuf *m;
4307         struct ip *ip;
4308
4309         m = *mp;
4310         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4311
4312         iphlen = m->m_pkthdr.csum_iphlen;
4313         thoff = m->m_pkthdr.csum_thlen;
4314         hoff = m->m_pkthdr.csum_lhlen;
4315
4316         KASSERT(iphlen > 0, ("invalid ip hlen"));
4317         KASSERT(thoff > 0, ("invalid tcp hlen"));
4318         KASSERT(hoff > 0, ("invalid ether hlen"));
4319
4320         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4321                 ex = 4;
4322
4323         if (m->m_len < hoff + iphlen + thoff + ex) {
4324                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4325                 if (m == NULL) {
4326                         *mp = NULL;
4327                         return ENOBUFS;
4328                 }
4329                 *mp = m;
4330         }
4331         ip = mtodoff(m, struct ip *, hoff);
4332         ip->ip_len = 0;
4333
4334         return 0;
4335 }
4336
4337 static int
4338 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4339     uint32_t *txd_upper, uint32_t *txd_lower)
4340 {
4341         struct e1000_context_desc *TXD;
4342         int hoff, iphlen, thoff, hlen;
4343         int mss, pktlen, curr_txd;
4344
4345         iphlen = mp->m_pkthdr.csum_iphlen;
4346         thoff = mp->m_pkthdr.csum_thlen;
4347         hoff = mp->m_pkthdr.csum_lhlen;
4348         mss = mp->m_pkthdr.tso_segsz;
4349         pktlen = mp->m_pkthdr.len;
4350
4351         if (adapter->csum_flags == CSUM_TSO &&
4352             adapter->csum_iphlen == iphlen &&
4353             adapter->csum_lhlen == hoff &&
4354             adapter->csum_thlen == thoff &&
4355             adapter->csum_mss == mss &&
4356             adapter->csum_pktlen == pktlen) {
4357                 *txd_upper = adapter->csum_txd_upper;
4358                 *txd_lower = adapter->csum_txd_lower;
4359                 return 0;
4360         }
4361         hlen = hoff + iphlen + thoff;
4362
4363         /*
4364          * Setup a new TSO context.
4365          */
4366
4367         curr_txd = adapter->next_avail_tx_desc;
4368         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4369
4370         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4371                      E1000_TXD_DTYP_D |         /* Data descr type */
4372                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4373
4374         /* IP and/or TCP header checksum calculation and insertion. */
4375         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4376
4377         /*
4378          * Start offset for header checksum calculation.
4379          * End offset for header checksum calculation.
4380          * Offset of place put the checksum.
4381          */
4382         TXD->lower_setup.ip_fields.ipcss = hoff;
4383         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4384         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4385
4386         /*
4387          * Start offset for payload checksum calculation.
4388          * End offset for payload checksum calculation.
4389          * Offset of place to put the checksum.
4390          */
4391         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4392         TXD->upper_setup.tcp_fields.tucse = 0;
4393         TXD->upper_setup.tcp_fields.tucso =
4394             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4395
4396         /*
4397          * Payload size per packet w/o any headers.
4398          * Length of all headers up to payload.
4399          */
4400         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4401         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4402         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4403                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4404                                 E1000_TXD_CMD_TSE |     /* TSE context */
4405                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4406                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4407                                 (pktlen - hlen));       /* Total len */
4408
4409         /* Save the information for this TSO context */
4410         adapter->csum_flags = CSUM_TSO;
4411         adapter->csum_lhlen = hoff;
4412         adapter->csum_iphlen = iphlen;
4413         adapter->csum_thlen = thoff;
4414         adapter->csum_mss = mss;
4415         adapter->csum_pktlen = pktlen;
4416         adapter->csum_txd_upper = *txd_upper;
4417         adapter->csum_txd_lower = *txd_lower;
4418
4419         if (++curr_txd == adapter->num_tx_desc)
4420                 curr_txd = 0;
4421
4422         KKASSERT(adapter->num_tx_desc_avail > 0);
4423         adapter->num_tx_desc_avail--;
4424
4425         adapter->next_avail_tx_desc = curr_txd;
4426         return 1;
4427 }
4428
4429 static enum e1000_fc_mode
4430 em_str2fc(const char *str)
4431 {
4432         if (strcmp(str, "none") == 0)
4433                 return e1000_fc_none;
4434         else if (strcmp(str, "rx_pause") == 0)
4435                 return e1000_fc_rx_pause;
4436         else if (strcmp(str, "tx_pause") == 0)
4437                 return e1000_fc_tx_pause;
4438         else
4439                 return e1000_fc_full;
4440 }
4441
4442 static void
4443 em_fc2str(enum e1000_fc_mode fc, char *str, int len)
4444 {
4445         const char *fc_str = "full";
4446
4447         switch (fc) {
4448         case e1000_fc_none:
4449                 fc_str = "none";
4450                 break;
4451
4452         case e1000_fc_rx_pause:
4453                 fc_str = "rx_pause";
4454                 break;
4455
4456         case e1000_fc_tx_pause:
4457                 fc_str = "tx_pause";
4458                 break;
4459
4460         default:
4461                 break;
4462         }
4463         strlcpy(str, fc_str, len);
4464 }
4465
4466 static int
4467 em_sysctl_flowctrl(SYSCTL_HANDLER_ARGS)
4468 {
4469         struct adapter *adapter = arg1;
4470         struct ifnet *ifp = &adapter->arpcom.ac_if;
4471         char flowctrl[EM_FLOWCTRL_STRLEN];
4472         enum e1000_fc_mode fc;
4473         int error;
4474
4475         em_fc2str(adapter->flow_ctrl, flowctrl, sizeof(flowctrl));
4476         error = sysctl_handle_string(oidp, flowctrl, sizeof(flowctrl), req);
4477         if (error != 0 || req->newptr == NULL)
4478                 return error;
4479
4480         fc = em_str2fc(flowctrl);
4481
4482         ifnet_serialize_all(ifp);
4483         if (fc == adapter->flow_ctrl)
4484                 goto done;
4485
4486         adapter->flow_ctrl = fc;
4487         adapter->hw.fc.requested_mode = adapter->flow_ctrl;
4488         adapter->hw.fc.current_mode = adapter->flow_ctrl;
4489         e1000_force_mac_fc(&adapter->hw);
4490 done:
4491         ifnet_deserialize_all(ifp);
4492
4493         return 0;
4494 }