2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
31 * USB Open Host Controller driver.
33 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
34 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
37 #include <sys/stdint.h>
38 #include <sys/param.h>
39 #include <sys/queue.h>
40 #include <sys/types.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
44 #include <sys/module.h>
46 #include <sys/mutex.h>
47 #include <sys/condvar.h>
48 #include <sys/sysctl.h>
49 #include <sys/unistd.h>
50 #include <sys/callout.h>
51 #include <sys/malloc.h>
54 #include <bus/u4b/usb.h>
55 #include <bus/u4b/usbdi.h>
57 #define USB_DEBUG_VAR ohcidebug
59 #include <bus/u4b/usb_core.h>
60 #include <bus/u4b/usb_debug.h>
61 #include <bus/u4b/usb_busdma.h>
62 #include <bus/u4b/usb_process.h>
63 #include <bus/u4b/usb_transfer.h>
64 #include <bus/u4b/usb_device.h>
65 #include <bus/u4b/usb_hub.h>
66 #include <bus/u4b/usb_util.h>
68 #include <bus/u4b/usb_controller.h>
69 #include <bus/u4b/usb_bus.h>
70 #include <bus/u4b/controller/ohci.h>
71 #include <bus/u4b/controller/ohcireg.h>
73 #define OHCI_BUS2SC(bus) \
74 ((ohci_softc_t *)(((uint8_t *)(bus)) - \
75 ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
78 static int ohcidebug = 0;
80 static SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
81 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
82 &ohcidebug, 0, "ohci debug level");
84 TUNABLE_INT("hw.usb.ohci.debug", &ohcidebug);
86 static void ohci_dumpregs(ohci_softc_t *);
87 static void ohci_dump_tds(ohci_td_t *);
88 static uint8_t ohci_dump_td(ohci_td_t *);
89 static void ohci_dump_ed(ohci_ed_t *);
90 static uint8_t ohci_dump_itd(ohci_itd_t *);
91 static void ohci_dump_itds(ohci_itd_t *);
95 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
96 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
97 #define OWRITE1(sc, r, x) \
98 do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
99 #define OWRITE2(sc, r, x) \
100 do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
101 #define OWRITE4(sc, r, x) \
102 do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
103 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
104 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
105 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
107 #define OHCI_INTR_ENDPT 1
109 extern struct usb_bus_methods ohci_bus_methods;
110 extern struct usb_pipe_methods ohci_device_bulk_methods;
111 extern struct usb_pipe_methods ohci_device_ctrl_methods;
112 extern struct usb_pipe_methods ohci_device_intr_methods;
113 extern struct usb_pipe_methods ohci_device_isoc_methods;
115 static void ohci_do_poll(struct usb_bus *bus);
116 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
117 static void ohci_timeout(void *arg);
118 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
119 static void ohci_root_intr(ohci_softc_t *sc);
121 struct ohci_std_temp {
122 struct usb_page_cache *pc;
128 uint16_t max_frame_size;
130 uint8_t setup_alt_next;
134 static struct ohci_hcca *
135 ohci_get_hcca(ohci_softc_t *sc)
137 usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
138 return (sc->sc_hcca_p);
142 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
144 struct ohci_softc *sc = OHCI_BUS2SC(bus);
147 cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
148 sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
150 cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
151 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
153 cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
154 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
156 cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
157 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
159 for (i = 0; i != OHCI_NO_EDS; i++) {
160 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
161 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
166 ohci_controller_init(ohci_softc_t *sc, int do_suspend)
168 struct usb_page_search buf_res;
177 /* Determine in what context we are running. */
178 ctl = OREAD4(sc, OHCI_CONTROL);
180 /* SMM active, request change */
181 DPRINTF("SMM active, request owner change\n");
182 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
183 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
184 usb_pause_mtx(NULL, hz / 1000);
185 ctl = OREAD4(sc, OHCI_CONTROL);
188 device_printf(sc->sc_bus.bdev,
189 "SMM does not respond, resetting\n");
190 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
194 DPRINTF("cold started\n");
196 /* controller was cold started */
198 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
202 * This reset should not be necessary according to the OHCI spec, but
203 * without it some controllers do not start.
205 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
206 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
209 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
211 /* we now own the host controller and the bus has been reset */
212 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
214 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
215 /* nominal time for a reset is 10 us */
216 for (i = 0; i < 10; i++) {
218 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
224 device_printf(sc->sc_bus.bdev, "reset timeout\n");
225 return (USB_ERR_IOERROR);
228 if (ohcidebug > 15) {
234 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND);
235 return (USB_ERR_NORMAL_COMPLETION);
238 /* The controller is now in SUSPEND state, we have 2ms to finish. */
240 /* set up HC registers */
241 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
242 OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
244 usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
245 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
247 usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
248 OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
250 /* disable all interrupts and then switch on all desired interrupts */
251 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
252 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
253 /* switch on desired functional features */
254 ctl = OREAD4(sc, OHCI_CONTROL);
255 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
256 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
257 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
258 /* And finally start it! */
259 OWRITE4(sc, OHCI_CONTROL, ctl);
262 * The controller is now OPERATIONAL. Set a some final
263 * registers that should be set earlier, but that the
264 * controller ignores when in the SUSPEND state.
266 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
267 fm |= OHCI_FSMPS(ival) | ival;
268 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
269 per = OHCI_PERIODIC(ival); /* 90% periodic */
270 OWRITE4(sc, OHCI_PERIODIC_START, per);
272 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
273 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
274 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
275 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
277 USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
278 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
281 * The AMD756 requires a delay before re-reading the register,
282 * otherwise it will occasionally report 0 ports.
285 for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
287 USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
288 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
296 return (USB_ERR_NORMAL_COMPLETION);
299 static struct ohci_ed *
300 ohci_init_ed(struct usb_page_cache *pc)
302 struct usb_page_search buf_res;
305 usbd_get_page(pc, 0, &buf_res);
309 ed->ed_self = htole32(buf_res.physaddr);
310 ed->ed_flags = htole32(OHCI_ED_SKIP);
317 ohci_init(ohci_softc_t *sc)
319 struct usb_page_search buf_res;
327 sc->sc_eintrs = OHCI_NORMAL_INTRS;
334 ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
337 ohci_init_ed(&sc->sc_hw.bulk_start_pc);
340 ohci_init_ed(&sc->sc_hw.isoc_start_pc);
342 for (i = 0; i != OHCI_NO_EDS; i++) {
343 sc->sc_intr_p_last[i] =
344 ohci_init_ed(sc->sc_hw.intr_start_pc + i);
348 * the QHs are arranged to give poll intervals that are
349 * powers of 2 times 1ms
351 bit = OHCI_NO_EDS / 2;
358 y = (x ^ bit) | (bit / 2);
361 * the next QH has half the poll interval
363 ed_x = sc->sc_intr_p_last[x];
364 ed_y = sc->sc_intr_p_last[y];
367 ed_x->ed_next = ed_y->ed_self;
379 ed_int = sc->sc_intr_p_last[0];
380 ed_isc = sc->sc_isoc_p_last;
382 /* the last (1ms) QH */
383 ed_int->next = ed_isc;
384 ed_int->ed_next = ed_isc->ed_self;
386 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
388 sc->sc_hcca_p = buf_res.buffer;
391 * Fill HCCA interrupt table. The bit reversal is to get
392 * the tree set up properly to spread the interrupts.
394 for (i = 0; i != OHCI_NO_INTRS; i++) {
395 sc->sc_hcca_p->hcca_interrupt_table[i] =
396 sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
398 /* flush all cache into memory */
400 usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
402 /* set up the bus struct */
403 sc->sc_bus.methods = &ohci_bus_methods;
405 usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_lock, 0);
408 if (ohcidebug > 15) {
409 for (i = 0; i != OHCI_NO_EDS; i++) {
410 kprintf("ed#%d ", i);
411 ohci_dump_ed(sc->sc_intr_p_last[i]);
414 ohci_dump_ed(sc->sc_isoc_p_last);
418 sc->sc_bus.usbrev = USB_REV_1_0;
420 if (ohci_controller_init(sc, 0) != 0)
421 return (USB_ERR_INVAL);
423 /* catch any lost interrupts */
424 ohci_do_poll(&sc->sc_bus);
425 return (USB_ERR_NORMAL_COMPLETION);
429 * shut down the controller when the system is going down
432 ohci_detach(struct ohci_softc *sc)
434 USB_BUS_LOCK(&sc->sc_bus);
436 usb_callout_stop(&sc->sc_tmo_rhsc);
438 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
439 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
441 USB_BUS_UNLOCK(&sc->sc_bus);
443 /* XXX let stray task complete */
444 usb_pause_mtx(NULL, hz / 20);
446 usb_callout_drain(&sc->sc_tmo_rhsc);
450 ohci_suspend(ohci_softc_t *sc)
459 /* reset HC and leave it suspended */
460 ohci_controller_init(sc, 1);
464 ohci_resume(ohci_softc_t *sc)
473 /* some broken BIOSes never initialize the Controller chip */
474 ohci_controller_init(sc, 0);
476 /* catch any lost interrupts */
477 ohci_do_poll(&sc->sc_bus);
482 ohci_dumpregs(ohci_softc_t *sc)
484 struct ohci_hcca *hcca;
486 DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
487 OREAD4(sc, OHCI_REVISION),
488 OREAD4(sc, OHCI_CONTROL),
489 OREAD4(sc, OHCI_COMMAND_STATUS));
490 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
491 OREAD4(sc, OHCI_INTERRUPT_STATUS),
492 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
493 OREAD4(sc, OHCI_INTERRUPT_DISABLE));
494 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
495 OREAD4(sc, OHCI_HCCA),
496 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
497 OREAD4(sc, OHCI_CONTROL_HEAD_ED));
498 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
499 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
500 OREAD4(sc, OHCI_BULK_HEAD_ED),
501 OREAD4(sc, OHCI_BULK_CURRENT_ED));
502 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
503 OREAD4(sc, OHCI_DONE_HEAD),
504 OREAD4(sc, OHCI_FM_INTERVAL),
505 OREAD4(sc, OHCI_FM_REMAINING));
506 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
507 OREAD4(sc, OHCI_FM_NUMBER),
508 OREAD4(sc, OHCI_PERIODIC_START),
509 OREAD4(sc, OHCI_LS_THRESHOLD));
510 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
511 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
512 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
513 OREAD4(sc, OHCI_RH_STATUS));
514 DPRINTF(" port1=0x%08x port2=0x%08x\n",
515 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
516 OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
518 hcca = ohci_get_hcca(sc);
520 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
521 le32toh(hcca->hcca_frame_number),
522 le32toh(hcca->hcca_done_head));
525 ohci_dump_tds(ohci_td_t *std)
527 for (; std; std = std->obj_next) {
528 if (ohci_dump_td(std)) {
535 ohci_dump_td(ohci_td_t *std)
540 usb_pc_cpu_invalidate(std->page_cache);
542 td_flags = le32toh(std->td_flags);
543 temp = (std->td_next == 0);
545 kprintf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
546 "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
547 std, le32toh(std->td_self),
548 (td_flags & OHCI_TD_R) ? "-R" : "",
549 (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
550 (td_flags & OHCI_TD_IN) ? "-IN" : "",
551 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
552 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
553 OHCI_TD_GET_DI(td_flags),
554 OHCI_TD_GET_EC(td_flags),
555 OHCI_TD_GET_CC(td_flags),
556 le32toh(std->td_cbp),
557 le32toh(std->td_next),
558 le32toh(std->td_be));
564 ohci_dump_itd(ohci_itd_t *sitd)
570 usb_pc_cpu_invalidate(sitd->page_cache);
572 itd_flags = le32toh(sitd->itd_flags);
573 temp = (sitd->itd_next == 0);
575 kprintf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
576 "bp0=0x%08x next=0x%08x be=0x%08x\n",
577 sitd, le32toh(sitd->itd_self),
578 OHCI_ITD_GET_SF(itd_flags),
579 OHCI_ITD_GET_DI(itd_flags),
580 OHCI_ITD_GET_FC(itd_flags),
581 OHCI_ITD_GET_CC(itd_flags),
582 le32toh(sitd->itd_bp0),
583 le32toh(sitd->itd_next),
584 le32toh(sitd->itd_be));
585 for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
586 kprintf("offs[%d]=0x%04x ", i,
587 (uint32_t)le16toh(sitd->itd_offset[i]));
595 ohci_dump_itds(ohci_itd_t *sitd)
597 for (; sitd; sitd = sitd->obj_next) {
598 if (ohci_dump_itd(sitd)) {
605 ohci_dump_ed(ohci_ed_t *sed)
610 usb_pc_cpu_invalidate(sed->page_cache);
612 ed_flags = le32toh(sed->ed_flags);
613 ed_headp = le32toh(sed->ed_headp);
615 kprintf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
616 "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
617 sed, le32toh(sed->ed_self),
618 OHCI_ED_GET_FA(ed_flags),
619 OHCI_ED_GET_EN(ed_flags),
620 OHCI_ED_GET_MAXP(ed_flags),
621 (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
622 (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
623 (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
624 (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
625 (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
626 le32toh(sed->ed_tailp),
627 (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
628 (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
629 le32toh(sed->ed_headp),
630 le32toh(sed->ed_next));
636 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
638 /* check for early completion */
639 if (ohci_check_transfer(xfer)) {
642 /* put transfer on interrupt queue */
643 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
645 /* start timeout, if any */
646 if (xfer->timeout != 0) {
647 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
651 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
653 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
655 DPRINTFN(11, "%p to %p\n", sed, last);
657 if (sed->prev != NULL) {
658 /* should not happen */
659 DPRINTFN(0, "ED already linked!\n");
662 /* (sc->sc_bus.bus_lock) must be locked */
664 sed->next = last->next;
665 sed->ed_next = last->ed_next;
670 usb_pc_cpu_flush(sed->page_cache);
673 * the last->next->prev is never followed: sed->next->prev = sed;
677 last->ed_next = sed->ed_self;
679 usb_pc_cpu_flush(last->page_cache);
684 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
686 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
688 DPRINTFN(11, "%p from %p\n", sed, last);
690 /* (sc->sc_bus.bus_lock) must be locked */
692 /* only remove if not removed from a queue */
695 sed->prev->next = sed->next;
696 sed->prev->ed_next = sed->ed_next;
698 usb_pc_cpu_flush(sed->prev->page_cache);
701 sed->next->prev = sed->prev;
702 usb_pc_cpu_flush(sed->next->page_cache);
704 last = ((last == sed) ? sed->prev : last);
708 usb_pc_cpu_flush(sed->page_cache);
714 ohci_isoc_done(struct usb_xfer *xfer)
717 uint32_t *plen = xfer->frlengths;
718 volatile uint16_t *olen;
720 ohci_itd_t *td = xfer->td_transfer_first;
724 panic("%s:%d: out of TD's\n",
725 __FUNCTION__, __LINE__);
729 DPRINTF("isoc TD\n");
733 usb_pc_cpu_invalidate(td->page_cache);
735 nframes = td->frames;
736 olen = &td->itd_offset[0];
742 len = le16toh(*olen);
744 if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
747 len &= ((1 << 12) - 1);
751 len = 0;/* invalid length */
758 if (((void *)td) == xfer->td_transfer_last) {
764 xfer->aframes = xfer->nframes;
765 ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
769 static const char *const
775 "DATA_TOGGLE_MISMATCH",
778 "DEVICE_NOT_RESPONDING",
796 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
799 ohci_td_t *td_alt_next;
806 td = xfer->td_transfer_cache;
807 td_alt_next = td->alt_next;
810 if (xfer->aframes != xfer->nframes) {
811 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
815 usb_pc_cpu_invalidate(td->page_cache);
816 phy_start = le32toh(td->td_cbp);
817 td_flags = le32toh(td->td_flags);
818 cc = OHCI_TD_GET_CC(td_flags);
822 * short transfer - compute the number of remaining
823 * bytes in the hardware buffer:
825 phy_end = le32toh(td->td_be);
826 temp = (OHCI_PAGE(phy_start ^ phy_end) ?
827 (OHCI_PAGE_SIZE + 1) : 0x0001);
828 temp += OHCI_PAGE_OFFSET(phy_end);
829 temp -= OHCI_PAGE_OFFSET(phy_start);
831 if (temp > td->len) {
832 /* guard against corruption */
834 } else if (xfer->aframes != xfer->nframes) {
836 * Sum up total transfer length
839 xfer->frlengths[xfer->aframes] += td->len - temp;
842 if (xfer->aframes != xfer->nframes) {
843 /* transfer was complete */
844 xfer->frlengths[xfer->aframes] += td->len;
847 /* Check for last transfer */
848 if (((void *)td) == xfer->td_transfer_last) {
852 /* Check transfer status */
854 /* the transfer is finished */
858 /* Check for short transfer */
860 if (xfer->flags_int.short_frames_ok) {
861 /* follow alt next */
864 /* the transfer is finished */
871 if (td->alt_next != td_alt_next) {
872 /* this USB frame is complete */
877 /* update transfer cache */
879 xfer->td_transfer_cache = td;
881 DPRINTFN(16, "error cc=%d (%s)\n",
882 cc, ohci_cc_strs[cc]);
884 return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
885 (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
889 ohci_non_isoc_done(struct usb_xfer *xfer)
893 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
894 xfer, xfer->endpoint);
897 if (ohcidebug > 10) {
898 ohci_dump_tds(xfer->td_transfer_first);
904 xfer->td_transfer_cache = xfer->td_transfer_first;
906 if (xfer->flags_int.control_xfr) {
908 if (xfer->flags_int.control_hdr) {
910 err = ohci_non_isoc_done_sub(xfer);
914 if (xfer->td_transfer_cache == NULL) {
918 while (xfer->aframes != xfer->nframes) {
920 err = ohci_non_isoc_done_sub(xfer);
923 if (xfer->td_transfer_cache == NULL) {
928 if (xfer->flags_int.control_xfr &&
929 !xfer->flags_int.control_act) {
931 err = ohci_non_isoc_done_sub(xfer);
934 ohci_device_done(xfer, err);
937 /*------------------------------------------------------------------------*
938 * ohci_check_transfer_sub
939 *------------------------------------------------------------------------*/
941 ohci_check_transfer_sub(struct usb_xfer *xfer)
950 td = xfer->td_transfer_cache;
954 usb_pc_cpu_invalidate(td->page_cache);
955 phy_start = le32toh(td->td_cbp);
956 td_flags = le32toh(td->td_flags);
957 td_next = le32toh(td->td_next);
959 /* Check for last transfer */
960 if (((void *)td) == xfer->td_transfer_last) {
961 /* the transfer is finished */
965 /* Check transfer status */
966 cc = OHCI_TD_GET_CC(td_flags);
968 /* the transfer is finished */
973 * Check if we reached the last packet
974 * or if there is a short packet:
977 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
978 /* follow alt next */
985 /* update transfer cache */
987 xfer->td_transfer_cache = td;
991 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
993 ed->ed_headp = td->td_self;
994 usb_pc_cpu_flush(ed->page_cache);
996 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
999 * Make sure that the OHCI re-scans the schedule by
1000 * writing the BLF and CLF bits:
1003 if (xfer->xroot->udev->flags.self_suspended) {
1005 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1006 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1008 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1009 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1010 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1012 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1017 /*------------------------------------------------------------------------*
1018 * ohci_check_transfer
1021 * 0: USB transfer is not finished
1022 * Else: USB transfer is finished
1023 *------------------------------------------------------------------------*/
1025 ohci_check_transfer(struct usb_xfer *xfer)
1031 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1033 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1035 usb_pc_cpu_invalidate(ed->page_cache);
1036 ed_headp = le32toh(ed->ed_headp);
1037 ed_tailp = le32toh(ed->ed_tailp);
1039 if ((ed_headp & OHCI_HALTED) ||
1040 (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1041 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1042 /* isochronous transfer */
1043 ohci_isoc_done(xfer);
1045 if (xfer->flags_int.short_frames_ok) {
1046 ohci_check_transfer_sub(xfer);
1047 if (xfer->td_transfer_cache) {
1048 /* not finished yet */
1052 /* store data-toggle */
1053 if (ed_headp & OHCI_TOGGLECARRY) {
1054 xfer->endpoint->toggle_next = 1;
1056 xfer->endpoint->toggle_next = 0;
1059 /* non-isochronous transfer */
1060 ohci_non_isoc_done(xfer);
1064 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1069 ohci_rhsc_enable(ohci_softc_t *sc)
1073 USB_BUS_LOCK_ASSERT(&sc->sc_bus);
1075 sc->sc_eintrs |= OHCI_RHSC;
1076 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1078 /* acknowledge any RHSC interrupt */
1079 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1085 ohci_interrupt_poll(ohci_softc_t *sc)
1087 struct usb_xfer *xfer;
1090 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1092 * check if transfer is transferred
1094 if (ohci_check_transfer(xfer)) {
1095 /* queue has been modified */
1101 /*------------------------------------------------------------------------*
1102 * ohci_interrupt - OHCI interrupt handler
1104 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1105 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1107 *------------------------------------------------------------------------*/
1109 ohci_interrupt(ohci_softc_t *sc)
1111 struct ohci_hcca *hcca;
1115 USB_BUS_LOCK(&sc->sc_bus);
1117 hcca = ohci_get_hcca(sc);
1119 DPRINTFN(16, "real interrupt\n");
1122 if (ohcidebug > 15) {
1127 done = le32toh(hcca->hcca_done_head);
1130 * The LSb of done is used to inform the HC Driver that an interrupt
1131 * condition exists for both the Done list and for another event
1132 * recorded in HcInterruptStatus. On an interrupt from the HC, the
1133 * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1134 * the interrupt was caused by other than the HccaDoneHead update
1135 * and the HcInterruptStatus register needs to be accessed to
1136 * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1137 * then a Done list update interrupt is indicated and if the LSb of
1138 * done is nonzero, then an additional interrupt event is indicated
1139 * and HcInterruptStatus should be checked to determine its cause.
1144 if (done & ~OHCI_DONE_INTRS) {
1147 if (done & OHCI_DONE_INTRS) {
1148 status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1150 hcca->hcca_done_head = 0;
1152 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1154 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1157 status &= ~OHCI_MIE;
1160 * nothing to be done (PCI shared
1165 OWRITE4(sc, OHCI_INTERRUPT_STATUS, status); /* Acknowledge */
1167 status &= sc->sc_eintrs;
1171 if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1173 if (status & OHCI_SO) {
1177 if (status & OHCI_RD) {
1178 kprintf("%s: resume detect\n", __FUNCTION__);
1179 /* XXX process resume detect */
1181 if (status & OHCI_UE) {
1182 kprintf("%s: unrecoverable error, "
1183 "controller halted\n", __FUNCTION__);
1184 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1187 if (status & OHCI_RHSC) {
1189 * Disable RHSC interrupt for now, because it will be
1190 * on until the port has been reset.
1192 sc->sc_eintrs &= ~OHCI_RHSC;
1193 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1197 /* do not allow RHSC interrupts > 1 per second */
1198 usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1199 (void *)&ohci_rhsc_enable, sc);
1202 status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1204 /* Block unprocessed interrupts. XXX */
1205 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1206 sc->sc_eintrs &= ~status;
1207 kprintf("%s: blocking intrs 0x%x\n",
1208 __FUNCTION__, status);
1210 /* poll all the USB transfers */
1211 ohci_interrupt_poll(sc);
1214 USB_BUS_UNLOCK(&sc->sc_bus);
1218 * called when a request does not complete
1221 ohci_timeout(void *arg)
1223 struct usb_xfer *xfer = arg;
1225 DPRINTF("xfer=%p\n", xfer);
1227 USB_BUS_LOCK_ASSERT(xfer->xroot->bus);
1229 /* transfer is transferred */
1230 ohci_device_done(xfer, USB_ERR_TIMEOUT);
1234 ohci_do_poll(struct usb_bus *bus)
1236 struct ohci_softc *sc = OHCI_BUS2SC(bus);
1238 USB_BUS_LOCK(&sc->sc_bus);
1239 ohci_interrupt_poll(sc);
1240 USB_BUS_UNLOCK(&sc->sc_bus);
1244 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1246 struct usb_page_search buf_res;
1249 ohci_td_t *td_alt_next;
1250 uint32_t buf_offset;
1253 uint8_t shortpkt_old;
1258 shortpkt_old = temp->shortpkt;
1259 len_old = temp->len;
1262 /* software is used to detect short incoming transfers */
1264 if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1265 temp->td_flags |= htole32(OHCI_TD_R);
1267 temp->td_flags &= ~htole32(OHCI_TD_R);
1273 td_next = temp->td_next;
1277 if (temp->len == 0) {
1279 if (temp->shortpkt) {
1282 /* send a Zero Length Packet, ZLP, last */
1289 average = temp->average;
1291 if (temp->len < average) {
1292 if (temp->len % temp->max_frame_size) {
1295 average = temp->len;
1299 if (td_next == NULL) {
1300 panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1305 td_next = td->obj_next;
1307 /* check if we are pre-computing */
1311 /* update remaining length */
1313 temp->len -= average;
1317 /* fill out current TD */
1318 td->td_flags = temp->td_flags;
1320 /* the next TD uses TOGGLE_CARRY */
1321 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1325 * The buffer start and end phys addresses should be
1326 * 0x0 for a zero length packet.
1334 usbd_get_page(temp->pc, buf_offset, &buf_res);
1335 td->td_cbp = htole32(buf_res.physaddr);
1336 buf_offset += (average - 1);
1338 usbd_get_page(temp->pc, buf_offset, &buf_res);
1339 td->td_be = htole32(buf_res.physaddr);
1344 /* update remaining length */
1346 temp->len -= average;
1349 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1350 /* we need to receive these frames one by one ! */
1351 td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1352 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1353 td->td_next = htole32(OHCI_TD_NEXT_END);
1356 /* link the current TD with the next one */
1357 td->td_next = td_next->td_self;
1361 td->alt_next = td_alt_next;
1363 usb_pc_cpu_flush(td->page_cache);
1369 /* setup alt next pointer, if any */
1370 if (temp->last_frame) {
1371 /* no alternate next */
1374 /* we use this field internally */
1375 td_alt_next = td_next;
1379 temp->shortpkt = shortpkt_old;
1380 temp->len = len_old;
1384 temp->td_next = td_next;
1388 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1390 struct ohci_std_temp temp;
1391 struct usb_pipe_methods *methods;
1397 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1398 xfer->address, UE_GET_ADDR(xfer->endpointno),
1399 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1401 temp.average = xfer->max_hc_frame_size;
1402 temp.max_frame_size = xfer->max_frame_size;
1404 /* toggle the DMA set we are using */
1405 xfer->flags_int.curr_dma_set ^= 1;
1407 /* get next DMA set */
1408 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1410 xfer->td_transfer_first = td;
1411 xfer->td_transfer_cache = td;
1415 temp.last_frame = 0;
1416 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1418 methods = xfer->endpoint->methods;
1420 /* check if we should prepend a setup message */
1422 if (xfer->flags_int.control_xfr) {
1423 if (xfer->flags_int.control_hdr) {
1425 temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1426 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1428 temp.len = xfer->frlengths[0];
1429 temp.pc = xfer->frbuffers + 0;
1430 temp.shortpkt = temp.len ? 1 : 0;
1431 /* check for last frame */
1432 if (xfer->nframes == 1) {
1433 /* no STATUS stage yet, SETUP is last */
1434 if (xfer->flags_int.control_act) {
1435 temp.last_frame = 1;
1436 temp.setup_alt_next = 0;
1439 ohci_setup_standard_chain_sub(&temp);
1442 * XXX assume that the setup message is
1443 * contained within one USB packet:
1445 xfer->endpoint->toggle_next = 1;
1451 temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1453 /* set data toggle */
1455 if (xfer->endpoint->toggle_next) {
1456 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1458 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1461 /* set endpoint direction */
1463 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1464 temp.td_flags |= htole32(OHCI_TD_IN);
1466 temp.td_flags |= htole32(OHCI_TD_OUT);
1469 while (x != xfer->nframes) {
1471 /* DATA0 / DATA1 message */
1473 temp.len = xfer->frlengths[x];
1474 temp.pc = xfer->frbuffers + x;
1478 if (x == xfer->nframes) {
1479 if (xfer->flags_int.control_xfr) {
1480 /* no STATUS stage yet, DATA is last */
1481 if (xfer->flags_int.control_act) {
1482 temp.last_frame = 1;
1483 temp.setup_alt_next = 0;
1486 temp.last_frame = 1;
1487 temp.setup_alt_next = 0;
1490 if (temp.len == 0) {
1492 /* make sure that we send an USB packet */
1498 /* regular data transfer */
1500 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1503 ohci_setup_standard_chain_sub(&temp);
1506 /* check if we should append a status stage */
1508 if (xfer->flags_int.control_xfr &&
1509 !xfer->flags_int.control_act) {
1512 * Send a DATA1 message and invert the current endpoint
1516 /* set endpoint direction and data toggle */
1518 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1519 temp.td_flags = htole32(OHCI_TD_OUT |
1520 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1522 temp.td_flags = htole32(OHCI_TD_IN |
1523 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1529 temp.last_frame = 1;
1530 temp.setup_alt_next = 0;
1532 ohci_setup_standard_chain_sub(&temp);
1536 /* Ensure that last TD is terminating: */
1537 td->td_next = htole32(OHCI_TD_NEXT_END);
1538 td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1539 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1541 usb_pc_cpu_flush(td->page_cache);
1543 /* must have at least one frame! */
1545 xfer->td_transfer_last = td;
1548 if (ohcidebug > 8) {
1549 DPRINTF("nexttog=%d; data before transfer:\n",
1550 xfer->endpoint->toggle_next);
1551 ohci_dump_tds(xfer->td_transfer_first);
1555 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1557 ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1558 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1559 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1561 ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1563 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1564 ed_flags |= OHCI_ED_SPEED;
1566 ed->ed_flags = htole32(ed_flags);
1568 td = xfer->td_transfer_first;
1570 ed->ed_headp = td->td_self;
1572 if (xfer->xroot->udev->flags.self_suspended == 0) {
1573 /* the append function will flush the endpoint descriptor */
1574 OHCI_APPEND_QH(ed, *ed_last);
1576 if (methods == &ohci_device_bulk_methods) {
1577 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1579 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1581 if (methods == &ohci_device_ctrl_methods) {
1582 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1584 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1587 usb_pc_cpu_flush(ed->page_cache);
1592 ohci_root_intr(ohci_softc_t *sc)
1598 USB_BUS_LOCK_ASSERT(&sc->sc_bus);
1600 /* clear any old interrupt data */
1601 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1603 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1604 DPRINTF("sc=%p hstatus=0x%08x\n",
1608 m = (sc->sc_noport + 1);
1609 if (m > (8 * sizeof(sc->sc_hub_idata))) {
1610 m = (8 * sizeof(sc->sc_hub_idata));
1612 for (i = 1; i < m; i++) {
1613 /* pick out CHANGE bits from the status register */
1614 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1615 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1616 DPRINTF("port %d changed\n", i);
1620 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1621 sizeof(sc->sc_hub_idata));
1624 /* NOTE: "done" can be run two times in a row,
1625 * from close and from interrupt
1628 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1630 struct usb_pipe_methods *methods = xfer->endpoint->methods;
1631 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1634 USB_BUS_LOCK_ASSERT(&sc->sc_bus);
1637 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1638 xfer, xfer->endpoint, error);
1640 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1642 usb_pc_cpu_invalidate(ed->page_cache);
1644 if (methods == &ohci_device_bulk_methods) {
1645 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1647 if (methods == &ohci_device_ctrl_methods) {
1648 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1650 if (methods == &ohci_device_intr_methods) {
1651 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1653 if (methods == &ohci_device_isoc_methods) {
1654 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1656 xfer->td_transfer_first = NULL;
1657 xfer->td_transfer_last = NULL;
1659 /* dequeue transfer and start next transfer */
1660 usbd_transfer_done(xfer, error);
1663 /*------------------------------------------------------------------------*
1665 *------------------------------------------------------------------------*/
1667 ohci_device_bulk_open(struct usb_xfer *xfer)
1673 ohci_device_bulk_close(struct usb_xfer *xfer)
1675 ohci_device_done(xfer, USB_ERR_CANCELLED);
1679 ohci_device_bulk_enter(struct usb_xfer *xfer)
1685 ohci_device_bulk_start(struct usb_xfer *xfer)
1687 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1689 /* setup TD's and QH */
1690 ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1692 /* put transfer on interrupt queue */
1693 ohci_transfer_intr_enqueue(xfer);
1696 struct usb_pipe_methods ohci_device_bulk_methods =
1698 .open = ohci_device_bulk_open,
1699 .close = ohci_device_bulk_close,
1700 .enter = ohci_device_bulk_enter,
1701 .start = ohci_device_bulk_start,
1704 /*------------------------------------------------------------------------*
1705 * ohci control support
1706 *------------------------------------------------------------------------*/
1708 ohci_device_ctrl_open(struct usb_xfer *xfer)
1714 ohci_device_ctrl_close(struct usb_xfer *xfer)
1716 ohci_device_done(xfer, USB_ERR_CANCELLED);
1720 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1726 ohci_device_ctrl_start(struct usb_xfer *xfer)
1728 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1730 /* setup TD's and QH */
1731 ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1733 /* put transfer on interrupt queue */
1734 ohci_transfer_intr_enqueue(xfer);
1737 struct usb_pipe_methods ohci_device_ctrl_methods =
1739 .open = ohci_device_ctrl_open,
1740 .close = ohci_device_ctrl_close,
1741 .enter = ohci_device_ctrl_enter,
1742 .start = ohci_device_ctrl_start,
1745 /*------------------------------------------------------------------------*
1746 * ohci interrupt support
1747 *------------------------------------------------------------------------*/
1749 ohci_device_intr_open(struct usb_xfer *xfer)
1751 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1757 bit = OHCI_NO_EDS / 2;
1759 if (xfer->interval >= bit) {
1763 if (sc->sc_intr_stat[x] <
1764 sc->sc_intr_stat[best]) {
1774 sc->sc_intr_stat[best]++;
1775 xfer->qh_pos = best;
1777 DPRINTFN(3, "best=%d interval=%d\n",
1778 best, xfer->interval);
1782 ohci_device_intr_close(struct usb_xfer *xfer)
1784 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1786 sc->sc_intr_stat[xfer->qh_pos]--;
1788 ohci_device_done(xfer, USB_ERR_CANCELLED);
1792 ohci_device_intr_enter(struct usb_xfer *xfer)
1798 ohci_device_intr_start(struct usb_xfer *xfer)
1800 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1802 /* setup TD's and QH */
1803 ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1805 /* put transfer on interrupt queue */
1806 ohci_transfer_intr_enqueue(xfer);
1809 struct usb_pipe_methods ohci_device_intr_methods =
1811 .open = ohci_device_intr_open,
1812 .close = ohci_device_intr_close,
1813 .enter = ohci_device_intr_enter,
1814 .start = ohci_device_intr_start,
1817 /*------------------------------------------------------------------------*
1818 * ohci isochronous support
1819 *------------------------------------------------------------------------*/
1821 ohci_device_isoc_open(struct usb_xfer *xfer)
1827 ohci_device_isoc_close(struct usb_xfer *xfer)
1830 ohci_device_done(xfer, USB_ERR_CANCELLED);
1834 ohci_device_isoc_enter(struct usb_xfer *xfer)
1836 struct usb_page_search buf_res;
1837 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1838 struct ohci_hcca *hcca;
1839 uint32_t buf_offset;
1843 uint16_t itd_offset[OHCI_ITD_NOFFSET];
1847 ohci_itd_t *td_last = NULL;
1850 hcca = ohci_get_hcca(sc);
1852 nframes = le32toh(hcca->hcca_frame_number);
1854 DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1855 xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1857 if ((xfer->endpoint->is_synced == 0) ||
1858 (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1859 (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1861 * If there is data underflow or the pipe queue is empty we
1862 * schedule the transfer a few frames ahead of the current
1863 * frame position. Else two isochronous transfers might
1866 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1867 xfer->endpoint->is_synced = 1;
1868 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1871 * compute how many milliseconds the insertion is ahead of the
1872 * current frame position:
1874 buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1877 * pre-compute when the isochronous transfer will be finished:
1879 xfer->isoc_time_complete =
1880 (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1883 /* get the real number of frames */
1885 nframes = xfer->nframes;
1889 plen = xfer->frlengths;
1891 /* toggle the DMA set we are using */
1892 xfer->flags_int.curr_dma_set ^= 1;
1894 /* get next DMA set */
1895 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1897 xfer->td_transfer_first = td;
1904 panic("%s:%d: out of TD's\n",
1905 __FUNCTION__, __LINE__);
1907 itd_offset[ncur] = length;
1908 buf_offset += *plen;
1913 if ( /* check if the ITD is full */
1914 (ncur == OHCI_ITD_NOFFSET) ||
1915 /* check if we have put more than 4K into the ITD */
1916 (length & 0xF000) ||
1917 /* check if it is the last frame */
1920 /* fill current ITD */
1921 td->itd_flags = htole32(
1923 OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1925 OHCI_ITD_SET_FC(ncur));
1928 xfer->endpoint->isoc_next += ncur;
1936 td->itd_offset[ncur] =
1937 htole16(OHCI_ITD_MK_OFFS(0));
1940 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1941 length = OHCI_PAGE_MASK(buf_res.physaddr);
1943 OHCI_PAGE(buf_res.physaddr);
1944 td->itd_bp0 = htole32(buf_res.physaddr);
1945 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1946 td->itd_be = htole32(buf_res.physaddr);
1949 itd_offset[ncur] += length;
1951 OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1952 td->itd_offset[ncur] =
1953 htole16(itd_offset[ncur]);
1962 /* link the last TD with the next one */
1963 td_last->itd_next = td->itd_self;
1965 usb_pc_cpu_flush(td_last->page_cache);
1969 /* update the last TD */
1970 td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
1971 td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
1972 td_last->itd_next = 0;
1974 usb_pc_cpu_flush(td_last->page_cache);
1976 xfer->td_transfer_last = td_last;
1979 if (ohcidebug > 8) {
1980 DPRINTF("data before transfer:\n");
1981 ohci_dump_itds(xfer->td_transfer_first);
1984 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1986 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
1987 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
1989 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
1991 ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
1992 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1993 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1995 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1996 ed_flags |= OHCI_ED_SPEED;
1998 ed->ed_flags = htole32(ed_flags);
2000 td = xfer->td_transfer_first;
2002 ed->ed_headp = td->itd_self;
2004 /* isochronous transfers are not affected by suspend / resume */
2005 /* the append function will flush the endpoint descriptor */
2007 OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2011 ohci_device_isoc_start(struct usb_xfer *xfer)
2013 /* put transfer on interrupt queue */
2014 ohci_transfer_intr_enqueue(xfer);
2017 struct usb_pipe_methods ohci_device_isoc_methods =
2019 .open = ohci_device_isoc_open,
2020 .close = ohci_device_isoc_close,
2021 .enter = ohci_device_isoc_enter,
2022 .start = ohci_device_isoc_start,
2025 /*------------------------------------------------------------------------*
2026 * ohci root control support
2027 *------------------------------------------------------------------------*
2028 * Simulate a hardware hub by handling all the necessary requests.
2029 *------------------------------------------------------------------------*/
2032 struct usb_device_descriptor ohci_devd =
2034 sizeof(struct usb_device_descriptor),
2035 UDESC_DEVICE, /* type */
2036 {0x00, 0x01}, /* USB version */
2037 UDCLASS_HUB, /* class */
2038 UDSUBCLASS_HUB, /* subclass */
2039 UDPROTO_FSHUB, /* protocol */
2040 64, /* max packet */
2041 {0}, {0}, {0x00, 0x01}, /* device id */
2042 1, 2, 0, /* string indicies */
2043 1 /* # of configurations */
2047 struct ohci_config_desc ohci_confd =
2050 .bLength = sizeof(struct usb_config_descriptor),
2051 .bDescriptorType = UDESC_CONFIG,
2052 .wTotalLength[0] = sizeof(ohci_confd),
2054 .bConfigurationValue = 1,
2055 .iConfiguration = 0,
2056 .bmAttributes = UC_SELF_POWERED,
2057 .bMaxPower = 0, /* max power */
2060 .bLength = sizeof(struct usb_interface_descriptor),
2061 .bDescriptorType = UDESC_INTERFACE,
2063 .bInterfaceClass = UICLASS_HUB,
2064 .bInterfaceSubClass = UISUBCLASS_HUB,
2065 .bInterfaceProtocol = 0,
2068 .bLength = sizeof(struct usb_endpoint_descriptor),
2069 .bDescriptorType = UDESC_ENDPOINT,
2070 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2071 .bmAttributes = UE_INTERRUPT,
2072 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2078 struct usb_hub_descriptor ohci_hubd =
2080 0, /* dynamic length */
2090 ohci_roothub_exec(struct usb_device *udev,
2091 struct usb_device_request *req, const void **pptr, uint16_t *plength)
2093 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2095 const char *str_ptr;
2104 USB_BUS_LOCK_ASSERT(&sc->sc_bus);
2107 ptr = (const void *)&sc->sc_hub_desc.temp;
2111 value = UGETW(req->wValue);
2112 index = UGETW(req->wIndex);
2114 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2115 "wValue=0x%04x wIndex=0x%04x\n",
2116 req->bmRequestType, req->bRequest,
2117 UGETW(req->wLength), value, index);
2119 #define C(x,y) ((x) | ((y) << 8))
2120 switch (C(req->bRequest, req->bmRequestType)) {
2121 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2122 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2123 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2125 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2126 * for the integrated root hub.
2129 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2131 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2133 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2134 switch (value >> 8) {
2136 if ((value & 0xff) != 0) {
2137 err = USB_ERR_IOERROR;
2140 len = sizeof(ohci_devd);
2141 ptr = (const void *)&ohci_devd;
2145 if ((value & 0xff) != 0) {
2146 err = USB_ERR_IOERROR;
2149 len = sizeof(ohci_confd);
2150 ptr = (const void *)&ohci_confd;
2154 switch (value & 0xff) {
2155 case 0: /* Language table */
2159 case 1: /* Vendor */
2160 str_ptr = sc->sc_vendor;
2163 case 2: /* Product */
2164 str_ptr = "OHCI root HUB";
2172 len = usb_make_str_desc(
2173 sc->sc_hub_desc.temp,
2174 sizeof(sc->sc_hub_desc.temp),
2179 err = USB_ERR_IOERROR;
2183 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2185 sc->sc_hub_desc.temp[0] = 0;
2187 case C(UR_GET_STATUS, UT_READ_DEVICE):
2189 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2191 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2192 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2194 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2196 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2197 if (value >= OHCI_MAX_DEVICES) {
2198 err = USB_ERR_IOERROR;
2201 sc->sc_addr = value;
2203 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2204 if ((value != 0) && (value != 1)) {
2205 err = USB_ERR_IOERROR;
2208 sc->sc_conf = value;
2210 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2212 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2213 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2214 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2215 err = USB_ERR_IOERROR;
2217 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2219 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2222 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2224 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2225 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2226 "port=%d feature=%d\n",
2229 (index > sc->sc_noport)) {
2230 err = USB_ERR_IOERROR;
2233 port = OHCI_RH_PORT_STATUS(index);
2235 case UHF_PORT_ENABLE:
2236 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2238 case UHF_PORT_SUSPEND:
2239 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2241 case UHF_PORT_POWER:
2242 /* Yes, writing to the LOW_SPEED bit clears power. */
2243 OWRITE4(sc, port, UPS_LOW_SPEED);
2245 case UHF_C_PORT_CONNECTION:
2246 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2248 case UHF_C_PORT_ENABLE:
2249 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2251 case UHF_C_PORT_SUSPEND:
2252 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2254 case UHF_C_PORT_OVER_CURRENT:
2255 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2257 case UHF_C_PORT_RESET:
2258 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2261 err = USB_ERR_IOERROR;
2265 case UHF_C_PORT_CONNECTION:
2266 case UHF_C_PORT_ENABLE:
2267 case UHF_C_PORT_SUSPEND:
2268 case UHF_C_PORT_OVER_CURRENT:
2269 case UHF_C_PORT_RESET:
2270 /* enable RHSC interrupt if condition is cleared. */
2271 if ((OREAD4(sc, port) >> 16) == 0)
2272 ohci_rhsc_enable(sc);
2278 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2279 if ((value & 0xff) != 0) {
2280 err = USB_ERR_IOERROR;
2283 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2285 sc->sc_hub_desc.hubd = ohci_hubd;
2286 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2287 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2288 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2289 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2290 /* XXX overcurrent */
2292 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2293 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2295 for (l = 0; l < sc->sc_noport; l++) {
2297 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2301 sc->sc_hub_desc.hubd.bDescLength =
2302 8 + ((sc->sc_noport + 7) / 8);
2303 len = sc->sc_hub_desc.hubd.bDescLength;
2306 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2308 memset(sc->sc_hub_desc.temp, 0, 16);
2310 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2311 DPRINTFN(9, "get port status i=%d\n",
2314 (index > sc->sc_noport)) {
2315 err = USB_ERR_IOERROR;
2318 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2319 DPRINTFN(9, "port status=0x%04x\n", v);
2320 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2321 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2322 len = sizeof(sc->sc_hub_desc.ps);
2324 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2325 err = USB_ERR_IOERROR;
2327 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2329 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2331 (index > sc->sc_noport)) {
2332 err = USB_ERR_IOERROR;
2335 port = OHCI_RH_PORT_STATUS(index);
2337 case UHF_PORT_ENABLE:
2338 OWRITE4(sc, port, UPS_PORT_ENABLED);
2340 case UHF_PORT_SUSPEND:
2341 OWRITE4(sc, port, UPS_SUSPEND);
2343 case UHF_PORT_RESET:
2344 DPRINTFN(6, "reset port %d\n", index);
2345 OWRITE4(sc, port, UPS_RESET);
2348 usb_pause_mtx(&sc->sc_bus.bus_lock,
2349 USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
2351 if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2355 err = USB_ERR_TIMEOUT;
2359 DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2360 index, OREAD4(sc, port));
2362 case UHF_PORT_POWER:
2363 DPRINTFN(3, "set port power %d\n", index);
2364 OWRITE4(sc, port, UPS_PORT_POWER);
2367 err = USB_ERR_IOERROR;
2372 err = USB_ERR_IOERROR;
2382 ohci_xfer_setup(struct usb_setup_params *parm)
2384 struct usb_page_search page_info;
2385 struct usb_page_cache *pc;
2387 struct usb_xfer *xfer;
2394 sc = OHCI_BUS2SC(parm->udev->bus);
2395 xfer = parm->curr_xfer;
2397 parm->hc_max_packet_size = 0x500;
2398 parm->hc_max_packet_count = 1;
2399 parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2402 * calculate ntd and nqh
2404 if (parm->methods == &ohci_device_ctrl_methods) {
2405 xfer->flags_int.bdma_enable = 1;
2407 usbd_transfer_setup_sub(parm);
2410 ntd = ((2 * xfer->nframes) + 1 /* STATUS */
2411 + (xfer->max_data_length / xfer->max_hc_frame_size));
2414 } else if (parm->methods == &ohci_device_bulk_methods) {
2415 xfer->flags_int.bdma_enable = 1;
2417 usbd_transfer_setup_sub(parm);
2420 ntd = ((2 * xfer->nframes)
2421 + (xfer->max_data_length / xfer->max_hc_frame_size));
2424 } else if (parm->methods == &ohci_device_intr_methods) {
2425 xfer->flags_int.bdma_enable = 1;
2427 usbd_transfer_setup_sub(parm);
2430 ntd = ((2 * xfer->nframes)
2431 + (xfer->max_data_length / xfer->max_hc_frame_size));
2434 } else if (parm->methods == &ohci_device_isoc_methods) {
2435 xfer->flags_int.bdma_enable = 1;
2437 usbd_transfer_setup_sub(parm);
2439 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2440 ((xfer->nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET) +
2447 usbd_transfer_setup_sub(parm);
2461 if (usbd_transfer_setup_sub_malloc(
2462 parm, &pc, sizeof(ohci_td_t),
2463 OHCI_TD_ALIGN, ntd)) {
2464 parm->err = USB_ERR_NOMEM;
2468 for (n = 0; n != ntd; n++) {
2471 usbd_get_page(pc + n, 0, &page_info);
2473 td = page_info.buffer;
2476 td->td_self = htole32(page_info.physaddr);
2477 td->obj_next = last_obj;
2478 td->page_cache = pc + n;
2482 usb_pc_cpu_flush(pc + n);
2485 if (usbd_transfer_setup_sub_malloc(
2486 parm, &pc, sizeof(ohci_itd_t),
2487 OHCI_ITD_ALIGN, nitd)) {
2488 parm->err = USB_ERR_NOMEM;
2492 for (n = 0; n != nitd; n++) {
2495 usbd_get_page(pc + n, 0, &page_info);
2497 itd = page_info.buffer;
2500 itd->itd_self = htole32(page_info.physaddr);
2501 itd->obj_next = last_obj;
2502 itd->page_cache = pc + n;
2506 usb_pc_cpu_flush(pc + n);
2509 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2513 if (usbd_transfer_setup_sub_malloc(
2514 parm, &pc, sizeof(ohci_ed_t),
2515 OHCI_ED_ALIGN, nqh)) {
2516 parm->err = USB_ERR_NOMEM;
2520 for (n = 0; n != nqh; n++) {
2523 usbd_get_page(pc + n, 0, &page_info);
2525 ed = page_info.buffer;
2528 ed->ed_self = htole32(page_info.physaddr);
2529 ed->obj_next = last_obj;
2530 ed->page_cache = pc + n;
2534 usb_pc_cpu_flush(pc + n);
2537 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2539 if (!xfer->flags_int.curr_dma_set) {
2540 xfer->flags_int.curr_dma_set = 1;
2546 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2547 struct usb_endpoint *ep)
2549 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2551 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2553 edesc->bEndpointAddress, udev->flags.usb_mode,
2556 if (udev->flags.usb_mode != USB_MODE_HOST) {
2560 if (udev->device_index != sc->sc_addr) {
2561 switch (edesc->bmAttributes & UE_XFERTYPE) {
2563 ep->methods = &ohci_device_ctrl_methods;
2566 ep->methods = &ohci_device_intr_methods;
2568 case UE_ISOCHRONOUS:
2569 if (udev->speed == USB_SPEED_FULL) {
2570 ep->methods = &ohci_device_isoc_methods;
2574 ep->methods = &ohci_device_bulk_methods;
2584 ohci_xfer_unsetup(struct usb_xfer *xfer)
2590 ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2593 * Wait until hardware has finished any possible use of the
2594 * transfer descriptor(s) and QH
2596 *pus = (1125); /* microseconds */
2600 ohci_device_resume(struct usb_device *udev)
2602 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2603 struct usb_xfer *xfer;
2604 struct usb_pipe_methods *methods;
2609 USB_BUS_LOCK(udev->bus);
2611 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2613 if (xfer->xroot->udev == udev) {
2615 methods = xfer->endpoint->methods;
2616 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2618 if (methods == &ohci_device_bulk_methods) {
2619 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2620 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2622 if (methods == &ohci_device_ctrl_methods) {
2623 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2624 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2626 if (methods == &ohci_device_intr_methods) {
2627 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2632 USB_BUS_UNLOCK(udev->bus);
2638 ohci_device_suspend(struct usb_device *udev)
2640 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2641 struct usb_xfer *xfer;
2642 struct usb_pipe_methods *methods;
2647 USB_BUS_LOCK(udev->bus);
2649 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2651 if (xfer->xroot->udev == udev) {
2653 methods = xfer->endpoint->methods;
2654 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2656 if (methods == &ohci_device_bulk_methods) {
2657 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2659 if (methods == &ohci_device_ctrl_methods) {
2660 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2662 if (methods == &ohci_device_intr_methods) {
2663 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2668 USB_BUS_UNLOCK(udev->bus);
2674 ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2676 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2679 case USB_HW_POWER_SUSPEND:
2680 case USB_HW_POWER_SHUTDOWN:
2683 case USB_HW_POWER_RESUME:
2692 ohci_set_hw_power(struct usb_bus *bus)
2694 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2702 flags = bus->hw_power_state;
2704 temp = OREAD4(sc, OHCI_CONTROL);
2705 temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2707 if (flags & USB_HW_POWER_CONTROL)
2710 if (flags & USB_HW_POWER_BULK)
2713 if (flags & USB_HW_POWER_INTERRUPT)
2716 if (flags & USB_HW_POWER_ISOC)
2717 temp |= OHCI_IE | OHCI_PLE;
2719 OWRITE4(sc, OHCI_CONTROL, temp);
2721 USB_BUS_UNLOCK(bus);
2726 struct usb_bus_methods ohci_bus_methods =
2728 .endpoint_init = ohci_ep_init,
2729 .xfer_setup = ohci_xfer_setup,
2730 .xfer_unsetup = ohci_xfer_unsetup,
2731 .get_dma_delay = ohci_get_dma_delay,
2732 .device_resume = ohci_device_resume,
2733 .device_suspend = ohci_device_suspend,
2734 .set_hw_power = ohci_set_hw_power,
2735 .set_hw_power_sleep = ohci_set_hw_power_sleep,
2736 .roothub_exec = ohci_roothub_exec,
2737 .xfer_poll = ohci_do_poll,