4 * BY : C.L. Huang (ching@tekram.com.tw)
5 * Erich Chen (erich@tekram.com.tw)
6 * Description: Device Driver for Tekram DC395U/UW/F ,DC315/U
7 * PCI SCSI Bus Master Host Adapter
8 * (SCSI chip set used Tekram ASIC TRM-S1040)
9 * (C)Copyright 1995-1999 Tekram Technology Co., Ltd.
15 * REV# DATE NAME DESCRIPTION
16 * 1.05 05/01/1999 ERICH CHEN First released for 3.x.x (CAM)
17 * 1.06 07/29/1999 ERICH CHEN Modify for NEW PCI
18 * 1.07 12/12/1999 ERICH CHEN Modify for 3.3.x ,DCB no free
19 * 1.08 06/12/2000 ERICH CHEN Modify for 4.x.x
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright
31 * notice, this list of conditions and the following disclaimer in the
32 * documentation and/or other materials provided with the distribution.
33 * 3. The name of the author may not be used to endorse or promote products
34 * derived from this software without specific prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
37 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
38 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
39 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
40 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
41 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
45 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47 * $FreeBSD: src/sys/dev/trm/trm.c,v 1.2.2.2 2002/12/19 20:34:45 cognet Exp $
48 * $DragonFly: src/sys/dev/disk/trm/trm.c,v 1.7 2005/05/24 20:59:00 dillon Exp $
52 * Imported into FreeBSD source repository, and updated to compile under
53 * FreeBSD-3.0-DEVELOPMENT, by Stefan Esser <se@FreeBSD.Org>, 1996-12-17
57 * Updated to compile under FreeBSD 5.0-CURRENT by Olivier Houchard
58 * <doginou@ci0.org>, 2002-03-04
61 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/malloc.h>
65 #include <sys/queue.h>
66 #if defined(__FreeBSD__) && __FreeBSD_version >= 500000
71 #include <sys/kernel.h>
76 #include <bus/pci/pcivar.h>
77 #include <bus/pci/pcireg.h>
78 #include <machine/resource.h>
79 #include <machine/bus_pio.h>
80 #include <machine/bus.h>
81 #include <machine/clock.h>
84 #include <bus/cam/cam.h>
85 #include <bus/cam/cam_ccb.h>
86 #include <bus/cam/cam_sim.h>
87 #include <bus/cam/cam_xpt_sim.h>
88 #include <bus/cam/cam_debug.h>
90 #include <bus/cam/scsi/scsi_all.h>
94 #define trm_reg_read8(reg) bus_space_read_1(pACB->tag, pACB->bsh, reg)
95 #define trm_reg_read16(reg) bus_space_read_2(pACB->tag, pACB->bsh, reg)
96 #define trm_reg_read32(reg) bus_space_read_4(pACB->tag, pACB->bsh, reg)
97 #define trm_reg_write8(value,reg) bus_space_write_1(pACB->tag, pACB->bsh,\
99 #define trm_reg_write16(value,reg) bus_space_write_2(pACB->tag, pACB->bsh,\
101 #define trm_reg_write32(value,reg) bus_space_write_4(pACB->tag, pACB->bsh,\
104 #define PCI_Vendor_ID_TEKRAM 0x1DE1
105 #define PCI_Device_ID_TRM_S1040 0x0391
106 #define PCI_DEVICEID_TRMS1040 0x03911DE1
109 #define TRM_DPRINTF(fmt, arg...) printf("trm: " fmt, ##arg)
111 #define TRM_DPRINTF(fmt, arg...) {}
112 #endif /* TRM_DEBUG */
114 static void trm_check_eeprom(PNVRAMTYPE pEEpromBuf,PACB pACB);
115 static void TRM_read_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
116 static u_int8_t TRM_get_data(PACB pACB, u_int8_t bAddr);
117 static void TRM_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
118 static void TRM_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData);
119 static void TRM_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr);
120 static void TRM_wait_30us(PACB pACB);
122 static void trm_Interrupt(void *vpACB);
123 static void trm_DataOutPhase0(PACB pACB, PSRB pSRB,
124 u_int8_t * pscsi_status);
125 static void trm_DataInPhase0(PACB pACB, PSRB pSRB,
126 u_int8_t * pscsi_status);
127 static void trm_CommandPhase0(PACB pACB, PSRB pSRB,
128 u_int8_t * pscsi_status);
129 static void trm_StatusPhase0(PACB pACB, PSRB pSRB,
130 u_int8_t * pscsi_status);
131 static void trm_MsgOutPhase0(PACB pACB, PSRB pSRB,
132 u_int8_t * pscsi_status);
133 static void trm_MsgInPhase0(PACB pACB, PSRB pSRB,
134 u_int8_t * pscsi_status);
135 static void trm_DataOutPhase1(PACB pACB, PSRB pSRB,
136 u_int8_t * pscsi_status);
137 static void trm_DataInPhase1(PACB pACB, PSRB pSRB,
138 u_int8_t * pscsi_status);
139 static void trm_CommandPhase1(PACB pACB, PSRB pSRB,
140 u_int8_t * pscsi_status);
141 static void trm_StatusPhase1(PACB pACB, PSRB pSRB,
142 u_int8_t * pscsi_status);
143 static void trm_MsgOutPhase1(PACB pACB, PSRB pSRB,
144 u_int8_t * pscsi_status);
145 static void trm_MsgInPhase1(PACB pACB, PSRB pSRB,
146 u_int8_t * pscsi_status);
147 static void trm_Nop0(PACB pACB, PSRB pSRB, u_int8_t * pscsi_status);
148 static void trm_Nop1(PACB pACB, PSRB pSRB, u_int8_t * pscsi_status);
149 static void trm_SetXferRate(PACB pACB, PSRB pSRB,PDCB pDCB);
150 static void trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir);
151 static void trm_Disconnect(PACB pACB);
152 static void trm_Reselect(PACB pACB);
153 static void trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB);
154 static void trm_DoingSRB_Done(PACB pACB);
155 static void trm_ScsiRstDetect(PACB pACB);
156 static void trm_ResetSCSIBus(PACB pACB);
157 static void trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB);
158 static void trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB);
159 static void trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB);
160 static void trm_SendSRB(PACB pACB, PSRB pSRB);
161 static int trm_probe(device_t tag);
162 static int trm_attach(device_t tag);
163 static void trm_reset(PACB pACB);
165 static u_int16_t trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB);
167 static int trm_initAdapter(PACB pACB, u_int16_t unit,
168 device_t pci_config_id);
169 static void trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,
170 u_int32_t i, u_int32_t j);
171 static void trm_initSRB(PSRB psrb);
172 static void trm_linkSRB(PACB pACB);
173 static void trm_initACB(PACB pACB, u_int16_t unit);
174 /* CAM SIM entry points */
175 #define ccb_trmsrb_ptr spriv_ptr0
176 #define ccb_trmacb_ptr spriv_ptr1
177 static void trm_action(struct cam_sim *psim, union ccb *pccb);
178 static void trm_poll(struct cam_sim *psim);
181 static void * trm_SCSI_phase0[] = {
182 trm_DataOutPhase0, /* phase:0 */
183 trm_DataInPhase0, /* phase:1 */
184 trm_CommandPhase0, /* phase:2 */
185 trm_StatusPhase0, /* phase:3 */
186 trm_Nop0, /* phase:4 */
187 trm_Nop1, /* phase:5 */
188 trm_MsgOutPhase0, /* phase:6 */
189 trm_MsgInPhase0, /* phase:7 */
194 * stateV = (void *) trm_SCSI_phase1[phase]
197 static void * trm_SCSI_phase1[] = {
198 trm_DataOutPhase1, /* phase:0 */
199 trm_DataInPhase1, /* phase:1 */
200 trm_CommandPhase1, /* phase:2 */
201 trm_StatusPhase1, /* phase:3 */
202 trm_Nop0, /* phase:4 */
203 trm_Nop1, /* phase:5 */
204 trm_MsgOutPhase1, /* phase:6 */
205 trm_MsgInPhase1, /* phase:7 */
209 NVRAMTYPE trm_eepromBuf[MAX_ADAPTER_NUM];
211 *Fast20: 000 50ns, 20.0 Mbytes/s
212 * 001 75ns, 13.3 Mbytes/s
213 * 010 100ns, 10.0 Mbytes/s
214 * 011 125ns, 8.0 Mbytes/s
215 * 100 150ns, 6.6 Mbytes/s
216 * 101 175ns, 5.7 Mbytes/s
217 * 110 200ns, 5.0 Mbytes/s
218 * 111 250ns, 4.0 Mbytes/s
220 *Fast40: 000 25ns, 40.0 Mbytes/s
221 * 001 50ns, 20.0 Mbytes/s
222 * 010 75ns, 13.3 Mbytes/s
223 * 011 100ns, 10.0 Mbytes/s
224 * 100 125ns, 8.0 Mbytes/s
225 * 101 150ns, 6.6 Mbytes/s
226 * 110 175ns, 5.7 Mbytes/s
227 * 111 200ns, 5.0 Mbytes/s
230 u_int8_t dc395x_trm_clock_period[] = {
231 12,/* 48 ns 20 MB/sec */
232 18,/* 72 ns 13.3 MB/sec */
233 25,/* 100 ns 10.0 MB/sec */
234 31,/* 124 ns 8.0 MB/sec */
235 37,/* 148 ns 6.6 MB/sec */
236 43,/* 172 ns 5.7 MB/sec */
237 50,/* 200 ns 5.0 MB/sec */
238 62 /* 248 ns 4.0 MB/sec */
241 u_int8_t dc395x_trm_tinfo_sync_period[] = {
253 trm_GetSRB(PACB pACB)
259 pSRB = pACB->pFreeSRB;
261 pACB->pFreeSRB = pSRB->pNextSRB;
262 pSRB->pNextSRB = NULL;
269 trm_RewaitSRB0(PDCB pDCB, PSRB pSRB)
275 if ((psrb1 = pDCB->pWaitingSRB)) {
276 pSRB->pNextSRB = psrb1;
277 pDCB->pWaitingSRB = pSRB;
279 pSRB->pNextSRB = NULL;
280 pDCB->pWaitingSRB = pSRB;
281 pDCB->pWaitLastSRB = pSRB;
287 trm_RewaitSRB(PDCB pDCB, PSRB pSRB)
295 psrb1 = pDCB->pGoingSRB;
297 pDCB->pGoingSRB = psrb1->pNextSRB;
299 while (pSRB != psrb1->pNextSRB)
300 psrb1 = psrb1->pNextSRB;
301 psrb1->pNextSRB = pSRB->pNextSRB;
302 if (pSRB == pDCB->pGoingLastSRB)
303 pDCB->pGoingLastSRB = psrb1;
305 if ((psrb1 = pDCB->pWaitingSRB)) {
306 pSRB->pNextSRB = psrb1;
307 pDCB->pWaitingSRB = pSRB;
309 pSRB->pNextSRB = NULL;
310 pDCB->pWaitingSRB = pSRB;
311 pDCB->pWaitLastSRB = pSRB;
313 bval = pSRB->TagNumber;
314 pDCB->TagMask &= (~(1 << bval)); /* Free TAG number */
319 trm_DoWaitingSRB(PACB pACB)
326 if (!(pACB->pActiveDCB) &&
327 !(pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
328 ptr = pACB->pDCBRunRobin;
330 ptr = pACB->pLinkDCB;
331 pACB->pDCBRunRobin = ptr;
335 pACB->pDCBRunRobin = ptr1->pNextDCB;
336 if (!(ptr1->MaxCommand > ptr1->GoingSRBCnt)
337 || !(pSRB = ptr1->pWaitingSRB)) {
338 if (pACB->pDCBRunRobin == ptr)
340 ptr1 = ptr1->pNextDCB;
342 if (!trm_StartSCSI(pACB, ptr1, pSRB)) {
344 * If trm_StartSCSI return 0 :
345 * current interrupt status is interrupt enable
346 * It's said that SCSI processor is unoccupied
349 if (ptr1->pWaitLastSRB == pSRB) {
350 ptr1->pWaitingSRB = NULL;
351 ptr1->pWaitLastSRB = NULL;
353 ptr1->pWaitingSRB = pSRB->pNextSRB;
354 pSRB->pNextSRB = NULL;
356 ptr1->pGoingLastSRB->pNextSRB = pSRB;
358 ptr1->pGoingSRB = pSRB;
359 ptr1->pGoingLastSRB = pSRB;
370 trm_SRBwaiting(PDCB pDCB, PSRB pSRB)
373 if (pDCB->pWaitingSRB) {
374 pDCB->pWaitLastSRB->pNextSRB = pSRB;
375 pDCB->pWaitLastSRB = pSRB;
376 pSRB->pNextSRB = NULL;
378 pDCB->pWaitingSRB = pSRB;
379 pDCB->pWaitLastSRB = pSRB;
384 trm_ExecuteSRB(void *arg, bus_dma_segment_t *dm_segs, int nseg, int vp)
390 u_long totalxferlen=0;
394 pACB = (PACB)ccb->ccb_h.ccb_trmacb_ptr;
395 TRM_DPRINTF("trm_ExecuteSRB..........\n");
398 bus_dma_segment_t *end_seg;
401 /* Copy the segments into our SG list */
402 end_seg = dm_segs + nseg;
403 psg = (PSEG) &pSRB->SegmentX[0];
404 pSRB->SRBSGListPointer= psg;
405 while (dm_segs < end_seg) {
406 psg->address = vp?(u_long)vtophys(dm_segs->ds_addr)
407 :(u_long)dm_segs->ds_addr;
408 psg->length = (u_long)dm_segs->ds_len;
409 totalxferlen += dm_segs->ds_len;
413 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
414 op = BUS_DMASYNC_PREREAD;
416 op = BUS_DMASYNC_PREWRITE;
418 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
421 pSRB->SRBTotalXferLength=totalxferlen;
422 pSRB->SRBSGCount = nseg;
423 pSRB->SRBSGIndex = 0;
424 pSRB->AdaptStatus = 0;
425 pSRB->TargetStatus = 0;
430 pSRB->ScsiPhase = PH_BUS_FREE; /* SCSI bus free Phase */
433 if (ccb->ccb_h.status != CAM_REQ_INPROG) {
435 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
436 pSRB->pNextSRB = pACB->pFreeSRB;
437 pACB->pFreeSRB = pSRB;
442 ccb->ccb_h.status |= CAM_SIM_QUEUED;
444 /* XXX Need a timeout handler */
445 callout_reset(&ccb->ccb_h.timeout_ch, (ccb->ccb_h.timeout * hz) / 1000,
448 trm_SendSRB(pACB, pSRB);
454 trm_SendSRB(PACB pACB, PSRB pSRB)
460 pDCB = pSRB->pSRBDCB;
461 if (!(pDCB->MaxCommand > pDCB->GoingSRBCnt) || (pACB->pActiveDCB)
462 || (pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
463 TRM_DPRINTF("pDCB->MaxCommand=%d \n",pDCB->MaxCommand);
464 TRM_DPRINTF("pDCB->GoingSRBCnt=%d \n",pDCB->GoingSRBCnt);
465 TRM_DPRINTF("pACB->pActiveDCB=%8x \n",(u_int)pACB->pActiveDCB);
466 TRM_DPRINTF("pACB->ACBFlag=%x \n",pACB->ACBFlag);
467 trm_SRBwaiting(pDCB, pSRB);
471 if (pDCB->pWaitingSRB) {
472 trm_SRBwaiting(pDCB, pSRB);
473 pSRB = pDCB->pWaitingSRB;
474 pDCB->pWaitingSRB = pSRB->pNextSRB;
475 pSRB->pNextSRB = NULL;
478 if (!trm_StartSCSI(pACB, pDCB, pSRB)) {
480 * If trm_StartSCSI return 0 :
481 * current interrupt status is interrupt enable
482 * It's said that SCSI processor is unoccupied
484 pDCB->GoingSRBCnt++; /* stack waiting SRB*/
485 if (pDCB->pGoingSRB) {
486 pDCB->pGoingLastSRB->pNextSRB = pSRB;
487 pDCB->pGoingLastSRB = pSRB;
489 pDCB->pGoingSRB = pSRB;
490 pDCB->pGoingLastSRB = pSRB;
494 * If trm_StartSCSI return 1 :
495 * current interrupt status is interrupt disreenable
496 * It's said that SCSI processor has more one SRB need to do
498 trm_RewaitSRB0(pDCB, pSRB);
510 trm_action(struct cam_sim *psim, union ccb *pccb)
513 u_int target_id,target_lun;
515 CAM_DEBUG(pccb->ccb_h.path, CAM_DEBUG_TRACE, ("trm_action\n"));
517 pACB = (PACB) cam_sim_softc(psim);
518 target_id = pccb->ccb_h.target_id;
519 target_lun = pccb->ccb_h.target_lun;
521 switch (pccb->ccb_h.func_code) {
523 TRM_DPRINTF(" XPT_NOOP \n");
524 pccb->ccb_h.status = CAM_REQ_INVALID;
528 * Execute the requested I/O operation
533 struct ccb_scsiio *pcsio;
536 TRM_DPRINTF(" XPT_SCSI_IO \n");
537 TRM_DPRINTF("trm: target_id= %d target_lun= %d \n"
538 ,target_id, target_lun);
540 "pACB->scan_devices[target_id][target_lun]= %d \n"
541 ,pACB->scan_devices[target_id][target_lun]);
542 pDCB = pACB->pDCB[target_id][target_lun];
544 * Assign an SRB and connect it with this ccb.
546 pSRB = trm_GetSRB(pACB);
549 pccb->ccb_h.status = CAM_RESRC_UNAVAIL;
553 pSRB->pSRBDCB = pDCB;
554 pccb->ccb_h.ccb_trmsrb_ptr = pSRB;
555 pccb->ccb_h.ccb_trmacb_ptr = pACB;
557 pSRB->ScsiCmdLen = pcsio->cdb_len;
559 * move layer of CAM command block to layer of SCSI
560 * Request Block for SCSI processor command doing
562 bcopy(pcsio->cdb_io.cdb_bytes,pSRB->CmdBlock
564 if ((pccb->ccb_h.flags & CAM_DIR_MASK)
566 if ((pccb->ccb_h.flags &
567 CAM_SCATTER_VALID) == 0) {
568 if ((pccb->ccb_h.flags
569 & CAM_DATA_PHYS) == 0) {
574 error = bus_dmamap_load(
582 if (error == EINPROGRESS) {
586 pccb->ccb_h.status |=
591 struct bus_dma_segment seg;
593 /* Pointer to physical buffer */
595 (bus_addr_t)pcsio->data_ptr;
596 seg.ds_len = pcsio->dxfer_len;
597 trm_ExecuteSRB(pSRB, &seg, 1,
601 /* CAM_SCATTER_VALID */
602 struct bus_dma_segment *segs;
604 if ((pccb->ccb_h.flags &
605 CAM_SG_LIST_PHYS) == 0 ||
607 & CAM_DATA_PHYS) != 0) {
608 pSRB->pNextSRB = pACB->pFreeSRB;
609 pACB->pFreeSRB = pSRB;
616 /* cam SG list is physical,
617 * cam data is virtual
619 segs = (struct bus_dma_segment *)
621 trm_ExecuteSRB(pSRB, segs,
622 pcsio->sglist_cnt, 1);
623 } /* CAM_SCATTER_VALID */
625 trm_ExecuteSRB(pSRB, NULL, 0, 0);
629 TRM_DPRINTF(" XPT_GDEV_TYPE \n");
630 pccb->ccb_h.status = CAM_REQ_INVALID;
634 TRM_DPRINTF(" XPT_GDEVLIST \n");
635 pccb->ccb_h.status = CAM_REQ_INVALID;
639 * Path routing inquiry
643 struct ccb_pathinq *cpi = &pccb->cpi;
645 TRM_DPRINTF(" XPT_PATH_INQ \n");
646 cpi->version_num = 1;
647 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
648 cpi->target_sprt = 0;
650 cpi->hba_eng_cnt = 0;
651 cpi->max_target = 15 ;
652 cpi->max_lun = pACB->max_lun; /* 7 or 0 */
653 cpi->initiator_id = pACB->AdaptSCSIID;
654 cpi->bus_id = cam_sim_bus(psim);
655 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
656 strncpy(cpi->hba_vid, "Tekram_TRM", HBA_IDLEN);
657 strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN);
658 cpi->unit_number = cam_sim_unit(psim);
659 cpi->ccb_h.status = CAM_REQ_CMP;
664 * Release a frozen SIM queue
668 TRM_DPRINTF(" XPT_REL_SIMQ \n");
669 pccb->ccb_h.status = CAM_REQ_INVALID;
673 * Set Asynchronous Callback Parameters
674 * Set Asynchronous Callback CCB
677 TRM_DPRINTF(" XPT_SASYNC_CB \n");
678 pccb->ccb_h.status = CAM_REQ_INVALID;
682 * Set device type information
683 * Set Device Type CCB
686 TRM_DPRINTF(" XPT_SDEV_TYPE \n");
687 pccb->ccb_h.status = CAM_REQ_INVALID;
691 * (Re)Scan the SCSI Bus
692 * Rescan the given bus, or bus/target/lun
695 TRM_DPRINTF(" XPT_SCAN_BUS \n");
696 pccb->ccb_h.status = CAM_REQ_INVALID;
700 * Get EDT entries matching the given pattern
703 TRM_DPRINTF(" XPT_DEV_MATCH \n");
704 pccb->ccb_h.status = CAM_REQ_INVALID;
708 * Turn on debugging for a bus, target or lun
711 TRM_DPRINTF(" XPT_DEBUG \n");
712 pccb->ccb_h.status = CAM_REQ_INVALID;
716 * XPT_ABORT = 0x10, Abort the specified CCB
717 * Abort XPT request CCB
720 TRM_DPRINTF(" XPT_ABORT \n");
721 pccb->ccb_h.status = CAM_REQ_INVALID;
725 * Reset the specified SCSI bus
728 case XPT_RESET_BUS: {
731 TRM_DPRINTF(" XPT_RESET_BUS \n");
734 for (i=0; i<500; i++)
736 pccb->ccb_h.status = CAM_REQ_CMP;
741 * Bus Device Reset the specified SCSI device
742 * Reset SCSI Device CCB
746 * Don't (yet?) support vendor
749 TRM_DPRINTF(" XPT_RESET_DEV \n");
750 pccb->ccb_h.status = CAM_REQ_INVALID;
754 * Terminate the I/O process
755 * Terminate I/O Process Request CCB
758 TRM_DPRINTF(" XPT_TERM_IO \n");
759 pccb->ccb_h.status = CAM_REQ_INVALID;
766 TRM_DPRINTF(" XPT_SCAN_LUN \n");
767 pccb->ccb_h.status = CAM_REQ_INVALID;
772 * Get/Set transfer rate/width/disconnection/tag queueing
774 * (GET) default/user transfer settings for the target
776 case XPT_GET_TRAN_SETTINGS: {
777 struct ccb_trans_settings *cts;
779 struct trm_transinfo *tinfo;
782 TRM_DPRINTF(" XPT_GET_TRAN_SETTINGS \n");
784 pDCB = pACB->pDCB[target_id][target_lun];
789 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
790 /* current transfer settings */
791 if (pDCB->tinfo.disc_tag & TRM_CUR_DISCENB)
792 cts->flags = CCB_TRANS_DISC_ENB;
794 cts->flags = 0;/* no tag & disconnect */
795 if (pDCB->tinfo.disc_tag & TRM_CUR_TAGENB)
796 cts->flags |= CCB_TRANS_TAG_ENB;
797 tinfo = &pDCB->tinfo.current;
798 TRM_DPRINTF("CURRENT: cts->flags= %2x \n",
801 /* default(user) transfer settings */
802 if (pDCB->tinfo.disc_tag & TRM_USR_DISCENB)
803 cts->flags = CCB_TRANS_DISC_ENB;
806 if (pDCB->tinfo.disc_tag & TRM_USR_TAGENB)
807 cts->flags |= CCB_TRANS_TAG_ENB;
808 tinfo = &pDCB->tinfo.user;
809 TRM_DPRINTF("USER: cts->flags= %2x \n",
812 cts->sync_period = tinfo->period;
813 cts->sync_offset = tinfo->offset;
814 cts->bus_width = tinfo->width;
815 TRM_DPRINTF("pDCB->SyncPeriod: %d \n",
817 TRM_DPRINTF("period: %d \n", tinfo->period);
818 TRM_DPRINTF("offset: %d \n", tinfo->offset);
819 TRM_DPRINTF("width: %d \n", tinfo->width);
822 cts->valid = CCB_TRANS_SYNC_RATE_VALID |
823 CCB_TRANS_SYNC_OFFSET_VALID |
824 CCB_TRANS_BUS_WIDTH_VALID |
825 CCB_TRANS_DISC_VALID |
827 pccb->ccb_h.status = CAM_REQ_CMP;
832 * Get/Set transfer rate/width/disconnection/tag queueing
834 * (Set) transfer rate/width negotiation settings
836 case XPT_SET_TRAN_SETTINGS: {
837 struct ccb_trans_settings *cts;
842 TRM_DPRINTF(" XPT_SET_TRAN_SETTINGS \n");
845 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
846 update_type |= TRM_TRANS_GOAL;
847 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0)
848 update_type |= TRM_TRANS_USER;
850 pDCB = pACB->pDCB[target_id][target_lun];
852 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
853 /*ccb disc enables */
854 if (update_type & TRM_TRANS_GOAL) {
855 if ((cts->flags & CCB_TRANS_DISC_ENB)
860 pDCB->tinfo.disc_tag &=
863 if (update_type & TRM_TRANS_USER) {
864 if ((cts->flags & CCB_TRANS_DISC_ENB)
869 pDCB->tinfo.disc_tag &=
873 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
874 /* if ccb tag q active */
875 if (update_type & TRM_TRANS_GOAL) {
876 if ((cts->flags & CCB_TRANS_TAG_ENB)
878 pDCB->tinfo.disc_tag |=
881 pDCB->tinfo.disc_tag &=
884 if (update_type & TRM_TRANS_USER) {
885 if ((cts->flags & CCB_TRANS_TAG_ENB)
887 pDCB->tinfo.disc_tag |=
890 pDCB->tinfo.disc_tag &=
894 /* Minimum sync period factor */
896 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0) {
897 /* if ccb sync active */
898 /* TRM-S1040 MinSyncPeriod = 4 clocks/byte */
899 if ((cts->sync_period != 0) &&
900 (cts->sync_period < 125))
901 cts->sync_period = 125;
902 /* 1/(125*4) minsync 2 MByte/sec */
903 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID)
905 if (cts->sync_offset == 0)
906 cts->sync_period = 0;
907 /* TRM-S1040 MaxSyncOffset = 15 bytes*/
908 if (cts->sync_offset > 15)
909 cts->sync_offset = 15;
912 if ((update_type & TRM_TRANS_USER) != 0) {
913 pDCB->tinfo.user.period = cts->sync_period;
914 pDCB->tinfo.user.offset = cts->sync_offset;
915 pDCB->tinfo.user.width = cts->bus_width;
917 if ((update_type & TRM_TRANS_GOAL) != 0) {
918 pDCB->tinfo.goal.period = cts->sync_period;
919 pDCB->tinfo.goal.offset = cts->sync_offset;
920 pDCB->tinfo.goal.width = cts->bus_width;
923 pccb->ccb_h.status = CAM_REQ_CMP;
928 * Calculate the geometry parameters for a device give
929 * the sector size and volume size.
931 case XPT_CALC_GEOMETRY: {
932 struct ccb_calc_geometry *ccg;
934 u_int32_t secs_per_cylinder;
937 TRM_DPRINTF(" XPT_CALC_GEOMETRY \n");
939 size_mb = ccg->volume_size /
940 ((1024L * 1024L) / ccg->block_size);
942 if (size_mb > 1024 && extended) {
944 ccg->secs_per_track = 63;
947 ccg->secs_per_track = 32;
949 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
950 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
951 pccb->ccb_h.status = CAM_REQ_CMP;
956 TRM_DPRINTF(" XPT_ENG_INQ \n");
957 pccb->ccb_h.status = CAM_REQ_INVALID;
961 * HBA execute engine request
962 * This structure must match SCSIIO size
965 TRM_DPRINTF(" XPT_ENG_EXEC \n");
966 pccb->ccb_h.status = CAM_REQ_INVALID;
970 * XPT_EN_LUN = 0x30, Enable LUN as a target
971 * Target mode structures.
975 * Don't (yet?) support vendor
978 TRM_DPRINTF(" XPT_EN_LUN \n");
979 pccb->ccb_h.status = CAM_REQ_INVALID;
983 * Execute target I/O request
987 * Don't (yet?) support vendor
990 TRM_DPRINTF(" XPT_TARGET_IO \n");
991 pccb->ccb_h.status = CAM_REQ_INVALID;
995 * Accept Host Target Mode CDB
997 case XPT_ACCEPT_TARGET_IO:
999 * Don't (yet?) support vendor
1000 * specific commands.
1002 TRM_DPRINTF(" XPT_ACCEPT_TARGET_IO \n");
1003 pccb->ccb_h.status = CAM_REQ_INVALID;
1007 * Continue Host Target I/O Connection
1009 case XPT_CONT_TARGET_IO:
1011 * Don't (yet?) support vendor
1012 * specific commands.
1014 TRM_DPRINTF(" XPT_CONT_TARGET_IO \n");
1015 pccb->ccb_h.status = CAM_REQ_INVALID;
1019 * Notify Host Target driver of event
1021 case XPT_IMMED_NOTIFY:
1022 TRM_DPRINTF(" XPT_IMMED_NOTIFY \n");
1023 pccb->ccb_h.status = CAM_REQ_INVALID;
1027 * Acknowledgement of event
1029 case XPT_NOTIFY_ACK:
1030 TRM_DPRINTF(" XPT_NOTIFY_ACK \n");
1031 pccb->ccb_h.status = CAM_REQ_INVALID;
1035 * XPT_VUNIQUE = 0x80
1038 pccb->ccb_h.status = CAM_REQ_INVALID;
1042 pccb->ccb_h.status = CAM_REQ_INVALID;
1049 trm_poll(struct cam_sim *psim)
1055 trm_ResetDevParam(PACB pACB)
1058 PNVRAMTYPE pEEpromBuf;
1059 u_int8_t PeriodIndex;
1061 pDCB = pACB->pLinkDCB;
1066 pDCB->SyncMode &= ~(SYNC_NEGO_DONE+ WIDE_NEGO_DONE);
1067 pDCB->SyncPeriod = 0;
1068 pDCB->SyncOffset = 0;
1069 pEEpromBuf = &trm_eepromBuf[pACB->AdapterUnit];
1071 pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarCfg0;
1072 pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
1074 pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarPeriod & 0x07;
1075 pDCB->MaxNegoPeriod = dc395x_trm_clock_period[PeriodIndex];
1076 if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
1077 (pACB->Config & HCC_WIDE_CARD))
1078 pDCB->SyncMode |= WIDE_NEGO_ENABLE;
1079 pDCB = pDCB->pNextDCB;
1081 while (pdcb != pDCB);
1085 trm_RecoverSRB(PACB pACB)
1091 pDCB = pACB->pLinkDCB;
1096 cnt = pdcb->GoingSRBCnt;
1097 psrb = pdcb->pGoingSRB;
1098 for (i = 0; i < cnt; i++) {
1100 psrb = psrb->pNextSRB;
1101 if (pdcb->pWaitingSRB) {
1102 psrb2->pNextSRB = pdcb->pWaitingSRB;
1103 pdcb->pWaitingSRB = psrb2;
1105 pdcb->pWaitingSRB = psrb2;
1106 pdcb->pWaitLastSRB = psrb2;
1107 psrb2->pNextSRB = NULL;
1110 pdcb->GoingSRBCnt = 0;
1111 pdcb->pGoingSRB = NULL;
1113 pdcb = pdcb->pNextDCB;
1115 while (pdcb != pDCB);
1119 trm_reset(PACB pACB)
1124 TRM_DPRINTF("trm: RESET");
1126 trm_reg_write8(0x00, TRMREG_DMA_INTEN);
1127 trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
1129 trm_ResetSCSIBus(pACB);
1130 for (i = 0; i < 500; i++)
1132 trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
1133 /* Enable DMA interrupt */
1134 trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
1135 /* Clear DMA FIFO */
1136 trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1137 /* Clear SCSI FIFO */
1138 trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1139 trm_ResetDevParam(pACB);
1140 trm_DoingSRB_Done(pACB);
1141 pACB->pActiveDCB = NULL;
1142 pACB->ACBFlag = 0;/* RESET_DETECT, RESET_DONE ,RESET_DEV */
1143 trm_DoWaitingSRB(pACB);
1144 /* Tell the XPT layer that a bus reset occured */
1145 if (pACB->ppath != NULL)
1146 xpt_async(AC_BUS_RESET, pACB->ppath, NULL);
1152 trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB)
1154 u_int16_t return_code;
1155 u_int8_t tag_number, scsicommand, i,command,identify_message;
1159 struct ccb_scsiio *pcsio;
1162 pcsio = &pccb->csio;
1163 pSRB->TagNumber = 31;
1165 trm_reg_write8(pACB->AdaptSCSIID, TRMREG_SCSI_HOSTID);
1166 trm_reg_write8(pDCB->TargetID, TRMREG_SCSI_TARGETID);
1167 trm_reg_write8(pDCB->SyncPeriod, TRMREG_SCSI_SYNC);
1168 trm_reg_write8(pDCB->SyncOffset, TRMREG_SCSI_OFFSET);
1169 pSRB->ScsiPhase = PH_BUS_FREE;/* initial phase */
1171 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1173 identify_message = pDCB->IdentifyMsg;
1175 if ((pSRB->CmdBlock[0] == INQUIRY) ||
1176 (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1177 (pSRB->SRBFlag & AUTO_REQSENSE)) {
1178 if (((pDCB->SyncMode & WIDE_NEGO_ENABLE) &&
1179 !(pDCB->SyncMode & WIDE_NEGO_DONE)) \
1180 || ((pDCB->SyncMode & SYNC_NEGO_ENABLE) &&
1181 !(pDCB->SyncMode & SYNC_NEGO_DONE))) {
1182 if (!(pDCB->IdentifyMsg & 7) ||
1183 (pSRB->CmdBlock[0] != INQUIRY)) {
1184 scsicommand = SCMD_SEL_ATNSTOP;
1185 pSRB->SRBState = SRB_MSGOUT;
1190 * Send identify message
1192 trm_reg_write8((identify_message & 0xBF) ,TRMREG_SCSI_FIFO);
1193 scsicommand = SCMD_SEL_ATN;
1194 pSRB->SRBState = SRB_START_;
1196 /* not inquiry,request sense,auto request sense */
1198 * Send identify message
1200 trm_reg_write8(identify_message,TRMREG_SCSI_FIFO);
1201 scsicommand = SCMD_SEL_ATN;
1202 pSRB->SRBState = SRB_START_;
1203 if (pDCB->SyncMode & EN_TAG_QUEUING) {
1204 /* Send Tag message */
1210 while (tag_mask & pDCB->TagMask) {
1211 tag_mask = tag_mask << 1;
1217 trm_reg_write8(MSG_SIMPLE_QTAG, TRMREG_SCSI_FIFO);
1218 trm_reg_write8(tag_number, TRMREG_SCSI_FIFO);
1219 pDCB->TagMask |= tag_mask;
1220 pSRB->TagNumber = tag_number;
1221 scsicommand = SCMD_SEL_ATN3;
1222 pSRB->SRBState = SRB_START_;
1227 * Send CDB ..command block .........
1229 if (pSRB->SRBFlag & AUTO_REQSENSE) {
1230 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1231 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1232 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1233 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1234 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1235 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1237 ptr = (u_int8_t *) pSRB->CmdBlock;
1238 for (i = 0; i < pSRB->ScsiCmdLen ; i++) {
1240 trm_reg_write8(command,TRMREG_SCSI_FIFO);
1243 if (trm_reg_read16(TRMREG_SCSI_STATUS) & SCSIINTERRUPT) {
1245 * If trm_StartSCSI return 1 :
1246 * current interrupt status is interrupt disreenable
1247 * It's said that SCSI processor has more one SRB need to do,
1248 * SCSI processor has been occupied by one SRB.
1250 pSRB->SRBState = SRB_READY;
1251 pDCB->TagMask &= ~(1 << pSRB->TagNumber);
1255 * If trm_StartSCSI return 0 :
1256 * current interrupt status is interrupt enable
1257 * It's said that SCSI processor is unoccupied
1259 pSRB->ScsiPhase = SCSI_NOP1; /* SCSI bus free Phase */
1260 pACB->pActiveDCB = pDCB;
1261 pDCB->pActiveSRB = pSRB;
1263 trm_reg_write16(DO_DATALATCH | DO_HWRESELECT,
1264 TRMREG_SCSI_CONTROL);/* it's important for atn stop*/
1268 trm_reg_write8(scsicommand,TRMREG_SCSI_COMMAND);
1270 return (return_code);
1274 trm_Interrupt(vpACB)
1281 void (*stateV)(PACB, PSRB, u_int8_t *);
1282 u_int8_t scsi_status=0, scsi_intstatus;
1287 TRM_DPRINTF("trm_Interrupt: pACB NULL return......");
1291 scsi_status = trm_reg_read16(TRMREG_SCSI_STATUS);
1292 if (!(scsi_status & SCSIINTERRUPT)) {
1293 TRM_DPRINTF("trm_Interrupt: TRMREG_SCSI_STATUS scsi_status = NULL ,return......");
1296 TRM_DPRINTF("scsi_status=%2x,",scsi_status);
1298 scsi_intstatus = trm_reg_read8(TRMREG_SCSI_INTSTATUS);
1300 TRM_DPRINTF("scsi_intstatus=%2x,",scsi_intstatus);
1302 if (scsi_intstatus & (INT_SELTIMEOUT | INT_DISCONNECT)) {
1303 trm_Disconnect(pACB);
1307 if (scsi_intstatus & INT_RESELECTED) {
1311 if (scsi_intstatus & INT_SCSIRESET) {
1312 trm_ScsiRstDetect(pACB);
1316 if (scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) {
1317 pDCB = pACB->pActiveDCB;
1318 pSRB = pDCB->pActiveSRB;
1320 if (pDCB->DCBFlag & ABORT_DEV_)
1321 trm_EnableMsgOutAbort1(pACB, pSRB);
1323 phase = (u_int16_t) pSRB->ScsiPhase; /* phase: */
1324 stateV = (void *) trm_SCSI_phase0[phase];
1325 stateV(pACB, pSRB, &scsi_status);
1326 pSRB->ScsiPhase = scsi_status & PHASEMASK;
1327 /* phase:0,1,2,3,4,5,6,7 */
1328 phase = (u_int16_t) scsi_status & PHASEMASK;
1329 stateV = (void *) trm_SCSI_phase1[phase];
1330 stateV(pACB, pSRB, &scsi_status);
1335 trm_MsgOutPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1338 if (pSRB->SRBState & (SRB_UNEXPECT_RESEL+SRB_ABORT_SENT))
1339 *pscsi_status = PH_BUS_FREE;
1340 /*.. initial phase*/
1344 trm_MsgOutPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1351 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1352 pDCB = pACB->pActiveDCB;
1353 if (!(pSRB->SRBState & SRB_MSGOUT)) {
1356 ptr = (u_int8_t *) pSRB->MsgOutBuf;
1357 for (i = 0; i < cnt; i++) {
1358 trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1362 if ((pDCB->DCBFlag & ABORT_DEV_) &&
1363 (pSRB->MsgOutBuf[0] == MSG_ABORT)) {
1364 pSRB->SRBState = SRB_ABORT_SENT;
1368 if ((pSRB->CmdBlock[0] == INQUIRY) ||
1369 (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1370 (pSRB->SRBFlag & AUTO_REQSENSE)) {
1371 if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1375 trm_reg_write8(bval, TRMREG_SCSI_FIFO);
1378 mop1: /* message out phase */
1379 if (!(pSRB->SRBState & SRB_DO_WIDE_NEGO)
1380 && (pDCB->SyncMode & WIDE_NEGO_ENABLE)) {
1382 * WIDE DATA TRANSFER REQUEST code (03h)
1384 pDCB->SyncMode &= ~(SYNC_NEGO_DONE | EN_ATN_STOP);
1385 trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1387 trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1389 trm_reg_write8(2,TRMREG_SCSI_FIFO);
1390 /* Message length (02h) */
1391 trm_reg_write8(3,TRMREG_SCSI_FIFO);
1392 /* wide data xfer (03h) */
1393 trm_reg_write8(1,TRMREG_SCSI_FIFO);
1394 /* width:0(8bit),1(16bit),2(32bit) */
1395 pSRB->SRBState |= SRB_DO_WIDE_NEGO;
1396 } else if (!(pSRB->SRBState & SRB_DO_SYNC_NEGO)
1397 && (pDCB->SyncMode & SYNC_NEGO_ENABLE)) {
1399 * SYNCHRONOUS DATA TRANSFER REQUEST code (01h)
1401 if (!(pDCB->SyncMode & WIDE_NEGO_DONE))
1402 trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1404 trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1406 trm_reg_write8(3,TRMREG_SCSI_FIFO);
1407 /* Message length (03h) */
1408 trm_reg_write8(1,TRMREG_SCSI_FIFO);
1409 /* SYNCHRONOUS DATA TRANSFER REQUEST code (01h) */
1410 trm_reg_write8(pDCB->MaxNegoPeriod,TRMREG_SCSI_FIFO);
1411 /* Transfer peeriod factor */
1412 trm_reg_write8(SYNC_NEGO_OFFSET,TRMREG_SCSI_FIFO);
1413 /* REQ/ACK offset */
1414 pSRB->SRBState |= SRB_DO_SYNC_NEGO;
1417 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1418 /* it's important for atn stop */
1422 trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1426 trm_CommandPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1432 trm_CommandPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1438 struct ccb_scsiio *pcsio;
1441 pcsio = &pccb->csio;
1443 trm_reg_write16(DO_CLRATN | DO_CLRFIFO , TRMREG_SCSI_CONTROL);
1444 if (!(pSRB->SRBFlag & AUTO_REQSENSE)) {
1445 cnt = (u_int16_t) pSRB->ScsiCmdLen;
1446 ptr = (u_int8_t *) pSRB->CmdBlock;
1447 for (i = 0; i < cnt; i++) {
1448 trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1452 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1453 pDCB = pACB->pActiveDCB;
1455 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1456 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1457 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1458 /* sizeof(struct scsi_sense_data) */
1459 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1460 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1462 pSRB->SRBState = SRB_COMMAND;
1463 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1464 /* it's important for atn stop*/
1468 trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1472 trm_DataOutPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1475 u_int8_t TempDMAstatus,SGIndexTemp;
1476 u_int16_t scsi_status;
1478 u_long TempSRBXferredLength,dLeftCounter=0;
1480 pDCB = pSRB->pSRBDCB;
1481 scsi_status = *pscsi_status;
1483 if (!(pSRB->SRBState & SRB_XFERPAD)) {
1484 if (scsi_status & PARITYERROR)
1485 pSRB->SRBStatus |= PARITY_ERROR;
1486 if (!(scsi_status & SCSIXFERDONE)) {
1488 * when data transfer from DMA FIFO to SCSI FIFO
1489 * if there was some data left in SCSI FIFO
1491 dLeftCounter = (u_long)
1492 (trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x1F);
1493 if (pDCB->SyncPeriod & WIDE_SYNC) {
1495 * if WIDE scsi SCSI FIFOCNT unit is word
1502 * caculate all the residue data that not yet tranfered
1503 * SCSI transfer counter + left in SCSI FIFO data
1505 * .....TRM_SCSI_COUNTER (24bits)
1506 * The counter always decrement by one for every SCSI byte
1508 * .....TRM_SCSI_FIFOCNT (5bits)
1509 * The counter is SCSI FIFO offset counter
1511 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1512 if (dLeftCounter == 1) {
1514 trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1516 if ((dLeftCounter == 0) ||
1517 (scsi_status & SCSIXFERCNT_2_ZERO)) {
1518 TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1519 while (!(TempDMAstatus & DMAXFERCOMP)) {
1521 trm_reg_read8(TRMREG_DMA_STATUS);
1523 pSRB->SRBTotalXferLength = 0;
1525 /* Update SG list */
1527 * if transfer not yet complete
1528 * there were some data residue in SCSI FIFO or
1529 * SCSI transfer counter not empty
1531 if (pSRB->SRBTotalXferLength != dLeftCounter) {
1533 * data that had transferred length
1535 TempSRBXferredLength =
1536 pSRB->SRBTotalXferLength - dLeftCounter;
1538 * next time to be transferred length
1540 pSRB->SRBTotalXferLength = dLeftCounter;
1542 * parsing from last time disconnect SRBSGIndex
1545 pSRB->SRBSGListPointer + pSRB->SRBSGIndex;
1546 for (SGIndexTemp = pSRB->SRBSGIndex;
1547 SGIndexTemp < pSRB->SRBSGCount;
1550 * find last time which SG transfer be
1553 if (TempSRBXferredLength >=
1555 TempSRBXferredLength -=
1559 * update last time disconnected SG
1563 TempSRBXferredLength;
1564 /* residue data length */
1566 TempSRBXferredLength;
1567 /* residue data pointer */
1568 pSRB->SRBSGIndex = SGIndexTemp;
1576 trm_reg_write8(STOPDMAXFER ,TRMREG_DMA_CONTROL);
1581 trm_DataOutPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1585 * do prepare befor transfer when data out phase
1588 ioDir = XFERDATAOUT;
1589 trm_DataIO_transfer(pACB, pSRB, ioDir);
1593 trm_DataInPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1595 u_int8_t bval,SGIndexTemp;
1596 u_int16_t scsi_status;
1598 u_long TempSRBXferredLength,dLeftCounter = 0;
1600 scsi_status = *pscsi_status;
1601 if (!(pSRB->SRBState & SRB_XFERPAD)) {
1602 if (scsi_status & PARITYERROR)
1603 pSRB->SRBStatus |= PARITY_ERROR;
1604 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1605 if ((dLeftCounter == 0) || (scsi_status & SCSIXFERCNT_2_ZERO)) {
1606 bval = trm_reg_read8(TRMREG_DMA_STATUS);
1607 while (!(bval & DMAXFERCOMP))
1608 bval = trm_reg_read8(TRMREG_DMA_STATUS);
1609 pSRB->SRBTotalXferLength = 0;
1613 * when a transfer not yet complete
1614 * but be disconnected by uper layer
1615 * if transfer not yet complete
1616 * there were some data residue in SCSI FIFO or
1617 * SCSI transfer counter not empty
1619 if (pSRB->SRBTotalXferLength != dLeftCounter) {
1621 * data that had transferred length
1623 TempSRBXferredLength =
1624 pSRB->SRBTotalXferLength - dLeftCounter;
1626 * next time to be transferred length
1628 pSRB->SRBTotalXferLength = dLeftCounter;
1630 * parsing from last time disconnect SRBSGIndex
1632 pseg = pSRB->SRBSGListPointer + pSRB->SRBSGIndex;
1633 for (SGIndexTemp = pSRB->SRBSGIndex;
1634 SGIndexTemp < pSRB->SRBSGCount;
1637 * find last time which SG transfer be disconnect
1639 if (TempSRBXferredLength >= pseg->length)
1640 TempSRBXferredLength -= pseg->length;
1643 * update last time disconnected SG list
1645 pseg->length -= TempSRBXferredLength;
1646 /* residue data length */
1647 pseg->address += TempSRBXferredLength;
1648 /* residue data pointer */
1649 pSRB->SRBSGIndex = SGIndexTemp;
1660 trm_DataInPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1664 * do prepare befor transfer when data in phase
1668 trm_DataIO_transfer(pACB, pSRB, ioDir);
1672 trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir)
1677 pDCB = pSRB->pSRBDCB;
1678 if (pSRB->SRBSGIndex < pSRB->SRBSGCount) {
1679 if (pSRB->SRBTotalXferLength != 0) {
1680 pSRB->SRBSGPhyAddr = vtophys(pSRB->SRBSGListPointer);
1682 * load what physical address of Scatter/Gather list
1683 table want to be transfer
1685 pSRB->SRBState = SRB_DATA_XFER;
1686 trm_reg_write32(0, TRMREG_DMA_XHIGHADDR);
1688 (pSRB->SRBSGPhyAddr +
1689 ((u_long)pSRB->SRBSGIndex << 3)),
1690 TRMREG_DMA_XLOWADDR);
1692 * load how many bytes in the Scatter/Gather
1696 ((u_long)(pSRB->SRBSGCount - pSRB->SRBSGIndex) << 3),
1699 * load total transfer length (24bits) max value
1702 trm_reg_write32(pSRB->SRBTotalXferLength,
1703 TRMREG_SCSI_COUNTER);
1704 /* Start DMA transfer */
1705 trm_reg_write16(ioDir, TRMREG_DMA_COMMAND);
1706 /* Start SCSI transfer */
1707 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1708 /* it's important for atn stop */
1712 bval = (ioDir == XFERDATAOUT) ?
1713 SCMD_DMA_OUT : SCMD_DMA_IN;
1714 trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1717 if (pSRB->SRBSGCount) {
1718 pSRB->AdaptStatus = H_OVER_UNDER_RUN;
1719 pSRB->SRBStatus |= OVER_RUN;
1721 if (pDCB->SyncPeriod & WIDE_SYNC)
1722 trm_reg_write32(2,TRMREG_SCSI_COUNTER);
1724 trm_reg_write32(1,TRMREG_SCSI_COUNTER);
1725 if (ioDir == XFERDATAOUT)
1726 trm_reg_write16(0, TRMREG_SCSI_FIFO);
1728 trm_reg_read16(TRMREG_SCSI_FIFO);
1729 pSRB->SRBState |= SRB_XFERPAD;
1730 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1731 /* it's important for atn stop */
1735 bval = (ioDir == XFERDATAOUT) ?
1736 SCMD_FIFO_OUT : SCMD_FIFO_IN;
1737 trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1743 trm_StatusPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1746 pSRB->TargetStatus = trm_reg_read8(TRMREG_SCSI_FIFO);
1747 pSRB->SRBState = SRB_COMPLETED;
1748 *pscsi_status = PH_BUS_FREE;
1749 /*.. initial phase*/
1750 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1751 /* it's important for atn stop */
1755 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1761 trm_StatusPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1764 if (trm_reg_read16(TRMREG_DMA_COMMAND) & 0x0001) {
1765 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1766 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1767 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1768 trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1770 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1771 trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1772 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1773 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1775 pSRB->SRBState = SRB_STATUS;
1776 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1777 /* it's important for atn stop */
1781 trm_reg_write8(SCMD_COMP, TRMREG_SCSI_COMMAND);
1786 * trm_MsgInPhase0: one of trm_SCSI_phase0[] vectors
1787 * stateV = (void *) trm_SCSI_phase0[phase]
1789 * extended message codes:
1794 * 00h MODIFY DATA POINTER
1795 * 01h SYNCHRONOUS DATA TRANSFER REQUEST
1796 * 03h WIDE DATA TRANSFER REQUEST
1797 * 04h - 7Fh Reserved
1798 * 80h - FFh Vendor specific
1803 trm_MsgInPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1805 u_int8_t message_in_code,bIndex,message_in_tag_id;
1809 pDCB = pACB->pActiveDCB;
1811 message_in_code = trm_reg_read8(TRMREG_SCSI_FIFO);
1812 if (!(pSRB->SRBState & SRB_EXTEND_MSGIN)) {
1813 if (message_in_code == MSG_DISCONNECT) {
1814 pSRB->SRBState = SRB_DISCONNECT;
1816 } else if (message_in_code == MSG_SAVE_PTR) {
1818 } else if ((message_in_code == MSG_EXTENDED) ||
1819 ((message_in_code >= MSG_SIMPLE_QTAG) &&
1820 (message_in_code <= MSG_ORDER_QTAG))) {
1821 pSRB->SRBState |= SRB_EXTEND_MSGIN;
1822 pSRB->MsgInBuf[0] = message_in_code;
1823 /* extended message (01h) */
1825 pSRB->pMsgPtr = &pSRB->MsgInBuf[1];
1826 /* extended message length (n) */
1828 } else if (message_in_code == MSG_REJECT_) {
1829 /* Reject message */
1830 if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
1831 /* do wide nego reject */
1832 pDCB = pSRB->pSRBDCB;
1833 pDCB->SyncMode |= WIDE_NEGO_DONE;
1834 pDCB->SyncMode &= ~(SYNC_NEGO_DONE |
1835 EN_ATN_STOP | WIDE_NEGO_ENABLE);
1836 pSRB->SRBState &= ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
1837 if ((pDCB->SyncMode & SYNC_NEGO_ENABLE)
1838 && !(pDCB->SyncMode & SYNC_NEGO_DONE)) {
1839 /* Set ATN, in case ATN was clear */
1840 pSRB->SRBState |= SRB_MSGOUT;
1843 TRMREG_SCSI_CONTROL);
1848 TRMREG_SCSI_CONTROL);
1850 } else if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1851 /* do sync nego reject */
1852 trm_reg_write16(DO_CLRATN,TRMREG_SCSI_CONTROL);
1853 if (pSRB->SRBState & SRB_DO_SYNC_NEGO) {
1854 pDCB = pSRB->pSRBDCB;
1856 ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
1857 pDCB->SyncPeriod = 0;
1858 pDCB->SyncOffset = 0;
1863 } else if (message_in_code == MSG_IGNOREWIDE) {
1864 trm_reg_write32(1, TRMREG_SCSI_COUNTER);
1865 trm_reg_read8(TRMREG_SCSI_FIFO);
1868 /* Restore data pointer message */
1869 /* Save data pointer message */
1870 /* Completion message */
1876 * Parsing incomming extented messages
1878 *pSRB->pMsgPtr = message_in_code;
1881 TRM_DPRINTF("pSRB->MsgInBuf[0]=%2x \n ",pSRB->MsgInBuf[0]);
1882 TRM_DPRINTF("pSRB->MsgInBuf[1]=%2x \n ",pSRB->MsgInBuf[1]);
1883 TRM_DPRINTF("pSRB->MsgInBuf[2]=%2x \n ",pSRB->MsgInBuf[2]);
1884 TRM_DPRINTF("pSRB->MsgInBuf[3]=%2x \n ",pSRB->MsgInBuf[3]);
1885 TRM_DPRINTF("pSRB->MsgInBuf[4]=%2x \n ",pSRB->MsgInBuf[4]);
1886 if ((pSRB->MsgInBuf[0] >= MSG_SIMPLE_QTAG)
1887 && (pSRB->MsgInBuf[0] <= MSG_ORDER_QTAG)) {
1889 * is QUEUE tag message :
1892 * HEAD QUEUE TAG (20h)
1893 * ORDERED QUEUE TAG (21h)
1894 * SIMPLE QUEUE TAG (22h)
1896 * Queue tag (00h - FFh)
1898 if (pSRB->MsgCnt == 2) {
1900 message_in_tag_id = pSRB->MsgInBuf[1];
1901 pSRB = pDCB->pGoingSRB;
1902 pSRBTemp = pDCB->pGoingLastSRB;
1905 if (pSRB->TagNumber !=
1906 message_in_tag_id) {
1907 if (pSRB == pSRBTemp) {
1910 pSRB = pSRB->pNextSRB;
1914 if (pDCB->DCBFlag & ABORT_DEV_) {
1915 pSRB->SRBState = SRB_ABORT_SENT;
1916 trm_EnableMsgOutAbort1(
1919 if (!(pSRB->SRBState & SRB_DISCONNECT))
1921 pDCB->pActiveSRB = pSRB;
1922 pSRB->SRBState = SRB_DATA_XFER;
1925 pSRB = pACB->pTmpSRB;
1926 pSRB->SRBState = SRB_UNEXPECT_RESEL;
1927 pDCB->pActiveSRB = pSRB;
1928 pSRB->MsgOutBuf[0] = MSG_ABORT_TAG;
1929 trm_EnableMsgOutAbort2(
1934 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
1935 (pSRB->MsgInBuf[2] == 3) && (pSRB->MsgCnt == 4)) {
1937 * is Wide data xfer Extended message :
1938 * ======================================
1939 * WIDE DATA TRANSFER REQUEST
1940 * ======================================
1941 * byte 0 : Extended message (01h)
1942 * byte 1 : Extended message length (02h)
1943 * byte 2 : WIDE DATA TRANSFER code (03h)
1944 * byte 3 : Transfer width exponent
1946 pDCB = pSRB->pSRBDCB;
1947 pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_WIDE_NEGO);
1948 if ((pSRB->MsgInBuf[1] != 2)) {
1949 /* Length is wrong, reject it */
1951 ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
1953 pSRB->MsgInBuf[0] = MSG_REJECT_;
1954 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
1957 if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
1958 /* Do wide negoniation */
1959 if (pSRB->MsgInBuf[3] > 2) {
1963 ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
1965 pSRB->MsgInBuf[0] = MSG_REJECT_;
1966 trm_reg_write16(DO_SETATN,
1967 TRMREG_SCSI_CONTROL);
1970 if (pSRB->MsgInBuf[3] == 2) {
1971 pSRB->MsgInBuf[3] = 1;
1974 if (!(pDCB->SyncMode
1975 & WIDE_NEGO_DONE)) {
1977 ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
1984 if (pSRB->MsgInBuf[3] != 0) {
1985 /* is Wide data xfer */
1988 pDCB->tinfo.current.width
1989 = MSG_EXT_WDTR_BUS_16_BIT;
1990 pDCB->tinfo.goal.width
1991 = MSG_EXT_WDTR_BUS_16_BIT;
1996 pSRB->MsgInBuf[3] = 0;
1997 pSRB->SRBState |= SRB_MSGOUT;
1998 trm_reg_write16(DO_SETATN,TRMREG_SCSI_CONTROL);
2000 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
2001 (pSRB->MsgInBuf[2] == 1) && (pSRB->MsgCnt == 5)) {
2003 * is 8bit transfer Extended message :
2004 * =================================
2005 * SYNCHRONOUS DATA TRANSFER REQUEST
2006 * =================================
2007 * byte 0 : Extended message (01h)
2008 * byte 1 : Extended message length (03)
2009 * byte 2 : SYNCHRONOUS DATA TRANSFER code (01h)
2010 * byte 3 : Transfer period factor
2011 * byte 4 : REQ/ACK offset
2013 pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_SYNC_NEGO);
2014 if ((pSRB->MsgInBuf[1] != 3) ||
2015 (pSRB->MsgInBuf[2] != 1)) {
2018 pSRB->MsgInBuf[0] = MSG_REJECT_;
2019 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2020 } else if (!(pSRB->MsgInBuf[3]) || !(pSRB->MsgInBuf[4])) {
2022 pDCB = pSRB->pSRBDCB;
2023 /* disable sync & sync nego */
2025 ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
2026 pDCB->SyncPeriod = 0;
2027 pDCB->SyncOffset = 0;
2028 pDCB->tinfo.goal.period = 0;
2029 pDCB->tinfo.goal.offset = 0;
2030 pDCB->tinfo.current.period = 0;
2031 pDCB->tinfo.current.offset = 0;
2032 pDCB->tinfo.current.width =
2033 MSG_EXT_WDTR_BUS_8_BIT;
2037 pDCB = pSRB->pSRBDCB;
2039 SYNC_NEGO_ENABLE+SYNC_NEGO_DONE;
2040 pDCB->MaxNegoPeriod = pSRB->MsgInBuf[3];
2041 /* Transfer period factor */
2042 pDCB->SyncOffset = pSRB->MsgInBuf[4];
2043 /* REQ/ACK offset */
2044 for (bIndex = 0; bIndex < 7; bIndex++) {
2045 if (pSRB->MsgInBuf[3] <=
2046 dc395x_trm_clock_period[bIndex]) {
2050 pDCB->tinfo.goal.period =
2051 dc395x_trm_tinfo_sync_period[bIndex];
2052 pDCB->tinfo.current.period =
2053 dc395x_trm_tinfo_sync_period[bIndex];
2054 pDCB->tinfo.goal.offset = pDCB->SyncOffset;
2055 pDCB->tinfo.current.offset = pDCB->SyncOffset;
2056 pDCB->SyncPeriod |= (bIndex | ALT_SYNC);
2060 * program SCSI control register
2063 trm_reg_write8(pDCB->SyncPeriod,
2065 trm_reg_write8(pDCB->SyncOffset,
2066 TRMREG_SCSI_OFFSET);
2067 trm_SetXferRate(pACB,pSRB,pDCB);
2072 *pscsi_status = PH_BUS_FREE;
2073 /* .. initial phase */
2074 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2075 /* it's important for atn stop */
2079 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2083 trm_MsgInPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
2086 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
2087 trm_reg_write32(1,TRMREG_SCSI_COUNTER);
2088 if (!(pSRB->SRBState & SRB_MSGIN)) {
2089 pSRB->SRBState &= SRB_DISCONNECT;
2090 pSRB->SRBState |= SRB_MSGIN;
2092 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2093 /* it's important for atn stop*/
2097 trm_reg_write8(SCMD_FIFO_IN, TRMREG_SCSI_COMMAND);
2101 trm_Nop0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
2107 trm_Nop1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
2113 trm_SetXferRate(PACB pACB,PSRB pSRB, PDCB pDCB)
2118 u_int target_id,target_lun;
2121 * set all lun device's period , offset
2123 target_id = pSRB->pccb->ccb_h.target_id;
2124 target_lun = pSRB->pccb->ccb_h.target_lun;
2125 TRM_DPRINTF("trm_SetXferRate:target_id= %d ,target_lun= %d \n"
2126 ,target_id,target_lun);
2127 if (!(pDCB->IdentifyMsg & 0x07)) {
2128 if (!pACB->scan_devices[target_id][target_lun]) {
2129 pDCBTemp = pACB->pLinkDCB;
2130 cnt = pACB->DeviceCnt;
2131 bval = pDCB->TargetID;
2132 for (i = 0; i < cnt; i++) {
2133 if (pDCBTemp->TargetID == bval) {
2134 pDCBTemp->SyncPeriod = pDCB->SyncPeriod;
2135 pDCBTemp->SyncOffset = pDCB->SyncOffset;
2136 pDCBTemp->SyncMode = pDCB->SyncMode;
2138 pDCBTemp = pDCBTemp->pNextDCB;
2152 * PH_DATA_OUT 0x00 Data out phase
2153 * PH_DATA_IN 0x01 Data in phase
2154 * PH_COMMAND 0x02 Command phase
2155 * PH_STATUS 0x03 Status phase
2156 * PH_BUS_FREE 0x04 Invalid phase used as bus free
2157 * PH_BUS_FREE 0x05 Invalid phase used as bus free
2158 * PH_MSG_OUT 0x06 Message out phase
2159 * PH_MSG_IN 0x07 Message in phase
2163 trm_Disconnect(PACB pACB)
2170 u_int target_id,target_lun;
2172 TRM_DPRINTF("trm_Disconnect...............\n ");
2175 pDCB = pACB->pActiveDCB;
2177 TRM_DPRINTF(" Exception Disconnect DCB=NULL..............\n ");
2182 trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT),
2183 TRMREG_SCSI_CONTROL);
2186 pSRB = pDCB->pActiveSRB;
2188 target_id = pSRB->pccb->ccb_h.target_id;
2189 target_lun = pSRB->pccb->ccb_h.target_lun;
2190 TRM_DPRINTF(":pDCB->pActiveSRB= %8x \n ",(u_int) pDCB->pActiveSRB);
2191 pACB->pActiveDCB = 0;
2192 pSRB->ScsiPhase = PH_BUS_FREE;
2193 /* SCSI bus free Phase */
2194 trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT), TRMREG_SCSI_CONTROL);
2195 if (pSRB->SRBState & SRB_UNEXPECT_RESEL) {
2197 trm_DoWaitingSRB(pACB);
2198 } else if (pSRB->SRBState & SRB_ABORT_SENT) {
2201 cnt = pDCB->GoingSRBCnt;
2202 pDCB->GoingSRBCnt = 0;
2203 pSRB = pDCB->pGoingSRB;
2204 for (i = 0; i < cnt; i++) {
2205 psrb = pSRB->pNextSRB;
2206 pSRB->pNextSRB = pACB->pFreeSRB;
2207 pACB->pFreeSRB = pSRB;
2210 pDCB->pGoingSRB = 0;
2211 trm_DoWaitingSRB(pACB);
2213 if ((pSRB->SRBState & (SRB_START_+SRB_MSGOUT)) ||
2214 !(pSRB->SRBState & (SRB_DISCONNECT+SRB_COMPLETED))) {
2215 /* Selection time out */
2216 if (!(pACB->scan_devices[target_id][target_lun])) {
2217 pSRB->SRBState = SRB_READY;
2218 trm_RewaitSRB(pDCB, pSRB);
2220 pSRB->TargetStatus = SCSI_STAT_SEL_TIMEOUT;
2223 } else if (pSRB->SRBState & SRB_DISCONNECT) {
2227 trm_DoWaitingSRB(pACB);
2228 } else if (pSRB->SRBState & SRB_COMPLETED) {
2233 if (pDCB->MaxCommand > 1) {
2234 bval = pSRB->TagNumber;
2235 pDCB->TagMask &= (~(1 << bval));
2238 pDCB->pActiveSRB = 0;
2239 pSRB->SRBState = SRB_FREE;
2240 trm_SRBdone(pACB, pDCB, pSRB);
2248 trm_Reselect(PACB pACB)
2252 u_int16_t RselTarLunId;
2254 TRM_DPRINTF("trm_Reselect................. \n");
2255 pDCB = pACB->pActiveDCB;
2257 /* Arbitration lost but Reselection win */
2258 pSRB = pDCB->pActiveSRB;
2259 pSRB->SRBState = SRB_READY;
2260 trm_RewaitSRB(pDCB, pSRB);
2262 /* Read Reselected Target Id and LUN */
2263 RselTarLunId = trm_reg_read16(TRMREG_SCSI_TARGETID) & 0x1FFF;
2264 pDCB = pACB->pLinkDCB;
2265 while (RselTarLunId != *((u_int16_t *) &pDCB->TargetID)) {
2266 /* get pDCB of the reselect id */
2267 pDCB = pDCB->pNextDCB;
2270 pACB->pActiveDCB = pDCB;
2271 if (pDCB->SyncMode & EN_TAG_QUEUING) {
2272 pSRB = pACB->pTmpSRB;
2273 pDCB->pActiveSRB = pSRB;
2275 pSRB = pDCB->pActiveSRB;
2276 if (!pSRB || !(pSRB->SRBState & SRB_DISCONNECT)) {
2280 pSRB = pACB->pTmpSRB;
2281 pSRB->SRBState = SRB_UNEXPECT_RESEL;
2282 pDCB->pActiveSRB = pSRB;
2283 trm_EnableMsgOutAbort1(pACB, pSRB);
2285 if (pDCB->DCBFlag & ABORT_DEV_) {
2286 pSRB->SRBState = SRB_ABORT_SENT;
2287 trm_EnableMsgOutAbort1(pACB, pSRB);
2289 pSRB->SRBState = SRB_DATA_XFER;
2292 pSRB->ScsiPhase = PH_BUS_FREE;
2293 /* SCSI bus free Phase */
2295 * Program HA ID, target ID, period and offset
2297 trm_reg_write8((u_int8_t) RselTarLunId,TRMREG_SCSI_TARGETID);
2299 trm_reg_write8(pACB->AdaptSCSIID,TRMREG_SCSI_HOSTID);
2301 trm_reg_write8(pDCB->SyncPeriod,TRMREG_SCSI_SYNC);
2303 trm_reg_write8(pDCB->SyncOffset,TRMREG_SCSI_OFFSET);
2305 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2306 /* it's important for atn stop*/
2310 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2311 /* to rls the /ACK signal */
2315 trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB)
2318 u_int8_t bval, bval1,status;
2320 struct ccb_scsiio *pcsio;
2323 u_int target_id,target_lun;
2329 pcsio = &pccb->csio;
2330 target_id = pSRB->pccb->ccb_h.target_id;
2331 target_lun = pSRB->pccb->ccb_h.target_lun;
2332 if ((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
2333 bus_dmasync_op_t op;
2334 if ((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
2335 op = BUS_DMASYNC_POSTREAD;
2337 op = BUS_DMASYNC_POSTWRITE;
2338 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
2339 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
2346 status = pSRB->TargetStatus;
2347 pcsio->scsi_status=SCSI_STAT_GOOD;
2348 pccb->ccb_h.status = CAM_REQ_CMP;
2349 if (pSRB->SRBFlag & AUTO_REQSENSE) {
2351 * status of auto request sense
2353 pSRB->SRBFlag &= ~AUTO_REQSENSE;
2354 pSRB->AdaptStatus = 0;
2355 pSRB->TargetStatus = SCSI_STATUS_CHECK_COND;
2357 if (status == SCSI_STATUS_CHECK_COND) {
2358 pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2361 *((u_long *) &(pSRB->CmdBlock[0])) = pSRB->Segment0[0];
2362 *((u_long *) &(pSRB->CmdBlock[4])) = pSRB->Segment0[1];
2363 pSRB->SRBTotalXferLength = pSRB->Segment1[1];
2364 pSRB->SegmentX[0].address = pSRB->SgSenseTemp.address;
2365 pSRB->SegmentX[0].length = pSRB->SgSenseTemp.length;
2366 pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2367 pccb->ccb_h.status = CAM_AUTOSNS_VALID;
2374 if (status == SCSI_STATUS_CHECK_COND) {
2375 if ((pcsio->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0) {
2376 TRM_DPRINTF("trm_RequestSense..................\n");
2377 trm_RequestSense(pACB, pDCB, pSRB);
2380 pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2381 pccb->ccb_h.status = CAM_AUTOSNS_VALID |
2382 CAM_SCSI_STATUS_ERROR;
2384 } else if (status == SCSI_STAT_QUEUEFULL) {
2385 bval = (u_int8_t) pDCB->GoingSRBCnt;
2387 pDCB->MaxCommand = bval;
2388 trm_RewaitSRB(pDCB, pSRB);
2389 pSRB->AdaptStatus = 0;
2390 pSRB->TargetStatus = 0;
2391 pcsio->scsi_status = SCSI_STAT_QUEUEFULL;
2392 pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2394 } else if (status == SCSI_STAT_SEL_TIMEOUT) {
2395 pSRB->AdaptStatus = H_SEL_TIMEOUT;
2396 pSRB->TargetStatus = 0;
2397 pcsio->scsi_status = SCSI_STAT_SEL_TIMEOUT;
2398 pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2399 } else if (status == SCSI_STAT_BUSY) {
2400 TRM_DPRINTF("trm: target busy at %s %d\n",
2401 __FILE__, __LINE__);
2402 pcsio->scsi_status = SCSI_STAT_BUSY;
2403 pccb->ccb_h.status = CAM_SCSI_BUSY;
2404 /* The device busy, try again later? */
2405 } else if (status == SCSI_STAT_RESCONFLICT) {
2406 TRM_DPRINTF("trm: target reserved at %s %d\n",
2407 __FILE__, __LINE__);
2408 pcsio->scsi_status = SCSI_STAT_RESCONFLICT;
2409 pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; /*XXX*/
2411 pSRB->AdaptStatus = 0;
2412 if (pSRB->RetryCnt) {
2414 pSRB->TargetStatus = 0;
2415 pSRB->SRBSGIndex = 0;
2416 pSRB->SRBSGListPointer = (PSEG)
2418 if (trm_StartSCSI(pACB, pDCB, pSRB)) {
2420 * If trm_StartSCSI return 1 :
2421 * current interrupt status is interrupt
2423 * It's said that SCSI processor has more
2424 * one SRB need to do
2426 trm_RewaitSRB(pDCB, pSRB);
2430 TRM_DPRINTF("trm: driver stuffup at %s %d\n",
2431 __FILE__, __LINE__);
2432 pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2437 * process initiator status..........................
2438 * Adapter (initiator) status
2440 status = pSRB->AdaptStatus;
2441 if (status & H_OVER_UNDER_RUN) {
2442 pSRB->TargetStatus = 0;
2443 pccb->ccb_h.status = CAM_DATA_RUN_ERR;
2444 /* Illegal length (over/under run) */
2445 } else if (pSRB->SRBStatus & PARITY_ERROR) {
2446 TRM_DPRINTF("trm: driver stuffup %s %d\n",
2447 __FILE__, __LINE__);
2448 pDCB->tinfo.goal.period = 0;
2449 pDCB->tinfo.goal.offset = 0;
2450 /* Driver failed to perform operation */
2451 pccb->ccb_h.status = CAM_UNCOR_PARITY;
2454 pSRB->AdaptStatus = 0;
2455 pSRB->TargetStatus = 0;
2456 pccb->ccb_h.status = CAM_REQ_CMP;
2457 /* there is no error, (sense is invalid) */
2461 if (pACB->scan_devices[target_id][target_lun]) {
2463 * if SCSI command in "scan devices" duty
2465 if (pSRB->CmdBlock[0] == TEST_UNIT_READY)
2466 pACB->scan_devices[target_id][target_lun] = 0;
2467 /* SCSI command phase :test unit ready */
2468 else if (pSRB->CmdBlock[0] == INQUIRY) {
2470 * SCSI command phase :inquiry scsi device data
2471 * (type,capacity,manufacture....
2473 if (pccb->ccb_h.status == CAM_SEL_TIMEOUT)
2475 ptr = (PSCSI_INQDATA) pcsio->data_ptr;
2477 TRM_DPRINTF("trm_SRBdone..PSCSI_INQDATA:%2x \n",
2479 bval1 = ptr->DevType & SCSI_DEVTYPE;
2480 if (bval1 == SCSI_NODEV) {
2482 TRM_DPRINTF("trm_SRBdone NO Device:target_id= %d ,target_lun= %d \n",
2486 pACB->scan_devices[target_id][target_lun] = 0;
2487 /* no device set scan device flag =0*/
2489 /* move the head of DCB to tempDCB*/
2490 pTempDCB=pACB->pLinkDCB;
2491 /* search current DCB for pass link */
2492 while (pTempDCB->pNextDCB != pDCB) {
2493 pTempDCB = pTempDCB->pNextDCB;
2496 * when the current DCB found than connect
2499 /* to the DCB tail that before current DCB */
2500 pTempDCB->pNextDCB = pDCB->pNextDCB;
2502 * if there was only one DCB ,connect his tail
2505 if (pACB->pLinkDCB == pDCB)
2506 pACB->pLinkDCB = pTempDCB->pNextDCB;
2507 if (pACB->pDCBRunRobin == pDCB)
2508 pACB->pDCBRunRobin = pTempDCB->pNextDCB;
2510 if (pACB->DeviceCnt == 0) {
2511 pACB->pLinkDCB = NULL;
2512 pACB->pDCBRunRobin = NULL;
2518 for (j = 0; j < 28; j++) {
2519 TRM_DPRINTF("ptr=%2x ",
2520 ((u_int8_t *)ptr)[j]);
2523 pDCB->DevType = bval1;
2524 if (bval1 == SCSI_DASD ||
2525 bval1 == SCSI_OPTICAL) {
2526 if ((((ptr->Vers & 0x07) >= 2) ||
2527 ((ptr->RDF & 0x0F) == 2)) &&
2528 (ptr->Flags & SCSI_INQ_CMDQUEUE) &&
2529 (pDCB->DevMode & TAG_QUEUING_) &&
2530 (pDCB->DevMode & EN_DISCONNECT_)) {
2538 pDCB->tinfo.disc_tag |=
2543 pDCB->tinfo.disc_tag &=
2549 /* pSRB->CmdBlock[0] == INQUIRY */
2551 /* pACB->scan_devices[target_id][target_lun] */
2554 /* ReleaseSRB(pDCB, pSRB); */
2555 if (pSRB == pDCB->pGoingSRB)
2556 pDCB->pGoingSRB = pSRB->pNextSRB;
2558 psrb = pDCB->pGoingSRB;
2559 while (psrb->pNextSRB != pSRB) {
2560 psrb = psrb->pNextSRB;
2562 psrb->pNextSRB = pSRB->pNextSRB;
2563 if (pSRB == pDCB->pGoingLastSRB) {
2564 pDCB->pGoingLastSRB = psrb;
2567 pSRB->pNextSRB = pACB->pFreeSRB;
2568 pACB->pFreeSRB = pSRB;
2569 pDCB->GoingSRBCnt--;
2570 trm_DoWaitingSRB(pACB);
2573 /* Notify cmd done */
2578 trm_DoingSRB_Done(PACB pACB)
2585 pDCB = pACB->pLinkDCB;
2590 cnt = pdcb->GoingSRBCnt;
2591 psrb = pdcb->pGoingSRB;
2592 for (i = 0; i < cnt; i++) {
2593 psrb2 = psrb->pNextSRB;
2595 pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2596 /* ReleaseSRB(pDCB, pSRB); */
2597 psrb->pNextSRB = pACB->pFreeSRB;
2598 pACB->pFreeSRB = psrb;
2602 pdcb->GoingSRBCnt = 0;;
2603 pdcb->pGoingSRB = NULL;
2605 pdcb = pdcb->pNextDCB;
2607 while (pdcb != pDCB);
2611 trm_ResetSCSIBus(PACB pACB)
2616 pACB->ACBFlag |= RESET_DEV;
2618 trm_reg_write16(DO_RSTSCSI,TRMREG_SCSI_CONTROL);
2619 while (!(trm_reg_read16(TRMREG_SCSI_INTSTATUS) & INT_SCSIRESET));
2625 trm_ScsiRstDetect(PACB pACB)
2630 TRM_DPRINTF("trm_ScsiRstDetect \n");
2635 trm_reg_write8(STOPDMAXFER,TRMREG_DMA_CONTROL);
2637 trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
2639 if (pACB->ACBFlag & RESET_DEV)
2640 pACB->ACBFlag |= RESET_DONE;
2642 pACB->ACBFlag |= RESET_DETECT;
2643 trm_ResetDevParam(pACB);
2644 /* trm_DoingSRB_Done(pACB); ???? */
2645 trm_RecoverSRB(pACB);
2646 pACB->pActiveDCB = NULL;
2648 trm_DoWaitingSRB(pACB);
2655 trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB)
2658 struct ccb_scsiio *pcsio;
2661 pcsio = &pccb->csio;
2663 pSRB->SRBFlag |= AUTO_REQSENSE;
2664 pSRB->Segment0[0] = *((u_long *) &(pSRB->CmdBlock[0]));
2665 pSRB->Segment0[1] = *((u_long *) &(pSRB->CmdBlock[4]));
2666 pSRB->Segment1[0] = (u_long) ((pSRB->ScsiCmdLen << 8) +
2668 pSRB->Segment1[1] = pSRB->SRBTotalXferLength; /* ?????????? */
2670 /* $$$$$$ Status of initiator/target $$$$$$$$ */
2671 pSRB->AdaptStatus = 0;
2672 pSRB->TargetStatus = 0;
2673 /* $$$$$$ Status of initiator/target $$$$$$$$ */
2675 pSRB->SRBTotalXferLength = sizeof(pcsio->sense_data);
2676 pSRB->SgSenseTemp.address = pSRB->SegmentX[0].address;
2677 pSRB->SgSenseTemp.length = pSRB->SegmentX[0].length;
2678 pSRB->SegmentX[0].address = (u_long) vtophys(&pcsio->sense_data);
2679 pSRB->SegmentX[0].length = (u_long) pcsio->sense_len;
2680 pSRB->SRBSGListPointer = &pSRB->SegmentX[0];
2681 pSRB->SRBSGCount = 1;
2682 pSRB->SRBSGIndex = 0;
2684 *((u_long *) &(pSRB->CmdBlock[0])) = 0x00000003;
2685 pSRB->CmdBlock[1] = pDCB->IdentifyMsg << 5;
2686 *((u_int16_t *) &(pSRB->CmdBlock[4])) = pcsio->sense_len;
2687 pSRB->ScsiCmdLen = 6;
2689 if (trm_StartSCSI(pACB, pDCB, pSRB))
2691 * If trm_StartSCSI return 1 :
2692 * current interrupt status is interrupt disreenable
2693 * It's said that SCSI processor has more one SRB need to do
2695 trm_RewaitSRB(pDCB, pSRB);
2699 trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB)
2703 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2707 trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB)
2710 pSRB->MsgOutBuf[0] = MSG_ABORT;
2711 trm_EnableMsgOutAbort2(pACB, pSRB);
2715 trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,u_int32_t i,u_int32_t j)
2717 PNVRAMTYPE pEEpromBuf;
2718 u_int8_t bval,PeriodIndex;
2719 u_int target_id,target_lun;
2727 if (pACB->pLinkDCB == 0) {
2728 pACB->pLinkDCB = pDCB;
2730 * RunRobin impersonate the role
2731 * that let each device had good proportion
2732 * about SCSI command proceeding
2734 pACB->pDCBRunRobin = pDCB;
2735 pDCB->pNextDCB = pDCB;
2737 pTempDCB=pACB->pLinkDCB;
2738 /* search the last nod of DCB link */
2739 while (pTempDCB->pNextDCB != pACB->pLinkDCB)
2740 pTempDCB = pTempDCB->pNextDCB;
2741 /* connect current DCB with last DCB tail */
2742 pTempDCB->pNextDCB = pDCB;
2743 /* connect current DCB tail to this DCB Q head */
2744 pDCB->pNextDCB=pACB->pLinkDCB;
2749 pDCB->pDCBACB = pACB;
2750 pDCB->TargetID = target_id;
2751 pDCB->TargetLUN = target_lun;
2752 pDCB->pWaitingSRB = NULL;
2753 pDCB->pGoingSRB = NULL;
2754 pDCB->GoingSRBCnt = 0;
2755 pDCB->pActiveSRB = NULL;
2757 pDCB->MaxCommand = 1;
2760 pEEpromBuf = &trm_eepromBuf[unit];
2761 pDCB->DevMode = pEEpromBuf->NvramTarget[target_id].NvmTarCfg0;
2762 pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
2765 * disconnect enable ?
2767 if (pDCB->DevMode & NTC_DO_DISCONNECT) {
2769 pDCB->tinfo.disc_tag |= TRM_USR_DISCENB ;
2772 pDCB->tinfo.disc_tag &= ~(TRM_USR_DISCENB);
2775 pDCB->IdentifyMsg = bval;
2780 if (pDCB->DevMode & TAG_QUEUING_) {
2781 pDCB->tinfo.disc_tag |= TRM_USR_TAGENB ;
2783 pDCB->tinfo.disc_tag &= ~(TRM_USR_TAGENB);
2786 * wide nego ,sync nego enable ?
2788 pDCB->SyncPeriod = 0;
2789 pDCB->SyncOffset = 0;
2790 PeriodIndex = pEEpromBuf->NvramTarget[target_id].NvmTarPeriod & 0x07;
2791 pDCB->MaxNegoPeriod = dc395x_trm_clock_period[ PeriodIndex ] ;
2793 if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
2794 (pACB->Config & HCC_WIDE_CARD))
2795 pDCB->SyncMode |= WIDE_NEGO_ENABLE;
2796 /* enable wide nego */
2797 if (pDCB->DevMode & NTC_DO_SYNC_NEGO)
2798 pDCB->SyncMode |= SYNC_NEGO_ENABLE;
2799 /* enable sync nego */
2802 * Fill in tinfo structure.
2804 pDCB->tinfo.user.period = pDCB->MaxNegoPeriod;
2805 pDCB->tinfo.user.offset = (pDCB->SyncMode & SYNC_NEGO_ENABLE) ? 15 : 0;
2806 pDCB->tinfo.user.width = (pDCB->SyncMode & WIDE_NEGO_ENABLE) ?
2807 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
2809 pDCB->tinfo.current.period = 0;
2810 pDCB->tinfo.current.offset = 0;
2811 pDCB->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
2815 trm_initSRB(PSRB psrb)
2818 psrb->PhysSRB = vtophys(psrb);
2822 trm_linkSRB(PACB pACB)
2826 for (i = 0; i < MAX_SRB_CNT; i++) {
2827 if (i != MAX_SRB_CNT - 1)
2831 pACB->SRB_array[i].pNextSRB = &pACB->SRB_array[i+1];
2834 * load NULL to NextSRB of the last SRB
2836 pACB->SRB_array[i].pNextSRB = NULL;
2838 * convert and save physical address of SRB to pSRB->PhysSRB
2840 trm_initSRB((PSRB) &pACB->SRB_array[i]);
2846 trm_initACB(PACB pACB, u_int16_t unit)
2848 PNVRAMTYPE pEEpromBuf;
2851 pEEpromBuf = &trm_eepromBuf[unit];
2854 if (pEEpromBuf->NvramChannelCfg & NAC_SCANLUN)
2859 TRM_DPRINTF("trm: pACB->max_id= %d pACB->max_lun= %d \n",
2860 pACB->max_id, pACB->max_lun);
2862 pACB->pLinkDCB = NULL;
2863 pACB->pDCBRunRobin = NULL;
2864 pACB->pActiveDCB = NULL;
2865 pACB->pFreeSRB = pACB->SRB_array;
2866 pACB->AdapterUnit = unit;
2867 pACB->AdaptSCSIID = pEEpromBuf->NvramScsiId;
2868 pACB->AdaptSCSILUN = 0;
2869 pACB->DeviceCnt = 0;
2870 pACB->TagMaxNum = 2 << pEEpromBuf->NvramMaxTag ;
2873 * link all device's SRB Q of this adapter
2877 * temp SRB for Q tag used or abord command used
2879 pACB->pTmpSRB = &pACB->TmpSRB;
2881 * convert and save physical address of SRB to pSRB->PhysSRB
2883 trm_initSRB(pACB->pTmpSRB);
2884 /* allocate DCB array for scan device */
2885 for (i = 0; i < (pACB->max_id +1); i++) {
2886 if (pACB->AdaptSCSIID != i) {
2887 for (j = 0; j < (pACB->max_lun +1); j++) {
2888 pACB->scan_devices[i][j] = 1;
2889 pACB->pDCB[i][j]= (PDCB) malloc (
2890 sizeof (struct _DCB), M_DEVBUF, M_WAITOK);
2892 pACB->pDCB[i][j], unit, i, j);
2893 TRM_DPRINTF("pDCB= %8x \n",
2894 (u_int)pACB->pDCB[i][j]);
2898 TRM_DPRINTF("sizeof(struct _DCB)= %8x \n",sizeof(struct _DCB));
2899 TRM_DPRINTF("sizeof(struct _ACB)= %8x \n",sizeof(struct _ACB));
2900 TRM_DPRINTF("sizeof(struct _SRB)= %8x \n",sizeof(struct _SRB));
2904 TRM_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB)
2906 u_int8_t *bpEeprom = (u_int8_t *) pEEpromBuf;
2909 /* Enable SEEPROM */
2910 trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
2911 TRMREG_GEN_CONTROL);
2915 TRM_write_cmd(pACB, 0x04, 0xFF);
2916 trm_reg_write8(0, TRMREG_GEN_NVRAM);
2917 TRM_wait_30us(pACB);
2918 for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++) {
2919 TRM_set_data(pACB, bAddr, *bpEeprom);
2924 TRM_write_cmd(pACB, 0x04, 0x00);
2925 trm_reg_write8(0 , TRMREG_GEN_NVRAM);
2926 TRM_wait_30us(pACB);
2927 /* Disable SEEPROM */
2928 trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
2929 TRMREG_GEN_CONTROL);
2934 TRM_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData)
2939 * Send write command & address
2942 TRM_write_cmd(pACB, 0x05, bAddr);
2946 for (i = 0; i < 8; i++, bData <<= 1) {
2947 bSendData = NVR_SELECT;
2949 /* Start from bit 7 */
2950 bSendData |= NVR_BITOUT;
2951 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
2952 TRM_wait_30us(pACB);
2953 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
2954 TRM_wait_30us(pACB);
2956 trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
2957 TRM_wait_30us(pACB);
2959 * Disable chip select
2961 trm_reg_write8(0 , TRMREG_GEN_NVRAM);
2962 TRM_wait_30us(pACB);
2963 trm_reg_write8(NVR_SELECT ,TRMREG_GEN_NVRAM);
2964 TRM_wait_30us(pACB);
2966 * Wait for write ready
2969 trm_reg_write8((NVR_SELECT | NVR_CLOCK), TRMREG_GEN_NVRAM);
2970 TRM_wait_30us(pACB);
2971 trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
2972 TRM_wait_30us(pACB);
2973 if (trm_reg_read8(TRMREG_GEN_NVRAM) & NVR_BITIN) {
2978 * Disable chip select
2980 trm_reg_write8(0, TRMREG_GEN_NVRAM);
2985 TRM_read_all(PNVRAMTYPE pEEpromBuf, PACB pACB)
2987 u_int8_t *bpEeprom = (u_int8_t*) pEEpromBuf;
2993 trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
2994 TRMREG_GEN_CONTROL);
2995 for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++)
2996 *bpEeprom = TRM_get_data(pACB, bAddr);
3000 trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
3001 TRMREG_GEN_CONTROL);
3006 TRM_get_data(PACB pACB, u_int8_t bAddr)
3009 u_int8_t bReadData, bData = 0;
3011 * Send read command & address
3014 TRM_write_cmd(pACB, 0x06, bAddr);
3016 for (i = 0; i < 8; i++) {
3020 trm_reg_write8((NVR_SELECT | NVR_CLOCK) , TRMREG_GEN_NVRAM);
3021 TRM_wait_30us(pACB);
3022 trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
3024 * Get data bit while falling edge
3026 bReadData = trm_reg_read8(TRMREG_GEN_NVRAM);
3028 if (bReadData & NVR_BITIN) {
3031 TRM_wait_30us(pACB);
3034 * Disable chip select
3036 trm_reg_write8(0, TRMREG_GEN_NVRAM);
3041 TRM_wait_30us(PACB pACB)
3044 /* ScsiPortStallExecution(30); wait 30 us */
3045 trm_reg_write8(5, TRMREG_GEN_TIMER);
3046 while (!(trm_reg_read8(TRMREG_GEN_STATUS) & GTIMEOUT));
3051 TRM_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr)
3056 for (i = 0; i < 3; i++, bCmd <<= 1) {
3058 * Program SB+OP code
3060 bSendData = NVR_SELECT;
3062 bSendData |= NVR_BITOUT;
3063 /* start from bit 2 */
3064 trm_reg_write8(bSendData, TRMREG_GEN_NVRAM);
3065 TRM_wait_30us(pACB);
3066 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3067 TRM_wait_30us(pACB);
3069 for (i = 0; i < 7; i++, bAddr <<= 1) {
3073 bSendData = NVR_SELECT;
3075 /* Start from bit 6 */
3076 bSendData |= NVR_BITOUT;
3077 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
3078 TRM_wait_30us(pACB);
3079 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3080 TRM_wait_30us(pACB);
3082 trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
3083 TRM_wait_30us(pACB);
3087 trm_check_eeprom(PNVRAMTYPE pEEpromBuf, PACB pACB)
3089 u_int16_t *wpEeprom = (u_int16_t *) pEEpromBuf;
3090 u_int16_t wAddr, wCheckSum;
3091 u_long dAddr, *dpEeprom;
3093 TRM_read_all(pEEpromBuf,pACB);
3095 for (wAddr = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3096 wAddr < 64; wAddr++, wpEeprom++) {
3097 wCheckSum += *wpEeprom;
3099 if (wCheckSum != 0x1234) {
3101 * Checksum error, load default
3103 pEEpromBuf->NvramSubVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3104 pEEpromBuf->NvramSubVendorID[1] =
3105 (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3106 pEEpromBuf->NvramSubSysID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3107 pEEpromBuf->NvramSubSysID[1] =
3108 (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3109 pEEpromBuf->NvramSubClass = 0x00;
3110 pEEpromBuf->NvramVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3111 pEEpromBuf->NvramVendorID[1] =
3112 (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3113 pEEpromBuf->NvramDeviceID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3114 pEEpromBuf->NvramDeviceID[1] =
3115 (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3116 pEEpromBuf->NvramReserved = 0x00;
3118 for (dAddr = 0, dpEeprom = (u_long *) pEEpromBuf->NvramTarget;
3119 dAddr < 16; dAddr++, dpEeprom++) {
3120 *dpEeprom = 0x00000077;
3121 /* NvmTarCfg3,NvmTarCfg2,NvmTarPeriod,NvmTarCfg0 */
3124 *dpEeprom++ = 0x04000F07;
3125 /* NvramMaxTag,NvramDelayTime,NvramChannelCfg,NvramScsiId */
3126 *dpEeprom++ = 0x00000015;
3127 /* NvramReserved1,NvramBootLun,NvramBootTarget,NvramReserved0 */
3128 for (dAddr = 0; dAddr < 12; dAddr++, dpEeprom++)
3130 pEEpromBuf->NvramCheckSum = 0x00;
3131 for (wAddr = 0, wCheckSum = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3132 wAddr < 63; wAddr++, wpEeprom++)
3133 wCheckSum += *wpEeprom;
3134 *wpEeprom = 0x1234 - wCheckSum;
3135 TRM_write_all(pEEpromBuf,pACB);
3140 trm_initAdapter(PACB pACB, u_int16_t unit, device_t pci_config_id)
3142 PNVRAMTYPE pEEpromBuf;
3146 pEEpromBuf = &trm_eepromBuf[unit];
3148 /* 250ms selection timeout */
3149 trm_reg_write8(SEL_TIMEOUT, TRMREG_SCSI_TIMEOUT);
3150 /* Mask all the interrupt */
3151 trm_reg_write8(0x00, TRMREG_DMA_INTEN);
3152 trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
3153 /* Reset SCSI module */
3154 trm_reg_write16(DO_RSTMODULE, TRMREG_SCSI_CONTROL);
3155 /* program configuration 0 */
3156 pACB->Config = HCC_AUTOTERM | HCC_PARITY;
3157 if (trm_reg_read8(TRMREG_GEN_STATUS) & WIDESCSI)
3158 pACB->Config |= HCC_WIDE_CARD;
3159 if (pEEpromBuf->NvramChannelCfg & NAC_POWERON_SCSI_RESET)
3160 pACB->Config |= HCC_SCSI_RESET;
3161 if (pACB->Config & HCC_PARITY)
3162 bval = PHASELATCH | INITIATOR | BLOCKRST | PARITYCHECK;
3164 bval = PHASELATCH | INITIATOR | BLOCKRST ;
3165 trm_reg_write8(bval,TRMREG_SCSI_CONFIG0);
3166 /* program configuration 1 */
3167 trm_reg_write8(0x13, TRMREG_SCSI_CONFIG1);
3168 /* program Host ID */
3169 bval = pEEpromBuf->NvramScsiId;
3170 trm_reg_write8(bval, TRMREG_SCSI_HOSTID);
3171 /* set ansynchronous transfer */
3172 trm_reg_write8(0x00, TRMREG_SCSI_OFFSET);
3173 /* Trun LED control off*/
3174 wval = trm_reg_read16(TRMREG_GEN_CONTROL) & 0x7F;
3175 trm_reg_write16(wval, TRMREG_GEN_CONTROL);
3177 wval = trm_reg_read16(TRMREG_DMA_CONFIG) | DMA_ENHANCE;
3178 trm_reg_write16(wval, TRMREG_DMA_CONFIG);
3179 /* Clear pending interrupt status */
3180 trm_reg_read8(TRMREG_SCSI_INTSTATUS);
3181 /* Enable SCSI interrupt */
3182 trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
3183 trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
3188 trm_init(u_int16_t unit, device_t pci_config_id)
3191 int rid = PCIR_MAPS;
3193 pACB = (PACB) device_get_softc(pci_config_id);
3195 printf("trm%d: cannot allocate ACB !\n", unit);
3198 bzero (pACB, sizeof (struct _ACB));
3199 pACB->iores = bus_alloc_resource(pci_config_id, SYS_RES_IOPORT,
3200 &rid, 0, ~0, 1, RF_ACTIVE);
3201 if (pACB->iores == NULL) {
3202 printf("trm_init: bus_alloc_resource failed!\n");
3205 pACB->tag = rman_get_bustag(pACB->iores);
3206 pACB->bsh = rman_get_bushandle(pACB->iores);
3207 if (bus_dma_tag_create(/*parent_dmat*/ NULL,
3210 /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT,
3211 /*highaddr*/ BUS_SPACE_MAXADDR,
3214 /*maxsize*/ MAXBSIZE,
3215 /*nsegments*/ TRM_NSEG,
3216 /*maxsegsz*/ TRM_MAXTRANSFER_SIZE,
3217 /*flags*/ BUS_DMA_ALLOCNOW,
3218 &pACB->buffer_dmat) != 0)
3220 trm_check_eeprom(&trm_eepromBuf[unit],pACB);
3221 trm_initACB(pACB, unit);
3222 if (trm_initAdapter(pACB, unit, pci_config_id)) {
3223 printf("trm_initAdapter: initial ERROR\n");
3229 bus_release_resource(pci_config_id, SYS_RES_IOPORT, PCIR_MAPS,
3231 if (pACB->buffer_dmat)
3232 bus_dma_tag_destroy(pACB->buffer_dmat);
3237 trm_attach(device_t pci_config_id)
3239 struct cam_devq *device_Q;
3243 int unit = device_get_unit(pci_config_id);
3245 device_id = pci_get_devid(pci_config_id);
3247 * These cards do not allow memory mapped accesses
3249 if (device_id == PCI_DEVICEID_TRMS1040) {
3250 if ((pACB=trm_init((u_int16_t) unit,
3251 pci_config_id)) == NULL) {
3252 printf("trm%d: trm_init error!\n",unit);
3257 /* After setting up the adapter, map our interrupt */
3259 * Now let the CAM generic SCSI layer find the SCSI devices on the bus
3260 * start queue to reset to the idle loop.
3261 * Create device queue of SIM(s)
3262 * (MAX_START_JOB - 1) : max_sim_transactions
3264 pACB->irq = bus_alloc_resource(pci_config_id, SYS_RES_IRQ, &rid, 0,
3265 ~0, 1, RF_SHAREABLE | RF_ACTIVE);
3266 if (pACB->irq == NULL ||
3267 bus_setup_intr(pci_config_id, pACB->irq,
3268 INTR_TYPE_CAM, trm_Interrupt, pACB,
3270 printf("trm%d: register Interrupt handler error!\n", unit);
3273 device_Q = cam_simq_alloc(MAX_START_JOB);
3274 if (device_Q == NULL){
3275 printf("trm%d: device_Q == NULL !\n",unit);
3279 * Now tell the generic SCSI layer
3281 * If this is the xpt layer creating a sim, then it's OK
3282 * to wait for an allocation.
3283 * XXX Should we pass in a flag to indicate that wait is OK?
3287 * SCSI Interface Modules
3288 * The sim driver creates a sim for each controller. The sim device
3289 * queue is separately created in order to allow resource sharing betwee
3290 * sims. For instance, a driver may create one sim for each channel of
3291 * a multi-channel controller and use the same queue for each channel.
3292 * In this way, the queue resources are shared across all the channels
3293 * of the multi-channel controller.
3294 * trm_action : sim_action_func
3295 * trm_poll : sim_poll_func
3296 * "trm" : sim_name ,if sim_name = "xpt" ..M_DEVBUF,M_WAITOK
3297 * pACB : *softc if sim_name <> "xpt" ..M_DEVBUF,M_NOWAIT
3299 * 1 : max_dev_transactions
3300 * MAX_TAGS : max_tagged_dev_transactions
3302 * *******Construct our first channel SIM entry
3304 pACB->psim = cam_sim_alloc(trm_action,
3312 cam_simq_release(device_Q); /* SIM allocate fault*/
3313 if (pACB->psim == NULL) {
3314 printf("trm%d: SIM allocate fault !\n",unit);
3317 if (xpt_bus_register(pACB->psim, 0) != CAM_SUCCESS) {
3318 printf("trm%d: xpt_bus_register fault !\n",unit);
3321 if (xpt_create_path(&pACB->ppath,
3323 cam_sim_path(pACB->psim),
3324 CAM_TARGET_WILDCARD,
3325 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3326 printf("trm%d: xpt_create_path fault !\n",unit);
3327 xpt_bus_deregister(cam_sim_path(pACB->psim));
3330 * cam_sim_free(pACB->psim, TRUE); free_devq
3331 * pACB->psim = NULL;
3338 bus_release_resource(pci_config_id, SYS_RES_IOPORT, PCIR_MAPS,
3340 if (pACB->buffer_dmat)
3341 bus_dma_tag_destroy(pACB->buffer_dmat);
3343 bus_teardown_intr(pci_config_id, pACB->irq, pACB->ih);
3345 bus_release_resource(pci_config_id, SYS_RES_IRQ, 0, pACB->irq);
3347 cam_sim_free(pACB->psim);
3355 * trm_probe (device_t tag, pcidi_t type)
3359 trm_probe(device_t tag)
3362 if (pci_get_devid(tag) == PCI_DEVICEID_TRMS1040) {
3363 device_set_desc(tag,
3364 "Tekram DC395U/UW/F DC315/U Fast20 Wide SCSI Adapter");
3371 trm_detach(device_t dev)
3373 PACB pACB = device_get_softc(dev);
3375 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, pACB->iores);
3376 bus_dma_tag_destroy(pACB->buffer_dmat);
3377 bus_teardown_intr(dev, pACB->irq, pACB->ih);
3378 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irq);
3379 xpt_async(AC_LOST_DEVICE, pACB->ppath, NULL);
3380 xpt_free_path(pACB->ppath);
3381 xpt_bus_deregister(cam_sim_path(pACB->psim));
3382 cam_sim_free(pACB->psim);
3385 static device_method_t trm_methods[] = {
3386 /* Device interface */
3387 DEVMETHOD(device_probe, trm_probe),
3388 DEVMETHOD(device_attach, trm_attach),
3389 DEVMETHOD(device_detach, trm_detach),
3393 static driver_t trm_driver = {
3394 "trm", trm_methods, sizeof(struct _ACB)
3397 static devclass_t trm_devclass;
3398 DRIVER_MODULE(trm, pci, trm_driver, trm_devclass, 0, 0);