sys/dev/netif/ath/hal/ath_hal/ar5212/ar5212_attach.c

   1 /*
   2  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
   3  * Copyright (c) 2002-2008 Atheros Communications, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c 195114 2009-06-27 20:06:56Z sam $
  18  */
  19 #include "opt_ah.h"
  20
  21 #include "ah.h"
  22 #include "ah_internal.h"
  23 #include "ah_devid.h"
  24
  25 #include "ar5212/ar5212.h"
  26 #include "ar5212/ar5212reg.h"
  27 #include "ar5212/ar5212phy.h"
  28
  29 #define AH_5212_COMMON
  30 #include "ar5212/ar5212.ini"
  31
  32 static void ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
  33 static void ar5212DisablePCIE(struct ath_hal *ah);
  34
  35 static const struct ath_hal_private ar5212hal = {{
  36         .ah_magic                       = AR5212_MAGIC,
  37
  38         .ah_getRateTable                = ar5212GetRateTable,
  39         .ah_detach                      = ar5212Detach,
  40
  41         /* Reset Functions */
  42         .ah_reset                       = ar5212Reset,
  43         .ah_phyDisable                  = ar5212PhyDisable,
  44         .ah_disable                     = ar5212Disable,
  45         .ah_configPCIE                  = ar5212ConfigPCIE,
  46         .ah_disablePCIE                 = ar5212DisablePCIE,
  47         .ah_setPCUConfig                = ar5212SetPCUConfig,
  48         .ah_perCalibration              = ar5212PerCalibration,
  49         .ah_perCalibrationN             = ar5212PerCalibrationN,
  50         .ah_resetCalValid               = ar5212ResetCalValid,
  51         .ah_setTxPowerLimit             = ar5212SetTxPowerLimit,
  52         .ah_getChanNoise                = ath_hal_getChanNoise,
  53
  54         /* Transmit functions */
  55         .ah_updateTxTrigLevel           = ar5212UpdateTxTrigLevel,
  56         .ah_setupTxQueue                = ar5212SetupTxQueue,
  57         .ah_setTxQueueProps             = ar5212SetTxQueueProps,
  58         .ah_getTxQueueProps             = ar5212GetTxQueueProps,
  59         .ah_releaseTxQueue              = ar5212ReleaseTxQueue,
  60         .ah_resetTxQueue                = ar5212ResetTxQueue,
  61         .ah_getTxDP                     = ar5212GetTxDP,
  62         .ah_setTxDP                     = ar5212SetTxDP,
  63         .ah_numTxPending                = ar5212NumTxPending,
  64         .ah_startTxDma                  = ar5212StartTxDma,
  65         .ah_stopTxDma                   = ar5212StopTxDma,
  66         .ah_setupTxDesc                 = ar5212SetupTxDesc,
  67         .ah_setupXTxDesc                = ar5212SetupXTxDesc,
  68         .ah_fillTxDesc                  = ar5212FillTxDesc,
  69         .ah_procTxDesc                  = ar5212ProcTxDesc,
  70         .ah_getTxIntrQueue              = ar5212GetTxIntrQueue,
  71         .ah_reqTxIntrDesc               = ar5212IntrReqTxDesc,
  72
  73         /* RX Functions */
  74         .ah_getRxDP                     = ar5212GetRxDP,
  75         .ah_setRxDP                     = ar5212SetRxDP,
  76         .ah_enableReceive               = ar5212EnableReceive,
  77         .ah_stopDmaReceive              = ar5212StopDmaReceive,
  78         .ah_startPcuReceive             = ar5212StartPcuReceive,
  79         .ah_stopPcuReceive              = ar5212StopPcuReceive,
  80         .ah_setMulticastFilter          = ar5212SetMulticastFilter,
  81         .ah_setMulticastFilterIndex     = ar5212SetMulticastFilterIndex,
  82         .ah_clrMulticastFilterIndex     = ar5212ClrMulticastFilterIndex,
  83         .ah_getRxFilter                 = ar5212GetRxFilter,
  84         .ah_setRxFilter                 = ar5212SetRxFilter,
  85         .ah_setupRxDesc                 = ar5212SetupRxDesc,
  86         .ah_procRxDesc                  = ar5212ProcRxDesc,
  87         .ah_rxMonitor                   = ar5212AniPoll,
  88         .ah_procMibEvent                = ar5212ProcessMibIntr,
  89
  90         /* Misc Functions */
  91         .ah_getCapability               = ar5212GetCapability,
  92         .ah_setCapability               = ar5212SetCapability,
  93         .ah_getDiagState                = ar5212GetDiagState,
  94         .ah_getMacAddress               = ar5212GetMacAddress,
  95         .ah_setMacAddress               = ar5212SetMacAddress,
  96         .ah_getBssIdMask                = ar5212GetBssIdMask,
  97         .ah_setBssIdMask                = ar5212SetBssIdMask,
  98         .ah_setRegulatoryDomain         = ar5212SetRegulatoryDomain,
  99         .ah_setLedState                 = ar5212SetLedState,
 100         .ah_writeAssocid                = ar5212WriteAssocid,
 101         .ah_gpioCfgInput                = ar5212GpioCfgInput,
 102         .ah_gpioCfgOutput               = ar5212GpioCfgOutput,
 103         .ah_gpioGet                     = ar5212GpioGet,
 104         .ah_gpioSet                     = ar5212GpioSet,
 105         .ah_gpioSetIntr                 = ar5212GpioSetIntr,
 106         .ah_getTsf32                    = ar5212GetTsf32,
 107         .ah_getTsf64                    = ar5212GetTsf64,
 108         .ah_resetTsf                    = ar5212ResetTsf,
 109         .ah_detectCardPresent           = ar5212DetectCardPresent,
 110         .ah_updateMibCounters           = ar5212UpdateMibCounters,
 111         .ah_getRfGain                   = ar5212GetRfgain,
 112         .ah_getDefAntenna               = ar5212GetDefAntenna,
 113         .ah_setDefAntenna               = ar5212SetDefAntenna,
 114         .ah_getAntennaSwitch            = ar5212GetAntennaSwitch,
 115         .ah_setAntennaSwitch            = ar5212SetAntennaSwitch,
 116         .ah_setSifsTime                 = ar5212SetSifsTime,
 117         .ah_getSifsTime                 = ar5212GetSifsTime,
 118         .ah_setSlotTime                 = ar5212SetSlotTime,
 119         .ah_getSlotTime                 = ar5212GetSlotTime,
 120         .ah_setAckTimeout               = ar5212SetAckTimeout,
 121         .ah_getAckTimeout               = ar5212GetAckTimeout,
 122         .ah_setAckCTSRate               = ar5212SetAckCTSRate,
 123         .ah_getAckCTSRate               = ar5212GetAckCTSRate,
 124         .ah_setCTSTimeout               = ar5212SetCTSTimeout,
 125         .ah_getCTSTimeout               = ar5212GetCTSTimeout,
 126         .ah_setDecompMask               = ar5212SetDecompMask,
 127         .ah_setCoverageClass            = ar5212SetCoverageClass,
 128
 129         /* Key Cache Functions */
 130         .ah_getKeyCacheSize             = ar5212GetKeyCacheSize,
 131         .ah_resetKeyCacheEntry          = ar5212ResetKeyCacheEntry,
 132         .ah_isKeyCacheEntryValid        = ar5212IsKeyCacheEntryValid,
 133         .ah_setKeyCacheEntry            = ar5212SetKeyCacheEntry,
 134         .ah_setKeyCacheEntryMac         = ar5212SetKeyCacheEntryMac,
 135
 136         /* Power Management Functions */
 137         .ah_setPowerMode                = ar5212SetPowerMode,
 138         .ah_getPowerMode                = ar5212GetPowerMode,
 139
 140         /* Beacon Functions */
 141         .ah_setBeaconTimers             = ar5212SetBeaconTimers,
 142         .ah_beaconInit                  = ar5212BeaconInit,
 143         .ah_setStationBeaconTimers      = ar5212SetStaBeaconTimers,
 144         .ah_resetStationBeaconTimers    = ar5212ResetStaBeaconTimers,
 145
 146         /* Interrupt Functions */
 147         .ah_isInterruptPending          = ar5212IsInterruptPending,
 148         .ah_getPendingInterrupts        = ar5212GetPendingInterrupts,
 149         .ah_getInterrupts               = ar5212GetInterrupts,
 150         .ah_setInterrupts               = ar5212SetInterrupts },
 151
 152         .ah_getChannelEdges             = ar5212GetChannelEdges,
 153         .ah_getWirelessModes            = ar5212GetWirelessModes,
 154         .ah_eepromRead                  = ar5212EepromRead,
 155 #ifdef AH_SUPPORT_WRITE_EEPROM
 156         .ah_eepromWrite                 = ar5212EepromWrite,
 157 #endif
 158         .ah_getChipPowerLimits          = ar5212GetChipPowerLimits,
 159 };
 160
 161 uint32_t
 162 ar5212GetRadioRev(struct ath_hal *ah)
 163 {
 164         uint32_t val;
 165         int i;
 166
 167         /* Read Radio Chip Rev Extract */
 168         OS_REG_WRITE(ah, AR_PHY(0x34), 0x00001c16);
 169         for (i = 0; i < 8; i++)
 170                 OS_REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
 171         val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
 172         val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
 173         return ath_hal_reverseBits(val, 8);
 174 }
 175
 176 static void
 177 ar5212AniSetup(struct ath_hal *ah)
 178 {
 179         static const struct ar5212AniParams aniparams = {
 180                 .maxNoiseImmunityLevel  = 4,    /* levels 0..4 */
 181                 .totalSizeDesired       = { -55, -55, -55, -55, -62 },
 182                 .coarseHigh             = { -14, -14, -14, -14, -12 },
 183                 .coarseLow              = { -64, -64, -64, -64, -70 },
 184                 .firpwr                 = { -78, -78, -78, -78, -80 },
 185                 .maxSpurImmunityLevel   = 2,    /* NB: depends on chip rev */
 186                 .cycPwrThr1             = { 2, 4, 6, 8, 10, 12, 14, 16 },
 187                 .maxFirstepLevel        = 2,    /* levels 0..2 */
 188                 .firstep                = { 0, 4, 8 },
 189                 .ofdmTrigHigh           = 500,
 190                 .ofdmTrigLow            = 200,
 191                 .cckTrigHigh            = 200,
 192                 .cckTrigLow             = 100,
 193                 .rssiThrHigh            = 40,
 194                 .rssiThrLow             = 7,
 195                 .period                 = 100,
 196         };
 197         if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN) {
 198                 struct ar5212AniParams tmp;
 199                 OS_MEMCPY(&tmp, &aniparams, sizeof(struct ar5212AniParams));
 200                 tmp.maxSpurImmunityLevel = 7;   /* Venice and earlier */
 201                 ar5212AniAttach(ah, &tmp, &tmp, AH_TRUE);
 202         } else
 203                 ar5212AniAttach(ah, &aniparams, &aniparams, AH_TRUE);
 204 }
 205
 206 /*
 207  * Attach for an AR5212 part.
 208  */
 209 void
 210 ar5212InitState(struct ath_hal_5212 *ahp, uint16_t devid, HAL_SOFTC sc,
 211         HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
 212 {
 213         static const uint8_t defbssidmask[IEEE80211_ADDR_LEN] =
 214                 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
 215         struct ath_hal *ah;
 216
 217         ah = &ahp->ah_priv.h;
 218         /* set initial values */
 219         OS_MEMCPY(&ahp->ah_priv, &ar5212hal, sizeof(struct ath_hal_private));
 220         ah->ah_sc = sc;
 221         ah->ah_st = st;
 222         ah->ah_sh = sh;
 223
 224         ah->ah_devid = devid;                   /* NB: for alq */
 225         AH_PRIVATE(ah)->ah_devid = devid;
 226         AH_PRIVATE(ah)->ah_subvendorid = 0;     /* XXX */
 227
 228         AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER;
 229         AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX;  /* no scaling */
 230
 231         ahp->ah_antControl = HAL_ANT_VARIABLE;
 232         ahp->ah_diversity = AH_TRUE;
 233         ahp->ah_bIQCalibration = AH_FALSE;
 234         /*
 235          * Enable MIC handling.
 236          */
 237         ahp->ah_staId1Defaults = AR_STA_ID1_CRPT_MIC_ENABLE;
 238         ahp->ah_rssiThr = INIT_RSSI_THR;
 239         ahp->ah_tpcEnabled = AH_FALSE;          /* disabled by default */
 240         ahp->ah_phyPowerOn = AH_FALSE;
 241         ahp->ah_macTPC = SM(MAX_RATE_POWER, AR_TPC_ACK)
 242                        | SM(MAX_RATE_POWER, AR_TPC_CTS)
 243                        | SM(MAX_RATE_POWER, AR_TPC_CHIRP);
 244         ahp->ah_beaconInterval = 100;           /* XXX [20..1000] */
 245         ahp->ah_enable32kHzClock = DONT_USE_32KHZ;/* XXX */
 246         ahp->ah_slottime = (u_int) -1;
 247         ahp->ah_acktimeout = (u_int) -1;
 248         ahp->ah_ctstimeout = (u_int) -1;
 249         ahp->ah_sifstime = (u_int) -1;
 250         ahp->ah_txTrigLev = INIT_TX_FIFO_THRESHOLD,
 251         ahp->ah_maxTxTrigLev = MAX_TX_FIFO_THRESHOLD,
 252
 253         OS_MEMCPY(&ahp->ah_bssidmask, defbssidmask, IEEE80211_ADDR_LEN);
 254 }
 255
 256 /*
 257  * Validate MAC version and revision.
 258  */
 259 static HAL_BOOL
 260 ar5212IsMacSupported(uint8_t macVersion, uint8_t macRev)
 261 {
 262         static const struct {
 263                 uint8_t version;
 264                 uint8_t revMin, revMax;
 265         } macs[] = {
 266             { AR_SREV_VERSION_VENICE,
 267               AR_SREV_D2PLUS,           AR_SREV_REVISION_MAX },
 268             { AR_SREV_VERSION_GRIFFIN,
 269               AR_SREV_D2PLUS,           AR_SREV_REVISION_MAX },
 270             { AR_SREV_5413,
 271               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 272             { AR_SREV_5424,
 273               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 274             { AR_SREV_2425,
 275               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 276             { AR_SREV_2417,
 277               AR_SREV_REVISION_MIN,     AR_SREV_REVISION_MAX },
 278         };
 279         int i;
 280
 281         for (i = 0; i < NELEM(macs); i++)
 282                 if (macs[i].version == macVersion &&
 283                     macs[i].revMin <= macRev && macRev <= macs[i].revMax)
 284                         return AH_TRUE;
 285         return AH_FALSE;
 286 }
 287
 288 /*
 289  * Attach for an AR5212 part.
 290  */
 291 static struct ath_hal *
 292 ar5212Attach(uint16_t devid, HAL_SOFTC sc,
 293         HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
 294 {
 295 #define AH_EEPROM_PROTECT(ah) \
 296         (AH_PRIVATE(ah)->ah_ispcie)? AR_EEPROM_PROTECT_PCIE : AR_EEPROM_PROTECT)
 297         struct ath_hal_5212 *ahp;
 298         struct ath_hal *ah;
 299         struct ath_hal_rf *rf;
 300         uint32_t val;
 301         uint16_t eeval;
 302         HAL_STATUS ecode;
 303
 304         HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 305             __func__, sc, (void*) st, (void*) sh);
 306
 307         /* NB: memory is returned zero'd */
 308         ahp = ath_hal_malloc(sizeof (struct ath_hal_5212));
 309         if (ahp == AH_NULL) {
 310                 HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 311                     "%s: cannot allocate memory for state block\n", __func__);
 312                 *status = HAL_ENOMEM;
 313                 return AH_NULL;
 314         }
 315         ar5212InitState(ahp, devid, sc, st, sh, status);
 316         ah = &ahp->ah_priv.h;
 317
 318         if (!ar5212SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {
 319                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",
 320                     __func__);
 321                 ecode = HAL_EIO;
 322                 goto bad;
 323         }
 324         /* Read Revisions from Chips before taking out of reset */
 325         val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
 326         AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
 327         AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION;
 328         AH_PRIVATE(ah)->ah_ispcie = IS_5424(ah) || IS_2425(ah);
 329
 330         if (!ar5212IsMacSupported(AH_PRIVATE(ah)->ah_macVersion, AH_PRIVATE(ah)->ah_macRev)) {
 331                 HALDEBUG(ah, HAL_DEBUG_ANY,
 332                     "%s: Mac Chip Rev 0x%02x.%x not supported\n" ,
 333                     __func__, AH_PRIVATE(ah)->ah_macVersion,
 334                     AH_PRIVATE(ah)->ah_macRev);
 335                 ecode = HAL_ENOTSUPP;
 336                 goto bad;
 337         }
 338
 339         /* setup common ini data; rf backends handle remainder */
 340         HAL_INI_INIT(&ahp->ah_ini_modes, ar5212Modes, 6);
 341         HAL_INI_INIT(&ahp->ah_ini_common, ar5212Common, 2);
 342
 343         if (!ar5212ChipReset(ah, AH_NULL)) {    /* reset chip */
 344                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
 345                 ecode = HAL_EIO;
 346                 goto bad;
 347         }
 348
 349         AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
 350
 351         if (AH_PRIVATE(ah)->ah_ispcie) {
 352                 /* XXX: build flag to disable this? */
 353                 ath_hal_configPCIE(ah, AH_FALSE);
 354         }
 355
 356         if (!ar5212ChipTest(ah)) {
 357                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
 358                     __func__);
 359                 ecode = HAL_ESELFTEST;
 360                 goto bad;
 361         }
 362
 363         /* Enable PCI core retry fix in software for Hainan and up */
 364         if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_VENICE)
 365                 OS_REG_SET_BIT(ah, AR_PCICFG, AR_PCICFG_RETRYFIXEN);
 366
 367         /*
 368          * Set correct Baseband to analog shift
 369          * setting to access analog chips.
 370          */
 371         OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
 372
 373         /* Read Radio Chip Rev Extract */
 374         AH_PRIVATE(ah)->ah_analog5GhzRev = ar5212GetRadioRev(ah);
 375
 376         rf = ath_hal_rfprobe(ah, &ecode);
 377         if (rf == AH_NULL)
 378                 goto bad;
 379
 380         /* NB: silently accept anything in release code per Atheros */
 381         switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {
 382         case AR_RAD5111_SREV_MAJOR:
 383         case AR_RAD5112_SREV_MAJOR:
 384         case AR_RAD2112_SREV_MAJOR:
 385         case AR_RAD2111_SREV_MAJOR:
 386         case AR_RAD2413_SREV_MAJOR:
 387         case AR_RAD5413_SREV_MAJOR:
 388         case AR_RAD5424_SREV_MAJOR:
 389                 break;
 390         default:
 391                 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {
 392                         /*
 393                          * When RF_Silent is used, the
 394                          * analog chip is reset.  So when the system boots
 395                          * up with the radio switch off we cannot determine
 396                          * the RF chip rev.  To workaround this check the
 397                          * mac+phy revs and if Hainan, set the radio rev
 398                          * to Derby.
 399                          */
 400                         if (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
 401                             AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN &&
 402                             AH_PRIVATE(ah)->ah_phyRev == AR_PHYREV_HAINAN) {
 403                                 AH_PRIVATE(ah)->ah_analog5GhzRev = AR_ANALOG5REV_HAINAN;
 404                                 break;
 405                         }
 406                         if (IS_2413(ah)) {              /* Griffin */
 407                                 AH_PRIVATE(ah)->ah_analog5GhzRev =
 408                                     AR_RAD2413_SREV_MAJOR | 0x1;
 409                                 break;
 410                         }
 411                         if (IS_5413(ah)) {              /* Eagle */
 412                                 AH_PRIVATE(ah)->ah_analog5GhzRev =
 413                                     AR_RAD5413_SREV_MAJOR | 0x2;
 414                                 break;
 415                         }
 416                         if (IS_2425(ah) || IS_2417(ah)) {/* Swan or Nala */
 417                                 AH_PRIVATE(ah)->ah_analog5GhzRev =
 418                                     AR_RAD5424_SREV_MAJOR | 0x2;
 419                                 break;
 420                         }
 421                 }
 422 #ifdef AH_DEBUG
 423                 HALDEBUG(ah, HAL_DEBUG_ANY,
 424                     "%s: 5G Radio Chip Rev 0x%02X is not supported by "
 425                     "this driver\n",
 426                     __func__, AH_PRIVATE(ah)->ah_analog5GhzRev);
 427                 ecode = HAL_ENOTSUPP;
 428                 goto bad;
 429 #endif
 430         }
 431         if (IS_RAD5112_REV1(ah)) {
 432                 HALDEBUG(ah, HAL_DEBUG_ANY,
 433                     "%s: 5112 Rev 1 is not supported by this "
 434                     "driver (analog5GhzRev 0x%x)\n", __func__,
 435                     AH_PRIVATE(ah)->ah_analog5GhzRev);
 436                 ecode = HAL_ENOTSUPP;
 437                 goto bad;
 438         }
 439
 440         val = OS_REG_READ(ah, AR_PCICFG);
 441         val = MS(val, AR_PCICFG_EEPROM_SIZE);
 442         if (val == 0) {
 443                 if (!AH_PRIVATE(ah)->ah_ispcie) {
 444                         HALDEBUG(ah, HAL_DEBUG_ANY,
 445                             "%s: unsupported EEPROM size %u (0x%x) found\n",
 446                             __func__, val, val);
 447                         ecode = HAL_EESIZE;
 448                         goto bad;
 449                 }
 450                 /* XXX AH_PRIVATE(ah)->ah_isPciExpress = AH_TRUE; */
 451         } else if (val != AR_PCICFG_EEPROM_SIZE_16K) {
 452                 if (AR_PCICFG_EEPROM_SIZE_FAILED == val) {
 453                         HALDEBUG(ah, HAL_DEBUG_ANY,
 454                             "%s: unsupported EEPROM size %u (0x%x) found\n",
 455                             __func__, val, val);
 456                         ecode = HAL_EESIZE;
 457                         goto bad;
 458                 }
 459                 HALDEBUG(ah, HAL_DEBUG_ANY,
 460                     "%s: EEPROM size = %d. Must be %d (16k).\n",
 461                     __func__, val, AR_PCICFG_EEPROM_SIZE_16K);
 462                 ecode = HAL_EESIZE;
 463                 goto bad;
 464         }
 465         ecode = ath_hal_legacyEepromAttach(ah);
 466         if (ecode != HAL_OK) {
 467                 goto bad;
 468         }
 469         ahp->ah_isHb63 = IS_2425(ah) && ath_hal_eepromGetFlag(ah, AR_EEP_ISTALON);
 470
 471         /*
 472          * If Bmode and AR5212, verify 2.4 analog exists
 473          */
 474         if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) &&
 475             (AH_PRIVATE(ah)->ah_analog5GhzRev & 0xF0) == AR_RAD5111_SREV_MAJOR) {
 476                 /*
 477                  * Set correct Baseband to analog shift
 478                  * setting to access analog chips.
 479                  */
 480                 OS_REG_WRITE(ah, AR_PHY(0), 0x00004007);
 481                 OS_DELAY(2000);
 482                 AH_PRIVATE(ah)->ah_analog2GhzRev = ar5212GetRadioRev(ah);
 483
 484                 /* Set baseband for 5GHz chip */
 485                 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
 486                 OS_DELAY(2000);
 487                 if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != AR_RAD2111_SREV_MAJOR) {
 488                         HALDEBUG(ah, HAL_DEBUG_ANY,
 489                             "%s: 2G Radio Chip Rev 0x%02X is not "
 490                             "supported by this driver\n", __func__,
 491                             AH_PRIVATE(ah)->ah_analog2GhzRev);
 492                         ecode = HAL_ENOTSUPP;
 493                         goto bad;
 494                 }
 495         }
 496
 497         ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);
 498         if (ecode != HAL_OK) {
 499                 HALDEBUG(ah, HAL_DEBUG_ANY,
 500                     "%s: cannot read regulatory domain from EEPROM\n",
 501                     __func__);
 502                 goto bad;
 503         }
 504         AH_PRIVATE(ah)->ah_currentRD = eeval;
 505         /* XXX record serial number */
 506
 507         /*
 508          * Got everything we need now to setup the capabilities.
 509          */
 510         if (!ar5212FillCapabilityInfo(ah)) {
 511                 HALDEBUG(ah, HAL_DEBUG_ANY,
 512                     "%s: failed ar5212FillCapabilityInfo\n", __func__);
 513                 ecode = HAL_EEREAD;
 514                 goto bad;
 515         }
 516
 517         if (!rf->attach(ah, &ecode)) {
 518                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",
 519                     __func__, ecode);
 520                 goto bad;
 521         }
 522         /*
 523          * Set noise floor adjust method; we arrange a
 524          * direct call instead of thunking.
 525          */
 526         AH_PRIVATE(ah)->ah_getNfAdjust = ahp->ah_rfHal->getNfAdjust;
 527
 528         /* Initialize gain ladder thermal calibration structure */
 529         ar5212InitializeGainValues(ah);
 530
 531         ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
 532         if (ecode != HAL_OK) {
 533                 HALDEBUG(ah, HAL_DEBUG_ANY,
 534                     "%s: error getting mac address from EEPROM\n", __func__);
 535                 goto bad;
 536         }
 537
 538         ar5212AniSetup(ah);
 539         /* Setup of Radar/AR structures happens in ath_hal_initchannels*/
 540         ar5212InitNfCalHistBuffer(ah);
 541
 542         /* XXX EAR stuff goes here */
 543
 544         HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
 545
 546         return ah;
 547
 548 bad:
 549         if (ahp)
 550                 ar5212Detach((struct ath_hal *) ahp);
 551         if (status)
 552                 *status = ecode;
 553         return AH_NULL;
 554 #undef AH_EEPROM_PROTECT
 555 }
 556
 557 void
 558 ar5212Detach(struct ath_hal *ah)
 559 {
 560         HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__);
 561
 562         HALASSERT(ah != AH_NULL);
 563         HALASSERT(ah->ah_magic == AR5212_MAGIC);
 564
 565         ar5212AniDetach(ah);
 566         ar5212RfDetach(ah);
 567         ar5212Disable(ah);
 568         ar5212SetPowerMode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
 569
 570         ath_hal_eepromDetach(ah);
 571         ath_hal_free(ah);
 572 }
 573
 574 HAL_BOOL
 575 ar5212ChipTest(struct ath_hal *ah)
 576 {
 577         uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) };
 578         uint32_t regHold[2];
 579         uint32_t patternData[4] =
 580             { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 };
 581         int i, j;
 582
 583         /* Test PHY & MAC registers */
 584         for (i = 0; i < 2; i++) {
 585                 uint32_t addr = regAddr[i];
 586                 uint32_t wrData, rdData;
 587
 588                 regHold[i] = OS_REG_READ(ah, addr);
 589                 for (j = 0; j < 0x100; j++) {
 590                         wrData = (j << 16) | j;
 591                         OS_REG_WRITE(ah, addr, wrData);
 592                         rdData = OS_REG_READ(ah, addr);
 593                         if (rdData != wrData) {
 594                                 HALDEBUG(ah, HAL_DEBUG_ANY,
 595 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
 596                                 __func__, addr, wrData, rdData);
 597                                 return AH_FALSE;
 598                         }
 599                 }
 600                 for (j = 0; j < 4; j++) {
 601                         wrData = patternData[j];
 602                         OS_REG_WRITE(ah, addr, wrData);
 603                         rdData = OS_REG_READ(ah, addr);
 604                         if (wrData != rdData) {
 605                                 HALDEBUG(ah, HAL_DEBUG_ANY,
 606 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
 607                                         __func__, addr, wrData, rdData);
 608                                 return AH_FALSE;
 609                         }
 610                 }
 611                 OS_REG_WRITE(ah, regAddr[i], regHold[i]);
 612         }
 613         OS_DELAY(100);
 614         return AH_TRUE;
 615 }
 616
 617 /*
 618  * Store the channel edges for the requested operational mode
 619  */
 620 HAL_BOOL
 621 ar5212GetChannelEdges(struct ath_hal *ah,
 622         uint16_t flags, uint16_t *low, uint16_t *high)
 623 {
 624         if (flags & IEEE80211_CHAN_5GHZ) {
 625                 *low = 4915;
 626                 *high = 6100;
 627                 return AH_TRUE;
 628         }
 629         if ((flags & IEEE80211_CHAN_2GHZ) &&
 630             (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) ||
 631              ath_hal_eepromGetFlag(ah, AR_EEP_GMODE))) {
 632                 *low = 2312;
 633                 *high = 2732;
 634                 return AH_TRUE;
 635         }
 636         return AH_FALSE;
 637 }
 638
 639 /*
 640  * Disable PLL when in L0s as well as receiver clock when in L1.
 641  * This power saving option must be enabled through the Serdes.
 642  *
 643  * Programming the Serdes must go through the same 288 bit serial shift
 644  * register as the other analog registers.  Hence the 9 writes.
 645  *
 646  * XXX Clean up the magic numbers.
 647  */
 648 static void
 649 ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
 650 {
 651         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
 652         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
 653
 654         /* RX shut off when elecidle is asserted */
 655         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x28000039);
 656         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x53160824);
 657         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980579);
 658
 659         /* Shut off PLL and CLKREQ active in L1 */
 660         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x001defff);
 661         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);
 662         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);
 663         OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x000e3007);
 664
 665         /* Load the new settings */
 666         OS_REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
 667 }
 668
 669 static void
 670 ar5212DisablePCIE(struct ath_hal *ah)
 671 {
 672         /* NB: fill in for 9100 */
 673 }
 674
 675 /*
 676  * Fill all software cached or static hardware state information.
 677  * Return failure if capabilities are to come from EEPROM and
 678  * cannot be read.
 679  */
 680 HAL_BOOL
 681 ar5212FillCapabilityInfo(struct ath_hal *ah)
 682 {
 683 #define AR_KEYTABLE_SIZE        128
 684 #define IS_GRIFFIN_LITE(ah) \
 685     (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_GRIFFIN && \
 686      AH_PRIVATE(ah)->ah_macRev == AR_SREV_GRIFFIN_LITE)
 687 #define IS_COBRA(ah) \
 688     (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_COBRA)
 689 #define IS_2112(ah) \
 690         ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xF0) == AR_RAD2112_SREV_MAJOR)
 691
 692         struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
 693         HAL_CAPABILITIES *pCap = &ahpriv->ah_caps;
 694         uint16_t capField, val;
 695
 696         /* Read the capability EEPROM location */
 697         if (ath_hal_eepromGet(ah, AR_EEP_OPCAP, &capField) != HAL_OK) {
 698                 HALDEBUG(ah, HAL_DEBUG_ANY,
 699                     "%s: unable to read caps from eeprom\n", __func__);
 700                 return AH_FALSE;
 701         }
 702         if (IS_2112(ah))
 703                 ath_hal_eepromSet(ah, AR_EEP_AMODE, AH_FALSE);
 704         if (capField == 0 && IS_GRIFFIN_LITE(ah)) {
 705                 /*
 706                  * For griffin-lite cards with unprogrammed capabilities.
 707                  */
 708                 ath_hal_eepromSet(ah, AR_EEP_COMPRESS, AH_FALSE);
 709                 ath_hal_eepromSet(ah, AR_EEP_FASTFRAME, AH_FALSE);
 710                 ath_hal_eepromSet(ah, AR_EEP_TURBO5DISABLE, AH_TRUE);
 711                 ath_hal_eepromSet(ah, AR_EEP_TURBO2DISABLE, AH_TRUE);
 712                 HALDEBUG(ah, HAL_DEBUG_ATTACH,
 713                     "%s: override caps for griffin-lite, now 0x%x (+!turbo)\n",
 714                     __func__, capField);
 715         }
 716
 717         /* Modify reg domain on newer cards that need to work with older sw */
 718         if (ahpriv->ah_opmode != HAL_M_HOSTAP &&
 719             ahpriv->ah_subvendorid == AR_SUBVENDOR_ID_NEW_A) {
 720                 if (ahpriv->ah_currentRD == 0x64 ||
 721                     ahpriv->ah_currentRD == 0x65)
 722                         ahpriv->ah_currentRD += 5;
 723                 else if (ahpriv->ah_currentRD == 0x41)
 724                         ahpriv->ah_currentRD = 0x43;
 725                 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: regdomain mapped to 0x%x\n",
 726                     __func__, ahpriv->ah_currentRD);
 727         }
 728
 729         if (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2417 ||
 730             AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2425) {
 731                 HALDEBUG(ah, HAL_DEBUG_ATTACH,
 732                     "%s: enable Bmode and disable turbo for Swan/Nala\n",
 733                     __func__);
 734                 ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_TRUE);
 735                 ath_hal_eepromSet(ah, AR_EEP_COMPRESS, AH_FALSE);
 736                 ath_hal_eepromSet(ah, AR_EEP_FASTFRAME, AH_FALSE);
 737                 ath_hal_eepromSet(ah, AR_EEP_TURBO5DISABLE, AH_TRUE);
 738                 ath_hal_eepromSet(ah, AR_EEP_TURBO2DISABLE, AH_TRUE);
 739         }
 740
 741         /* Construct wireless mode from EEPROM */
 742         pCap->halWirelessModes = 0;
 743         if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
 744                 pCap->halWirelessModes |= HAL_MODE_11A;
 745                 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE))
 746                         pCap->halWirelessModes |= HAL_MODE_TURBO;
 747         }
 748         if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE))
 749                 pCap->halWirelessModes |= HAL_MODE_11B;
 750         if (ath_hal_eepromGetFlag(ah, AR_EEP_GMODE) &&
 751             ahpriv->ah_subvendorid != AR_SUBVENDOR_ID_NOG) {
 752                 pCap->halWirelessModes |= HAL_MODE_11G;
 753                 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO2DISABLE))
 754                         pCap->halWirelessModes |= HAL_MODE_108G;
 755         }
 756
 757         pCap->halLow2GhzChan = 2312;
 758         /* XXX 2417 too? */
 759         if (IS_RAD5112_ANY(ah) || IS_5413(ah) || IS_2425(ah) ||  IS_2417(ah))
 760                 pCap->halHigh2GhzChan = 2500;
 761         else
 762                 pCap->halHigh2GhzChan = 2732;
 763
 764         pCap->halLow5GhzChan = 4915;
 765         pCap->halHigh5GhzChan = 6100;
 766
 767         pCap->halCipherCkipSupport = AH_FALSE;
 768         pCap->halCipherTkipSupport = AH_TRUE;
 769         pCap->halCipherAesCcmSupport =
 770                 (ath_hal_eepromGetFlag(ah, AR_EEP_AES) &&
 771                  ((AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_VENICE) ||
 772                   ((AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE) &&
 773                    (AH_PRIVATE(ah)->ah_macRev >= AR_SREV_VERSION_OAHU))));
 774
 775         pCap->halMicCkipSupport    = AH_FALSE;
 776         pCap->halMicTkipSupport    = AH_TRUE;
 777         pCap->halMicAesCcmSupport  = ath_hal_eepromGetFlag(ah, AR_EEP_AES);
 778         /*
 779          * Starting with Griffin TX+RX mic keys can be combined
 780          * in one key cache slot.
 781          */
 782         if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_GRIFFIN)
 783                 pCap->halTkipMicTxRxKeySupport = AH_TRUE;
 784         else
 785                 pCap->halTkipMicTxRxKeySupport = AH_FALSE;
 786         pCap->halChanSpreadSupport = AH_TRUE;
 787         pCap->halSleepAfterBeaconBroken = AH_TRUE;
 788
 789         if (ahpriv->ah_macRev > 1 || IS_COBRA(ah)) {
 790                 pCap->halCompressSupport   =
 791                         ath_hal_eepromGetFlag(ah, AR_EEP_COMPRESS) &&
 792                         (pCap->halWirelessModes & (HAL_MODE_11A|HAL_MODE_11G)) != 0;
 793                 pCap->halBurstSupport = ath_hal_eepromGetFlag(ah, AR_EEP_BURST);
 794                 pCap->halFastFramesSupport =
 795                         ath_hal_eepromGetFlag(ah, AR_EEP_FASTFRAME) &&
 796                         (pCap->halWirelessModes & (HAL_MODE_11A|HAL_MODE_11G)) != 0;
 797                 pCap->halChapTuningSupport = AH_TRUE;
 798                 pCap->halTurboPrimeSupport = AH_TRUE;
 799         }
 800         pCap->halTurboGSupport = pCap->halWirelessModes & HAL_MODE_108G;
 801
 802         pCap->halPSPollBroken = AH_TRUE;        /* XXX fixed in later revs? */
 803         pCap->halVEOLSupport = AH_TRUE;
 804         pCap->halBssIdMaskSupport = AH_TRUE;
 805         pCap->halMcastKeySrchSupport = AH_TRUE;
 806         if ((ahpriv->ah_macVersion == AR_SREV_VERSION_VENICE &&
 807              ahpriv->ah_macRev == 8) ||
 808             ahpriv->ah_macVersion > AR_SREV_VERSION_VENICE)
 809                 pCap->halTsfAddSupport = AH_TRUE;
 810
 811         if (ath_hal_eepromGet(ah, AR_EEP_MAXQCU, &val) == HAL_OK)
 812                 pCap->halTotalQueues = val;
 813         else
 814                 pCap->halTotalQueues = HAL_NUM_TX_QUEUES;
 815
 816         if (ath_hal_eepromGet(ah, AR_EEP_KCENTRIES, &val) == HAL_OK)
 817                 pCap->halKeyCacheSize = val;
 818         else
 819                 pCap->halKeyCacheSize = AR_KEYTABLE_SIZE;
 820
 821         pCap->halChanHalfRate = AH_TRUE;
 822         pCap->halChanQuarterRate = AH_TRUE;
 823
 824         if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
 825             ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) {
 826                 /* NB: enabled by default */
 827                 ahpriv->ah_rfkillEnabled = AH_TRUE;
 828                 pCap->halRfSilentSupport = AH_TRUE;
 829         }
 830
 831         /* NB: this is a guess, noone seems to know the answer */
 832         ahpriv->ah_rxornIsFatal =
 833             (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_VENICE);
 834
 835         /* enable features that first appeared in Hainan */
 836         if ((AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
 837              AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN) ||
 838             AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_VENICE) {
 839                 /* h/w phy counters */
 840                 pCap->halHwPhyCounterSupport = AH_TRUE;
 841                 /* bssid match disable */
 842                 pCap->halBssidMatchSupport = AH_TRUE;
 843         }
 844
 845         pCap->halTstampPrecision = 15;
 846         pCap->halIntrMask = HAL_INT_COMMON
 847                         | HAL_INT_RX
 848                         | HAL_INT_TX
 849                         | HAL_INT_FATAL
 850                         | HAL_INT_BNR
 851                         | HAL_INT_BMISC
 852                         ;
 853         if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN)
 854                 pCap->halIntrMask &= ~HAL_INT_TBTT;
 855
 856         return AH_TRUE;
 857 #undef IS_COBRA
 858 #undef IS_GRIFFIN_LITE
 859 #undef AR_KEYTABLE_SIZE
 860 }
 861
 862 static const char*
 863 ar5212Probe(uint16_t vendorid, uint16_t devid)
 864 {
 865         if (vendorid == ATHEROS_VENDOR_ID ||
 866             vendorid == ATHEROS_3COM_VENDOR_ID ||
 867             vendorid == ATHEROS_3COM2_VENDOR_ID) {
 868                 switch (devid) {
 869                 case AR5212_FPGA:
 870                         return "Atheros 5212 (FPGA)";
 871                 case AR5212_DEVID:
 872                 case AR5212_DEVID_IBM:
 873                 case AR5212_DEFAULT:
 874                         return "Atheros 5212";
 875                 case AR5212_AR2413:
 876                         return "Atheros 2413";
 877                 case AR5212_AR2417:
 878                         return "Atheros 2417";
 879                 case AR5212_AR5413:
 880                         return "Atheros 5413";
 881                 case AR5212_AR5424:
 882                         return "Atheros 5424/2424";
 883                 }
 884         }
 885         return AH_NULL;
 886 }
 887 AH_CHIP(AR5212, ar5212Probe, ar5212Attach);