sys/bus/usb/ehci.c

   1 /*      $NetBSD: ehci.c,v 1.91 2005/02/27 00:27:51 perry Exp $ */
   2 /*      $FreeBSD: src/sys/dev/usb/ehci.c,v 1.36.2.3 2006/09/24 13:39:04 iedowse Exp $   */
   3
   4 /*
   5  * Copyright (c) 2004 The NetBSD Foundation, Inc.
   6  * All rights reserved.
   7  *
   8  * This code is derived from software contributed to The NetBSD Foundation
   9  * by Lennart Augustsson (lennart@augustsson.net) and by Charles M. Hannum.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  * 3. All advertising materials mentioning features or use of this software
  20  *    must display the following acknowledgement:
  21  *        This product includes software developed by the NetBSD
  22  *        Foundation, Inc. and its contributors.
  23  * 4. Neither the name of The NetBSD Foundation nor the names of its
  24  *    contributors may be used to endorse or promote products derived
  25  *    from this software without specific prior written permission.
  26  *
  27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37  * POSSIBILITY OF SUCH DAMAGE.
  38  */
  39
  40 /*
  41  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  42  *
  43  * The EHCI 1.0 spec can be found at
  44  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  45  * and the USB 2.0 spec at
  46  * http://www.usb.org/developers/docs/usb_20.zip
  47  *
  48  */
  49
  50 /*
  51  * TODO:
  52  * 1) The EHCI driver lacks support for isochronous transfers, so
  53  *    devices using them don't work.
  54  *
  55  * 2) Interrupt transfer scheduling does not manage the time available
  56  *    in each frame, so it is possible for the transfers to overrun
  57  *    the end of the frame.
  58  *
  59  * 3) Command failures are not recovered correctly.
  60  */
  61
  62 #include <sys/param.h>
  63 #include <sys/systm.h>
  64 #include <sys/malloc.h>
  65 #include <sys/kernel.h>
  66 #include <sys/endian.h>
  67 #include <sys/module.h>
  68 #include <sys/bus.h>
  69 #include <sys/lock.h>
  70 #include <sys/proc.h>
  71 #include <sys/queue.h>
  72 #include <sys/sysctl.h>
  73 #include <sys/thread2.h>
  74
  75 #include <machine/cpu.h>
  76 #include <machine/endian.h>
  77
  78 #include <bus/usb/usb.h>
  79 #include <bus/usb/usbdi.h>
  80 #include <bus/usb/usbdivar.h>
  81 #include <bus/usb/usb_mem.h>
  82 #include <bus/usb/usb_quirks.h>
  83
  84 #include <bus/usb/ehcireg.h>
  85 #include <bus/usb/ehcivar.h>
  86
  87 #ifdef USB_DEBUG
  88 #define EHCI_DEBUG USB_DEBUG
  89 #define DPRINTF(x)      do { if (ehcidebug) kprintf x; } while (0)
  90 #define DPRINTFN(n,x)   do { if (ehcidebug>(n)) kprintf x; } while (0)
  91 int ehcidebug = 0;
  92 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
  93 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
  94            &ehcidebug, 0, "ehci debug level");
  95 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
  96 #else
  97 #define DPRINTF(x)
  98 #define DPRINTFN(n,x)
  99 #endif
 100
 101 struct ehci_pipe {
 102         struct usbd_pipe pipe;
 103
 104         ehci_soft_qh_t *sqh;
 105         union {
 106                 ehci_soft_qtd_t *qtd;
 107                 /* ehci_soft_itd_t *itd; */
 108         } tail;
 109         union {
 110                 /* Control pipe */
 111                 struct {
 112                         usb_dma_t reqdma;
 113                         u_int length;
 114                         /*ehci_soft_qtd_t *setup, *data, *stat;*/
 115                 } ctl;
 116                 /* Interrupt pipe */
 117                 struct {
 118                         u_int length;
 119                 } intr;
 120                 /* Bulk pipe */
 121                 struct {
 122                         u_int length;
 123                 } bulk;
 124                 /* Iso pipe */
 125                 /* XXX */
 126         } u;
 127 };
 128
 129 static usbd_status      ehci_open(usbd_pipe_handle);
 130 static void             ehci_poll(struct usbd_bus *);
 131 static void             ehci_softintr(void *);
 132 static int              ehci_intr1(ehci_softc_t *);
 133 static void             ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
 134 static void             ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
 135 static void             ehci_idone(struct ehci_xfer *);
 136 static void             ehci_timeout(void *);
 137 static void             ehci_timeout_task(void *);
 138 static void             ehci_intrlist_timeout(void *);
 139
 140 static usbd_status      ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
 141 static void             ehci_freem(struct usbd_bus *, usb_dma_t *);
 142
 143 static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
 144 static void             ehci_freex(struct usbd_bus *, usbd_xfer_handle);
 145
 146 static usbd_status      ehci_root_ctrl_transfer(usbd_xfer_handle);
 147 static usbd_status      ehci_root_ctrl_start(usbd_xfer_handle);
 148 static void             ehci_root_ctrl_abort(usbd_xfer_handle);
 149 static void             ehci_root_ctrl_close(usbd_pipe_handle);
 150 static void             ehci_root_ctrl_done(usbd_xfer_handle);
 151
 152 static usbd_status      ehci_root_intr_transfer(usbd_xfer_handle);
 153 static usbd_status      ehci_root_intr_start(usbd_xfer_handle);
 154 static void             ehci_root_intr_abort(usbd_xfer_handle);
 155 static void             ehci_root_intr_close(usbd_pipe_handle);
 156 static void             ehci_root_intr_done(usbd_xfer_handle);
 157
 158 static usbd_status      ehci_device_ctrl_transfer(usbd_xfer_handle);
 159 static usbd_status      ehci_device_ctrl_start(usbd_xfer_handle);
 160 static void             ehci_device_ctrl_abort(usbd_xfer_handle);
 161 static void             ehci_device_ctrl_close(usbd_pipe_handle);
 162 static void             ehci_device_ctrl_done(usbd_xfer_handle);
 163
 164 static usbd_status      ehci_device_bulk_transfer(usbd_xfer_handle);
 165 static usbd_status      ehci_device_bulk_start(usbd_xfer_handle);
 166 static void             ehci_device_bulk_abort(usbd_xfer_handle);
 167 static void             ehci_device_bulk_close(usbd_pipe_handle);
 168 static void             ehci_device_bulk_done(usbd_xfer_handle);
 169
 170 static usbd_status      ehci_device_intr_transfer(usbd_xfer_handle);
 171 static usbd_status      ehci_device_intr_start(usbd_xfer_handle);
 172 static void             ehci_device_intr_abort(usbd_xfer_handle);
 173 static void             ehci_device_intr_close(usbd_pipe_handle);
 174 static void             ehci_device_intr_done(usbd_xfer_handle);
 175
 176 static usbd_status      ehci_device_isoc_transfer(usbd_xfer_handle);
 177 static usbd_status      ehci_device_isoc_start(usbd_xfer_handle);
 178 static void             ehci_device_isoc_abort(usbd_xfer_handle);
 179 static void             ehci_device_isoc_close(usbd_pipe_handle);
 180 static void             ehci_device_isoc_done(usbd_xfer_handle);
 181
 182 static void             ehci_device_clear_toggle(usbd_pipe_handle pipe);
 183 static void             ehci_noop(usbd_pipe_handle pipe);
 184
 185 static int              ehci_str(usb_string_descriptor_t *, int, char *);
 186 static void             ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
 187 static void             ehci_disown(ehci_softc_t *, int, int);
 188
 189 static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
 190 static void             ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
 191
 192 static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
 193 static void             ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
 194 static usbd_status      ehci_alloc_sqtd_chain(struct ehci_pipe *,
 195                             ehci_softc_t *, int, int, usbd_xfer_handle,
 196                             ehci_soft_qtd_t **, ehci_soft_qtd_t **);
 197 static void             ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
 198                                             ehci_soft_qtd_t *);
 199
 200 static usbd_status      ehci_device_request(usbd_xfer_handle xfer);
 201
 202 static usbd_status      ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
 203                             int ival);
 204
 205 static void             ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
 206 static void             ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
 207                                     ehci_soft_qh_t *);
 208 static void             ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
 209 static void             ehci_sync_hc(ehci_softc_t *);
 210
 211 static void             ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
 212 static void             ehci_abort_xfer(usbd_xfer_handle, usbd_status);
 213
 214 #ifdef EHCI_DEBUG
 215 static void             ehci_dump_regs(ehci_softc_t *);
 216 void                    ehci_dump(void);
 217 static ehci_softc_t     *theehci;
 218 static void             ehci_dump_link(ehci_link_t, int);
 219 static void             ehci_dump_sqtds(ehci_soft_qtd_t *);
 220 static void             ehci_dump_sqtd(ehci_soft_qtd_t *);
 221 static void             ehci_dump_qtd(ehci_qtd_t *);
 222 static void             ehci_dump_sqh(ehci_soft_qh_t *);
 223 #ifdef DIAGNOSTIC
 224 static void             ehci_dump_exfer(struct ehci_xfer *);
 225 #endif
 226 #endif
 227
 228 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
 229
 230 #define EHCI_INTR_ENDPT 1
 231
 232 #define ehci_add_intr_list(sc, ex) \
 233         LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
 234 #define ehci_del_intr_list(ex) \
 235         do { \
 236                 LIST_REMOVE((ex), inext); \
 237                 (ex)->inext.le_prev = NULL; \
 238         } while (0)
 239 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
 240
 241 static struct usbd_bus_methods ehci_bus_methods = {
 242         ehci_open,
 243         ehci_softintr,
 244         ehci_poll,
 245         ehci_allocm,
 246         ehci_freem,
 247         ehci_allocx,
 248         ehci_freex,
 249 };
 250
 251 static struct usbd_pipe_methods ehci_root_ctrl_methods = {
 252         ehci_root_ctrl_transfer,
 253         ehci_root_ctrl_start,
 254         ehci_root_ctrl_abort,
 255         ehci_root_ctrl_close,
 256         ehci_noop,
 257         ehci_root_ctrl_done,
 258 };
 259
 260 static struct usbd_pipe_methods ehci_root_intr_methods = {
 261         ehci_root_intr_transfer,
 262         ehci_root_intr_start,
 263         ehci_root_intr_abort,
 264         ehci_root_intr_close,
 265         ehci_noop,
 266         ehci_root_intr_done,
 267 };
 268
 269 static struct usbd_pipe_methods ehci_device_ctrl_methods = {
 270         ehci_device_ctrl_transfer,
 271         ehci_device_ctrl_start,
 272         ehci_device_ctrl_abort,
 273         ehci_device_ctrl_close,
 274         ehci_noop,
 275         ehci_device_ctrl_done,
 276 };
 277
 278 static struct usbd_pipe_methods ehci_device_intr_methods = {
 279         ehci_device_intr_transfer,
 280         ehci_device_intr_start,
 281         ehci_device_intr_abort,
 282         ehci_device_intr_close,
 283         ehci_device_clear_toggle,
 284         ehci_device_intr_done,
 285 };
 286
 287 static struct usbd_pipe_methods ehci_device_bulk_methods = {
 288         ehci_device_bulk_transfer,
 289         ehci_device_bulk_start,
 290         ehci_device_bulk_abort,
 291         ehci_device_bulk_close,
 292         ehci_device_clear_toggle,
 293         ehci_device_bulk_done,
 294 };
 295
 296 static struct usbd_pipe_methods ehci_device_isoc_methods = {
 297         ehci_device_isoc_transfer,
 298         ehci_device_isoc_start,
 299         ehci_device_isoc_abort,
 300         ehci_device_isoc_close,
 301         ehci_noop,
 302         ehci_device_isoc_done,
 303 };
 304
 305 usbd_status
 306 ehci_init(ehci_softc_t *sc)
 307 {
 308         u_int32_t vers, sparams, cparams, hcr;
 309         u_int i;
 310         usbd_status err;
 311         ehci_soft_qh_t *sqh;
 312         u_int ncomp;
 313         int lev;
 314
 315         DPRINTF(("ehci_init: start\n"));
 316 #ifdef EHCI_DEBUG
 317         theehci = sc;
 318 #endif
 319
 320         sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
 321
 322         vers = EREAD2(sc, EHCI_HCIVERSION);
 323         device_printf(sc->sc_bus.bdev,
 324             "EHCI version %x.%x\n", vers >> 8, vers & 0xff);
 325         /* Disable all interrupts */
 326         EOWRITE4(sc, EHCI_USBINTR, 0);
 327
 328         sparams = EREAD4(sc, EHCI_HCSPARAMS);
 329         DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
 330         sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
 331         ncomp = EHCI_HCS_N_CC(sparams);
 332         if (ncomp != sc->sc_ncomp) {
 333                 device_printf(sc->sc_bus.bdev,
 334                     "wrong number of companions (%d != %d)\n",
 335                     ncomp, sc->sc_ncomp);
 336                 if (ncomp < sc->sc_ncomp)
 337                         sc->sc_ncomp = ncomp;
 338         }
 339         if (sc->sc_ncomp > 0) {
 340                 device_printf(sc->sc_bus.bdev,
 341                     "companion controller%s, %d port%s each:",
 342                     sc->sc_ncomp!=1 ? "s" : "",
 343                     EHCI_HCS_N_PCC(sparams),
 344                     EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
 345                 for (i = 0; i < sc->sc_ncomp; i++)
 346                         kprintf(" %s", device_get_nameunit(sc->sc_comps[i]->bdev));
 347                 kprintf("\n");
 348         }
 349         sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
 350         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 351         DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
 352
 353         if (EHCI_HCC_64BIT(cparams)) {
 354                 /* MUST clear segment register if 64 bit capable. */
 355                 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 356         }
 357
 358         sc->sc_bus.usbrev = USBREV_2_0;
 359
 360         /* Reset the controller */
 361         DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
 362         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
 363         usb_delay_ms(&sc->sc_bus, 1);
 364         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 365         for (i = 0; i < 100; i++) {
 366                 usb_delay_ms(&sc->sc_bus, 1);
 367                 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
 368                 if (!hcr)
 369                         break;
 370         }
 371         if (hcr) {
 372                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
 373                 return (USBD_IOERROR);
 374         }
 375
 376         /* frame list size at default, read back what we got and use that */
 377         switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
 378         case 0: sc->sc_flsize = 1024; break;
 379         case 1: sc->sc_flsize = 512; break;
 380         case 2: sc->sc_flsize = 256; break;
 381         case 3: return (USBD_IOERROR);
 382         }
 383         err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
 384                            EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
 385         if (err)
 386                 return (err);
 387         DPRINTF(("%s: flsize=%d\n", device_get_nameunit(sc->sc_bus.bdev),sc->sc_flsize));
 388         sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
 389         EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 390
 391         /* Set up the bus struct. */
 392         sc->sc_bus.methods = &ehci_bus_methods;
 393         sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
 394
 395         sc->sc_eintrs = EHCI_NORMAL_INTRS;
 396
 397         /*
 398          * Allocate the interrupt dummy QHs. These are arranged to give
 399          * poll intervals that are powers of 2 times 1ms.
 400          */
 401         for (i = 0; i < EHCI_INTRQHS; i++) {
 402                 sqh = ehci_alloc_sqh(sc);
 403                 if (sqh == NULL) {
 404                         err = USBD_NOMEM;
 405                         goto bad1;
 406                 }
 407                 sc->sc_islots[i].sqh = sqh;
 408         }
 409         lev = 0;
 410         for (i = 0; i < EHCI_INTRQHS; i++) {
 411                 if (i == EHCI_IQHIDX(lev + 1, 0))
 412                         lev++;
 413                 sqh = sc->sc_islots[i].sqh;
 414                 if (i == 0) {
 415                         /* The last (1ms) QH terminates. */
 416                         sqh->qh.qh_link = EHCI_NULL;
 417                         sqh->next = NULL;
 418                 } else {
 419                         /* Otherwise the next QH has half the poll interval */
 420                         sqh->next =
 421                             sc->sc_islots[EHCI_IQHIDX(lev - 1, i + 1)].sqh;
 422                         sqh->qh.qh_link = htole32(sqh->next->physaddr |
 423                             EHCI_LINK_QH);
 424                 }
 425                 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
 426                 sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
 427                 sqh->qh.qh_curqtd = EHCI_NULL;
 428                 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 429                 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 430                 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 431                 sqh->sqtd = NULL;
 432         }
 433         /* Point the frame list at the last level (128ms). */
 434         for (i = 0; i < sc->sc_flsize; i++) {
 435                 sc->sc_flist[i] = htole32(EHCI_LINK_QH |
 436                     sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
 437                     i)].sqh->physaddr);
 438         }
 439
 440         /* Allocate dummy QH that starts the async list. */
 441         sqh = ehci_alloc_sqh(sc);
 442         if (sqh == NULL) {
 443                 err = USBD_NOMEM;
 444                 goto bad1;
 445         }
 446         /* Fill the QH */
 447         sqh->qh.qh_endp =
 448             htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
 449         sqh->qh.qh_link =
 450             htole32(sqh->physaddr | EHCI_LINK_QH);
 451         sqh->qh.qh_curqtd = EHCI_NULL;
 452         sqh->prev = sqh; /*It's a circular list.. */
 453         sqh->next = sqh;
 454         /* Fill the overlay qTD */
 455         sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 456         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 457         sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 458         sqh->sqtd = NULL;
 459 #ifdef EHCI_DEBUG
 460         if (ehcidebug) {
 461                 ehci_dump_sqh(sqh);
 462         }
 463 #endif
 464
 465         /* Point to async list */
 466         sc->sc_async_head = sqh;
 467         EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
 468
 469         callout_init(&sc->sc_tmo_intrlist);
 470
 471         lockinit(&sc->sc_doorbell_lock, "ehcidb", 0, 0);
 472
 473         /* Turn on controller */
 474         EOWRITE4(sc, EHCI_USBCMD,
 475                  EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
 476                  (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
 477                  EHCI_CMD_ASE |
 478                  EHCI_CMD_PSE |
 479                  EHCI_CMD_RS);
 480
 481         /* Take over port ownership */
 482         EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
 483
 484         for (i = 0; i < 100; i++) {
 485                 usb_delay_ms(&sc->sc_bus, 1);
 486                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 487                 if (!hcr)
 488                         break;
 489         }
 490         if (hcr) {
 491                 device_printf(sc->sc_bus.bdev, "run timeout\n");
 492                 return (USBD_IOERROR);
 493         }
 494
 495         crit_enter();
 496         sc->sc_flags |= EHCI_SCFLG_DONEINIT;
 497         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 498         ehci_intr(sc);
 499         crit_exit();
 500
 501         return (USBD_NORMAL_COMPLETION);
 502
 503 #if 0
 504  bad2:
 505         ehci_free_sqh(sc, sc->sc_async_head);
 506         sc->sc_async_head = NULL;
 507 #endif
 508  bad1:
 509         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 510         return (err);
 511 }
 512
 513 int
 514 ehci_intr(void *v)
 515 {
 516         ehci_softc_t *sc = v;
 517
 518         if (sc->sc_dying || (sc->sc_flags & EHCI_SCFLG_DONEINIT) == 0)
 519                 return (0);
 520
 521         /* If we get an interrupt while polling, then just ignore it. */
 522         if (sc->sc_bus.use_polling) {
 523                 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 524
 525                 if (intrs)
 526                         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 527                 sc->sc_dintrs |= intrs;
 528 #ifdef DIAGNOSTIC
 529                 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
 530 #endif
 531                 return (0);
 532         }
 533
 534         return (ehci_intr1(sc));
 535 }
 536
 537 static int
 538 ehci_intr1(ehci_softc_t *sc)
 539 {
 540         u_int32_t intrs, eintrs;
 541
 542         DPRINTFN(20,("ehci_intr1: enter\n"));
 543
 544         intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) | sc->sc_dintrs;
 545         if (intrs == 0)
 546                 return (0);
 547
 548         sc->sc_dintrs = 0;
 549         eintrs = intrs & sc->sc_eintrs;
 550         DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
 551                      sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
 552                      (u_int)eintrs));
 553         if (!eintrs)
 554                 return (0);
 555
 556         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 557         sc->sc_bus.intr_context++;
 558         sc->sc_bus.no_intrs++;
 559         if (eintrs & EHCI_STS_IAA) {
 560                 DPRINTF(("ehci_intr1: door bell\n"));
 561                 wakeup(&sc->sc_async_head);
 562                 eintrs &= ~EHCI_STS_IAA;
 563         }
 564         if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
 565                 DPRINTFN(5,("ehci_intr1: %s %s\n",
 566                             eintrs & EHCI_STS_INT ? "INT" : "",
 567                             eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
 568                 usb_schedsoftintr(&sc->sc_bus);
 569                 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
 570         }
 571         if (eintrs & EHCI_STS_HSE) {
 572                 device_printf(sc->sc_bus.bdev,
 573                     "unrecoverable error, controller halted\n");
 574                 /* XXX what else */
 575         }
 576         if (eintrs & EHCI_STS_PCD) {
 577                 ehci_pcd(sc, sc->sc_intrxfer);
 578                 eintrs &= ~EHCI_STS_PCD;
 579         }
 580
 581         sc->sc_bus.intr_context--;
 582
 583         if (eintrs != 0) {
 584                 /* Block unprocessed interrupts. */
 585                 sc->sc_eintrs &= ~eintrs;
 586                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 587                 device_printf(sc->sc_bus.bdev,
 588                     "blocking intrs 0x%x\n", eintrs);
 589         }
 590
 591         return (1);
 592 }
 593
 594 void
 595 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
 596 {
 597         u_char *p;
 598         int i, m;
 599
 600         if (xfer == NULL) {
 601                 /* Just ignore the change. */
 602                 return;
 603         }
 604
 605         p = KERNADDR(&xfer->dmabuf, 0);
 606         m = min(sc->sc_noport, xfer->length * 8 - 1);
 607         memset(p, 0, xfer->length);
 608         for (i = 1; i <= m; i++) {
 609                 /* Pick out CHANGE bits from the status reg. */
 610                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
 611                         p[i/8] |= 1 << (i%8);
 612         }
 613         DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
 614         xfer->actlen = xfer->length;
 615         xfer->status = USBD_NORMAL_COMPLETION;
 616
 617         usb_transfer_complete(xfer);
 618 }
 619
 620 void
 621 ehci_softintr(void *v)
 622 {
 623         ehci_softc_t *sc = v;
 624         struct ehci_xfer *ex, *nextex;
 625
 626         DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
 627                      sc->sc_bus.intr_context));
 628
 629         sc->sc_bus.intr_context++;
 630
 631         /*
 632          * The only explanation I can think of for why EHCI is as brain dead
 633          * as UHCI interrupt-wise is that Intel was involved in both.
 634          * An interrupt just tells us that something is done, we have no
 635          * clue what, so we need to scan through all active transfers. :-(
 636          */
 637         for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
 638                 nextex = LIST_NEXT(ex, inext);
 639                 ehci_check_intr(sc, ex);
 640         }
 641
 642         /* Schedule a callout to catch any dropped transactions. */
 643         if ((sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) &&
 644             !LIST_EMPTY(&sc->sc_intrhead))
 645                 callout_reset(&sc->sc_tmo_intrlist, hz / 5, ehci_intrlist_timeout,
 646                    sc);
 647
 648 #ifdef USB_USE_SOFTINTR
 649         if (sc->sc_softwake) {
 650                 sc->sc_softwake = 0;
 651                 wakeup(&sc->sc_softwake);
 652         }
 653 #endif /* USB_USE_SOFTINTR */
 654
 655         sc->sc_bus.intr_context--;
 656 }
 657
 658 /* Check for an interrupt. */
 659 void
 660 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
 661 {
 662         ehci_soft_qtd_t *sqtd, *lsqtd;
 663         u_int32_t status;
 664
 665         DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
 666
 667         if (ex->sqtdstart == NULL) {
 668                 kprintf("ehci_check_intr: sqtdstart=NULL\n");
 669                 return;
 670         }
 671         lsqtd = ex->sqtdend;
 672 #ifdef DIAGNOSTIC
 673         if (lsqtd == NULL) {
 674                 kprintf("ehci_check_intr: lsqtd==0\n");
 675                 return;
 676         }
 677 #endif
 678         /*
 679          * If the last TD is still active we need to check whether there
 680          * is a an error somewhere in the middle, or whether there was a
 681          * short packet (SPD and not ACTIVE).
 682          */
 683         if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
 684                 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
 685                 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
 686                         status = le32toh(sqtd->qtd.qtd_status);
 687                         /* If there's an active QTD the xfer isn't done. */
 688                         if (status & EHCI_QTD_ACTIVE)
 689                                 break;
 690                         /* Any kind of error makes the xfer done. */
 691                         if (status & EHCI_QTD_HALTED)
 692                                 goto done;
 693                         /* We want short packets, and it is short: it's done */
 694                         if (EHCI_QTD_GET_BYTES(status) != 0)
 695                                 goto done;
 696                 }
 697                 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
 698                               ex, ex->sqtdstart));
 699                 return;
 700         }
 701  done:
 702         DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
 703         callout_stop(&ex->xfer.timeout_handle);
 704         usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
 705         ehci_idone(ex);
 706 }
 707
 708 void
 709 ehci_idone(struct ehci_xfer *ex)
 710 {
 711         usbd_xfer_handle xfer = &ex->xfer;
 712 #ifdef USB_DEBUG
 713         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
 714 #endif
 715         ehci_soft_qtd_t *sqtd, *lsqtd;
 716         u_int32_t status = 0, nstatus = 0;
 717         int actlen, cerr;
 718
 719         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
 720 #ifdef DIAGNOSTIC
 721         {
 722                 crit_enter();
 723                 if (ex->isdone) {
 724                         crit_exit();
 725 #ifdef EHCI_DEBUG
 726                         kprintf("ehci_idone: ex is done!\n   ");
 727                         ehci_dump_exfer(ex);
 728 #else
 729                         kprintf("ehci_idone: ex=%p is done!\n", ex);
 730 #endif
 731                         return;
 732                 }
 733                 ex->isdone = 1;
 734                 crit_exit();
 735         }
 736 #endif
 737
 738         if (xfer->status == USBD_CANCELLED ||
 739             xfer->status == USBD_TIMEOUT) {
 740                 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
 741                 return;
 742         }
 743
 744 #ifdef EHCI_DEBUG
 745         DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
 746         if (ehcidebug > 10)
 747                 ehci_dump_sqtds(ex->sqtdstart);
 748 #endif
 749
 750         /* The transfer is done, compute actual length and status. */
 751         lsqtd = ex->sqtdend;
 752         actlen = 0;
 753         for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
 754                 nstatus = le32toh(sqtd->qtd.qtd_status);
 755                 if (nstatus & EHCI_QTD_ACTIVE)
 756                         break;
 757
 758                 status = nstatus;
 759                 /* halt is ok if descriptor is last, and complete */
 760                 if (sqtd->qtd.qtd_next == EHCI_NULL &&
 761                     EHCI_QTD_GET_BYTES(status) == 0)
 762                         status &= ~EHCI_QTD_HALTED;
 763                 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
 764                         actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
 765         }
 766
 767         cerr = EHCI_QTD_GET_CERR(status);
 768         DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, cerr=%d, "
 769             "status=0x%x\n", xfer->length, actlen, cerr, status));
 770         xfer->actlen = actlen;
 771         if ((status & EHCI_QTD_HALTED) != 0) {
 772 #ifdef EHCI_DEBUG
 773                 char sbuf[128];
 774
 775                 bitmask_snprintf(status,
 776                     "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
 777                     "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
 778
 779                 DPRINTFN(2,
 780                          ("ehci_idone: error, addr=%d, endpt=0x%02x, "
 781                           "status 0x%s\n",
 782                           xfer->pipe->device->address,
 783                           xfer->pipe->endpoint->edesc->bEndpointAddress,
 784                           sbuf));
 785                 if (ehcidebug > 2) {
 786                         ehci_dump_sqh(epipe->sqh);
 787                         ehci_dump_sqtds(ex->sqtdstart);
 788                 }
 789 #endif
 790                 if ((status & EHCI_QTD_BABBLE) == 0 && cerr > 0)
 791                         xfer->status = USBD_STALLED;
 792                 else
 793                         xfer->status = USBD_IOERROR; /* more info XXX */
 794         } else {
 795                 xfer->status = USBD_NORMAL_COMPLETION;
 796         }
 797
 798         usb_transfer_complete(xfer);
 799         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
 800 }
 801
 802 /*
 803  * Wait here until controller claims to have an interrupt.
 804  * Then call ehci_intr and return.  Use timeout to avoid waiting
 805  * too long.
 806  */
 807 void
 808 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
 809 {
 810         int timo = xfer->timeout;
 811         int usecs;
 812
 813         xfer->status = USBD_IN_PROGRESS;
 814         for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
 815                 usb_delay_ms(&sc->sc_bus, 1);
 816                 if (sc->sc_dying)
 817                         break;
 818                 ehci_intr1(sc);
 819                 if (xfer->status != USBD_IN_PROGRESS)
 820                         return;
 821         }
 822
 823         /* Timeout */
 824         DPRINTF(("ehci_waitintr: timeout\n"));
 825         xfer->status = USBD_TIMEOUT;
 826         usb_transfer_complete(xfer);
 827         /* XXX should free TD */
 828 }
 829
 830 void
 831 ehci_poll(struct usbd_bus *bus)
 832 {
 833         ehci_softc_t *sc = (ehci_softc_t *)bus;
 834 #ifdef EHCI_DEBUG
 835         static int last;
 836         int new;
 837         new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 838         if (new != last) {
 839                 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
 840                 last = new;
 841         }
 842 #endif
 843         crit_enter();
 844         ehci_intr1(sc);
 845         ehci_softintr(sc);
 846         crit_exit();
 847 }
 848
 849 int
 850 ehci_detach(struct ehci_softc *sc, int flags)
 851 {
 852         int rv = 0;
 853
 854         crit_enter();
 855         sc->sc_dying = 1;
 856         callout_stop(&sc->sc_tmo_intrlist);
 857         EOWRITE4(sc, EHCI_USBINTR, 0);
 858         EOWRITE4(sc, EHCI_USBCMD, 0);
 859         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 860         crit_exit();
 861
 862         usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
 863
 864         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 865         /* XXX free other data structures XXX */
 866
 867         return (rv);
 868 }
 869
 870 /*
 871  * Handle suspend/resume.
 872  *
 873  * We need to switch to polling mode here, because this routine is
 874  * called from an interrupt context.  This is all right since we
 875  * are almost suspended anyway.
 876  */
 877 void
 878 ehci_power(int why, void *v)
 879 {
 880         ehci_softc_t *sc = v;
 881         u_int32_t cmd, hcr;
 882         int i;
 883
 884 #ifdef EHCI_DEBUG
 885         DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
 886         if (ehcidebug > 0)
 887                 ehci_dump_regs(sc);
 888 #endif
 889
 890         crit_enter();
 891
 892         switch (why) {
 893         case PWR_SUSPEND:
 894                 sc->sc_bus.use_polling++;
 895
 896                 for (i = 1; i <= sc->sc_noport; i++) {
 897                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
 898                         if ((cmd & EHCI_PS_PO) == 0 &&
 899                             (cmd & EHCI_PS_PE) == EHCI_PS_PE)
 900                                 EOWRITE4(sc, EHCI_PORTSC(i),
 901                                     cmd | EHCI_PS_SUSP);
 902                 }
 903
 904                 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
 905
 906                 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
 907                 EOWRITE4(sc, EHCI_USBCMD, cmd);
 908
 909                 for (i = 0; i < 100; i++) {
 910                         hcr = EOREAD4(sc, EHCI_USBSTS) &
 911                             (EHCI_STS_ASS | EHCI_STS_PSS);
 912                         if (hcr == 0)
 913                                 break;
 914
 915                         usb_delay_ms(&sc->sc_bus, 1);
 916                 }
 917                 if (hcr != 0) {
 918                         device_printf(sc->sc_bus.bdev, "reset timeout\n");
 919                 }
 920
 921                 cmd &= ~EHCI_CMD_RS;
 922                 EOWRITE4(sc, EHCI_USBCMD, cmd);
 923
 924                 for (i = 0; i < 100; i++) {
 925                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 926                         if (hcr == EHCI_STS_HCH)
 927                                 break;
 928
 929                         usb_delay_ms(&sc->sc_bus, 1);
 930                 }
 931                 if (hcr != EHCI_STS_HCH) {
 932                         device_printf(sc->sc_bus.bdev, "config timeout\n");
 933                 }
 934
 935                 sc->sc_bus.use_polling--;
 936                 break;
 937
 938         case PWR_RESUME:
 939                 sc->sc_bus.use_polling++;
 940
 941                 /* restore things in case the bios sucks */
 942                 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 943                 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 944                 EOWRITE4(sc, EHCI_ASYNCLISTADDR,
 945                     sc->sc_async_head->physaddr | EHCI_LINK_QH);
 946                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 947
 948                 hcr = 0;
 949                 for (i = 1; i <= sc->sc_noport; i++) {
 950                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
 951                         if ((cmd & EHCI_PS_PO) == 0 &&
 952                             (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
 953                                 EOWRITE4(sc, EHCI_PORTSC(i),
 954                                     cmd | EHCI_PS_FPR);
 955                                 hcr = 1;
 956                         }
 957                 }
 958
 959                 if (hcr) {
 960                         usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
 961
 962                         for (i = 1; i <= sc->sc_noport; i++) {
 963                                 cmd = EOREAD4(sc, EHCI_PORTSC(i));
 964                                 if ((cmd & EHCI_PS_PO) == 0 &&
 965                                     (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
 966                                         EOWRITE4(sc, EHCI_PORTSC(i),
 967                                             cmd & ~EHCI_PS_FPR);
 968                         }
 969                 }
 970
 971                 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
 972
 973                 for (i = 0; i < 100; i++) {
 974                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 975                         if (hcr != EHCI_STS_HCH)
 976                                 break;
 977
 978                         usb_delay_ms(&sc->sc_bus, 1);
 979                 }
 980                 if (hcr == EHCI_STS_HCH) {
 981                         device_printf(sc->sc_bus.bdev, "config timeout\n");
 982                 }
 983
 984                 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
 985
 986                 sc->sc_bus.use_polling--;
 987                 break;
 988         }
 989         crit_exit();
 990
 991 #ifdef EHCI_DEBUG
 992         DPRINTF(("ehci_power: sc=%p\n", sc));
 993         if (ehcidebug > 0)
 994                 ehci_dump_regs(sc);
 995 #endif
 996 }
 997
 998 /*
 999  * Shut down the controller when the system is going down.
1000  */
1001 void
1002 ehci_shutdown(void *v)
1003 {
1004         ehci_softc_t *sc = v;
1005
1006         DPRINTF(("ehci_shutdown: stopping the HC\n"));
1007         crit_enter();
1008         sc->sc_dying = 1;
1009         callout_stop(&sc->sc_tmo_intrlist);
1010         EOWRITE4(sc, EHCI_USBINTR, 0);
1011         EOWRITE4(sc, EHCI_USBCMD, 0);
1012         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
1013         crit_exit();
1014 }
1015
1016 usbd_status
1017 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1018 {
1019         usbd_status err;
1020
1021         err = usb_allocmem(bus, size, 0, dma);
1022 #ifdef EHCI_DEBUG
1023         if (err)
1024                 kprintf("ehci_allocm: usb_allocmem()=%d\n", err);
1025 #endif
1026         return (err);
1027 }
1028
1029 void
1030 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1031 {
1032         usb_freemem(bus, dma);
1033 }
1034
1035 usbd_xfer_handle
1036 ehci_allocx(struct usbd_bus *bus)
1037 {
1038         struct ehci_softc *sc = (struct ehci_softc *)bus;
1039         usbd_xfer_handle xfer;
1040
1041         xfer = STAILQ_FIRST(&sc->sc_free_xfers);
1042         if (xfer != NULL) {
1043                 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1044 #ifdef DIAGNOSTIC
1045                 if (xfer->busy_free != XFER_FREE) {
1046                         kprintf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1047                                xfer->busy_free);
1048                 }
1049 #endif
1050         } else {
1051                 xfer = kmalloc(sizeof(struct ehci_xfer), M_USB, M_INTWAIT);
1052         }
1053         if (xfer != NULL) {
1054                 memset(xfer, 0, sizeof(struct ehci_xfer));
1055                 usb_init_task(&EXFER(xfer)->abort_task, ehci_timeout_task,
1056                     xfer);
1057                 EXFER(xfer)->ehci_xfer_flags = 0;
1058 #ifdef DIAGNOSTIC
1059                 EXFER(xfer)->isdone = 1;
1060                 xfer->busy_free = XFER_BUSY;
1061 #endif
1062         }
1063         return (xfer);
1064 }
1065
1066 void
1067 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1068 {
1069         struct ehci_softc *sc = (struct ehci_softc *)bus;
1070
1071 #ifdef DIAGNOSTIC
1072         if (xfer->busy_free != XFER_BUSY) {
1073                 kprintf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1074                        xfer->busy_free);
1075                 return;
1076         }
1077         xfer->busy_free = XFER_FREE;
1078         if (!EXFER(xfer)->isdone) {
1079                 kprintf("ehci_freex: !isdone\n");
1080                 return;
1081         }
1082 #endif
1083         STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1084 }
1085
1086 static void
1087 ehci_device_clear_toggle(usbd_pipe_handle pipe)
1088 {
1089         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1090
1091         DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1092                  epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1093 #ifdef USB_DEBUG
1094         if (ehcidebug)
1095                 usbd_dump_pipe(pipe);
1096 #endif
1097         KASSERT((epipe->sqh->qh.qh_qtd.qtd_status &
1098             htole32(EHCI_QTD_ACTIVE)) == 0,
1099             ("ehci_device_clear_toggle: queue active"));
1100         epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE_MASK);
1101 }
1102
1103 static void
1104 ehci_noop(usbd_pipe_handle pipe)
1105 {
1106 }
1107
1108 #ifdef EHCI_DEBUG
1109 void
1110 ehci_dump_regs(ehci_softc_t *sc)
1111 {
1112         int i;
1113         kprintf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1114                EOREAD4(sc, EHCI_USBCMD),
1115                EOREAD4(sc, EHCI_USBSTS),
1116                EOREAD4(sc, EHCI_USBINTR));
1117         kprintf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1118                EOREAD4(sc, EHCI_FRINDEX),
1119                EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1120                EOREAD4(sc, EHCI_PERIODICLISTBASE),
1121                EOREAD4(sc, EHCI_ASYNCLISTADDR));
1122         for (i = 1; i <= sc->sc_noport; i++)
1123                 kprintf("port %d status=0x%08x\n", i,
1124                        EOREAD4(sc, EHCI_PORTSC(i)));
1125 }
1126
1127 /*
1128  * Unused function - this is meant to be called from a kernel
1129  * debugger.
1130  */
1131 void
1132 ehci_dump(void)
1133 {
1134         ehci_dump_regs(theehci);
1135 }
1136
1137 void
1138 ehci_dump_link(ehci_link_t link, int type)
1139 {
1140         link = le32toh(link);
1141         kprintf("0x%08x", link);
1142         if (link & EHCI_LINK_TERMINATE)
1143                 kprintf("<T>");
1144         else {
1145                 kprintf("<");
1146                 if (type) {
1147                         switch (EHCI_LINK_TYPE(link)) {
1148                         case EHCI_LINK_ITD: kprintf("ITD"); break;
1149                         case EHCI_LINK_QH: kprintf("QH"); break;
1150                         case EHCI_LINK_SITD: kprintf("SITD"); break;
1151                         case EHCI_LINK_FSTN: kprintf("FSTN"); break;
1152                         }
1153                 }
1154                 kprintf(">");
1155         }
1156 }
1157
1158 void
1159 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1160 {
1161         int i;
1162         u_int32_t stop;
1163
1164         stop = 0;
1165         for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1166                 ehci_dump_sqtd(sqtd);
1167                 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1168         }
1169         if (sqtd)
1170                 kprintf("dump aborted, too many TDs\n");
1171 }
1172
1173 void
1174 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1175 {
1176         kprintf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1177         ehci_dump_qtd(&sqtd->qtd);
1178 }
1179
1180 void
1181 ehci_dump_qtd(ehci_qtd_t *qtd)
1182 {
1183         u_int32_t s;
1184         char sbuf[128];
1185
1186         kprintf("  next="); ehci_dump_link(qtd->qtd_next, 0);
1187         kprintf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1188         kprintf("\n");
1189         s = le32toh(qtd->qtd_status);
1190         bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1191                          "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1192                          "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1193         kprintf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1194                s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1195                EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1196         kprintf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1197                EHCI_QTD_GET_PID(s), sbuf);
1198         for (s = 0; s < 5; s++)
1199                 kprintf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1200 }
1201
1202 void
1203 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1204 {
1205         ehci_qh_t *qh = &sqh->qh;
1206         u_int32_t endp, endphub;
1207
1208         kprintf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1209         kprintf("  link="); ehci_dump_link(qh->qh_link, 1); kprintf("\n");
1210         endp = le32toh(qh->qh_endp);
1211         kprintf("  endp=0x%08x\n", endp);
1212         kprintf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1213                EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1214                EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
1215                EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1216         kprintf("    mpl=0x%x ctl=%d nrl=%d\n",
1217                EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1218                EHCI_QH_GET_NRL(endp));
1219         endphub = le32toh(qh->qh_endphub);
1220         kprintf("  endphub=0x%08x\n", endphub);
1221         kprintf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1222                EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1223                EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1224                EHCI_QH_GET_MULT(endphub));
1225         kprintf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); kprintf("\n");
1226         kprintf("Overlay qTD:\n");
1227         ehci_dump_qtd(&qh->qh_qtd);
1228 }
1229
1230 #ifdef DIAGNOSTIC
1231 static void
1232 ehci_dump_exfer(struct ehci_xfer *ex)
1233 {
1234         kprintf("ehci_dump_exfer: ex=%p\n", ex);
1235 }
1236 #endif
1237 #endif
1238
1239 usbd_status
1240 ehci_open(usbd_pipe_handle pipe)
1241 {
1242         usbd_device_handle dev = pipe->device;
1243         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1244         usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1245         u_int8_t addr = dev->address;
1246         u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1247         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1248         ehci_soft_qh_t *sqh;
1249         usbd_status err;
1250         int ival, speed, naks;
1251         int hshubaddr, hshubport;
1252
1253         DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1254                      pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1255
1256         if (dev->myhsport) {
1257                 hshubaddr = dev->myhsport->parent->address;
1258                 hshubport = dev->myhsport->portno;
1259         } else {
1260                 hshubaddr = 0;
1261                 hshubport = 0;
1262         }
1263
1264         if (sc->sc_dying)
1265                 return (USBD_IOERROR);
1266
1267         if (addr == sc->sc_addr) {
1268                 switch (ed->bEndpointAddress) {
1269                 case USB_CONTROL_ENDPOINT:
1270                         pipe->methods = &ehci_root_ctrl_methods;
1271                         break;
1272                 case UE_DIR_IN | EHCI_INTR_ENDPT:
1273                         pipe->methods = &ehci_root_intr_methods;
1274                         break;
1275                 default:
1276                         return (USBD_INVAL);
1277                 }
1278                 return (USBD_NORMAL_COMPLETION);
1279         }
1280
1281         /* XXX All this stuff is only valid for async. */
1282         switch (dev->speed) {
1283         case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
1284         case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1285         case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1286         default: panic("ehci_open: bad device speed %d", dev->speed);
1287         }
1288         if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
1289                 device_printf(sc->sc_bus.bdev,
1290                     "*** WARNING: opening low/full speed device, this "
1291                     "does not work yet.\n");
1292                 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
1293                             hshubaddr, hshubport));
1294                 return USBD_INVAL;
1295         }
1296
1297         naks = 8;               /* XXX */
1298         sqh = ehci_alloc_sqh(sc);
1299         if (sqh == NULL)
1300                 goto bad0;
1301         /* qh_link filled when the QH is added */
1302         sqh->qh.qh_endp = htole32(
1303                 EHCI_QH_SET_ADDR(addr) |
1304                 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1305                 EHCI_QH_SET_EPS(speed) |
1306                 (xfertype == UE_CONTROL ? EHCI_QH_DTC : 0) |
1307                 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1308                 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1309                  EHCI_QH_CTL : 0) |
1310                 EHCI_QH_SET_NRL(naks)
1311                 );
1312         sqh->qh.qh_endphub = htole32(
1313                 EHCI_QH_SET_MULT(1) |
1314                 EHCI_QH_SET_HUBA(hshubaddr) |
1315                 EHCI_QH_SET_PORT(hshubport) |
1316                 EHCI_QH_SET_CMASK(0x1c) |
1317                 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
1318                 );
1319         sqh->qh.qh_curqtd = EHCI_NULL;
1320         /* Fill the overlay qTD */
1321         sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1322         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1323         sqh->qh.qh_qtd.qtd_status =
1324             htole32(EHCI_QTD_SET_TOGGLE(pipe->endpoint->savedtoggle));
1325
1326         epipe->sqh = sqh;
1327
1328         switch (xfertype) {
1329         case UE_CONTROL:
1330                 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1331                                    0, &epipe->u.ctl.reqdma);
1332 #ifdef EHCI_DEBUG
1333                 if (err)
1334                         kprintf("ehci_open: usb_allocmem()=%d\n", err);
1335 #endif
1336                 if (err)
1337                         goto bad1;
1338                 pipe->methods = &ehci_device_ctrl_methods;
1339                 crit_enter();
1340                 ehci_add_qh(sqh, sc->sc_async_head);
1341                 crit_exit();
1342                 break;
1343         case UE_BULK:
1344                 pipe->methods = &ehci_device_bulk_methods;
1345                 crit_enter();
1346                 ehci_add_qh(sqh, sc->sc_async_head);
1347                 crit_exit();
1348                 break;
1349         case UE_INTERRUPT:
1350                 pipe->methods = &ehci_device_intr_methods;
1351                 ival = pipe->interval;
1352                 if (ival == USBD_DEFAULT_INTERVAL)
1353                         ival = ed->bInterval;
1354                 return (ehci_device_setintr(sc, sqh, ival));
1355         case UE_ISOCHRONOUS:
1356                 pipe->methods = &ehci_device_isoc_methods;
1357                 return (USBD_INVAL);
1358         default:
1359                 return (USBD_INVAL);
1360         }
1361         return (USBD_NORMAL_COMPLETION);
1362
1363  bad1:
1364         ehci_free_sqh(sc, sqh);
1365         epipe->sqh = NULL;
1366  bad0:
1367         return (USBD_NOMEM);
1368 }
1369
1370 /*
1371  * Add an ED to the schedule.  Called while in a critical section.
1372  * If in the async schedule, it will always have a next.
1373  * If in the intr schedule it may not.
1374  */
1375 void
1376 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1377 {
1378         sqh->next = head->next;
1379         sqh->prev = head;
1380         sqh->qh.qh_link = head->qh.qh_link;
1381         head->next = sqh;
1382         if (sqh->next)
1383                 sqh->next->prev = sqh;
1384         head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1385
1386 #ifdef EHCI_DEBUG
1387         if (ehcidebug > 5) {
1388                 kprintf("ehci_add_qh:\n");
1389                 ehci_dump_sqh(sqh);
1390         }
1391 #endif
1392 }
1393
1394 /*
1395  * Remove an ED from the schedule.  Called while in a critical section.
1396  * Will always have a 'next' if it's in the async list as it's circular.
1397  */
1398 void
1399 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1400 {
1401         /* XXX */
1402         sqh->prev->qh.qh_link = sqh->qh.qh_link;
1403         sqh->prev->next = sqh->next;
1404         if (sqh->next)
1405                 sqh->next->prev = sqh->prev;
1406         ehci_sync_hc(sc);
1407 }
1408
1409 void
1410 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1411 {
1412         int i;
1413         u_int32_t status;
1414
1415         /* Save toggle bit and ping status. */
1416         status = sqh->qh.qh_qtd.qtd_status &
1417             htole32(EHCI_QTD_TOGGLE_MASK |
1418                     EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
1419         /* Set HALTED to make hw leave it alone. */
1420         sqh->qh.qh_qtd.qtd_status =
1421             htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
1422         sqh->qh.qh_curqtd = 0;
1423         sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1424         sqh->qh.qh_qtd.qtd_altnext = 0;
1425         for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
1426                 sqh->qh.qh_qtd.qtd_buffer[i] = 0;
1427         sqh->sqtd = sqtd;
1428         /* Set !HALTED && !ACTIVE to start execution, preserve some fields */
1429         sqh->qh.qh_qtd.qtd_status = status;
1430 }
1431
1432 /*
1433  * Ensure that the HC has released all references to the QH.  We do this
1434  * by asking for a Async Advance Doorbell interrupt and then we wait for
1435  * the interrupt.
1436  * To make this easier we first obtain exclusive use of the doorbell.
1437  */
1438 void
1439 ehci_sync_hc(ehci_softc_t *sc)
1440 {
1441         int error;
1442
1443         if (sc->sc_dying) {
1444                 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1445                 return;
1446         }
1447         DPRINTFN(2,("ehci_sync_hc: enter\n"));
1448         /* get doorbell */
1449         lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE);
1450         crit_enter();
1451         /* ask for doorbell */
1452         EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1453         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1454                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1455         error = tsleep(&sc->sc_async_head, 0, "ehcidi", hz); /* bell wait */
1456         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1457                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1458         crit_exit();
1459         /* release doorbell */
1460         lockmgr(&sc->sc_doorbell_lock, LK_RELEASE);
1461 #ifdef DIAGNOSTIC
1462         if (error)
1463                 kprintf("ehci_sync_hc: tsleep() = %d\n", error);
1464 #endif
1465         DPRINTFN(2,("ehci_sync_hc: exit\n"));
1466 }
1467
1468 /***********/
1469
1470 /*
1471  * Data structures and routines to emulate the root hub.
1472  */
1473 static usb_device_descriptor_t ehci_devd = {
1474         USB_DEVICE_DESCRIPTOR_SIZE,
1475         UDESC_DEVICE,           /* type */
1476         {0x00, 0x02},           /* USB version */
1477         UDCLASS_HUB,            /* class */
1478         UDSUBCLASS_HUB,         /* subclass */
1479         UDPROTO_HSHUBSTT,       /* protocol */
1480         64,                     /* max packet */
1481         {0},{0},{0x00,0x01},    /* device id */
1482         1,2,0,                  /* string indicies */
1483         1                       /* # of configurations */
1484 };
1485
1486 static usb_device_qualifier_t ehci_odevd = {
1487         USB_DEVICE_DESCRIPTOR_SIZE,
1488         UDESC_DEVICE_QUALIFIER, /* type */
1489         {0x00, 0x02},           /* USB version */
1490         UDCLASS_HUB,            /* class */
1491         UDSUBCLASS_HUB,         /* subclass */
1492         UDPROTO_FSHUB,          /* protocol */
1493         64,                     /* max packet */
1494         1,                      /* # of configurations */
1495         0
1496 };
1497
1498 static usb_config_descriptor_t ehci_confd = {
1499         USB_CONFIG_DESCRIPTOR_SIZE,
1500         UDESC_CONFIG,
1501         {USB_CONFIG_DESCRIPTOR_SIZE +
1502          USB_INTERFACE_DESCRIPTOR_SIZE +
1503          USB_ENDPOINT_DESCRIPTOR_SIZE},
1504         1,
1505         1,
1506         0,
1507         UC_SELF_POWERED,
1508         0                       /* max power */
1509 };
1510
1511 static usb_interface_descriptor_t ehci_ifcd = {
1512         USB_INTERFACE_DESCRIPTOR_SIZE,
1513         UDESC_INTERFACE,
1514         0,
1515         0,
1516         1,
1517         UICLASS_HUB,
1518         UISUBCLASS_HUB,
1519         UIPROTO_HSHUBSTT,
1520         0
1521 };
1522
1523 static usb_endpoint_descriptor_t ehci_endpd = {
1524         USB_ENDPOINT_DESCRIPTOR_SIZE,
1525         UDESC_ENDPOINT,
1526         UE_DIR_IN | EHCI_INTR_ENDPT,
1527         UE_INTERRUPT,
1528         {8, 0},                 /* max packet */
1529         255
1530 };
1531
1532 static usb_hub_descriptor_t ehci_hubd = {
1533         USB_HUB_DESCRIPTOR_SIZE,
1534         UDESC_HUB,
1535         0,
1536         {0,0},
1537         0,
1538         0,
1539         {0},
1540 };
1541
1542 static int
1543 ehci_str(usb_string_descriptor_t *p, int l, char *s)
1544 {
1545         int i;
1546
1547         if (l == 0)
1548                 return (0);
1549         p->bLength = 2 * strlen(s) + 2;
1550         if (l == 1)
1551                 return (1);
1552         p->bDescriptorType = UDESC_STRING;
1553         l -= 2;
1554         for (i = 0; s[i] && l > 1; i++, l -= 2)
1555                 USETW2(p->bString[i], 0, s[i]);
1556         return (2*i+2);
1557 }
1558
1559 /*
1560  * Simulate a hardware hub by handling all the necessary requests.
1561  */
1562 static usbd_status
1563 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1564 {
1565         usbd_status err;
1566
1567         /* Insert last in queue. */
1568         err = usb_insert_transfer(xfer);
1569         if (err)
1570                 return (err);
1571
1572         /* Pipe isn't running, start first */
1573         return (ehci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
1574 }
1575
1576 static usbd_status
1577 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1578 {
1579         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1580         usb_device_request_t *req;
1581         void *buf = NULL;
1582         int port, i;
1583         int len, value, index, l, totlen = 0;
1584         usb_port_status_t ps;
1585         usb_hub_descriptor_t hubd;
1586         usbd_status err;
1587         u_int32_t v;
1588
1589         if (sc->sc_dying)
1590                 return (USBD_IOERROR);
1591
1592 #ifdef DIAGNOSTIC
1593         if (!(xfer->rqflags & URQ_REQUEST))
1594                 /* XXX panic */
1595                 return (USBD_INVAL);
1596 #endif
1597         req = &xfer->request;
1598
1599         DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1600                     req->bmRequestType, req->bRequest));
1601
1602         len = UGETW(req->wLength);
1603         value = UGETW(req->wValue);
1604         index = UGETW(req->wIndex);
1605
1606         if (len != 0)
1607                 buf = KERNADDR(&xfer->dmabuf, 0);
1608
1609 #define C(x,y) ((x) | ((y) << 8))
1610         switch(C(req->bRequest, req->bmRequestType)) {
1611         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1612         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1613         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1614                 /*
1615                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1616                  * for the integrated root hub.
1617                  */
1618                 break;
1619         case C(UR_GET_CONFIG, UT_READ_DEVICE):
1620                 if (len > 0) {
1621                         *(u_int8_t *)buf = sc->sc_conf;
1622                         totlen = 1;
1623                 }
1624                 break;
1625         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1626                 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1627                 switch(value >> 8) {
1628                 case UDESC_DEVICE:
1629                         if ((value & 0xff) != 0) {
1630                                 err = USBD_IOERROR;
1631                                 goto ret;
1632                         }
1633                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1634                         USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1635                         memcpy(buf, &ehci_devd, l);
1636                         break;
1637                 /*
1638                  * We can't really operate at another speed, but the spec says
1639                  * we need this descriptor.
1640                  */
1641                 case UDESC_DEVICE_QUALIFIER:
1642                         if ((value & 0xff) != 0) {
1643                                 err = USBD_IOERROR;
1644                                 goto ret;
1645                         }
1646                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1647                         memcpy(buf, &ehci_odevd, l);
1648                         break;
1649                 /*
1650                  * We can't really operate at another speed, but the spec says
1651                  * we need this descriptor.
1652                  */
1653                 case UDESC_OTHER_SPEED_CONFIGURATION:
1654                 case UDESC_CONFIG:
1655                         if ((value & 0xff) != 0) {
1656                                 err = USBD_IOERROR;
1657                                 goto ret;
1658                         }
1659                         totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1660                         memcpy(buf, &ehci_confd, l);
1661                         ((usb_config_descriptor_t *)buf)->bDescriptorType =
1662                                 value >> 8;
1663                         buf = (char *)buf + l;
1664                         len -= l;
1665                         l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1666                         totlen += l;
1667                         memcpy(buf, &ehci_ifcd, l);
1668                         buf = (char *)buf + l;
1669                         len -= l;
1670                         l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1671                         totlen += l;
1672                         memcpy(buf, &ehci_endpd, l);
1673                         break;
1674                 case UDESC_STRING:
1675                         if (len == 0)
1676                                 break;
1677                         *(u_int8_t *)buf = 0;
1678                         totlen = 1;
1679                         switch (value & 0xff) {
1680                         case 0: /* Language table */
1681                                 totlen = ehci_str(buf, len, "\001");
1682                                 break;
1683                         case 1: /* Vendor */
1684                                 totlen = ehci_str(buf, len, sc->sc_vendor);
1685                                 break;
1686                         case 2: /* Product */
1687                                 totlen = ehci_str(buf, len, "EHCI root hub");
1688                                 break;
1689                         }
1690                         break;
1691                 default:
1692                         err = USBD_IOERROR;
1693                         goto ret;
1694                 }
1695                 break;
1696         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1697                 if (len > 0) {
1698                         *(u_int8_t *)buf = 0;
1699                         totlen = 1;
1700                 }
1701                 break;
1702         case C(UR_GET_STATUS, UT_READ_DEVICE):
1703                 if (len > 1) {
1704                         USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1705                         totlen = 2;
1706                 }
1707                 break;
1708         case C(UR_GET_STATUS, UT_READ_INTERFACE):
1709         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1710                 if (len > 1) {
1711                         USETW(((usb_status_t *)buf)->wStatus, 0);
1712                         totlen = 2;
1713                 }
1714                 break;
1715         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1716                 if (value >= USB_MAX_DEVICES) {
1717                         err = USBD_IOERROR;
1718                         goto ret;
1719                 }
1720                 sc->sc_addr = value;
1721                 break;
1722         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1723                 if (value != 0 && value != 1) {
1724                         err = USBD_IOERROR;
1725                         goto ret;
1726                 }
1727                 sc->sc_conf = value;
1728                 break;
1729         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1730                 break;
1731         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1732         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1733         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1734                 err = USBD_IOERROR;
1735                 goto ret;
1736         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1737                 break;
1738         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1739                 break;
1740         /* Hub requests */
1741         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1742                 break;
1743         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1744                 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
1745                              "port=%d feature=%d\n",
1746                              index, value));
1747                 if (index < 1 || index > sc->sc_noport) {
1748                         err = USBD_IOERROR;
1749                         goto ret;
1750                 }
1751                 port = EHCI_PORTSC(index);
1752                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1753                 switch(value) {
1754                 case UHF_PORT_ENABLE:
1755                         EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1756                         break;
1757                 case UHF_PORT_SUSPEND:
1758                         EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1759                         break;
1760                 case UHF_PORT_POWER:
1761                         EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1762                         break;
1763                 case UHF_PORT_TEST:
1764                         DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
1765                                     "%d\n", index));
1766                         break;
1767                 case UHF_PORT_INDICATOR:
1768                         DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
1769                                     "%d\n", index));
1770                         EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1771                         break;
1772                 case UHF_C_PORT_CONNECTION:
1773                         EOWRITE4(sc, port, v | EHCI_PS_CSC);
1774                         break;
1775                 case UHF_C_PORT_ENABLE:
1776                         EOWRITE4(sc, port, v | EHCI_PS_PEC);
1777                         break;
1778                 case UHF_C_PORT_SUSPEND:
1779                         /* how? */
1780                         break;
1781                 case UHF_C_PORT_OVER_CURRENT:
1782                         EOWRITE4(sc, port, v | EHCI_PS_OCC);
1783                         break;
1784                 case UHF_C_PORT_RESET:
1785                         sc->sc_isreset = 0;
1786                         break;
1787                 default:
1788                         err = USBD_IOERROR;
1789                         goto ret;
1790                 }
1791                 break;
1792         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1793                 if ((value & 0xff) != 0) {
1794                         err = USBD_IOERROR;
1795                         goto ret;
1796                 }
1797                 hubd = ehci_hubd;
1798                 hubd.bNbrPorts = sc->sc_noport;
1799                 v = EOREAD4(sc, EHCI_HCSPARAMS);
1800                 USETW(hubd.wHubCharacteristics,
1801                     EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1802                     EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1803                         ? UHD_PORT_IND : 0);
1804                 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1805                 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1806                         hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1807                 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1808                 l = min(len, hubd.bDescLength);
1809                 totlen = l;
1810                 memcpy(buf, &hubd, l);
1811                 break;
1812         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1813                 if (len != 4) {
1814                         err = USBD_IOERROR;
1815                         goto ret;
1816                 }
1817                 memset(buf, 0, len); /* ? XXX */
1818                 totlen = len;
1819                 break;
1820         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1821                 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
1822                             index));
1823                 if (index < 1 || index > sc->sc_noport) {
1824                         err = USBD_IOERROR;
1825                         goto ret;
1826                 }
1827                 if (len != 4) {
1828                         err = USBD_IOERROR;
1829                         goto ret;
1830                 }
1831                 v = EOREAD4(sc, EHCI_PORTSC(index));
1832                 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", v));
1833                 i = UPS_HIGH_SPEED;
1834                 if (v & EHCI_PS_CS)     i |= UPS_CURRENT_CONNECT_STATUS;
1835                 if (v & EHCI_PS_PE)     i |= UPS_PORT_ENABLED;
1836                 if (v & EHCI_PS_SUSP)   i |= UPS_SUSPEND;
1837                 if (v & EHCI_PS_OCA)    i |= UPS_OVERCURRENT_INDICATOR;
1838                 if (v & EHCI_PS_PR)     i |= UPS_RESET;
1839                 if (v & EHCI_PS_PP)     i |= UPS_PORT_POWER;
1840                 USETW(ps.wPortStatus, i);
1841                 i = 0;
1842                 if (v & EHCI_PS_CSC)    i |= UPS_C_CONNECT_STATUS;
1843                 if (v & EHCI_PS_PEC)    i |= UPS_C_PORT_ENABLED;
1844                 if (v & EHCI_PS_OCC)    i |= UPS_C_OVERCURRENT_INDICATOR;
1845                 if (sc->sc_isreset)     i |= UPS_C_PORT_RESET;
1846                 USETW(ps.wPortChange, i);
1847                 l = min(len, sizeof ps);
1848                 memcpy(buf, &ps, l);
1849                 totlen = l;
1850                 break;
1851         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1852                 err = USBD_IOERROR;
1853                 goto ret;
1854         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1855                 break;
1856         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1857                 if (index < 1 || index > sc->sc_noport) {
1858                         err = USBD_IOERROR;
1859                         goto ret;
1860                 }
1861                 port = EHCI_PORTSC(index);
1862                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1863                 switch(value) {
1864                 case UHF_PORT_ENABLE:
1865                         EOWRITE4(sc, port, v | EHCI_PS_PE);
1866                         break;
1867                 case UHF_PORT_SUSPEND:
1868                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1869                         break;
1870                 case UHF_PORT_RESET:
1871                         DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
1872                                     index));
1873                         if (EHCI_PS_IS_LOWSPEED(v)) {
1874                                 /* Low speed device, give up ownership. */
1875                                 ehci_disown(sc, index, 1);
1876                                 break;
1877                         }
1878                         /* Start reset sequence. */
1879                         v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1880                         EOWRITE4(sc, port, v | EHCI_PS_PR);
1881                         /* Wait for reset to complete. */
1882                         usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1883                         if (sc->sc_dying) {
1884                                 err = USBD_IOERROR;
1885                                 goto ret;
1886                         }
1887                         /* Terminate reset sequence. */
1888                         EOWRITE4(sc, port, v);
1889                         /* Wait for HC to complete reset. */
1890                         usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1891                         if (sc->sc_dying) {
1892                                 err = USBD_IOERROR;
1893                                 goto ret;
1894                         }
1895                         v = EOREAD4(sc, port);
1896                         DPRINTF(("ehci after reset, status=0x%08x\n", v));
1897                         if (v & EHCI_PS_PR) {
1898                                 device_printf(sc->sc_bus.bdev,
1899                                     "port reset timeout\n");
1900                                 return (USBD_TIMEOUT);
1901                         }
1902                         if (!(v & EHCI_PS_PE)) {
1903                                 /* Not a high speed device, give up ownership.*/
1904                                 ehci_disown(sc, index, 0);
1905                                 break;
1906                         }
1907                         sc->sc_isreset = 1;
1908                         DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1909                                  index, v));
1910                         break;
1911                 case UHF_PORT_POWER:
1912                         DPRINTFN(2,("ehci_root_ctrl_start: set port power "
1913                                     "%d\n", index));
1914                         EOWRITE4(sc, port, v | EHCI_PS_PP);
1915                         break;
1916                 case UHF_PORT_TEST:
1917                         DPRINTFN(2,("ehci_root_ctrl_start: set port test "
1918                                     "%d\n", index));
1919                         break;
1920                 case UHF_PORT_INDICATOR:
1921                         DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
1922                                     "%d\n", index));
1923                         EOWRITE4(sc, port, v | EHCI_PS_PIC);
1924                         break;
1925                 default:
1926                         err = USBD_IOERROR;
1927                         goto ret;
1928                 }
1929                 break;
1930         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1931         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1932         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1933         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1934                 break;
1935         default:
1936                 err = USBD_IOERROR;
1937                 goto ret;
1938         }
1939         xfer->actlen = totlen;
1940         err = USBD_NORMAL_COMPLETION;
1941  ret:
1942         xfer->status = err;
1943         crit_enter();
1944         usb_transfer_complete(xfer);
1945         crit_exit();
1946         return (USBD_IN_PROGRESS);
1947 }
1948
1949 void
1950 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1951 {
1952         int port;
1953         u_int32_t v;
1954
1955         DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1956 #ifdef DIAGNOSTIC
1957         if (sc->sc_npcomp != 0) {
1958                 int i = (index-1) / sc->sc_npcomp;
1959                 if (i >= sc->sc_ncomp)
1960                         device_printf(sc->sc_bus.bdev, "strange port\n");
1961                 else
1962                         device_printf(sc->sc_bus.bdev,
1963                             "handing over %s speed device on port %d to %s\n",
1964                             (lowspeed ? "low" : "full"),
1965                             index, device_get_nameunit(sc->sc_comps[i]->bdev));
1966         } else {
1967                 device_printf(sc->sc_bus.bdev, "npcomp == 0\n");
1968         }
1969 #endif
1970         port = EHCI_PORTSC(index);
1971         v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1972         EOWRITE4(sc, port, v | EHCI_PS_PO);
1973 }
1974
1975 /* Abort a root control request. */
1976 static void
1977 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1978 {
1979         /* Nothing to do, all transfers are synchronous. */
1980 }
1981
1982 /* Close the root pipe. */
1983 static void
1984 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1985 {
1986         DPRINTF(("ehci_root_ctrl_close\n"));
1987         /* Nothing to do. */
1988 }
1989
1990 void
1991 ehci_root_intr_done(usbd_xfer_handle xfer)
1992 {
1993 }
1994
1995 static usbd_status
1996 ehci_root_intr_transfer(usbd_xfer_handle xfer)
1997 {
1998         usbd_status err;
1999
2000         /* Insert last in queue. */
2001         err = usb_insert_transfer(xfer);
2002         if (err)
2003                 return (err);
2004
2005         /* Pipe isn't running, start first */
2006         return (ehci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2007 }
2008
2009 static usbd_status
2010 ehci_root_intr_start(usbd_xfer_handle xfer)
2011 {
2012         usbd_pipe_handle pipe = xfer->pipe;
2013         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2014
2015         if (sc->sc_dying)
2016                 return (USBD_IOERROR);
2017
2018         sc->sc_intrxfer = xfer;
2019
2020         return (USBD_IN_PROGRESS);
2021 }
2022
2023 /* Abort a root interrupt request. */
2024 static void
2025 ehci_root_intr_abort(usbd_xfer_handle xfer)
2026 {
2027         if (xfer->pipe->intrxfer == xfer) {
2028                 DPRINTF(("ehci_root_intr_abort: remove\n"));
2029                 xfer->pipe->intrxfer = NULL;
2030         }
2031         xfer->status = USBD_CANCELLED;
2032         crit_enter();
2033         usb_transfer_complete(xfer);
2034         crit_exit();
2035 }
2036
2037 /* Close the root pipe. */
2038 static void
2039 ehci_root_intr_close(usbd_pipe_handle pipe)
2040 {
2041         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2042
2043         DPRINTF(("ehci_root_intr_close\n"));
2044
2045         sc->sc_intrxfer = NULL;
2046 }
2047
2048 void
2049 ehci_root_ctrl_done(usbd_xfer_handle xfer)
2050 {
2051 }
2052
2053 /************************/
2054
2055 ehci_soft_qh_t *
2056 ehci_alloc_sqh(ehci_softc_t *sc)
2057 {
2058         ehci_soft_qh_t *sqh;
2059         usbd_status err;
2060         int i, offs;
2061         usb_dma_t dma;
2062
2063         if (sc->sc_freeqhs == NULL) {
2064                 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2065                 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2066                           EHCI_PAGE_SIZE, &dma);
2067 #ifdef EHCI_DEBUG
2068                 if (err)
2069                         kprintf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2070 #endif
2071                 if (err)
2072                         return (NULL);
2073                 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2074                         offs = i * EHCI_SQH_SIZE;
2075                         sqh = KERNADDR(&dma, offs);
2076                         sqh->physaddr = DMAADDR(&dma, offs);
2077                         sqh->next = sc->sc_freeqhs;
2078                         sc->sc_freeqhs = sqh;
2079                 }
2080         }
2081         sqh = sc->sc_freeqhs;
2082         sc->sc_freeqhs = sqh->next;
2083         memset(&sqh->qh, 0, sizeof(ehci_qh_t));
2084         sqh->next = NULL;
2085         sqh->prev = NULL;
2086         return (sqh);
2087 }
2088
2089 void
2090 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2091 {
2092         sqh->next = sc->sc_freeqhs;
2093         sc->sc_freeqhs = sqh;
2094 }
2095
2096 ehci_soft_qtd_t *
2097 ehci_alloc_sqtd(ehci_softc_t *sc)
2098 {
2099         ehci_soft_qtd_t *sqtd;
2100         usbd_status err;
2101         int i, offs;
2102         usb_dma_t dma;
2103
2104         if (sc->sc_freeqtds == NULL) {
2105                 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2106                 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2107                           EHCI_PAGE_SIZE, &dma);
2108 #ifdef EHCI_DEBUG
2109                 if (err)
2110                         kprintf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2111 #endif
2112                 if (err)
2113                         return (NULL);
2114                 crit_enter();
2115                 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2116                         offs = i * EHCI_SQTD_SIZE;
2117                         sqtd = KERNADDR(&dma, offs);
2118                         sqtd->physaddr = DMAADDR(&dma, offs);
2119                         sqtd->nextqtd = sc->sc_freeqtds;
2120                         sc->sc_freeqtds = sqtd;
2121                 }
2122                 crit_exit();
2123         }
2124
2125         crit_enter();
2126         sqtd = sc->sc_freeqtds;
2127         sc->sc_freeqtds = sqtd->nextqtd;
2128         memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2129         sqtd->nextqtd = NULL;
2130         sqtd->xfer = NULL;
2131         crit_exit();
2132
2133         return (sqtd);
2134 }
2135
2136 void
2137 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2138 {
2139         crit_enter();
2140         sqtd->nextqtd = sc->sc_freeqtds;
2141         sc->sc_freeqtds = sqtd;
2142         crit_exit();
2143 }
2144
2145 usbd_status
2146 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2147                      int alen, int rd, usbd_xfer_handle xfer,
2148                      ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2149 {
2150         ehci_soft_qtd_t *next, *cur;
2151         ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2152         u_int32_t qtdstatus;
2153         int len, curlen, mps, offset;
2154         int i, iscontrol;
2155         usb_dma_t *dma = &xfer->dmabuf;
2156
2157         DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2158
2159         offset = 0;
2160         len = alen;
2161         iscontrol = (epipe->pipe.endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
2162             UE_CONTROL;
2163         dataphys = DMAADDR(dma, 0);
2164         dataphyslastpage = EHCI_PAGE(DMAADDR(dma, len - 1));
2165         qtdstatus = EHCI_QTD_ACTIVE |
2166             EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2167             EHCI_QTD_SET_CERR(3)
2168             /* IOC set below */
2169             /* BYTES set below */
2170             ;
2171         mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2172         /*
2173          * The control transfer data stage always starts with a toggle of 1.
2174          * For other transfers we let the hardware track the toggle state.
2175          */
2176         if (iscontrol)
2177                 qtdstatus |= EHCI_QTD_SET_TOGGLE(1);
2178
2179         cur = ehci_alloc_sqtd(sc);
2180         *sp = cur;
2181         if (cur == NULL)
2182                 goto nomem;
2183         for (;;) {
2184                 dataphyspage = EHCI_PAGE(dataphys);
2185                 /* XXX This is pretty broken: Because we do not allocate
2186                  * a contiguous buffer (contiguous in physical pages) we
2187                  * can only transfer one page in one go.
2188                  * So check whether the start and end of the buffer are on
2189                  * the same page.
2190                  */
2191                 if (dataphyspage == dataphyslastpage) {
2192                         curlen = len;
2193                 }
2194                 else {
2195                         /* See comment above (XXX) */
2196                         curlen = EHCI_PAGE_SIZE -
2197                                  EHCI_PAGE_MASK(dataphys);
2198                         /* the length must be a multiple of the max size */
2199                         curlen -= curlen % mps;
2200                         DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2201                                     "curlen=%d\n", curlen));
2202                         KASSERT(curlen != 0, ("ehci_alloc_std: curlen == 0"));
2203                 }
2204                 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2205                             "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2206                             dataphys, dataphyslastpage,
2207                             len, curlen));
2208                 len -= curlen;
2209
2210                 if (len != 0) {
2211                         next = ehci_alloc_sqtd(sc);
2212                         if (next == NULL)
2213                                 goto nomem;
2214                         nextphys = htole32(next->physaddr);
2215                 } else {
2216                         next = NULL;
2217                         nextphys = EHCI_NULL;
2218                 }
2219
2220                 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2221                         ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2222                         if (i != 0) /* use offset only in first buffer */
2223                                 a = EHCI_PAGE(a);
2224                         cur->qtd.qtd_buffer[i] = htole32(a);
2225                         cur->qtd.qtd_buffer_hi[i] = 0;
2226 #ifdef DIAGNOSTIC
2227                         if (i >= EHCI_QTD_NBUFFERS) {
2228                                 kprintf("ehci_alloc_sqtd_chain: i=%d\n", i);
2229                                 goto nomem;
2230                         }
2231 #endif
2232                 }
2233                 cur->nextqtd = next;
2234                 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
2235                 cur->qtd.qtd_status =
2236                     htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
2237                 cur->xfer = xfer;
2238                 cur->len = curlen;
2239                 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2240                             dataphys, dataphys + curlen));
2241                 if (iscontrol) {
2242                         /*
2243                          * adjust the toggle based on the number of packets
2244                          * in this qtd
2245                          */
2246                         if (((curlen + mps - 1) / mps) & 1)
2247                                 qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
2248                 }
2249                 if (len == 0)
2250                         break;
2251                 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2252                 offset += curlen;
2253                 dataphys = DMAADDR(dma, offset);
2254                 cur = next;
2255         }
2256         cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2257         *ep = cur;
2258
2259         DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2260                      *sp, *ep));
2261
2262         return (USBD_NORMAL_COMPLETION);
2263
2264  nomem:
2265         /* XXX free chain */
2266         DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2267         return (USBD_NOMEM);
2268 }
2269
2270 static void
2271 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2272                     ehci_soft_qtd_t *sqtdend)
2273 {
2274         ehci_soft_qtd_t *p;
2275         int i;
2276
2277         DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2278                      sqtd, sqtdend));
2279
2280         for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2281                 p = sqtd->nextqtd;
2282                 ehci_free_sqtd(sc, sqtd);
2283         }
2284 }
2285
2286 /****************/
2287
2288 /*
2289  * Close a reqular pipe.
2290  * Assumes that there are no pending transactions.
2291  */
2292 void
2293 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2294 {
2295         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2296         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2297         ehci_soft_qh_t *sqh = epipe->sqh;
2298
2299         crit_enter();
2300         ehci_rem_qh(sc, sqh, head);
2301         crit_exit();
2302         pipe->endpoint->savedtoggle =
2303             EHCI_QTD_GET_TOGGLE(le32toh(sqh->qh.qh_qtd.qtd_status));
2304         ehci_free_sqh(sc, epipe->sqh);
2305         epipe->sqh = NULL;
2306 }
2307
2308 /*
2309  * Abort a device request.
2310  * If this routine is called from a critical section it guarantees that the
2311  * request will be removed from the hardware scheduling and that the callback
2312  * for it will be called with USBD_CANCELLED status.
2313  * It's impossible to guarantee that the requested transfer will not
2314  * have happened since the hardware runs concurrently.
2315  * If the transaction has already happened we rely on the ordinary
2316  * interrupt processing to process it.
2317  * XXX This is most probably wrong.
2318  */
2319 void
2320 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2321 {
2322 #define exfer EXFER(xfer)
2323         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2324         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2325         ehci_soft_qh_t *sqh = epipe->sqh;
2326         ehci_soft_qtd_t *sqtd, *snext, **psqtd;
2327         ehci_physaddr_t cur, us, next;
2328         int hit;
2329         /* int count = 0; */
2330         ehci_soft_qh_t *psqh;
2331
2332         DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2333
2334         if (sc->sc_dying) {
2335                 /* If we're dying, just do the software part. */
2336                 crit_enter();
2337                 xfer->status = status;  /* make software ignore it */
2338                 callout_stop(&xfer->timeout_handle);
2339                 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2340                 usb_transfer_complete(xfer);
2341                 crit_exit();
2342                 return;
2343         }
2344
2345 #if 0
2346         if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2347                 panic("ehci_abort_xfer: not in process context");
2348 #endif
2349
2350         /*
2351          * If an abort is already in progress then just wait for it to
2352          * complete and return.
2353          */
2354         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
2355                 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
2356                 /* No need to wait if we're aborting from a timeout. */
2357                 if (status == USBD_TIMEOUT)
2358                         return;
2359                 /* Override the status which might be USBD_TIMEOUT. */
2360                 xfer->status = status;
2361                 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
2362                 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
2363                 while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
2364                         tsleep(&exfer->ehci_xfer_flags, 0, "ehciaw", 0);
2365                 return;
2366         }
2367
2368         /*
2369          * Step 1: Make interrupt routine and timeouts ignore xfer.
2370          */
2371         crit_enter();
2372         exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
2373         xfer->status = status;  /* make software ignore it */
2374         callout_stop(&xfer->timeout_handle);
2375         usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2376         crit_exit();
2377
2378         /*
2379          * Step 2: Wait until we know hardware has finished any possible
2380          * use of the xfer. We do this by removing the entire
2381          * queue from the async schedule and waiting for the doorbell.
2382          * Nothing else should be touching the queue now.
2383          */
2384         psqh = sqh->prev;
2385         ehci_rem_qh(sc, sqh, psqh);
2386
2387         /*
2388          * Step 3:  make sure the soft interrupt routine
2389          * has run. This should remove any completed items off the queue.
2390          * The hardware has no reference to completed items (TDs).
2391          * It's safe to remove them at any time.
2392          */
2393         crit_enter();
2394 #ifdef USB_USE_SOFTINTR
2395         sc->sc_softwake = 1;
2396 #endif /* USB_USE_SOFTINTR */
2397         usb_schedsoftintr(&sc->sc_bus);
2398 #ifdef USB_USE_SOFTINTR
2399         tsleep(&sc->sc_softwake, 0, "ehciab", 0);
2400 #endif /* USB_USE_SOFTINTR */
2401
2402         /*
2403          * Step 4: Remove any vestiges of the xfer from the hardware.
2404          * The complication here is that the hardware may have executed
2405          * into or even beyond the xfer we're trying to abort.
2406          * So as we're scanning the TDs of this xfer we check if
2407          * the hardware points to any of them.
2408          *
2409          * first we need to see if there are any transfers
2410          * on this queue before the xfer we are aborting.. we need
2411          * to update any pointers that point to us to point past
2412          * the aborting xfer.  (If there is something past us).
2413          * Hardware and software.
2414          */
2415         cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2416         hit = 0;
2417
2418         /* If they initially point here. */
2419         us = exfer->sqtdstart->physaddr;
2420
2421         /* We will change them to point here */
2422         snext = exfer->sqtdend->nextqtd;
2423         next = snext ? htole32(snext->physaddr) : EHCI_NULL;
2424
2425         /*
2426          * Now loop through any qTDs before us and keep track of the pointer
2427          * that points to us for the end.
2428          */
2429         psqtd = &sqh->sqtd;
2430         sqtd = sqh->sqtd;
2431         while (sqtd && sqtd != exfer->sqtdstart) {
2432                 hit |= (cur == sqtd->physaddr);
2433                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_next)) == us)
2434                         sqtd->qtd.qtd_next = next;
2435                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_altnext)) == us)
2436                         sqtd->qtd.qtd_altnext = next;
2437                 psqtd = &sqtd->nextqtd;
2438                 sqtd = sqtd->nextqtd;
2439         }
2440                 /* make the software pointer bypass us too */
2441         *psqtd = exfer->sqtdend->nextqtd;
2442
2443         /*
2444          * If we already saw the active one then we are pretty much done.
2445          * We've done all the relinking we need to do.
2446          */
2447         if (!hit) {
2448
2449                 /*
2450                  * Now reinitialise the QH to point to the next qTD
2451                  * (if there is one). We only need to do this if
2452                  * it was previously pointing to us.
2453                  */
2454                 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2455                         if (cur == sqtd->physaddr) {
2456                                 hit++;
2457                         }
2458                         if (sqtd == exfer->sqtdend)
2459                                 break;
2460                 }
2461                 sqtd = sqtd->nextqtd;
2462                 /*
2463                  * Only need to alter the QH if it was pointing at a qTD
2464                  * that we are removing.
2465                  */
2466                 if (hit) {
2467                         if (snext) {
2468                                 ehci_set_qh_qtd(sqh, snext);
2469                         } else {
2470
2471                                 sqh->qh.qh_curqtd = 0; /* unlink qTDs */
2472                                 sqh->qh.qh_qtd.qtd_status &=
2473                                     htole32(EHCI_QTD_TOGGLE_MASK);
2474                                 sqh->qh.qh_qtd.qtd_next =
2475                                     sqh->qh.qh_qtd.qtd_altnext
2476                                         = EHCI_NULL;
2477                                 DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2478                         }
2479                 }
2480         }
2481         ehci_add_qh(sqh, psqh);
2482         /*
2483          * Step 5: Execute callback.
2484          */
2485 #ifdef DIAGNOSTIC
2486         exfer->isdone = 1;
2487 #endif
2488         /* Do the wakeup first to avoid touching the xfer after the callback. */
2489         exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
2490         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
2491                 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
2492                 wakeup(&exfer->ehci_xfer_flags);
2493         }
2494         usb_transfer_complete(xfer);
2495
2496         /* kprintf("%s: %d TDs aborted\n", __func__, count); */
2497         crit_exit();
2498 #undef exfer
2499 }
2500
2501 void
2502 ehci_timeout(void *addr)
2503 {
2504         struct ehci_xfer *exfer = addr;
2505         struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2506         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2507
2508         DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2509 #ifdef USB_DEBUG
2510         if (ehcidebug > 1)
2511                 usbd_dump_pipe(exfer->xfer.pipe);
2512 #endif
2513
2514         if (sc->sc_dying) {
2515                 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2516                 return;
2517         }
2518
2519         /* Execute the abort in a process context. */
2520         usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
2521                      USB_TASKQ_HC);
2522 }
2523
2524 void
2525 ehci_timeout_task(void *addr)
2526 {
2527         usbd_xfer_handle xfer = addr;
2528
2529         DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2530         crit_enter();
2531         ehci_abort_xfer(xfer, USBD_TIMEOUT);
2532         crit_exit();
2533 }
2534
2535 /*
2536  * Some EHCI chips from VIA / ATI seem to trigger interrupts before writing
2537  * back the qTD status, or miss signalling occasionally under heavy load.
2538  * If the host machine is too fast, we can miss transaction completion - when
2539  * we scan the active list the transaction still seems to be active. This
2540  * generally exhibits itself as a umass stall that never recovers.
2541  *
2542  * We work around this behaviour by setting up this callback after any softintr
2543  * that completes with transactions still pending, giving us another chance to
2544  * check for completion after the writeback has taken place.
2545  */
2546 void
2547 ehci_intrlist_timeout(void *arg)
2548 {
2549         ehci_softc_t *sc = arg;
2550
2551         DPRINTFN(3, ("ehci_intrlist_timeout\n"));
2552         usb_schedsoftintr(&sc->sc_bus);
2553 }
2554
2555 /************************/
2556
2557 static usbd_status
2558 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2559 {
2560         usbd_status err;
2561
2562         /* Insert last in queue. */
2563         err = usb_insert_transfer(xfer);
2564         if (err)
2565                 return (err);
2566
2567         /* Pipe isn't running, start first */
2568         return (ehci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2569 }
2570
2571 static usbd_status
2572 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2573 {
2574         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2575         usbd_status err;
2576
2577         if (sc->sc_dying)
2578                 return (USBD_IOERROR);
2579
2580 #ifdef DIAGNOSTIC
2581         if (!(xfer->rqflags & URQ_REQUEST)) {
2582                 /* XXX panic */
2583                 kprintf("ehci_device_ctrl_transfer: not a request\n");
2584                 return (USBD_INVAL);
2585         }
2586 #endif
2587
2588         err = ehci_device_request(xfer);
2589         if (err)
2590                 return (err);
2591
2592         if (sc->sc_bus.use_polling)
2593                 ehci_waitintr(sc, xfer);
2594         return (USBD_IN_PROGRESS);
2595 }
2596
2597 void
2598 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2599 {
2600         struct ehci_xfer *ex = EXFER(xfer);
2601         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2602         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2603
2604         DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2605
2606 #ifdef DIAGNOSTIC
2607         if (!(xfer->rqflags & URQ_REQUEST)) {
2608                 panic("ehci_ctrl_done: not a request");
2609         }
2610 #endif
2611
2612         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2613                 ehci_del_intr_list(ex); /* remove from active list */
2614                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2615         }
2616
2617         DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2618 }
2619
2620 /* Abort a device control request. */
2621 static void
2622 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2623 {
2624         DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2625         ehci_abort_xfer(xfer, USBD_CANCELLED);
2626 }
2627
2628 /* Close a device control pipe. */
2629 static void
2630 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2631 {
2632         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2633         /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2634
2635         DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2636         ehci_close_pipe(pipe, sc->sc_async_head);
2637 }
2638
2639 usbd_status
2640 ehci_device_request(usbd_xfer_handle xfer)
2641 {
2642 #define exfer EXFER(xfer)
2643         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2644         usb_device_request_t *req = &xfer->request;
2645         usbd_device_handle dev = epipe->pipe.device;
2646         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2647         ehci_soft_qtd_t *setup, *stat, *next;
2648         ehci_soft_qh_t *sqh;
2649         int isread;
2650         int len;
2651         int addr = dev->address;
2652         usbd_status err;
2653
2654         isread = req->bmRequestType & UT_READ;
2655         len = UGETW(req->wLength);
2656
2657         DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
2658                     "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2659                     req->bmRequestType, req->bRequest, UGETW(req->wValue),
2660                     UGETW(req->wIndex), len, dev->address,
2661                     epipe->pipe.endpoint->edesc->bEndpointAddress));
2662
2663         setup = ehci_alloc_sqtd(sc);
2664         if (setup == NULL) {
2665                 err = USBD_NOMEM;
2666                 goto bad1;
2667         }
2668         stat = ehci_alloc_sqtd(sc);
2669         if (stat == NULL) {
2670                 err = USBD_NOMEM;
2671                 goto bad2;
2672         }
2673
2674         sqh = epipe->sqh;
2675         epipe->u.ctl.length = len;
2676
2677 #if 1
2678         /* Update device address and length since they may have changed
2679            during the setup of the control pipe in usbd_new_device(). */
2680         /* XXX This only needs to be done once, but it's too early in open. */
2681         /* XXXX Should not touch ED here! */
2682         sqh->qh.qh_endp =
2683             (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
2684             htole32(
2685              EHCI_QH_SET_ADDR(addr) |
2686              EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2687             );
2688 #endif
2689
2690         /* Set up data transaction */
2691         if (len != 0) {
2692                 ehci_soft_qtd_t *end;
2693
2694                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2695                           &next, &end);
2696                 if (err)
2697                         goto bad3;
2698                 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
2699                 end->nextqtd = stat;
2700                 end->qtd.qtd_next =
2701                 end->qtd.qtd_altnext = htole32(stat->physaddr);
2702         } else {
2703                 next = stat;
2704         }
2705
2706         memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2707
2708         /* Clear toggle */
2709         setup->qtd.qtd_status = htole32(
2710             EHCI_QTD_ACTIVE |
2711             EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2712             EHCI_QTD_SET_CERR(3) |
2713             EHCI_QTD_SET_TOGGLE(0) |
2714             EHCI_QTD_SET_BYTES(sizeof *req)
2715             );
2716         setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2717         setup->qtd.qtd_buffer_hi[0] = 0;
2718         setup->nextqtd = next;
2719         setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2720         setup->xfer = xfer;
2721         setup->len = sizeof *req;
2722
2723         stat->qtd.qtd_status = htole32(
2724             EHCI_QTD_ACTIVE |
2725             EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2726             EHCI_QTD_SET_CERR(3) |
2727             EHCI_QTD_SET_TOGGLE(1) |
2728             EHCI_QTD_IOC
2729             );
2730         stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2731         stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
2732         stat->nextqtd = NULL;
2733         stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2734         stat->xfer = xfer;
2735         stat->len = 0;
2736
2737 #ifdef EHCI_DEBUG
2738         if (ehcidebug > 5) {
2739                 DPRINTF(("ehci_device_request:\n"));
2740                 ehci_dump_sqh(sqh);
2741                 ehci_dump_sqtds(setup);
2742         }
2743 #endif
2744
2745         exfer->sqtdstart = setup;
2746         exfer->sqtdend = stat;
2747 #ifdef DIAGNOSTIC
2748         if (!exfer->isdone) {
2749                 kprintf("ehci_device_request: not done, exfer=%p\n", exfer);
2750         }
2751         exfer->isdone = 0;
2752 #endif
2753
2754         /* Insert qTD in QH list. */
2755         crit_enter();
2756         ehci_set_qh_qtd(sqh, setup);
2757         if (xfer->timeout && !sc->sc_bus.use_polling) {
2758                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2759                             ehci_timeout, xfer);
2760         }
2761         ehci_add_intr_list(sc, exfer);
2762         xfer->status = USBD_IN_PROGRESS;
2763         crit_exit();
2764
2765 #ifdef EHCI_DEBUG
2766         if (ehcidebug > 10) {
2767                 DPRINTF(("ehci_device_request: status=%x\n",
2768                          EOREAD4(sc, EHCI_USBSTS)));
2769                 DELAY(10000);
2770                 ehci_dump_regs(sc);
2771                 ehci_dump_sqh(sc->sc_async_head);
2772                 ehci_dump_sqh(sqh);
2773                 ehci_dump_sqtds(setup);
2774         }
2775 #endif
2776
2777         return (USBD_NORMAL_COMPLETION);
2778
2779  bad3:
2780         ehci_free_sqtd(sc, stat);
2781  bad2:
2782         ehci_free_sqtd(sc, setup);
2783  bad1:
2784         DPRINTFN(-1,("ehci_device_request: no memory\n"));
2785         xfer->status = err;
2786         usb_transfer_complete(xfer);
2787         return (err);
2788 #undef exfer
2789 }
2790
2791 /************************/
2792
2793 static usbd_status
2794 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2795 {
2796         usbd_status err;
2797
2798         /* Insert last in queue. */
2799         err = usb_insert_transfer(xfer);
2800         if (err)
2801                 return (err);
2802
2803         /* Pipe isn't running, start first */
2804         return (ehci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
2805 }
2806
2807 usbd_status
2808 ehci_device_bulk_start(usbd_xfer_handle xfer)
2809 {
2810 #define exfer EXFER(xfer)
2811         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2812         usbd_device_handle dev = epipe->pipe.device;
2813         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2814         ehci_soft_qtd_t *data, *dataend;
2815         ehci_soft_qh_t *sqh;
2816         usbd_status err;
2817         int len, isread, endpt;
2818
2819         DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
2820                      xfer, xfer->length, xfer->flags));
2821
2822         if (sc->sc_dying)
2823                 return (USBD_IOERROR);
2824
2825 #ifdef DIAGNOSTIC
2826         if (xfer->rqflags & URQ_REQUEST)
2827                 panic("ehci_device_bulk_start: a request");
2828 #endif
2829
2830         len = xfer->length;
2831         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2832         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2833         sqh = epipe->sqh;
2834
2835         epipe->u.bulk.length = len;
2836
2837         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2838                                    &dataend);
2839         if (err) {
2840                 DPRINTFN(-1,("ehci_device_bulk_start: no memory\n"));
2841                 xfer->status = err;
2842                 usb_transfer_complete(xfer);
2843                 return (err);
2844         }
2845
2846 #ifdef EHCI_DEBUG
2847         if (ehcidebug > 5) {
2848                 DPRINTF(("ehci_device_bulk_start: data(1)\n"));
2849                 ehci_dump_sqh(sqh);
2850                 ehci_dump_sqtds(data);
2851         }
2852 #endif
2853
2854         /* Set up interrupt info. */
2855         exfer->sqtdstart = data;
2856         exfer->sqtdend = dataend;
2857 #ifdef DIAGNOSTIC
2858         if (!exfer->isdone) {
2859                 kprintf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
2860         }
2861         exfer->isdone = 0;
2862 #endif
2863
2864         crit_enter();
2865         ehci_set_qh_qtd(sqh, data);
2866         if (xfer->timeout && !sc->sc_bus.use_polling) {
2867                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2868                             ehci_timeout, xfer);
2869         }
2870         ehci_add_intr_list(sc, exfer);
2871         xfer->status = USBD_IN_PROGRESS;
2872         crit_exit();
2873
2874 #ifdef EHCI_DEBUG
2875         if (ehcidebug > 10) {
2876                 DPRINTF(("ehci_device_bulk_start: data(2)\n"));
2877                 DELAY(10000);
2878                 DPRINTF(("ehci_device_bulk_start: data(3)\n"));
2879                 ehci_dump_regs(sc);
2880 #if 0
2881                 kprintf("async_head:\n");
2882                 ehci_dump_sqh(sc->sc_async_head);
2883 #endif
2884                 kprintf("sqh:\n");
2885                 ehci_dump_sqh(sqh);
2886                 ehci_dump_sqtds(data);
2887         }
2888 #endif
2889
2890         if (sc->sc_bus.use_polling)
2891                 ehci_waitintr(sc, xfer);
2892
2893         return (USBD_IN_PROGRESS);
2894 #undef exfer
2895 }
2896
2897 static void
2898 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2899 {
2900         DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2901         ehci_abort_xfer(xfer, USBD_CANCELLED);
2902 }
2903
2904 /*
2905  * Close a device bulk pipe.
2906  */
2907 static void
2908 ehci_device_bulk_close(usbd_pipe_handle pipe)
2909 {
2910         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2911
2912         DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2913         ehci_close_pipe(pipe, sc->sc_async_head);
2914 }
2915
2916 void
2917 ehci_device_bulk_done(usbd_xfer_handle xfer)
2918 {
2919         struct ehci_xfer *ex = EXFER(xfer);
2920         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2921         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2922
2923         DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2924                      xfer, xfer->actlen));
2925
2926         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2927                 ehci_del_intr_list(ex); /* remove from active list */
2928                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2929         }
2930
2931         DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2932 }
2933
2934 /************************/
2935
2936 static usbd_status
2937 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
2938 {
2939         struct ehci_soft_islot *isp;
2940         int islot, lev;
2941
2942         /* Find a poll rate that is large enough. */
2943         for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
2944                 if (EHCI_ILEV_IVAL(lev) <= ival)
2945                         break;
2946
2947         /* Pick an interrupt slot at the right level. */
2948         /* XXX could do better than picking at random. */
2949         islot = EHCI_IQHIDX(lev, karc4random());
2950
2951         sqh->islot = islot;
2952         isp = &sc->sc_islots[islot];
2953         ehci_add_qh(sqh, isp->sqh);
2954
2955         return (USBD_NORMAL_COMPLETION);
2956 }
2957
2958 static usbd_status
2959 ehci_device_intr_transfer(usbd_xfer_handle xfer)
2960 {
2961         usbd_status err;
2962
2963         /* Insert last in queue. */
2964         err = usb_insert_transfer(xfer);
2965         if (err)
2966                 return (err);
2967
2968         /*
2969          * Pipe isn't running (otherwise err would be USBD_INPROG),
2970          * so start it first.
2971          */
2972         return (ehci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2973 }
2974
2975 static usbd_status
2976 ehci_device_intr_start(usbd_xfer_handle xfer)
2977 {
2978 #define exfer EXFER(xfer)
2979         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2980         usbd_device_handle dev = xfer->pipe->device;
2981         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2982         ehci_soft_qtd_t *data, *dataend;
2983         ehci_soft_qh_t *sqh;
2984         usbd_status err;
2985         int len, isread, endpt;
2986
2987         DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
2988             xfer, xfer->length, xfer->flags));
2989
2990         if (sc->sc_dying)
2991                 return (USBD_IOERROR);
2992
2993 #ifdef DIAGNOSTIC
2994         if (xfer->rqflags & URQ_REQUEST)
2995                 panic("ehci_device_intr_start: a request");
2996 #endif
2997
2998         len = xfer->length;
2999         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3000         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3001         sqh = epipe->sqh;
3002
3003         epipe->u.intr.length = len;
3004
3005         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
3006             &dataend);
3007         if (err) {
3008                 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
3009                 xfer->status = err;
3010                 usb_transfer_complete(xfer);
3011                 return (err);
3012         }
3013
3014 #ifdef EHCI_DEBUG
3015         if (ehcidebug > 5) {
3016                 DPRINTF(("ehci_device_intr_start: data(1)\n"));
3017                 ehci_dump_sqh(sqh);
3018                 ehci_dump_sqtds(data);
3019         }
3020 #endif
3021
3022         /* Set up interrupt info. */
3023         exfer->sqtdstart = data;
3024         exfer->sqtdend = dataend;
3025 #ifdef DIAGNOSTIC
3026         if (!exfer->isdone) {
3027                 kprintf("ehci_device_intr_start: not done, ex=%p\n", exfer);
3028         }
3029         exfer->isdone = 0;
3030 #endif
3031
3032         crit_enter();
3033         ehci_set_qh_qtd(sqh, data);
3034         if (xfer->timeout && !sc->sc_bus.use_polling) {
3035                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3036                     ehci_timeout, xfer);
3037         }
3038         ehci_add_intr_list(sc, exfer);
3039         xfer->status = USBD_IN_PROGRESS;
3040         crit_exit();
3041
3042 #ifdef EHCI_DEBUG
3043         if (ehcidebug > 10) {
3044                 DPRINTF(("ehci_device_intr_start: data(2)\n"));
3045                 DELAY(10000);
3046                 DPRINTF(("ehci_device_intr_start: data(3)\n"));
3047                 ehci_dump_regs(sc);
3048                 kprintf("sqh:\n");
3049                 ehci_dump_sqh(sqh);
3050                 ehci_dump_sqtds(data);
3051         }
3052 #endif
3053
3054         if (sc->sc_bus.use_polling)
3055                 ehci_waitintr(sc, xfer);
3056
3057         return (USBD_IN_PROGRESS);
3058 #undef exfer
3059 }
3060
3061 static void
3062 ehci_device_intr_abort(usbd_xfer_handle xfer)
3063 {
3064         DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3065         if (xfer->pipe->intrxfer == xfer) {
3066                 DPRINTFN(1, ("ehci_device_intr_abort: remove\n"));
3067                 xfer->pipe->intrxfer = NULL;
3068         }
3069         ehci_abort_xfer(xfer, USBD_CANCELLED);
3070 }
3071
3072 static void
3073 ehci_device_intr_close(usbd_pipe_handle pipe)
3074 {
3075         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3076         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3077         struct ehci_soft_islot *isp;
3078
3079         isp = &sc->sc_islots[epipe->sqh->islot];
3080         ehci_close_pipe(pipe, isp->sqh);
3081 }
3082
3083 static void
3084 ehci_device_intr_done(usbd_xfer_handle xfer)
3085 {
3086 #define exfer EXFER(xfer)
3087         struct ehci_xfer *ex = EXFER(xfer);
3088         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3089         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3090         ehci_soft_qtd_t *data, *dataend;
3091         ehci_soft_qh_t *sqh;
3092         usbd_status err;
3093         int len, isread, endpt;
3094
3095         DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3096             xfer, xfer->actlen));
3097
3098         if (xfer->pipe->repeat) {
3099                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3100
3101                 len = epipe->u.intr.length;
3102                 xfer->length = len;
3103                 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3104                 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3105                 sqh = epipe->sqh;
3106
3107                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3108                     &data, &dataend);
3109                 if (err) {
3110                         DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3111                         xfer->status = err;
3112                         return;
3113                 }
3114
3115                 /* Set up interrupt info. */
3116                 exfer->sqtdstart = data;
3117                 exfer->sqtdend = dataend;
3118 #ifdef DIAGNOSTIC
3119                 if (!exfer->isdone) {
3120                         kprintf("ehci_device_intr_done: not done, ex=%p\n",
3121                             exfer);
3122                 }
3123                 exfer->isdone = 0;
3124 #endif
3125
3126                 crit_enter();
3127                 ehci_set_qh_qtd(sqh, data);
3128                 if (xfer->timeout && !sc->sc_bus.use_polling) {
3129                         callout_reset(&xfer->timeout_handle,
3130                             MS_TO_TICKS(xfer->timeout), ehci_timeout, xfer);
3131                 }
3132                 crit_exit();
3133
3134                 xfer->status = USBD_IN_PROGRESS;
3135         } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3136                 ehci_del_intr_list(ex); /* remove from active list */
3137                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3138         }
3139 #undef exfer
3140 }
3141
3142 /************************/
3143
3144 static usbd_status
3145 ehci_device_isoc_transfer(usbd_xfer_handle xfer)
3146 {
3147         return USBD_IOERROR;
3148 }
3149
3150 static usbd_status
3151 ehci_device_isoc_start(usbd_xfer_handle xfer)
3152 {
3153         return USBD_IOERROR;
3154 }
3155
3156 static void
3157 ehci_device_isoc_abort(usbd_xfer_handle xfer)
3158 {
3159 }
3160
3161 static void
3162 ehci_device_isoc_close(usbd_pipe_handle pipe)
3163 {
3164 }
3165
3166 static void
3167 ehci_device_isoc_done(usbd_xfer_handle xfer)
3168 {
3169 }
3170
3171 MODULE_DEPEND(ehci, usb, 1, 1, 1);